Boost converter with wide average current limit range

Abstract

A boost converter (100) providing a wide average current limit range includes a switch (104) coupled to an inductor output (130) and a power input (124); a diode (106) coupled to the inductor output and an output terminal load (126) and configured to conduct current only in one direction facing away from the inductor output and toward the output terminal; a clamping circuit (404) coupled to the diode and the switch; and a minimum off-time module (406) coupled to the diode and the switch. The clamping circuit is configured to clamp an inductor output current (120) to a reference current when the converter is operating in a continuous conduction mode of operation (CCM). The minimum turn-off time module is configured to zero the inductor output current for at least a time Toff when the converter is operating in a pulse frequency modulation (PFM) mode of operation.

Description

[0001] The present description relates to electronic circuits, and more particularly to electronic circuits that convert a direct current (DC) source from one voltage level to another. Background Art

[0002] A DC-DC converter is a device that converts the voltage of a DC power source (such as a battery or other power supply) to a different voltage level for consumption by one or more other components (also called loads). For example, a boost converter is a type of DC-DC converter that produces an output voltage that is higher than the input voltage while reducing or stepping down the current. A boost converter uses a switching inductor to buffer energy that can be periodically supplied to the load at a voltage higher than the voltage supplied to the inductor. While the inductor is buffering the energy, the downstream capacitor temporarily powers the load independently of the power source. The periodic storage of energy to the inductor and capacitor and the release of energy from the inductor and capacitor can be controlled to achieve the desired voltage and current at the output of the converter. Summary of the invention

[0003] DC-DC converters are described herein, and in particular boost converters that provide a relatively wide current limit range.

[0004] In one example, a DC-DC boost converter includes a switch, a diode, a clamp circuit, and a minimum off time module. The switch is coupled to an inductor output and a power input. The diode is coupled to the inductor output and an output terminal of the DC-DC boost converter. The diode is configured to conduct current only in one direction away from the inductor output and toward the output terminal of the DC-DC boost converter. The clamp circuit is coupled to the diode and the switch. The clamp circuit is configured to clamp the inductor output current to a reference current when the DC-DC boost converter is operating in a continuous conduction operating mode (CCM). The minimum off time module is coupled to the diode and the switch, and the minimum off time module is configured to make the inductor output current zero for at least a time Toff when the DC-DC boost converter is operating in a pulse frequency modulation (PFM) operating mode.

[0005] Another example is a method of controlling a DC-DC converter. The DC-DC converter includes a switch coupled to an inductor output and a power input, and a diode coupled to the inductor output and an output terminal of a DC-DC boost converter. The method includes clamping the inductor output current to a reference current by a clamp circuit and in a continuous conduction mode of operation (CCM). The method further includes making the inductor output current zero for at least a time Toff by a minimum off time module and in a pulse frequency modulation (PFM) mode of operation.

[0006] Another example is a device that includes a power supply input, a DC-DC boost converter coupled to the power input, and a load input coupled to an output terminal of the DC-DC boost converter. The power input is configured to provide an output voltage of at most 1.5 volts and an output current of at most 1.5 amperes to the DC-DC boost converter. The DC-DC boost converter is configured to provide an output voltage greater than 1.5 volts and an output current of at least 5 milliamperes to the load input. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a schematic diagram of an example boost converter.

[0008] Figure 2 shows that when the converter is operating in continuous conduction mode Figure 1 Example current waveform of a converter.

[0009] Figure 3 shows when the converter is operating in pulse frequency modulation mode Figure 1 Example current waveform of a converter.

[0010] Figure 4 It includes clamping circuit and minimum off time module. Figure 1 Schematic diagram of another example of a converter.

[0011] Figure 5 yes Figure 1 Schematic diagram of an example portion of a converter.

[0012] Figure 6 yes Figure 4 and 5 Schematic diagram of an example portion of a clamping circuit.

[0013] Figure 7 yes Figure 4 and 5 Schematic diagram of an example of the minimum off-time module.

[0014] Figure 8 shows when the converter is operating in pulse frequency modulation mode Figure 1 and 4 Example current and control waveforms for a 10-7 converter.

[0015] Fig. 9 is a flow chart of an example method of controlling a DC-DC converter. DETAILED DESCRIPTION

[0016] A DC-DC converter is described herein, and in particular, a boost converter with a wide average current limit range is provided. In one example, the boost converter can be controlled so that the average current of the inductor is maintained within one or more target limits (high, low, or both), rather than controlling the converter by limiting only the inductor peak (high) or valley (low) current. In some such examples, the converter controls the average current limit to provide a wide current limit range from approximately 5mA to 1.5A when operating in a continuous conduction mode (CCM) or a pulse frequency modulation (PFM) mode, wherein the inductor peak current is greater than approximately 200mA, which is described in further detail below. In some examples, any inductor peak and valley current errors caused by circuit response delays are adaptively compensated according to input and output voltages to reduce or eliminate overshoot of the target average current limit. In some other examples, the converter control voltage is clamped near the switch trigger voltage under light load to limit the first cycle current limit error during load transients. Although the techniques described herein can be used in any number of applications, they are particularly well suited for battery-powered applications with low current (e.g., approximately 1.5 amps (A) or less). Examples of such applications include medical sensors, smart home systems, tablet devices, wearable devices, power metering devices, or other devices that are powered by a coin cell type or other low voltage battery (e.g., a battery that provides between approximately 0.9 and 1.5 volts and has a resistance of less than approximately 20 ohms) and have an operating requirement for a power rail at or above the battery voltage (e.g., at or above 0.9-1.5 volts).

[0017] General Overview

[0018] Some DC-DC converters operate within a relatively narrow current limit range, such as between approximately 250 milliamperes (mA) and 1 ampere (A), by limiting the inductor peak and / or valley current. However, such boost converters cannot operate if the power source (e.g., a battery) provides a current that is lower than the converter's operating inductor valley current limit (e.g., approximately 10 mA or less). If an existing boost converter design that limits the inductor peak and valley current is modified to operate at a lower current (e.g., 10 mA or less), a larger inductor is required to store a sufficient amount of energy to power the load, which is inefficient due to switching losses of the inverter relative to the power output by the converter, as well as more expensive hardware (e.g., an external sense resistor), further reducing efficiency.

[0019] To this end, a DC-DC converter having a wide current limit range (e.g., between approximately 5 mA and 1.5 A) and techniques for DC-DC power conversion are described. As used herein, the phrase "inductor current" refers to the current flowing out of the inductor of the converter. As used herein, the phrase "average current" generally refers to a value representing the average magnitude of two or more currents, such as half the sum of the inductor valley current and the inductor peak current. In some instances, the average current may represent the actual inductor current averaged over a time period, such as over one or more switching cycles of the converter (e.g., the time between consecutive charging or discharging sequences of the inductor). As used herein, the phrase "average current limit" refers to a maximum or minimum average current, which may be preconfigured or configurable, and may include a range of values ​​between and including the inductor peak and / or valley currents.

[0020] In some examples, the boost converter can be operated in one or more modes in which the inductor peak and / or valley current is sensed and adjusted to provide a preconfigured or configurable average current limit (e.g., any value or range of values ​​between and including approximately 5 mA and 1.5 A). Specifically, depending on the target average current limit, the inductor valley (low-side) current is proportional to the actual (I L ) or error adjusted (I EA ) output current, and the inductor peak (high-side) current is adjusted proportionally to the actual or error-adjusted output current of the inductor plus the hysteresis current of the inductor (using CCM and / or PFM). In some examples, the inductor output current is adjusted to compensate for peak and / or valley inductor current errors caused by circuit response delays. In some examples, the inductor is 1 microhenry (μH). In some examples, the reference current, sense ratio, hysteresis current value, and / or other design parameters of the converter can be programmed via external pins on the silicon (or other semiconductor) or through internal one-time programming (OTP) of the circuit.

[0021] For example, in CCM, the converter is configured to clamp the inductor output current based on a comparison with a reference current and a hysteresis current value, which are preconfigured or configurable design values ​​selected to achieve a target average current limit for a relatively high current load (e.g., greater than approximately 250mA). In theory, the average current limit in CCM is half the sum of the inductor peak current and valley current, which can also be expressed as a reference current plus half the hysteresis current value. In some instances, the average current limit is multiplied by a sensing ratio associated with a current sensing component (e.g., a field effect transistor or FET). For example, if the target average current limit is 1.5A and the current sensing ratio is 10K, the reference current can be selected to be 130μA, and the hysteresis current value can be selected to be 40μA. Therefore, for a current limit range between approximately 250mA and 1.5A, the converter senses the inductor output current and compares the inductor output current to a preconfigured or configurable reference current. If the sensed current is higher than the reference current, the converter clamps the output of the error amplifier (which amplifies the inductor output current) so that the inductor current is limited to a preset level. Different reference current levels can be used to achieve different current limits.

[0022] In another example, in PFM, the converter is configured to maintain the inductor current at zero for at least a minimum amount of time based on the inductor peak current, which is a preconfigured or configurable design value selected to achieve a target average current limit for relatively low current loads (e.g., less than approximately 250 mA and as low as approximately 5 mA). In theory, the average current limit in PFM is half of the inductor peak current multiplied by the ratio of the time that the inductor current is non-zero relative to the total switching cycle time (during which the inductor current is both zero and non-zero). The inductor peak current can also be expressed as half of the sum of the sensed inductor current and the hysteresis current. Therefore, the average current limit can be achieved by controlling the minimum off-time period (zero inductor current) based on the sensed inductor current, the hysteresis current, and the current sensing ratio (which limits the inductor peak current and the average current limit).

[0023] Operation Mode

[0024] As described above, in some examples, the boost converter may be operated in a CCM mode in which current continuously flows out of the inductor, and / or in a PFM or discontinuous conduction mode in which the current flowing out of the inductor drops to zero. To control the average current limit when the converter is operating in CCM, the maximum output current of the inductor is clamped to a preconfigured or configurable reference current that limits the inductor average current to a current range that includes the inductor valley current plus half of the hysteresis current. To control the average current limit when the converter is operating in PFM, the inductor current is controlled to be zero (T) based on the peak inductor current and the time that the current is non-zero (on). off ) to limit the inductor average current to a current range that includes half of the inductor peak current multiplied by the ratio of the inductor charging (on) time to the total switching cycle time. In this way, the converter can effectively cover a wide average current limit as low as approximately 5mA (in PFM) to as high as approximately 1.5A (in CCM) using a small inductor (e.g., 1μH) and protect the power supply or battery from over-current conditions. This is in contrast to alternative converter designs in which the minimum current in CCM or PFM is approximately 100-200mA and which require an additional current loop and external sense FET or resistor (with additional connection pins on the chip to monitor the FET / resistor) or a large (e.g., 47μH) inductor.

[0025] Boost Converter Architecture

[0026] Figure 1 is a schematic diagram of an example boost converter 100. The boost converter includes an inductor (L) 102, an inductor output 130, a switch (S) 104, a diode (D) 106, and a capacitor (C) 108. A DC power source V s 110 is coupled in series with the inductor 102 at the power input 124, and the load input of the load 112 is coupled in parallel with the capacitor 108 to the output terminal 126. When the switch 104 is closed, the current 120 flows in a clockwise direction through the inductor 102 and the inductor output 130, and the inductor 102 buffers the energy. The polarity of the left (source or input) side of the inductor 102 is positive, so that the diode 106 blocks the output current 122 to the capacitor 108 and the load 112. Therefore, the load 112 is powered by the capacitor 108. When the switch 104 is opened, the current 120 entering the inductor 102 is reduced due to the impedance of the inductor 102, and the energy stored in the inductor 102 is discharged as a current to the load 112. As a result, the polarity across the inductor 102 is reversed (the polarity of the right side or output side of the inductor 102 is positive), thereby charging the capacitor 108 via the diode 106.

[0027] The control portion 114 of the converter 100 includes the switch 104 and other components for controlling the switch 104, such as Figure 4-9 The control portion 114 is configured to operate the converter 100 in CCM or PFM so that the inductor average current is maintained within a desired range. The desired range may be, for example, a preconfigured or configurable range. When the converter 100 is operating in CCM, the inductor output current 120 is above zero, for example Figure 2 If the peak value of the inductor current 120 (e.g., approximately 100 mA) is less than the DC component of the inductor current 120, the output current 122 through the diode 106 is positive, and the diode 106 is turned on when the switch 104 is turned off. In contrast, during PFM or discontinuous conduction mode, the inductor current 120 drops to zero when the switch 104 is turned off, e.g. Figure 3 If the peak value of the inductor current 120 is greater than the DC component of the inductor current 120, the inductor current 120 drops to zero when the diode 106 is conducting. Therefore, the diode 106 is turned off and the inductor current 120 remains at zero until the switch 104 is closed due to the polarity reversal across the switch 104. During this time, the load 112 is powered from the capacitor 108.

[0028] Boost Converter Control

[0029] Figure 4 yes Figure 1 1 is a schematic diagram of another example of a boost converter 100. The control portion 114 of the converter 100 includes a feedback circuit that compares a feedback voltage (FB) at a node 402 with a reference voltage (VREF) at an input node 408 and adjusts the inductor current 120 so that the average inductor current remains within a configured limit. In some examples, the feedback circuit generates an error-adjusted inductor current 120′ (I EA ) to compensate for circuit response delays, such as described in further detail below. However, the error-adjusted inductor current 120' is used to represent the actual inductor current 120 or an approximation thereof.

[0030] In more detail, the feedback circuit includes a clamp circuit 404 and a minimum off-time module 406. The feedback node 402 (FB) is compared to a reference voltage (VREF) at an input node 408 by a transconductance (gm) amplifier 416. The gm amplifier outputs an error voltage, which is converted to a current 120′ (I EA ). Set the current 120'(I EA) is compared with the inductor sense current 410 for regulating the inductor current 120. The clamp circuit 404 is configured to clamp the gm amplifier output so that the current 120′ (I EA ) and the inductor current 120 are also clamped. The inductor currents 120, 120' (I EA ) is based on the sensed inductor peak current 410 when the converter 100 is operating in CCM and a preconfigured or configurable current sensing ratio K, e.g. Figure 5 and 6 This results in the inductor average current being maintained at or within the configured limit when the converter 100 is operating in CCM.

[0031] The minimum off time module 406 (TOFF_MIN) is configured to keep the inductor current 120, 120' between switching the inductor 102 when the converter 100 is operating in PFM for at least a time T off is zero, for example Figure 5 and 7 Further details are given below. Time T off Proportional to the inductor peak current, which is preconfigured or configurable so that the inductor average current remains at or within the configured limit when the converter is operating in PFM.

[0032] CCM Theory of Operation

[0033] Figure 5 yes Figure 1 Schematic diagram of an example portion of a boost converter 100 of FIG. 1. In this example, the converter 100 includes an inductor output 130, a capacitor 108, a clamp circuit 404, an inductor valley current comparator circuit 502, an inductor peak current comparator circuit 504, a valley current sense FET 506, a peak current sense FET 508, a switch control module 510, a minimum off-time module 406, a PFM off-time module 512, a reference voltage source input node 408, and a transconductance (gm) amplifier 416. For reference, an example portion 550 of the converter 100 includes the clamp circuit 404, the voltage-to-current converter 414, and the gm amplifier 416.

[0034] As described above, when the converter 100 is operating in CCM, the clamp circuit 404 is configured to limit (clamp) the inductor current 120 to be no greater than the reference current (from the reference voltage input node 408) based on the sensed inductor current 410 and the preconfigured or configurable current sensing ratio K. The input to the inductor valley current comparator circuit 502 is the sensed inductor current 120′ (I EA) and the output current (HSD_SNS) of the gm amplifier 416. The inductor valley current comparator circuit 502 compares the inductor current 120' (I EA ) is compared with the output current of the gm amplifier 416, which converts the output voltage of the converter 100 into a current. The current sensing ratio K can be configured so that the inductor valley current is K times the output current of the gm amplifier 416.

[0035] I valley =K*I REF

[0036] The inputs to the inductor peak current comparator circuit 504 are the sensed inductor current 120 (SW_SNS) and the output current (LSD_REF) of the gm amplifier 416. The inductor peak current comparator circuit 504 compares the inductor current 120' (I EA ) plus hysteresis I HYS (constant) is compared to the output current of the gm amplifier 416. The current sensing ratio K may be configured so that the inductor peak current is K times the output of the gm amplifier 416 plus the hysteresis (ripple) value of the inductor current 120.

[0037] I peak =K*(I REF +I HYS )

[0038] therefore,

[0039]

[0040] I REF and I HYS Both are configurable values. For example, if the current limit is 1.5A, the hysteresis current is 0.4A, and the current sense ratio is 10K, then I HYS =40μA and I REF =130μA.

[0041] The outputs of the inductor valley current comparator circuit 502 and the inductor peak current comparator circuit 504 provide control signals at their respective outputs to drive the switch control module 510 to gate the switch 104, as described with respect to FIG. Figure 1 As described, the inductor average current is kept within the configured limits.

[0042] Figure 6 yes Figure 4 and 5Schematic diagram of an example portion 550 of the converter 100. In CCM operation, the current 120' (I EA ) and the reference current I REF is compared and is subjected to a reference current (I REF ) so that the average inductor current remains within the configured limit.

[0043] PFM Theory of Operation

[0044] Reference again Figure 5 In PFM operation, the output current of the gm amplifier 416 is limited by the reference voltage source input node 408 for gate control of the switch 104 via the switch control module 510 such that the average inductor current remains within the configured limit. More specifically, the output current of the gm amplifier 416 drives the PFM off-time module 512, and half of the output current of the gm amplifier 416 drives the minimum off-time module 406. The outputs of the PFM off-time module 512 and the minimum off-time module 406 are logically ANDed, so that the switch control module 510 gates the switch 104 to limit the average inductor current, for example Figure 3 shown.

[0045] For a relatively low current limit (e.g., 5 mA), the peak inductor current is set to be relatively high to improve efficiency (e.g., 350 mA). The control portion 114 of the converter 100 includes an internal feedback circuit designed to limit the minimum off-time of the inductor current. When the load 112 is relatively low, the off-time is longer than the minimum off-time because the load is powered from the capacitor 108 and the output voltage is regulated so that the average current is below the current limit. As the load 112 increases, the off-time decreases, which increases the average current because the inductor conducts current for a longer amount of time. When the off-time is reduced to the minimum off-time, the off-time is clamped (limited) at a minimum value so as to also limit (clamp) the average current. The minimum off-time is based on a reference current of the converter 100, such as described in further detail below.

[0046] Figure 7 is used to make at least T OFF Schematic diagram of an example of the minimum off-time module 406 occurring in PFM. The inductor peak current is defined as:

[0047] I peak =(I ea +I HYS )*K

[0048] Among them I EAis the error adjusted inductor current 120', such as described in further detail below. In PFM operation, the average current limit is:

[0049]

[0050] Where T p represents the time when the current flows through the inductor 102 (the inductor current is greater than zero), for example Figure 8 As shown. Refer again Figure 7 MN1 and MN2 are driven with a bias current of 0.5*I0, generating a low clamping voltage on node VC_CHG, which is close to I0 and the threshold voltage V of inverter MN0. t Under light load conditions where the inductor is not switched frequently (long off time), VC_CHG is clamped at the threshold voltage of inverter MN0 (V t ) below approximately 20mV, which avoids allowing VC_CHG to discharge too low and below (V t ).like Figure 8 As shown, at the beginning of the switching cycle of switch 104 to charge inductor 102 (TOFF_MIN pulse is high to close switch 104), VC_CHG starts to increase while output TOFF_MIN is low. After switch 104 is turned off to discharge inductor 102, VC_CHG starts to decrease until it reaches the threshold voltage V t , at which time a new switching cycle for the switch 104 to charge the inductor 102 begins (TOFF_MIN pulse is high).

[0051] In the cycle time T p During this period, capacitor 108 receives 1 / 2*(I EA +I HYS ) current. At all times (T p +T OFF ), the capacitor 108 makes the current I REF_PFM Discharge, the current is preconfigurable or configurable based on the target average current. The charge and discharge voltages are equal on node VC_CHG. Therefore,

[0052]

[0053] I LIM_PFM =K*I REF_PFM

[0054] TOFF_MIN is established so that T OFF Long enough to achieve the target average current limit I by limiting the inductor current over time (including on-time and off-time) when the converter is operating in PFM LIM_PFM If K = 10K, I REF_PFM=0.5μA and I LIM_PFM =5mA, then during PFM operation I EA is clamped to 5μA to limit the peak inductor current.

[0055] Inductor peak / valley current error compensation

[0056] See again Figure 5 In some examples, there may be a delay in the operation of the inductor valley current comparator circuit 502 and the inductor peak current comparator circuit 504. This delay T d Introducing an error into the inductor peak current, which in turn may cause the converter 100 to overshoot the target inductor peak current (thereby increasing the inductor average current). For example, the error may be defined as:

[0057]

[0058] Where VIN is the input voltage, L is the inductance, and T d represents a delay. For example, if T d = 20 nanoseconds, VIN = 3.6V, and L = 1μH, then I peak_error =72mA. If the inductor peak current is 400mA, the error in the inductor peak current is less than 20% and the error in the inductor average current is approximately 10%.

[0059] In some examples, to reduce the inductor peak current error, the offset current I offset is added to the sensed inductor current 120 to compensate for the inductor peak current error (eg Figure 5 518) to generate an error-adjusted inductor current 120' (I EA ):

[0060]

[0061] I ea =I L +I offset

[0062] Among them I L is the actual inductor current 120.

[0063] Similarly, the offset current I offset is added to the sensed inductor current 120 to compensate for valley current errors (eg Figure 5 520) to generate an error-adjusted inductor current 120' (I EA ):

[0064]

[0065] Instance Methods

[0066] Fig. 9 is a flow chart of an example method 900 of controlling a DC-DC converter. In this example, the converter includes a switch coupled to an inductor and a power input, and a diode coupled to the inductor and an output terminal of the DC-DC converter, such as Figure 1 and 4 -7 converter 100. Method 900 includes sensing 902 an inductor output current. For example, as described above, the converter may be configured to limit the average current based at least in part on an inductor peak current and / or an inductor valley current sensed by, for example, a sense FET or other suitable current sensing device. Method 900 further includes: in CCM, comparing 904 the sensed inductor output current plus a constant hysteresis current value with the output current of the gm amplifier, and clamping 906 the inductor output current to a reference current. For example, as described above, the clamp circuit may be configured to limit (clamp) the inductor current to no greater than a reference current based on the sensed inductor current and a preconfigured or configurable current sensing ratio K. Thus, a target average current limit of a relatively high current (e.g., >=100 mA) may be achieved in CCM using suitable design parameters including a current sensing ratio and hysteresis of the inductor output current. The method 900 further includes causing 908 the inductor output current to be constant for at least a time T in the PFM. off For example, as described above, the minimum off-time module can be configured to keep the inductor output current at least partially based on the inductor peak current for at least time T off =0. Thus, a target average current limit of relatively low current (e.g., <= 100 mA) can be achieved in PFM using appropriate design parameters including a hysteresis current value and a current sensing ratio. Method 900 further includes gating 910 a converter switch based at least in part on the inductor output current. For example, the output of the clamp circuit and / or the minimum off-time module can be used to gate the converter switch so that the average current remains within the target average current limit, e.g., Figure 4 and 5 described.

[0067] Other Examples

[0068] Example 1 is a DC-DC boost converter, comprising a switch, a diode, a clamp circuit, and a minimum off time module. The switch is coupled to an inductor and a power input. The diode is coupled to the inductor and the output terminal of the DC-DC boost converter and is configured to conduct current only in one direction away from the inductor and toward the output terminal of the DC-DC boost converter. The clamp circuit is coupled to the diode and the switch. The clamp circuit is configured to clamp the inductor output current to a reference current when the DC-DC boost converter is operating in a continuous conduction operating mode (CCM). The minimum off time module is coupled to the diode and the switch, and the minimum off time module is configured to make the inductor output current zero for at least a time Toff when the converter is operating in a pulse frequency modulation (PFM) operating mode.

[0069] Example 2 includes the converter of Example 1, wherein the clamp circuit is configured to clamp the inductor output current based at least in part on the inductor peak current.

[0070] Example 3 includes the converter of any of Examples 1 and 2, wherein the minimum off-time module is configured to cause the inductor output current to be zero for at least time Toff based at least in part on the inductor peak current.

[0071] Example 4 includes the converter of any one of Examples 1-3, comprising a transconductance (gm) amplifier and a reference source input node, the gm amplifier being coupled to an output terminal of the DC-DC boost converter and the switch via a feedback circuit and configured to convert an output voltage into an output current, the output current of the gm amplifier being limited by a reference voltage source.

[0072] Example 5 includes the converter of Example 4, which includes an inductor valley current comparator circuit and an inductor peak current comparator circuit, wherein the inductor valley current comparator circuit includes a first comparator coupled to the inductor and the output of the gm amplifier, and the inductor peak current comparator circuit includes a second comparator coupled to the inductor and the output of the gm amplifier, wherein the output of the inductor valley current comparator circuit and the output of the inductor peak current comparator circuit are each coupled to a switch.

[0073] Example 6 includes the converter of Example 5, which includes a low current sensing field effect transistor (FET) coupled to the inductor and the first comparator, and a high current sensing FET coupled to the inductor and the second comparator, wherein the low current sensing FET is configured to sense the inductor output current and provide the sensed inductor output current to the first comparator, and the high current sensing FET is configured to sense the inductor output current and provide the sensed inductor output current to the second comparator.

[0074] Example 7 includes the converter of Examples 1-6, wherein, in operation, the inductor output current is less than or equal to 1.5 A and greater than or equal to 5 mA.

[0075] Example 8 is a method of controlling a DC-DC converter. The DC-DC converter includes a switch coupled to an inductor and a power input, and a diode coupled to the inductor and an output terminal of a DC-DC boost converter. The method includes clamping the inductor output current to a reference current by a clamp circuit and in a continuous conduction mode of operation (CCM). The method further includes making the inductor output current zero for at least a time Toff by a minimum off time module and in a pulse frequency modulation (PFM) mode of operation.

[0076] Example 9 includes the method of Example 8, including clamping, by the clamp circuit, the inductor output current based at least in part on the inductor peak current.

[0077] Example 10 includes the method of any of Examples 8 and 9, wherein causing the inductor output current to be zero for at least the time Toff by the minimum off-time module is based at least in part on an inductor peak current.

[0078] Example 11 includes the method of any of Examples 8-10, comprising converting the output voltage to an output current by a transconductance (gm) amplifier coupled to an output terminal of the DC-DC boost converter, the output current of the gm amplifier being limited by a current output from a reference source input node.

[0079] Example 12 includes the method of any of Examples 8-11, comprising comparing the inductor output current with the output current of the gm amplifier by an inductor valley current comparator, and comparing the inductor output current plus a constant hysteresis current value with the output current of the gm amplifier by an inductor peak comparator, wherein the switch is gated based on the outputs of the inductor valley current comparator and the inductor peak current comparator.

[0080] Example 13 includes the method of Example 12, which includes sensing the inductor output current by a low current sensing field effect transistor (FET); providing the sensed inductor output current to an inductor valley current comparator by the low current sensing FET; sensing the inductor output current by a high current sensing FET; and providing the sensed inductor output current to an inductor peak current comparator by the high current sensing FET.

[0081] Example 14 is a device comprising a power supply, a DC-DC boost converter coupled to the power supply at a power input, and a load input coupled to an output terminal of the DC-DC boost converter. The power supply is configured to provide an output voltage of at most 1.5 volts and an output current of at most 1.5 amperes to the converter. The converter is configured to provide an output voltage greater than 1.5 volts and an output current of at least 5 milliamperes to the load input.

[0082] Example 15 includes the device of Example 14, comprising: an inductor; a switch coupled to the inductor and a power input; a diode coupled to the inductor and an output terminal of a DC-DC boost converter; a capacitor coupled to the diode and an output terminal of the DC-DC boost converter; a clamp circuit coupled to the diode and the switch, the clamp circuit being configured to clamp the inductor output current to a reference current when the converter is operating in a continuous conduction mode of operation (CCM); and a minimum off-time module coupled to the diode and the switch, the minimum off-time module being configured to cause the inductor output current to be zero for at least a time Toff when the converter is operating in a pulse frequency modulation (PFM) mode of operation.

[0083] Example 16 includes the device of any of Examples 14 and 15, wherein the clamp circuit is configured to clamp the inductor output current based at least in part on the inductor peak current.

[0084] Example 17 includes the device of any of Examples 14-16, wherein the minimum off-time module is configured to cause the inductor output current to be zero for at least time Toff based at least in part on the inductor peak current.

[0085] Example 18 includes the device of any of Examples 14-17, comprising a transconductance (gm) amplifier and a reference source input node, the gm amplifier being coupled to an output terminal of the DC-DC boost converter and configured to convert an output voltage to an output current, the output current of the gm amplifier being limited by a current output from the reference source input node.

[0086] Example 19 includes the device of any of Examples 14-18, comprising an inductor valley current comparator and an inductor peak current comparator, wherein the inductor valley current comparator is configured to compare the inductor output current with the output current of the gm amplifier, and the inductor peak current comparator is configured to compare the inductor output current plus a constant hysteresis current value with the output current of the gm amplifier, wherein the switch is gated based on the output of the inductor valley current comparator and the inductor peak current comparator.

[0087] Example 20 includes the device of Example 19, which includes a low current sensing field effect transistor (FET) and a high current sensing FET, wherein the low current sensing FET is configured to sense the inductor output current and provide the sensed inductor output current to the inductor valley current comparator, and the high current sensing FET is configured to sense the inductor output current and provide the sensed inductor output current to the inductor peak current comparator.

[0088] In this specification, the term "coupled" may encompass a connection, communication or signal path that implements a functional relationship according to this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first instance, device A is coupled to device B through a direct connection; or (b) in a second instance, device A is coupled to device B via an intermediate component C without the intermediate component C changing the functional relationship between device A and device B, so that device B is controlled by device A via the control signal generated by device A.

[0089] A device "configured to" perform a task or function may be configured (e.g., programmed and / or hardwired) by a manufacturer at the time of manufacture to perform the function, and / or may be configured (or reconfigurable) by a user after manufacture to perform the function and / or other additional or alternative functions. The configuration may be via firmware and / or software programming of the device, via the construction and / or layout of the device's hardware components and interconnections, or a combination thereof.

[0090] As used herein, the terms "terminal", "node", "interconnection", "pin" and "lead" are used interchangeably. Unless specifically stated to the contrary, these terms are generally used to refer to the interconnections between device elements, circuit elements, integrated circuits, devices or other electronic devices or semiconductor components or their terminals.

[0091] A circuit or device described herein as including specific components may actually be adapted to be coupled to those components to form the described circuit system or device. For example, a structure described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage and / or current sources) may actually include only semiconductor elements within a single physical device (e.g., a semiconductor die and / or integrated circuit (IC) package), and may be adapted to be coupled to at least some of the passive elements and / or sources to form the described structure at the time of manufacture or after manufacture, for example, by an end user and / or a third party.

[0092] Although the use of specific transistors is described herein, other transistors (or equivalent devices) may be used instead. For example, a p-channel field effect transistor (PFET) may be used in place of an n-channel field effect transistor (NFET) with little or no change to the circuit. Furthermore, other types of transistors (e.g., bipolar junction transistors (BJTs)) may be used. Furthermore, the devices may be implemented in / on a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), or a gallium arsenide substrate (GaAs).

[0093] Reference herein to a field effect transistor (FET) being "on" means that there is a conductive channel of the FET and drain current can flow through the FET. Reference herein to a FET being "off" means that there is no conductive channel and drain current does not flow through the FET. However, an off FET can have current flowing through the body diode of the transistor.

[0094] The circuits described herein can be reconfigured to include additional or different components to provide functionality that is at least partially similar to the functionality available before component replacement. Unless otherwise stated, components shown as resistors generally represent any one or more elements that are coupled in series and / or in parallel to provide the amount of impedance represented by the resistor shown. For example, a resistor or capacitor shown and described herein as a single component may actually be a plurality of resistors or capacitors coupled in parallel between the same nodes, respectively. For example, a resistor or capacitor shown and described herein as a single component may actually be a plurality of resistors or capacitors coupled in series between the same two nodes as a single resistor or capacitor, respectively.

[0095] The use of the phrase "ground" in the foregoing description includes chassis ground, ground line ground, floating ground, virtual ground, digital ground, common ground, and / or any other form of ground connection that is applicable or suitable for the teachings of this specification. In this specification, unless otherwise stated, "about", "approximately" or "substantially" before a parameter means within the + / -10% range of the parameter.

[0096] Modifications to the described examples are possible, and other examples are possible, within the scope of the claims.

Claims

1. A DC-DC boost converter, comprising: a switch coupled to the inductor output and the power input; a diode coupled to the inductor output and an output terminal and configured to conduct current in only one direction away from the inductor output and toward the output terminal; a clamp circuit coupled to the diode and the switch, the clamp circuit configured to clamp an inductor output current to a reference current when the converter is operating in a continuous conduction mode of operation (CCM); as well as A minimum off-time module is coupled to the diode and the switch, the minimum off-time module being configured to cause the inductor output current to be at least for a time T when the converter is operating in a pulse frequency modulation (PFM) operation mode. off The inside is zero.

2. The converter of claim 1, wherein the clamp circuit is configured to clamp the inductor output current based at least in part on an inductor peak current.

3. The converter of claim 1 , wherein the minimum off-time module is configured to cause the inductor output current to be at least the time T based at least in part on an inductor peak current. off The inside is zero.

4. The converter of claim 1 , further comprising a transconductance (gm) amplifier and a reference source input node, the gm amplifier coupled to the output terminal and the switch via a feedback circuit and configured to convert an output voltage into an output current, the output current of the gm amplifier being limited by a reference voltage source.

5. The converter of claim 4 , further comprising an inductor valley current comparator circuit and an inductor peak current comparator circuit, the inductor valley current comparator circuit comprising a first comparator coupled to the inductor output and the output of the gm amplifier, the inductor peak current comparator circuit comprising a second comparator coupled to the inductor output and the output of the gm amplifier, wherein the output of the inductor valley current comparator circuit and the output of the inductor peak current comparator circuit are each coupled to the switch.

6. The converter of claim 5 , further comprising a low current sensing field effect transistor (FET) coupled to the inductor output and the first comparator, and a high current sensing FET coupled to the inductor output and the second comparator, the low current sensing FET being configured to sense the inductor output current and provide the sensed inductor output current to the first comparator, the high current sensing FET being configured to sense the inductor output current and provide the sensed inductor output current to the second comparator.

7. The converter according to claim 1, wherein: In operation, the inductor output current is less than or equal to 1.5 A and greater than or equal to 5 mA.

8. A method of controlling a DC-DC converter, the DC-DC converter comprising a switch coupled to an inductor output and a power input and a diode coupled to the inductor output and an output terminal, the method comprising: clamping the inductor output current to a reference current by a clamp circuit and in a continuous conduction mode of operation (CCM); as well as The inductor output current is kept constant for at least a time T by a minimum off-time module in a pulse frequency modulation (PFM) operation mode. off The inside is zero.

9. The method of claim 8, further comprising clamping, by the clamp circuit, the inductor output current based at least in part on an inductor peak current.

10. The method according to claim 8, wherein the minimum off-time module causes the inductor output current to be at least the time T off The internal zero is based at least in part on the inductor peak current.

11. The method of claim 8, further comprising converting an output voltage to an output current by a transconductance (gm) amplifier coupled to the output terminal, the output current of the gm amplifier being limited by a current output from a reference source input node.

12. The method of claim 11 , further comprising comparing the inductor output current with the output current of the gm amplifier by an inductor valley current comparator, and comparing the inductor output current plus a constant hysteresis current value with the output current of the gm amplifier by an inductor peak current comparator, wherein the switch is gated based on the outputs of the inductor valley current comparator and the inductor peak current comparator.

13. The method of claim 12, further comprising sensing the inductor output current by a low current sensing field effect transistor (FET); providing the sensed inductor output current to the inductor valley current comparator by the low current sensing FET; sensing the inductor output current by a high current sense FET; as well as The sensed inductor output current is provided by the high current sense FET to the inductor peak current comparator.

14. An apparatus comprising: Power input; a DC-DC boost converter coupled to the power input; as well as a load input coupled to the output terminal of the DC-DC boost converter, wherein the power supply is configured to provide an output voltage of at most 1.5 volts and an output current of at most 1.5 amperes to the converter, and Wherein the converter is configured to provide an output voltage greater than 1.5 volts and an output current of at least 5 milliamps to the load input.

15. The apparatus of claim 14, wherein the converter comprises: Inductor output; a switch coupled to the inductor output and the power input; a diode coupled to the inductor output and the output terminal of the DC-DC boost converter; a capacitor coupled to the diode and the output terminal of the DC-DC boost converter; a clamp circuit coupled to the diode and the switch, the clamp circuit configured to clamp an inductor output current to a reference current when the converter is operating in a continuous conduction mode of operation (CCM); as well as A minimum off-time module is coupled to the diode and the switch, the minimum off-time module being configured to cause the inductor output current to be at least for a time T when the converter is operating in a pulse frequency modulation (PFM) operation mode. off The inside is zero.

16. The device of claim 15, wherein the clamp circuit is configured to clamp the inductor output current based at least in part on an inductor peak current.

17. The apparatus of claim 15, wherein the minimum off-time module is configured to cause the inductor output current to be at least the time T based at least in part on an inductor peak current. off The inside is zero.

18. The device of claim 15, further comprising a transconductance (gm) amplifier and a reference source input node, the gm amplifier coupled to the output terminal of the DC-DC boost converter and configured to convert an output voltage to an output current, the output current of the gm amplifier being limited by a current output from the reference source input node.

19. The apparatus of claim 18, further comprising an inductor valley current comparator configured to compare the inductor output current with the output current of the gm amplifier and an inductor peak current comparator configured to compare the inductor output current plus a constant hysteresis current value with the output current of the gm amplifier, wherein the switch is gated based on the outputs of the inductor valley current comparator and the inductor peak current comparator.

20. The device of claim 19, further comprising a low current sensing field effect transistor (FET) configured to sense the inductor output current and provide the sensed inductor output current to the inductor valley current comparator and a high current sensing FET configured to sense the inductor output current and provide the sensed inductor output current to the inductor peak current comparator.

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