Display system, display driving method, and vehicle
By controlling the driving cycle of different luminous angle areas on the vehicle display panel, the brightness deviation problem is solved, the display effect is improved and power consumption is reduced.
Patent Information
- Application Number
- CN202411460658.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-10-26
- Filing Date
- 2024-10-18
- Publication Date
- 2025-04-29
AI Technical Summary
Different luminous angle areas on the display panel in the vehicle cause brightness deviation, affecting the display effect.
By controlling the driving cycle of multiple light emitting regions having different light emitting angles, the driving cycle is changed according to the position to improve the deterioration characteristics.
It effectively reduces brightness deviation, improves the overall performance of the display system, and reduces the power consumption for feature value compensation.
Smart Images

Figure CN119905054A_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present disclosure relate to a display system capable of improving degradation characteristics of a display system in a vehicle, a display driving method, and a vehicle. Background Art
[0002] Vehicle refers to a transport device that can use kinetic energy to move people or loads. Here, vehicles can include various types of transport equipment that can transport people, such as cars, trucks, buses, airplanes and ships.
[0003] For the safety and convenience of vehicle users, vehicles may include various sensors and electronic devices, and the functions of the vehicles become more diverse.
[0004] The functions of the vehicle may include convenience functions that improve the convenience of the driver and safety functions that improve the safety of the driver or pedestrians.
[0005] Convenience functions may include technologies such as functions for providing infotainment (info+entertainment), autonomous driving functions, and functions for helping the driver ensure visibility at night or in blind spots. For example, functions of active cruise control (ACC), smart parking assist system (SPAS), night vision (NV), head-up display (HUD) and surround view monitor (AVM), and adaptive front light system (AHS) may be referred to as convenience functions.
[0006] Safety features can include technologies to ensure driver or pedestrian safety, such as lane departure warning systems (LDWS), lane keeping assist systems (LKAS), and autonomous emergency braking (AEB) systems.
[0007] Meanwhile, a vehicle may include a display system having various types of display panels. A vehicle control device may provide various convenience functions and safety functions to a driver or a passenger by controlling information provided to an interior display panel.
[0008] The various types of display panels may be a liquid crystal display, an organic light emitting display panel, and the like.
[0009] At this time, since there may be other passengers as well as the driver in the vehicle, different information may be displayed through a plurality of display panels so that the occupants (driver or passenger) can recognize the information. Summary of the invention
[0010] To this end, a plurality of light emitting areas having different light emitting angles may be arranged on the display panel, but there is a problem that brightness deviation occurs due to different degradation in the light emitting areas having different light emitting angles.
[0011] Therefore, the inventors of the present disclosure have invented a display system, a display driving method, and a vehicle capable of improving degradation characteristics of a display system in a vehicle.
[0012] Embodiments of the present disclosure may provide a display system, a display driving method, and a vehicle capable of improving degradation characteristics by controlling a driving cycle of a plurality of light emitting areas having different light emitting angles.
[0013] Embodiments of the present disclosure may provide a display system, a display driving method, and a vehicle capable of improving degradation characteristics by changing a driving cycle according to a position based on a boundary of a plurality of light emitting areas having different light emitting angles.
[0014] An embodiment of the present disclosure provides a display system, which includes: a display panel, the display panel includes a plurality of unit sub-pixels, the plurality of unit sub-pixels include a first sub-pixel with a first light-emitting angle and a second sub-pixel with a second light-emitting angle; a gating drive circuit, the gating drive circuit is configured to provide a gating signal to the display panel; and a timing controller, which is configured to control the light-emitting cycle of the first sub-pixel or the second sub-pixel with respect to a light-emitting cycle control area between a first area where the first sub-pixel emits light and a second area where the second sub-pixel emits light.
[0015] An embodiment of the present disclosure provides a display driving method for driving a display panel including a plurality of unit sub-pixels, wherein the plurality of unit sub-pixels include a first sub-pixel having a first light emitting angle and a second sub-pixel having a second light emitting angle, and the display driving method includes the following steps: a step of driving a first sub-pixel for a first area of the display panel; a step of driving a second sub-pixel for a second area of the display panel; a step of causing the first sub-pixel and the second sub-pixel to emit light alternately in a predetermined cycle for a 1-1 area within the first area, and a step of causing the first sub-pixel and the second sub-pixel to emit light alternately in a predetermined cycle for a 2-1 area within the second area.
[0016] An embodiment of the present disclosure provides a vehicle, comprising: a display panel, comprising a plurality of unit sub-pixels, the plurality of unit sub-pixels comprising a first sub-pixel having a first luminous angle and a second sub-pixel having a second luminous angle; a gating drive circuit, the gating drive circuit being configured to provide a gating signal to the display panel; and a timing controller, which is configured to control the luminous cycle of the first sub-pixel or the second sub-pixel with respect to a luminous cycle control area between a first area where the first sub-pixel emits light and a second area where the second sub-pixel emits light.
[0017] According to an embodiment of the present disclosure, a low-power display system capable of reducing power consumption for characteristic value compensation by improving degradation characteristics of a display system in a vehicle can be provided.
[0018] According to an embodiment of the present disclosure, degradation characteristics may be improved by controlling driving cycles of a plurality of light emitting areas having different light emitting angles.
[0019] According to an embodiment of the present disclosure, degradation characteristics may be improved by changing a driving cycle according to a position based on a boundary of a plurality of light emitting areas having different light emitting angles. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The above and other objects, features and advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
[0021] Figure 1 is a diagram showing the interior of a vehicle according to an embodiment of the present disclosure;
[0022] Figure 2 is a schematic diagram showing a configuration of a display system according to an embodiment of the present disclosure;
[0023] Figure 3 is an exemplary diagram showing a display system according to an embodiment of the present disclosure;
[0024] Figure 4 is a diagram showing an example of a structure for driving a plurality of display panels in a display system according to an embodiment of the present disclosure;
[0025] Figure 5 is a diagram showing a display panel including sub-pixels having different light emission angles in a display system according to an embodiment of the present disclosure;
[0026] Figure 6 is a diagram showing different structures of a first sub-pixel and a second sub-pixel constituting a unit sub-pixel in a display system according to an embodiment of the present disclosure;
[0027] Figure 7 is a diagram illustrating a first lens disposed on a first sub-pixel and a second lens disposed on a second sub-pixel in a display system according to an embodiment of the present disclosure;
[0028] Figure 8 is a cross-sectional view of a unit sub-pixel in a display system according to an embodiment of the present disclosure;
[0029] Fig. 9 is a diagram showing a case where different images are displayed in a first area and a second area of a display panel in a display system according to an embodiment of the present disclosure;
[0030] Fig.10 is a diagram showing a degradation state when different images are displayed in a first area and a second area of a display panel in a display system according to an embodiment of the present disclosure;
[0031] Fig.11 is a diagram showing a case where light emission cycles of a first area and a second area having different viewing angles are controlled in a display system according to an embodiment of the present disclosure;
[0032] Fig.12 is a block diagram showing a configuration of a gate driving circuit in a display system according to an embodiment of the present disclosure;
[0033] Fig.13 is a diagram showing a gate signal output from a gate driving circuit in a display system according to an embodiment of the present disclosure;
[0034] Fig.14 is a diagram showing a circuit operation of emitting light from a first sub-pixel of a unit sub-pixel in a display system according to an embodiment of the present disclosure;
[0035] Fig.15 is a signal waveform diagram of a first sub-pixel driven by a unit sub-pixel in a display system according to an embodiment of the present disclosure;
[0036] Fig.16 is a diagram showing a circuit operation of light emission of a second sub-pixel of a unit sub-pixel in a display system according to an embodiment of the present disclosure;
[0037] Fig.17 is a signal waveform diagram of a second sub-pixel driven by a unit sub-pixel in a display system according to an embodiment of the present disclosure;
[0038] Figures 18 to 20 is a diagram showing a cyclic control signal and a light emitting state depending on an area of a display panel in a display system according to an embodiment of the present disclosure; and
[0039] Fig.21 is a diagram illustrating a change in a light emission cycle near a boundary between a first area and a second area in a display system according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0040] Hereinafter, some embodiments of the present disclosure will be described in detail with reference to exemplary drawings. In the following description of examples or embodiments of the present disclosure, reference will be made to the drawings, in which specific examples or embodiments that can be implemented are illustrated in a schematic manner, and in the drawings, the same reference numerals and symbols may be used to indicate the same or similar components, even if they are shown in different drawings from each other. In addition, in the following description of examples or embodiments of the present disclosure, when it is determined that the description may make the subject matter in some embodiments of the present disclosure unclear, the detailed description of the well-known functions and components incorporated herein will be omitted. The terms used herein, such as "including", "having", "containing", "constituting", "consisting of" and "formed by" are generally intended to allow the addition of other components, unless the term is used together with the term "only". As used herein, the singular form is intended to include the plural form, unless the context clearly indicates otherwise.
[0041] Terms such as "first", "second", "A", "B", "(A)" or "(B)" may be used herein to describe elements of the present disclosure. Each of these terms is not used to define the nature, order, sequence or quantity of an element, but is merely used to distinguish the corresponding element from other elements.
[0042] When it is mentioned that a first element is “connected or coupled to” a second element, “contacts or overlaps” the second element, etc., it should be interpreted that not only the first element can be “directly connected or coupled to” the second element or “directly contact or overlaps” the second element, but also a third element can be “interposed” between the first element and the second element, or the first element and the second element can be “connected or coupled to”, “contacts or overlaps”, etc., with each other via a fourth element. Here, the second element can be included in at least one of the two or more elements that are “connected or coupled to”, “contacts or overlaps”, etc., with each other.
[0043] When time-related terms such as "after", "next", "then", "before", etc. are used to describe a process or operation of an element or configuration, or a flow or step in an operation, process, or manufacturing method, these terms may be used to describe non-sequential or non-sequential processes or operations unless the terms "directly" or "immediately" are used together.
[0044] Furthermore, when any dimension, relative dimension, etc. is mentioned, it should be considered that the numerical value of an element or feature, or corresponding information (e.g., level, range, etc.) includes a tolerance or error range that may be caused by various factors (e.g., process factors, internal or external impact, noise, etc.), even when no relevant description is specified. In addition, the term "may" fully encompasses all meanings of the term "can".
[0045] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
[0046] Figure 1 is a diagram showing the interior of a vehicle according to an embodiment of the present disclosure.
[0047] Reference Figure 1 The interior of the vehicle 1000 according to an embodiment of the present disclosure may include a driver's seat, a passenger seat, a dashboard located in front of the driver's seat and the passenger seat with various instruments required for driving, and a center fascia with a control panel for electronic devices.
[0048] The instrument panel may include a first display panel 111 (including a speedometer) for displaying information necessary for driving. The first display panel 111 may be referred to as an instrument panel display panel.
[0049] The first display panel 111 is a display panel for allowing safe driving of the vehicle 1000 by transmitting information about the driving state of the vehicle 1000 and the operation of various electronic devices installed in the vehicle 1000 to the driver. The first display panel 111 located behind the steering wheel relative to the driver's seat may include a speedometer for indicating a driving speed, a three-degree meter for indicating a driving distance, a tachometer for indicating an engine speed, a fuel gauge, a water temperature gauge, an engine temperature gauge, and various warning lights.
[0050] The center trim panel may be located between the driver's seat and the passenger seat and may correspond to the area where the instrument panel and the shift lever intersect vertically. An audio device, an air conditioning device, a heater controller, a navigation system, a vent, a cigarette lighter, an ashtray, a cup holder, etc. may be disposed on the center trim panel. In addition, the center trim panel may include a second display panel 112.
[0051] The second display panel 112 may display a route to a destination or a map image corresponding to a current location, and may display a user interface related to control of various electronic devices in the vehicle 1000. In addition, when the vehicle 1000 is connected to a mobile device, a screen provided by the mobile device may be displayed in the second display panel 112.
[0052] The second display panel 112 located between the driver seat and the passenger seat of the vehicle 1000 may be referred to as a center fascia display panel.
[0053] In addition, for the convenience of passengers, the third display panel 113 may be located in front of a passenger seat. The third display panel 113 located on the passenger seat may be referred to as a passenger display panel.
[0054] In addition, the display panel 110 may include at least one of a front window display panel, a side mirror display panel, a rearview mirror display panel, and a side window display panel in addition to the first display panel 111 (instrument panel display panel), the second display panel 112 (center trim display panel), and the passenger display panel 113. Of course, more various types of display panels may be installed.
[0055] The front window display panel may be a display panel that projects a virtual image on a partial area of the front window that can be seen through the front of the vehicle 1000. By displaying vehicle speed, remaining fuel, and route information through the front window display panel, unnecessary gaze shifts of the driver elsewhere can be minimized.
[0056] The side mirror display panel may be a display panel capable of displaying a side image captured by a side camera on a portion or the entire area of the side mirror to observe the side of the vehicle 1000. Therefore, the driver can check not only the side image reflected by the side mirror but also the side image captured by the side camera through the side mirror display panel.
[0057] The rearview mirror display panel may be a display panel capable of displaying a rear image captured by a rear camera on a portion or the entire area of the rearview mirror to observe the rear of the vehicle 1000. Therefore, the driver can check not only the rear image reflected by the rearview mirror but also the rear image captured by the rear camera through the rearview mirror display panel.
[0058] The side window display panel may be a display panel for projecting a virtual image on a partial area of the side window that can be seen through the side of the vehicle 1000. Various information of the vehicle may be displayed through the side window display panel.
[0059] Figure 2 is a schematic diagram showing a configuration of a display system according to an embodiment of the present disclosure.
[0060] Reference Figure 2 , a display system 100 according to an embodiment of the present disclosure may include: a display panel 110, which is connected to a plurality of gate lines GL and a plurality of data lines DL, and in which a plurality of sub-pixels SP are arranged in a matrix form; a gate driving circuit 120, which provides a gate signal to the plurality of gate lines GL; a data driving circuit 130, which provides a data voltage through the plurality of data lines DL; a timing controller 140 for controlling the gate driving circuit 120 and the data driving circuit 130; and a power management circuit 150 for providing power for a display driving operation.
[0061] The display panel 110 displays an image based on a scan signal transmitted from the gate driving circuit 120 through a plurality of gate lines GL and a data voltage transmitted from the data driving circuit 130 through a plurality of data lines DL.
[0062] In the case of a liquid crystal display system, the display panel 110 includes a liquid crystal layer formed between two substrates and can be operated in any known mode, such as a twisted nematic (TN) mode, a vertical alignment (VA) mode, an in-plane switching (IPS) mode, or a fringe field switching (FFS) mode. In addition, in the case of an organic light emitting display system, the display panel 110 can be implemented in a top emission method, a bottom emission method, or a dual emission method.
[0063] In the display panel 110, a plurality of subpixels SP may be arranged in a matrix form, each subpixel SP may be formed of subpixels SP having different colors, such as a white subpixel, a red subpixel, a green subpixel, and a blue subpixel, and each subpixel SP may be defined by a plurality of data lines DL and a plurality of gate lines GL.
[0064] One subpixel SP may include a thin film transistor (TFT), a light emitting element emitting light according to a data voltage, and a storage capacitor electrically connected to the light emitting element to maintain a voltage, which are disposed in a region formed by one data line DL and one gate line GL.
[0065] For example, when the display system 100 having a resolution of 2160×3840 is formed by four sub-pixels SP including a white sub-pixel, a red sub-pixel, a green sub-pixel, and a blue sub-pixel, because there are 2160 gate lines GL and 3840 data lines DL connected to the four sub-pixels SP, a total of 3840×4=15360 data lines DL can be provided, and the sub-pixels SP can be arranged in an area formed by the gate lines GL and the data lines DL.
[0066] The gate driving circuit 120 is controlled by the timing controller 140 and sequentially outputs scan signals to a plurality of gate lines GL provided in the display panel 110 to control driving timing of a plurality of sub-pixels SP.
[0067] According to circumstances, the gate driving circuit 120 may generate a scan signal for controlling the driving timing of the sub-pixel SP and a light emitting signal for controlling the light emitting timing of the sub-pixel SP. In this case, the gate signal generated from the gate driving circuit 120 may include a scan signal and a light emitting signal. The circuit for generating the scan signal and the circuit for generating the light emitting signal may be implemented as separate circuits or one circuit.
[0068] If the circuit generating the scan signal and the circuit generating the light emitting signal are implemented as separate circuits, the gate driving circuit 120 may include a scan driving circuit generating the scan signal and a light emitting driving circuit generating the light emitting signal.
[0069] In the display system 100 having a resolution of 2160×3840, the case where the scan signal is sequentially output from the first gate line to the 2160th gate line with respect to the 2160 gate lines GL may be referred to as 2160-phase driving. Alternatively, the case where the scan signal is sequentially output based on four gate lines GL, such as in the case where the scan signal is sequentially output from the first gate line to the fourth gate line and then sequentially output from the fifth gate line to the eighth gate line, may be referred to as four-phase driving. That is, the case where the scan signal is sequentially output for every N gate lines GL may be referred to as N-phase driving.
[0070] In this case, the gate driving circuit 120 may include one or more gate driving integrated circuits GDIC, and according to a driving method, the gate driving circuit 120 may be located on only one side or both sides of the display panel 110. Alternatively, the gate driving circuit 120 may be directly formed in a bezel region of the display panel 110, thereby being implemented in the form of a gate in panel (GIP).
[0071] The data driving circuit 130 receives the digital image data DATA from the timing controller 140 and converts the received digital image data DATA into an analog data voltage. Then, the data voltage is output to each data line DL according to the timing of applying the scan signal through the gate line GL, so each sub-pixel SP connected to the data line DL displays a light emitting signal having a brightness corresponding to the data voltage.
[0072] Similarly, the data driving circuit 130 may include one or more source driver integrated circuits SDIC, and the source driver integrated circuits SDIC may be connected to bonding pads of the panel 110, or may be directly set on the display panel 110 using a tape automated bonding (TAB) method or a chip on glass (COG) method.
[0073] In some cases, each source driver integrated circuit SDIC may be integrated and disposed in the display panel 110. In addition, each source driver integrated circuit SDIC may be implemented in a chip on film (COF) method. In this case, each source driver integrated circuit SDIC may be mounted on a circuit film and may be electrically connected to the data line DL of the display panel 110 through the circuit film.
[0074] The timing controller 140 provides various control signals to the gate driving circuit 120 and the data driving circuit 130 to control the operations of the gate driving circuit 120 and the data driving circuit 130. That is, the timing controller 140 controls the gate driving circuit 120 to generate a scan signal according to the timing implemented in each frame, and on the other hand, the timing controller 140 controls the data driving circuit 130 to convert the image data DATA and generate a data voltage.
[0075] In this case, the timing controller 140 may receive various timing signals including a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, and a main clock MCLK from an external component (eg, a host system) in addition to the digital image data DATA.
[0076] The host system may include one or more of a TV (television) system, a set-top box, a navigation system, a personal computer (PC), a home theater system, a mobile device, and a wearable device.
[0077] Therefore, the timing controller 140 generates a control signal using various timing signals received from the host system and transmits the control signal to the gate driving circuit 120 and the data driving circuit 130 .
[0078] For example, in order to control the gate drive circuit 120, the timing controller 140 outputs various gate control signals, including a gate start pulse GSP, a gate clock GCLK, and a gate output enable signal GOE. Here, the gate start pulse GSP controls the timing of one or more GDICs constituting the gate drive circuit 120 starting to work. In addition, the gate clock GCLK is a clock signal that is usually input to one or more gate drive integrated circuits GDIC, and controls the shift timing of the scan signal. In addition, the gate output enable signal GOE specifies the timing information of one or more gate drive integrated circuits GDIC.
[0079] In addition, in order to control the data driving circuit 130, the timing controller 140 outputs various data control signals, including a source start pulse SSP, a source sampling clock SCLK, and a source output enable signal SOE. Here, the source start pulse SSP controls the timing of one or more SDICs constituting the data driving circuit 130 to start sampling data. The source sampling clock SCLK is a clock signal for controlling the timing of the SDIC sampling data. The source output enable signal SOE controls the output timing of the data driving circuit 130.
[0080] The display system 100 may further include a power management circuit 150 for providing various voltages or currents to the display panel 110 , the gate driving circuit 120 , or the data driving circuit 130 , or controlling the various voltages or various currents to be provided.
[0081] The power management circuit 150 may generate power required to drive the display panel 110 , the gate driving circuit 120 , and the data driving circuit 130 by adjusting a direct input voltage.
[0082] Figure 3 is an exemplary diagram showing a display system according to an embodiment of the present disclosure.
[0083] Reference Figure 3In the display system 100 according to an embodiment of the present disclosure, the source driver integrated circuit SDIC included in the data driver circuit 130 can be implemented in the form of a COF method among various methods (TAB, COG, and COF), and the gate driver circuit 120 can be implemented in the form of a GIP among various methods (TAB, COG, COF, and GIP).
[0084] When the gate driving circuit 120 is implemented in the form of a GIP, a plurality of gate driving integrated circuits GDIC included in the gate driving circuit 120 may be directly formed in the non-display area of the display panel 110. In this case, the gate driving integrated circuit GDIC may receive various signals (clock signals, gate high signals, and gate low signals) required for generating scan signals through gate driving-related signal lines disposed in the non-display area.
[0085] Similarly, one or more source driver integrated circuits SDIC included in the data driver circuit 130 may be each mounted on the source film SF, and one side of the source film SF may be electrically connected to the display panel 110. In addition, a line for electrically connecting the source driver integrated circuit SDIC to the display panel 110 may be provided on the source film SF.
[0086] The display system 100 may include at least one source printed circuit board SPCB for electrically connecting a plurality of source driving integrated circuits SDIC to other devices and a control printed circuit board CPCB for mounting control components and various electronic devices.
[0087] In this case, one side of the source film SF on which the active driving integrated circuit SDIC is mounted may be connected to at least one source printed circuit board SPCB. That is, one side of the source film SF on which the active driving integrated circuit SDIC is mounted may be electrically connected to the display panel 110, and the other side thereof may be electrically connected to the source printed circuit board SPCB.
[0088] The timing controller 140 and the power management circuit 150 may be mounted on the control printed circuit board CPCB. The timing controller 140 may control the operations of the data driving circuit 130 and the gate driving circuit 120. The power management circuit 150 may provide a driving voltage or current to the display panel 110, the data driving circuit 130, and the gate driving circuit 120, and control the voltage or current to be provided.
[0089] At least one source printed circuit board SPCB and at least one control printed circuit board CPCB may be electrically connected by at least one connecting member, and the connecting member may be formed as, for example, a flexible printed circuit FPC, a flexible flat cable FFC, etc. In addition, the at least one source printed circuit board SPCB and the at least one control printed circuit board CPCB are implemented to be integrated into one printed circuit board.
[0090] In the case of the display system 100 having the above configuration, the power management circuit 150 transmits a driving voltage required to drive the display or detect a characteristic value to the source printed circuit board SPCB through the flexible printed circuit FPC or the flexible flat cable FFC. The driving voltage transmitted to the source printed circuit board SPCB is provided through the source driver integrated circuit SDIC to drive a specific sub-pixel SP in the display panel 110 to emit light or sense the specific sub-pixel SP.
[0091] In this case, each sub-pixel SP provided in the display panel 110 may include a light emitting element and a circuit element such as a driving transistor for driving the light emitting element.
[0092] The type and number of circuit elements constituting each sub-pixel SP may be variously determined according to provided functions and design methods.
[0093] Figure 4 is a diagram illustrating an example of a structure for driving a plurality of display panels in a display system according to an embodiment of the present disclosure.
[0094] Reference Figure 4 The display system 100 according to an embodiment of the present disclosure may include one or more display panels 111 , 112 , 113 , a timing controller 140 , and one or more source driver integrated circuits SDIC1 , SDIC2 , SDIC3 .
[0095] The one or more display panels may be at least one of a first display panel 111, a second display panel 112, and a third display panel 113. The first display panel 111 may be an instrument panel display panel, the second display panel 112 may be a center fascia display panel, and the third display panel 113 may be a passenger display panel.
[0096] The first source driver integrated circuit SDIC1 may provide a first data voltage to the first display panel 111. The second source driver integrated circuit SDIC2 may provide a second data voltage to the second display panel 112. The third source driver integrated circuit SDIC3 may provide a third data voltage to the third display panel 113.
[0097] The timing controller 140 may receive external timing signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, and a main clock MCLK, and image data DATA from a host system through an interface such as a low voltage differential signaling LVDS interface.
[0098] The timing controller 140 may generate a control signal for operations of the gate driving circuit 120 and the data driving circuit 130 based on an external timing signal, and provide image data DATA to the source driving integrated circuits SDIC1 to SDIC3 constituting the data driving circuit 130 .
[0099] Furthermore, the timing controller 140 may receive the coordinates of the important information from the host system and calculate a checksum based on the coordinates of the important information to check for errors in the image data DATA.
[0100] When the display system 100 displays vehicle-related information, the important information may be information for displaying vehicle warnings, such as safety control shutdown, temperature warning, anti-lock brake system (ABS), low hydraulic pressure, and the like.
[0101] The timing controller 140 transmits coordinates and checksums of important information to the source driving integrated circuits SDIC1 to SDIC3 , respectively.
[0102] Thereafter, the timing controller 140 may receive feedback from the source driver integrated circuits SDIC1 to SDIC3 via a specific interface regarding whether there is an error in the image data DATA. In addition, the timing controller 140 may also receive feedback from the source driver integrated circuits SDIC1 to SDIC3 regarding whether there is an error in the communication state.
[0103] Based on the feedback result, the timing controller 140 may determine whether an error occurs in the communication state or an abnormal image is displayed in the source driving integrated circuits SDIC1 to SDIC3 .
[0104] The source driving integrated circuits SDIC1 to SDIC3 each converts the image data DATA received from the timing controller 140 into an analog data voltage and supplies it to the corresponding display panels 111 to 113 through the data lines.
[0105] The first source driver integrated circuit SDIC1 may provide a data voltage via a data line connected to the first display panel 111 , the second source driver integrated circuit SDIC2 may provide a data voltage via a data line connected to the second display panel 112 , and the third source driver integrated circuit SDIC3 may provide a data voltage via a data line connected to the third display panel 113 .
[0106] At this time, the first subpixel and the second subpixel having different emission angles may be arranged together in at least one display panel 111 to 113. The display system 100 may control the viewing angle of an image by selectively controlling the driving operation of the first subpixel or the second subpixel.
[0107] Figure 5 is a diagram illustrating a display panel including sub-pixels having different light emission angles in a display system according to an embodiment of the present disclosure.
[0108] Reference Figure 5 According to an embodiment of the present disclosure, a plurality of unit sub-pixels SPu may be disposed on the first display panel 111 in the display system 100 .
[0109] Here, the unit subpixel SPu is a subpixel emitting light of a specified color and may include a first subpixel SPw having a first emission angle and a second subpixel SPn having a second emission angle. The unit subpixel SPu may include a unit subpixel emitting red, a unit subpixel emitting green, and a unit subpixel emitting blue.
[0110] The first sub-pixel SPw may be a wide-angle sub-pixel having a wide light emission angle, and the second sub-pixel SPn may be a narrow-angle sub-pixel having a narrow light emission angle.
[0111] When the first subpixel SPw having a wide light emission angle among the unit subpixels SPu disposed on the first display panel 111 emits light, the image of the first display panel 111 is displayed at a wide viewing angle. Therefore, not only the driver but also the passengers in the passenger seat in the vehicle will be able to recognize the image of the first display panel 111.
[0112] On the other hand, when the second sub-pixel SPn having a narrow emission angle emits light in the unit sub-pixel SPu provided on the first display panel 111, the image of the first display panel 111 has a narrow viewing angle. Therefore, only an occupant (e.g., a driver) located in front of the first display panel 111 in the vehicle will be able to recognize the image of the first display panel 111.
[0113] At this time, the area of the first display panel 111 may be divided, and images having different viewing angles may be displayed in each area, respectively.
[0114] For example, the outside of the first display panel 111 may be set as the first area A1, and the unit subpixel SPu located in the first area A1 may emit light at a wide light emission angle. In this case, the image displayed in the first area A1 may have a wide viewing angle.
[0115] On the other hand, the central portion of the first display panel 111 may be set as the second area A2, and the unit subpixel SPu located in the second area A2 may emit the second subpixel SPn at a narrow emission angle. In this case, the image displayed in the second area A2 may have a narrow viewing angle.
[0116] The size of the second area A2 is changed based on the center of the first display panel 111. Therefore, the first area A1 may be the remaining outer area of the first display panel 111 except the second area A2.
[0117] In this way, the display system 100 of the present disclosure can display images at different viewing angles according to the position of the first display panel 111 by selectively driving sub-pixels SPw and SPn having different emission angles.
[0118] At this time, the first sub-pixel SPw and the second sub-pixel SPn constituting the unit sub-pixel SPu may have the same structure (size, number, position, etc.), but may also have different structures.
[0119] Figure 6 1 is a diagram showing different structures of a first sub-pixel and a second sub-pixel constituting a unit sub-pixel in a display system according to an embodiment of the present disclosure.
[0120] Reference Figure 6 , the unit sub-pixel SPu disposed on the display panel 110 in the display system 100 according to an embodiment of the present disclosure may include a first unit sub-pixel emitting red, a second unit sub-pixel emitting green, and a third unit sub-pixel emitting blue.
[0121] The unit sub-pixel SPu of each color may include a first sub-pixel SPw having a wide light emitting angle and a second sub-pixel SPn having a narrow light emitting angle.
[0122] At this time, the first sub-pixels SPw may be different from the second sub-pixels SPn in size, number, or position.
[0123] For example, the first unit sub-pixel emitting red may include one first sub-pixel SPw and two second sub-pixels SPn. At this time, the size of the first sub-pixel SPw may be larger than that of the second sub-pixel SPn.
[0124] In addition, the second unit sub-pixel emitting green may include one first sub-pixel SPw and four second sub-pixels SPn. At this time, the four second sub-pixels SPn may be arranged in a square structure on an upper region of the first sub-pixel SPw.
[0125] In addition, the third unit sub-pixel emitting blue may include one first sub-pixel SPw and four second sub-pixels SPn. At this time, the four second sub-pixels SPn may be arranged in a row on an upper region of the first sub-pixel SPw.
[0126] The sizes and arrangements of the first sub-pixels SPw and the second sub-pixels SPn may be determined according to the light emitting efficiency of the corresponding colors and the lifespan of the sub-pixels.
[0127] At this time, the light emitting angles of the first and second sub-pixels SPw and SPn may be controlled according to the shape of the lens provided on the light emitting surface.
[0128] Figure 7 is a diagram illustrating a first lens disposed on a first sub-pixel and a second lens disposed on a second sub-pixel in a display system according to an embodiment of the present disclosure.
[0129] Reference Figure 7 , the first lens Lz1 disposed on the first sub-pixel SPw having a wide emission angle may be a semi-cylindrical lens, and the second lens Lz2 disposed on the second sub-pixel SPn having a narrow emission angle may be a hemispherical lens in the unit sub-pixel of the display system 100 according to an embodiment of the present disclosure.
[0130] First lens Lz1 and second lens Lz2 may have different shapes and different sizes, but may have substantially the same thickness (height).
[0131] The first lens Lz1 and the second lens Lz2 may have different shapes, different sizes, and different thicknesses (heights).
[0132] The first lens Lz1 may have a semi-cylindrical shape with a rectangular bottom surface. Therefore, its light emission direction may be truncated in the yy' direction and may not be truncated in the xx' direction.
[0133] That is, because the first lens Lz1 has a length in the x-axis direction that exceeds the width of the first sub-pixel SPw, the first lens Lz1 is not truncated in the xx' direction. The first lens Lz1 has a curvature, and its width in the xx' direction decreases as it extends upward along the z-axis. Therefore, the first lens Lz1 is truncated in the yy' direction.
[0134] The second lens Lz2 is hemispherical with a circular bottom surface. The second lens Lz2 has a curvature, and a width h thereof in each of the xx′ direction and the yy′ direction becomes smaller as it extends upward along the z-axis.
[0135] Therefore, the light emission direction may be cut off from the circular bottom surface and the width of the second sub-pixel SPn in both the xx′ direction and the yy′ direction.
[0136] The size of each of the sub-pixel SPw, the sub-pixel SPn, the first lens Lz1, and the second lens Lz2 may vary according to an angle at which light is intercepted.
[0137] In addition, the size of each of the sub-pixel SPw, the sub-pixel SPn, the first lens Lz1, and the second lens Lz2 may vary according to light efficiency and light concentration of the sub-pixels SPw, SPn.
[0138] Figure 8 is a cross-sectional view of a unit sub-pixel in a display system according to an embodiment of the present disclosure.
[0139] Reference Figure 8 , a unit sub-pixel disposed on the display panel 110 in the display system 100 according to an embodiment of the present disclosure may include a first sub-pixel SPw having a first emission angle and a second sub-pixel SPn having a second emission angle.
[0140] A first light emitting angle emitted by the first sub-pixel SPw may be greater than a second light emitting angle emitted by the second sub-pixel SPn.
[0141] The first subpixel SPw may include a first anode AE1, a first light emitting layer EL1, and a first cathode CE1. The first anode AE1, the first light emitting layer EL1, and the first cathode CE1 may constitute a first light emitting element.
[0142] In addition, the first black matrix BM1, the first insulating layer ENCAP1, the first gap filler GF1, and the first lens Lz1 having the first light emitting angle may be sequentially stacked on the first cathode CE1. An auxiliary gap filler may be additionally disposed on the first lens Lz1.
[0143] Here, a portion of the first black matrix BM1 in a region overlapping the first anode AE1 may be open.
[0144] The second subpixel SPn may include a second anode AE2, a second light emitting layer EL2, and a second cathode CE2. The second anode AE2, the second light emitting layer EL2, and the second cathode CE2 may constitute a second light emitting element.
[0145] In addition, the second black matrix BM2, the second insulating layer ENCAP2, the second gap filler GF2, and the second lens Lz2 having the second light emitting angle may be sequentially stacked on the second cathode CE2. An auxiliary gap filler may be additionally disposed on the second lens Lz2.
[0146] A portion of the second black matrix BM2 overlapping the second anode AE2 may be open.
[0147] The first black matrix BM1 and the second black matrix BM2 may prevent light from being incident on an active layer of a driving transistor constituting a sub-pixel to prevent leakage current from being generated.
[0148] The first anode AE1 of the first subpixel SPw and the second anode AE2 of the second subpixel SPn may be formed in the same process, on the same layer, with the same material and with substantially the same thickness. The first anode AE1 and the second anode AE2 may be formed by a mask process using a photoresist.
[0149] The first light emitting layer EL1 of the first subpixel SPw and the second light emitting layer EL2 of the second subpixel SPn may be formed on the same layer with the same material, the same color, and the same thickness through the same process.
[0150] Each of the first and second light emitting layers EL1 and EL2 may include a hole injection layer (HIL), a hole transport layer (HTL), a light emitting material layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL).
[0151] The first cathode CE1 of the first subpixel SPw and the second cathode CE2 of the second subpixel SPn may be formed with the same material, the same color, and the same thickness on the same layer through the same process.
[0152] The first cathode CE1 and the second cathode CE2 may be made of an opaque metal material, for example, at least one selected from the group consisting of aluminum (Al), tungsten (W), copper (Cu), molybdenum (Mo), chromium (Cr), tantalum (Ta), titanium (Ti), and alloys formed by combinations thereof.
[0153] The first gap filler GF1 of the first sub-pixel SPw and the second gap filler GF2 of the second sub-pixel SPn may be formed of the same material, the same color, and the same thickness on the same layer through the same process.
[0154] The interval between the first light emitting layer EL1 and the first lens Lz1 may be adjusted based on the thickness (height) of the first gap filler GF1. In addition, the interval between the second light emitting layer EL2 and the second lens Lz2 may be adjusted based on the thickness (height) of the second gap filler GF2.
[0155] The first gap filler GF1 or the second gap filler GF2 may be made of one or a combination of acrylic, epoxy, and silicon. In addition, the first gap filler GF1 or the second gap filler GF2 may be made of an organic material.
[0156] The particle size in the first gap filler GF1 or the second gap filler GF2 may be equal to the wavelength of light, or may be larger or smaller than the wavelength of light by a certain range. The first gap filler GF1 or the second gap filler GF2 may have forward diffusion characteristics based on one of particle density, particle size, and particle shape.
[0157] In this regard, the first gap filler GF1 or the second gap filler GF2 may have a smaller refractive index than the first insulating layer ENCAP 1. That is, the first and second gap fillers GF1 and GF2 may have a smaller refractive index than the first insulating layer ENCAP 1 due to one of particle density, size, and shape.
[0158] The material of the first insulating layer ENCAP1 or the second insulating layer ENCAP2 may be one of TiO 2 , Al 2 O 3 , and SiO 2 .
[0159] When the material of the first insulating layer ENCAP1 or the second insulating layer ENCAP2 is TiO2, the refractive index of the first insulating layer ENCAP1 or the second insulating layer ENCAP2 may be in the range of 2.6 to 2.9. When the material of the first insulating layer ENCAP1 or the second insulating layer ENCAP2 is Al2O3, the first insulating layer ENCAP1 or the second insulating layer ENCAP2 may have a refractive index in the range of 1.75 to 1.76. When the material of the first insulating layer ENCAP1 or the second insulating layer ENCAP2 is SiO2, the refractive index of the first insulating layer ENCAP1 or the second insulating layer ENCAP2 may be in the range of 1.40 to 1.55.
[0160] The first lens Lz1 of the first subpixel SPw and the second lens Lz2 of the second subpixel SPn may be formed of the same material, the same color, and the same thickness on the same layer by the same process. However, the first lens Lz1 and the second lens Lz2 may be formed to have different shapes and different sizes.
[0161] The refractive indices of the first lens Lz1 and the second lens Lz2 may be determined according to the shapes of the lenses and the thickness (height) of the gap fillers GF1 , GF2 .
[0162] Fig. 9 is a diagram showing a case where different images are displayed in a first area and a second area of a display panel in a display system according to an embodiment of the present disclosure. In addition, Fig.10 is a diagram illustrating a degradation state when different images are displayed in a first area and a second area of a display panel in a display system according to an embodiment of the present disclosure.
[0163] First, refer to Fig. 9According to an embodiment of the present disclosure, the display system 100 may include a plurality of display panels (e.g., a first display panel to a third display panel). At least one display panel (e.g., a first display panel) may be driven to a plurality of regions (e.g., a first region and a second region) having different viewing angles.
[0164] For example, the first area A1 of the first display panel 111 can be displayed at a wide viewing angle because the first subpixel SPw with a wide emission angle emits light in the unit subpixel SPu. Therefore, not only the driver in the vehicle but also the passengers in the passenger seat will be able to recognize the image of the first display panel 111.
[0165] On the other hand, the second area A2 of the first display panel 111 can be displayed at a narrow viewing angle because the second sub-pixel SPn having a narrow light-emitting angle in the unit sub-pixel SPu emits light. Therefore, only the driver located in front of the first display panel 111 in the vehicle will be able to recognize the image of the first display panel 111.
[0166] At this time, the size of the first area A1 having a narrow viewing angle may be variable.
[0167] However, when the first subpixel SPw emits light in the first area A1 and the second subpixel SPn emits light in the second area A2 for a long time, there is a deviation between the degradation degree of the first area A1 and the degradation degree of the second area A2.
[0168] Results, such as Fig.10 As shown, there may be a problem in which a brightness deviation is recognized at a boundary between the first area A1 and the second area A2.
[0169] The display system 100 of the present disclosure may reduce image defects caused by brightness deviation by reducing degradation deviation between the first area A1 and the second area A2.
[0170] For the above purpose, the display system 100 of the present disclosure can reduce the degradation deviation between the first area A1 and the second area A2 by controlling the light emission cycle of the first subpixel SPw and the second subpixel SPn at the boundary between the first area A1 and the second area A2 having different viewing angles.
[0171] Fig.11 2 is a diagram illustrating a case where light emission cycles of a first area and a second area having different viewing angles are controlled in a display system according to an embodiment of the present disclosure.
[0172] Reference Fig.11 The display system 100 of the present disclosure can reduce the degradation deviation of the display panel by controlling the light emission cycle of sub-pixels in the area having high degradation deviation associated with the first area A1 and the second area A2 displaying images at different viewing angles.
[0173] For example, the first area A1 of the first display panel 111 can realize a wide viewing angle by making the first subpixel SPw having a wide emission angle emit light in the unit subpixel SPu. The second area A2 of the first display panel 111 can realize a narrow viewing angle by making the second subpixel SPn having a narrow emission angle emit light in the unit subpixel SPu.
[0174] In this case, because the first subpixel SPw emits light in the first area A1 and the second subpixel SPn emits light in the second area A2 for a long time, a deviation between the degradation degree in the first area A1 and the degradation degree in the second area A2 increases.
[0175] Therefore, based on the boundary between the first area A1 and the second area A2, an area close to the boundary may be set as a light emission cycle control area.
[0176] For example, the 1-1 region A1-1 close to the boundary in the first region A1 and the 2-1 region A2-1 close to the boundary in the second region A2 may be set as the light emission cycle control regions.
[0177] The light emission cycle control area may include two or more sub-pixel lines from a boundary.
[0178] A 1-2 area A1-2 other than a 1-1 area A1-1 corresponding to a light emission cycle control area in the first area A1 may be a light emission area in which a light emission cycle does not change.
[0179] Likewise, a 2-2 area A2-2 other than a 2-1 area A2-1 corresponding to the light emission cycle control area in the second area A2 may be a light emission area in which the light emission cycle is unchanged.
[0180] The display system 100 of the present disclosure may control a gate signal generated in the gate driving circuit 120 to control the light emission cycle of a sub-pixel located in a light emission cycle control region.
[0181] Fig.12 is a block diagram showing a configuration of a gate driving circuit in a display system according to an embodiment of the present disclosure.
[0182] Reference Fig.12 , the gate driving circuit 120 in the display system 100 according to the embodiment of the present disclosure may be disposed in a side frame region of the display panel 110 .
[0183] The gate drive circuit 120 may be composed of n stages STG1-STGn, and n (a natural number of 2 or greater) gate drive integrated circuits GDIC#1-GDIC#n are independently connected to the n stages STG1-STGn. Each gate drive integrated circuit GDIC#1-GDIC#n receives a gate high voltage VGH and a gate low voltage VGL as a drive voltage and is operated by a gate clock signal GCLK.
[0184] The first gate drive integrated circuit GDIC#1 starts operating by the gate start signal GVST, and the second to nth gate drive integrated circuits GDIC#2 to GDIC#n may receive the gate signals GS1-GS(n-1) outputted from the previous output terminals as start signals.
[0185] For example, the first gate signal GS1 output from the output terminal of the first gate driver integrated circuit GDIC#1 corresponding to the first stage STG1 can be provided to the start signal input terminal of the first subpixel line SPL1 and the second gate driver integrated circuit GDIC#2 of the second stage STG2 arranged in the first row.
[0186] Therefore, the first gate driver integrated circuit GDIC#1 of the first stage STG1 can use the gate start signal GVST as a start signal, but each of the second gate driver integrated circuit GDIC#2 of the second stage STG2 to the nth gate driver integrated circuit GDIC#n of the nth stage STGn can use the gate signal output from the output terminal of the previous gate driver integrated circuit as a start signal.
[0187] Here, the first gate signal GS1 outputted from the output terminal of the first gate driving integrated circuit GDIC#1 is used as a representation of the first start signal START1, showing that the first gate signal GS1 generated in the first stage STG1 is used as a start signal of the next stage.
[0188] As shown in the relationship between the (n-1)th stage STG(n-1) and the nth stage STGn, the configuration of the related connected stages and using the selection signal of the previous stage as the start signal of the next stage can be equally applied to all stages STG1-STGn.
[0189] In addition, the gate signal output from one stage (one gate driver integrated circuit) may include one or more scan signals and one or more light emission signals. For example, two scan signals and one light emission signal may be generated from one stage (one gate driver integrated circuit).
[0190] In addition, the gate driving circuit 120 in the display system 100 of the present disclosure may further generate a light emission cycle control signal for controlling a light emission cycle in a region near a boundary between the first region A1 having the first light emission angle and the second region A2 having the second light emission angle.
[0191] Fig.13 is a diagram illustrating a gate signal output from a gate driving circuit in a display system according to an embodiment of the present disclosure.
[0192] Reference Fig.13 Each of the plurality of gate driving integrated circuits GDIC constituting the gate driving circuit 120 in the display system 100 according to the embodiment of the present disclosure may generate a gate signal to drive the sub-pixels of the display panel 110 .
[0193] At this time, the gate signal GS output from the gate driving integrated circuit GDIC may include a scan signal SC controlling a driving timing of a subpixel, a light emitting signal EM controlling a light emitting timing of a subpixel, and a cycle control signal PS controlling a light emitting cycle of a predetermined subpixel.
[0194] The scan signal SC may include one or more scan signals according to the circuit configuration of the sub-pixel.
[0195] The light emitting signal EM may include one or more light emitting signals according to the circuit configuration of the sub-pixel.
[0196] The cycle control signal PS may include a first cycle control signal PS1 controlling a light emission cycle of a first sub-pixel SPw having a first light emission angle, and a second cycle control signal PS2 controlling a light emission cycle of a second sub-pixel SPn having a second light emission angle.
[0197] Fig.14 is a diagram showing a circuit operation of emitting light from a first sub-pixel of a unit sub-pixel in a display system according to an embodiment of the present disclosure, Fig.15 is a diagram of a signal waveform driven by a first sub-pixel of a unit sub-pixel in a display system according to an embodiment of the present disclosure.
[0198] Reference Fig.14 and Fig.15 , a unit sub-pixel according to an embodiment of the present disclosure may include a first light emitting element ED1 , a second light emitting element ED2 , a driving transistor DRT, and an internal compensation circuit.
[0199] Here, the first light emitting element ED1 may be disposed in the first sub-pixel SPw, and the second light emitting element ED2 may be disposed in the second sub-pixel SPn.
[0200] The first lens Lz1 may be located on the first light emitting element ED1 , and the second lens Lz2 may be located on the second light emitting element ED2 .
[0201] The transistors T1 to T8 , DRT provided in the unit sub-pixel may be implemented as PMOS type LTPS (low temperature polysilicon) transistors, and desired response characteristics may be obtained from these transistors.
[0202] For example, at least one of the switch transistors T1 - T8 may be implemented as an NMOS or PMOS oxide transistor having good leakage current characteristics when turned off, and the remaining transistors may be implemented as PMOS LTPS transistors having good response characteristics.
[0203] The unit sub-pixel may include a first transistor T1 connected to the data line and transmitting a data voltage Vdata through a second scan signal SC2 .
[0204] The unit sub-pixel may include a second transistor T2 which is connected to the driving voltage VDD and transmits the driving voltage VDD through the emission signal EM.
[0205] The driving transistor DRT connects the first node N1 shared by the first transistor T1 and the second transistor T2 to the third node N3 , and receives a voltage charged in the storage capacitor Cst as a gate voltage through the second node N2 .
[0206] The fourth transistor T4 controlled by the emission signal EM and the sixth transistor T6 controlled by the first cycle control signal PS1 are connected between the third node N3 and the first light emitting element ED1.
[0207] The fourth transistor T4 controlled by the emission signal EM and the eighth transistor T8 controlled by the second cycle control signal PS2 are connected between the third node N3 and the second light emitting element ED2. The eighth transistor T8 is connected to the fourth node N4 of the fourth transistor T4.
[0208] Therefore, the first light emitting element ED1 or the second light emitting element ED2 may emit light by the first and second cycle control signals PS1 and PS2 in a state in which the fourth transistor T4 is turned on by the light emitting signal EM.
[0209] The third transistor T3 controlled by the second scan signal SC2 may connect the second node N2 to the third node N3.
[0210] The fifth transistor T5 is connected between the second node N2 and a line providing the second initialization voltage Vini2 and may be controlled by the first scan signal SC1. Therefore, the fifth transistor T5 may initialize the gate node of the driving transistor DRT to the second initialization voltage Vini2 by the first scan signal SC1.
[0211] The seventh transistor T7 is connected between the anode of the first light emitting element ED1 and the line providing the first initialization voltage Vini1 and can be controlled by the second scan signal SC2. Therefore, the seventh transistor T7 can initialize the anode of the first light emitting element ED1 to the first initialization voltage Vini1 by the second scan signal SC2.
[0212] At this time, the first transistor T1 to the eighth transistor T8 may be referred to as a first switching transistor to an eighth switching transistor, respectively.
[0213] The first light emitting element ED1 and the second light emitting element ED2 emit light with an amount of current controlled by a voltage Vgs between a gate node and a source node of the driving transistor DRT.
[0214] The first light emitting element ED1 may be connected to the driving transistor DRT through the fourth transistor T4 and the sixth transistor T6. The second light emitting element ED2 may be connected to the driving transistor DRT through the fourth transistor T4 and the eighth transistor T8.
[0215] The cathodes of the first light emitting element ED1 and the second light emitting element ED2 are connected to the low potential voltage VSS.
[0216] The driving transistor DRT may control a driving current Id flowing through the first light emitting element ED1 or the second light emitting element ED2 according to a voltage Vgs between a gate node and a source node.
[0217] The compensation circuit may sample the voltage Vgs between the gate node and the source node of the driving transistor DRT to compensate for the change in the threshold voltage of the driving transistor DRT. The compensation circuit may include the first transistor T1 to the eighth transistor T8 and the storage capacitor Cst. Alternatively, the rest except the first transistor T1 for providing the data voltage Vdata may be referred to as a compensation circuit.
[0218] Therefore, the unit sub-pixel constituting the display system 100 of the present disclosure can control the light emission cycle of the first light emitting element ED1 by the first cycle control signal PS1 , and can control the light emission cycle of the second light emitting element ED2 by the second cycle control signal PS2 .
[0219] For example, in a period when the first light emitting element ED1 emits light, the first cycle control signal PS1 is provided at an on level (eg, a low level), and the second cycle control signal PS2 is provided at an off level (eg, a high level).
[0220] Reference Fig.15 In the first period P1, the gate node of the driving transistor DRT is initialized to the second initialization voltage Vini2 by the first scan signal SC1.
[0221] In the second period P2 , the data voltage Vdata is supplied to the driving transistor DRT through the second scan signal SC2 , and the anode of the first light emitting element ED1 may be initialized with the first initialization voltage Vini1 .
[0222] In the third period P3, the first light emitting element ED1 emits light by the first cycle control signal PS1, and the second light emitting element ED2 is turned off by the second cycle control signal PS2.
[0223] Fig.16 is a diagram showing a circuit operation of emitting light from a second sub-pixel of a unit sub-pixel in a display system according to an embodiment of the present disclosure, Fig.17 is a diagram of a signal waveform driven by a second sub-pixel of a unit sub-pixel in a display system according to an embodiment of the present disclosure.
[0224] because Fig.16 and Fig.14 The configuration is the same as that of , so the description of the configuration will be omitted.
[0225] However, in the period for emitting light to the second light emitting element ED2 , the second cycle control signal PS2 may be provided at an on level (eg, a low level), and the first cycle control signal PS1 may be provided at an off level (eg, a high level).
[0226] Reference Fig.17 In the first period P1, the gate node of the driving transistor DRT is initialized to the second initialization voltage Vini2 by the first scan signal SC1.
[0227] In the second period P2 , the data voltage Vdata may be provided to the driving transistor DRT by the second scan signal SC2 , and the anode of the first light emitting element ED1 may be initialized with the first initialization voltage Vini1 .
[0228] In the third period P3, the second light emitting element ED2 emits light by the second cycle control signal PS2, and the first light emitting element ED1 is turned off by the first cycle control signal PS1.
[0229] Figures 18 to 20is a diagram illustrating a cyclic control signal and an emission state depending on an area of a display panel in a display system according to an embodiment of the present disclosure.
[0230] Reference Figures 18 to 20 At least one display panel 110 in the display system 100 according to an embodiment of the present disclosure may have a light emission cycle control area close to a boundary between a first area A1 having a first light emission angle and a second area A2 having a second light emission angle.
[0231] For example, the 1-1 area A1-1 near the boundary in the first area A1 and the 2-1 area A2-1 near the boundary in the second area A2 may be set as the light emission cycle control areas.
[0232] On the other hand, the 1-2 area A1-2 other than the 1-1 area A1-1 in which the light emission cycle is variable in the first area A1 may be a fixed light emission area.
[0233] Likewise, in the second area A2, a 2-2 area A2-2 other than the 2-1 area A2-1, in which the light emission cycle is variable, may be a fixed light emission area.
[0234] Fig.18 A signal supplied to the 1-2 area A1-2 and a light emitting state thereof are shown, in which the first light emitting element ED1 constantly emits light in the first area A1.
[0235] For reference, for ease of understanding, it is shown the case where the high level signal is an on level.
[0236] Reference Fig.18 , the 1-2 area A1-2 of the display panel 110 corresponds to a fixed light emitting area where the first light emitting element ED1 emits light at a first light emitting angle.
[0237] The first cycle control signal PS1 having an on level turning on the first light emitting element ED1 is supplied to the 1-2 area A1-2 every frame according to the vertical synchronization signal Vsync defining the frame. On the other hand, the second cycle control signal PS2 maintains an off level.
[0238] Therefore, the first light emitting element ED1 emits light in each frame, and the second light emitting element ED2 maintains an off state.
[0239] Likewise, the second cycle control signal PS2 having an on level turning on the second light emitting element ED2 is supplied to the 2-2 area A2-2, wherein the second light emitting element ED2 constantly emits light in each frame, and the first cycle control signal PS1 maintains an off level.
[0240] Fig.19A signal supplied to an I-1 area A1-1 close to a boundary in the first area A1 and a light emitting state are shown.
[0241] See also Fig.19 , the 1-1 area A1-1 of the display panel 110 corresponds to an area close to the second area A2 where the second light emitting element ED2 emits light.
[0242] Therefore, since the first light emitting element ED1 and the second light emitting element ED2 emit light alternately in the 1-1 area A1-1, the degradation deviation with respect to the second area A2 can be reduced.
[0243] At this time, the cycle of alternating light emission of the first light emitting element ED1 and the second light emitting element ED2 may vary according to the distance from the boundary. For example, the cycle of light emission of the first light emitting element ED1 may increase as the distance from the boundary of the 1-1 area A1-1 increases.
[0244] In this case, the user can naturally perceive the brightness change near the boundary, and the brightness degradation near the boundary can be gradually reduced.
[0245] Fig.19 The case where the first light emitting element ED1 and the second light emitting element ED2 emit light alternately at a ratio of 1:1 is shown.
[0246] In this case, the first cyclic control signal PS1 having a turn-on level of the first light emitting element ED1 may be provided every odd frame according to the vertical sync signal Vsync defining the frame. On the other hand, the second cyclic control signal PS2 having a turn-on level may be provided every even frame.
[0247] Therefore, the first light emitting element ED1 and the second light emitting element ED2 emit light alternately for each frame.
[0248] Fig. 20 The case where the first light emitting element ED1 and the second light emitting element ED2 emit light alternately at a ratio of 2:1 is shown.
[0249] In this case, according to the vertical synchronization signal Vsync defining the frame, the first cycle control signal PS1 for turning on the first light emitting element ED1 may be continuously provided at an on level in two frames, and may be provided at an off level during one subsequent frame. On the other hand, when the first cycle control signal PS1 is provided at an off level, the second cycle control signal PS2 may be provided at an on level in each frame.
[0250] Therefore, the first light emitting element ED1 and the second light emitting element ED2 emit light alternately at a ratio of 2:1.
[0251] In this manner, since the luminous efficiency of the first light emitting element ED1 increases as the first light emitting element ED1 moves away from the boundary to the first area A1, degradation deviation can be reduced while naturally maintaining luminance variation.
[0252] Fig.21 is a diagram illustrating a change in a light emission cycle near a boundary between a first area and a second area in a display system according to an embodiment of the present disclosure.
[0253] Reference Fig.21 At least one display panel 110 in the display system 100 according to an embodiment of the present disclosure may include a light emission cycle control area close to a boundary between a first area A1 having a first light emission angle and a second area A2 having a second light emission angle.
[0254] For example, a 1-1 area A1-1 close to a boundary in the first area A1 and a 2-1 area A2-1 close to a boundary in the second area A2 may be set as the light emission cycle control areas.
[0255] The light emission cycle control region is a region where the first light emitting element ED1 and the second light emitting element ED2 emit light alternately according to a predetermined cycle.
[0256] For example, the first light emitting element ED1 and the second light emitting element ED2 may emit light alternately in the 1-1 area A1-1. As the distance from the boundary increases, the light emission cycle of the first light emitting element ED1 also increases.
[0257] In addition, the first light emitting element ED1 and the second light emitting element ED2 may also emit light alternately in the 2-1 area A2-1. As the distance from the boundary increases, the light emission cycle of the second light emitting element ED2 also increases.
[0258] In this way, as the distance from the boundary increases, by increasing the luminous efficiency of the light-emitting element corresponding to the area, the degradation deviation can be reduced while naturally maintaining the brightness change.
[0259] The foregoing embodiment is briefly described below.
[0260] An embodiment of the present disclosure may provide a display system, comprising: a display panel, the display panel comprising a plurality of unit sub-pixels, the unit sub-pixels comprising a first sub-pixel having a first light-emitting angle and a second sub-pixel having a second light-emitting angle; a gating drive circuit, the gating drive circuit being configured to provide a gating signal to the display panel; and a timing controller, the timing controller being configured to control the light-emitting cycle of one or more of the first sub-pixels or the second sub-pixels in a light-emitting cycle control area between a first area where the first sub-pixel is configured to emit light and a second area where the second sub-pixel is configured to emit light.
[0261] The display panels also include an instrument panel display panel located facing the driver's seat; a center trim display panel located between the driver's seat and the passenger seat; and a passenger display panel located on the passenger seat.
[0262] The second light emitting angle is narrower than the first light emitting angle, and the second light emitting angle is a viewing angle configured to be recognized only by an occupant on a seat that the display panel faces.
[0263] The first sub-pixel includes: a first light-emitting element; a first black matrix, the first black matrix including an opening above the first light-emitting element; a first insulating layer, the first insulating layer is formed on the first black matrix; a first gap filler, the first gap filler is formed on the first insulating layer; and a first lens having the first light-emitting angle, the first lens is formed on the first gap filler.
[0264] The first lens is a semi-cylindrical lens with a rectangular base.
[0265] The second sub-pixel includes: a second light-emitting element; a second black matrix, the second black matrix having an opening above the second light-emitting element; a second insulating layer, the second insulating layer formed on the second black matrix; a second gap filler, the second gap filler is formed on the second insulating layer; and a second lens having the second light-emitting angle, the second lens being formed on the second gap filler.
[0266] The second lens is a hemispherical lens with a circular bottom. Therefore, the second lens is different from the first lens in structure.
[0267] The unit sub-pixel includes a first number of the first sub-pixels and a second number of the second sub-pixels, the second number being greater than the first number.
[0268] The first area is located outside the second area.
[0269] The second region has a variable size.
[0270] The first region includes: a 1-1 region in which the first sub-pixel and the second sub-pixel are configured to emit light alternately; and a 1-2 region in which only the first sub-pixel emits light.
[0271] The light emission cycle of the first sub-pixel increases as the distance between the first sub-pixel and a boundary between the first region and the second region increases.
[0272] The second region includes: a 2-1 region in which the first sub-pixel and the second sub-pixel are configured to emit light alternately; and a 2-2 region in which only the second sub-pixel is configured to emit light.
[0273] The light emission cycle of the second sub-pixel increases as the distance between the second sub-pixel and a boundary between the first region and the second region increases.
[0274] The gating drive circuit is configured to output: a scanning signal for controlling the driving timing of the unit sub-pixel; a light-emitting signal for controlling the light-emitting timing of the unit sub-pixel; a first cycle control signal for controlling the light-emitting cycle of the first sub-pixel; and a second cycle control signal for controlling the light-emitting cycle of the second sub-pixel.
[0275] The unit sub-pixel includes: a first light emitting element; a second light emitting element; a first transistor, the first transistor being configured to send a data voltage based on a second scanning signal; a second transistor, the second transistor being configured to send a driving voltage based on the light emitting signal; a driving transistor, the driving transistor being connected between a first node and a third node shared by the first transistor and the second transistor, and being connected to receive a voltage charged in a storage capacitor through the second node as a gate voltage; a third transistor, the third transistor being connected between the second node and the third node, and being connected to be controlled by the second scanning signal; and a fourth transistor, the fourth transistor being connected to the third node, and being connected to be controlled by the the light-emitting signal controls; a fifth transistor, the fifth transistor is connected between the second node and the line providing the second initialization voltage, and is connected to be controlled by the first scan signal; a sixth transistor, the sixth transistor is connected between the fourth node of the fourth transistor and the anode of the first light-emitting element, and is connected to be controlled by the first cycle control signal; a seventh transistor, the seventh transistor is connected between the anode of the first light-emitting element and the line providing the first initialization voltage, and is connected to be controlled by the second scan signal; and an eighth transistor, the eighth transistor is connected between the fourth node of the fourth transistor and the anode of the second light-emitting element, and is connected to be controlled by the second cycle control signal.
[0276] An embodiment of the present disclosure may provide a display driving method for driving a display panel including a plurality of unit sub-pixels, wherein each of the plurality of unit sub-pixels includes a first sub-pixel having a first light-emitting angle and a second sub-pixel having a second light-emitting angle, and the display driving method includes the following steps: driving a first sub-pixel in a first area of the display panel; driving a second sub-pixel in a second area of the display panel; for a 1-1 area within the first area, controlling the first sub-pixel or the second sub-pixel to emit light alternately in a cycle; and for a 2-1 area within the second area, controlling the first sub-pixel or the second sub-pixel to emit light alternately in a cycle.
[0277] The light emission cycle of the first sub-pixel increases in the 1-1 region as the distance from the first sub-pixel to a boundary between the first region and the second region increases.
[0278] The light emission cycle of the second sub-pixel increases in the 2-1 region as the distance from the second sub-pixel to the boundary between the first region and the second region increases.
[0279] An embodiment of the present disclosure may provide a vehicle, comprising: a display panel, the display panel comprising a plurality of unit sub-pixels, each of the unit sub-pixels comprising a first sub-pixel having a first luminous angle and a second sub-pixel having a second luminous angle; a gating drive circuit, the gating drive circuit being configured to provide a gating signal to the display panel; and a timing controller, the timing controller being configured to control a luminous cycle of one or more of the first sub-pixels or the second sub-pixels in a luminous cycle control area between a first area where the first sub-pixel is configured to emit light and a second area where the second sub-pixel is configured to emit light.
[0280] An embodiment of the present disclosure may provide a display system, comprising: a display panel, the display panel comprising a plurality of unit sub-pixels, the unit sub-pixels among the plurality of unit sub-pixels comprising a first sub-pixel configured to emit light in a first area and a second sub-pixel configured to emit light in a second area; a gating drive circuit, the gating drive circuit being configured to provide a gating signal to the display panel; and a timing controller, the timing controller being configured to control a light emission cycle of one or more of the first sub-pixel or the second sub-pixel based on a distance from a corresponding one of one or more of the first sub-pixel or the second sub-pixel to a boundary between the first area and the second area.
[0281] The first sub-pixel includes a first emission angle, and the second sub-pixel includes a second emission angle different from the first emission angle.
[0282] The first sub-pixel includes a first lens, and the second sub-pixel includes a second lens that is different in structure from the first lens.
[0283] The first lens is a semi-cylindrical lens having a rectangular bottom, and the second lens is a hemispherical lens having a circular bottom.
[0284] The first sub-pixel and the second sub-pixel are configured to emit light of the same color.
[0285] The above description is proposed to enable those skilled in the art to implement and use the technical ideas of the present disclosure, and is provided in the context of specific applications and their requirements. Various modifications, additions and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. The above description and accompanying drawings provide examples of the technical ideas of the present disclosure for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the technical ideas of the present disclosure.
[0286] CROSS-REFERENCE TO RELATED APPLICATIONS
[0287] This application claims priority to Korean Patent Application No. 10-2023-0144325 filed on October 26, 2023, which is hereby incorporated by reference for all purposes as if fully set forth herein.
Claims
1. A display system, comprising: A display panel, the display panel comprising a plurality of unit sub-pixels, the unit sub-pixels comprising a first sub-pixel having a first emission angle and a second sub-pixel having a second emission angle; a gate driving circuit configured to provide a gate signal to the display panel; as well as A timing controller is configured to control the light emission cycle of one or more of the first sub-pixel or the second sub-pixel in a light emission cycle control area between a first area where the first sub-pixel is configured to emit light and a second area where the second sub-pixel is configured to emit light.
2. The display system according to claim 1, wherein: The display panel further includes: The instrument panel display panel is located where the driver's seat faces; a center fascia display panel located between the driver and passenger seats; and The passenger display panel is located at the position facing the passenger seat.
3. The display system according to claim 1, wherein: The second light emitting angle is narrower than the first light emitting angle, and the second light emitting angle is a viewing angle configured to be recognized only by an occupant on a seat that the display panel faces.
4. The display system according to claim 1, wherein: The first sub-pixel comprises: a first light emitting element; a first black matrix, wherein the first black matrix includes an opening above the first light-emitting element; a first insulating layer, wherein the first insulating layer is formed on the first black matrix; a first gap filler formed on the first insulating layer; and A first lens having the first light emitting angle is formed on the first gap filler.
5. The display system according to claim 4, wherein: The first lens is a semi-cylindrical lens with a rectangular base.
6. The display system according to claim 1, wherein: The second sub-pixel comprises: a second light emitting element; a second black matrix, wherein the second black matrix includes an opening above the second light-emitting element; a second insulating layer, wherein the second insulating layer is formed on the second black matrix; a second gap filler formed on the second insulating layer; and A second lens having the second light emitting angle is formed on the second gap filler.
7. The display system according to claim 6, wherein: The second lens is a hemispherical lens with a circular bottom.
8. The display system according to claim 1, wherein: The unit sub-pixel includes a first number of the first sub-pixels and a second number of the second sub-pixels, the second number being greater than the first number.
9. The display system according to claim 1, wherein: The first region is located outside the second region.
10. The display system according to claim 1, wherein: The second region has a variable size.
11. The display system according to claim 1, wherein: The first area includes: A 1-1 region, in which the first sub-pixel and the second sub-pixel are configured to emit light alternately; and 1-2 region, in which only the first sub-pixel is configured to emit light.
12. The display system according to claim 11, wherein: The light emission cycle of the first sub-pixel increases as the distance between the first sub-pixel and a boundary between the first region and the second region increases.
13. The display system according to claim 1, wherein: The second area includes: A 2-1 region, in which the first sub-pixel and the second sub-pixel are configured to emit light alternately; and A 2-2 region, in which only the second sub-pixel is configured to emit light.
14. The display system according to claim 13, wherein: The light emission cycle of the second sub-pixel increases as the distance between the second sub-pixel and a boundary between the first region and the second region increases.
15. The display system according to claim 1, wherein: The gate drive circuit is configured to output: a scanning signal for controlling the driving timing of the unit sub-pixel; a light emitting signal for controlling the light emitting timing of the unit sub-pixel; A first cycle control signal for controlling a light emission cycle of the first sub-pixel; as well as A second cycle control signal for controlling a light emission cycle of the second sub-pixel.
16. The display system according to claim 15, wherein: The unit sub-pixel includes: a first light emitting element; a second light emitting element; a first transistor configured to transmit a data voltage based on a second scan signal; a second transistor configured to transmit a driving voltage based on the light emitting signal; a driving transistor connected between a first node shared by the first transistor and the second transistor and a third node and connected to receive a voltage charged in a storage capacitor as a gate voltage through a second node; a third transistor connected between the second node and the third node and connected to be controlled by the second scan signal; a fourth transistor connected to the third node and connected to be controlled by the light emission signal; a fifth transistor connected between the second node and a line supplying a second initialization voltage and connected to be controlled by a first scan signal; a sixth transistor connected between the fourth node of the fourth transistor and the anode of the first light emitting element and connected to be controlled by the first cycle control signal; a seventh transistor connected between the anode of the first light emitting element and a line supplying a first initialization voltage and connected to be controlled by the second scan signal; and an eighth transistor connected between the fourth node of the fourth transistor and the anode of the second light emitting element and connected to be controlled by the second cycle control signal.
17. A display driving method for driving a display panel including a plurality of unit sub-pixels, wherein each of the plurality of unit sub-pixels includes a first sub-pixel having a first emission angle and a second sub-pixel having a second emission angle, the display driving method comprising the following steps: driving a first sub-pixel in a first area of the display panel; driving a second sub-pixel in a second area of the display panel; For a 1-1 region within the first region, controlling the first sub-pixel or the second sub-pixel to emit light alternately in a cycle; as well as For the 2-1 region in the second region, the first sub-pixel or the second sub-pixel is controlled to emit light alternately in a cycle.
18. The display driving method according to claim 17, wherein: The light emission cycle of the first sub-pixel increases in the 1-1 region as the distance from the first sub-pixel to a boundary between the first region and the second region increases.
19. The display driving method according to claim 17, wherein: The light emission cycle of the second sub-pixel increases as the distance from the second sub-pixel to a boundary between the first region and the second region increases in the 2-1 region.
20. A vehicle, comprising: A display panel, the display panel comprising a plurality of unit sub-pixels, each unit sub-pixel comprising a first sub-pixel having a first emission angle and a second sub-pixel having a second emission angle; a gate driving circuit configured to provide a gate signal to the display panel; as well as A timing controller is configured to control the light emission cycle of one or more of the first sub-pixel or the second sub-pixel in a light emission cycle control area between a first area where the first sub-pixel is configured to emit light and a second area where the second sub-pixel is configured to emit light.
21. A display system, comprising: A display panel, the display panel comprising a plurality of unit sub-pixels, wherein the unit sub-pixels of the plurality of unit sub-pixels include a first sub-pixel configured to emit light in a first area and a second sub-pixel configured to emit light in a second area; a gate driving circuit configured to provide a gate signal to the display panel; as well as A timing controller configured to control a light emission cycle of one or more of the first sub-pixels or the second sub-pixels based on a distance from a corresponding one of the first sub-pixels or the second sub-pixels to a boundary between the first region and the second region.
22. The display system according to claim 21, wherein: The first sub-pixel includes a first emission angle, and the second sub-pixel includes a second emission angle different from the first emission angle.
23. The display system according to claim 21, wherein: The first sub-pixel includes a first lens, and the second sub-pixel includes a second lens that is different in structure from the first lens.
24. The display system according to claim 23, wherein: The first lens is a semi-cylindrical lens having a rectangular bottom, and the second lens is a hemispherical lens having a circular bottom.
25. The display system according to claim 21, wherein: The first sub-pixel and the second sub-pixel are configured to emit light of the same color.
Citation Information
Patent Citations
Far ultraviolet light emitting device
KR1020230144325A