Electronic package and fabrication method thereof

Abstract

An electronic package and a method of fabricating the same are provided, including disposing an electronic component on a carrier structure, and covering the electronic component with a heat dissipation cover layer contacting a metal layer formed on a side surface of the carrier structure to quickly dissipate heat around the electronic component. Therefore, the problem that the electronic component fails due to overheating during operation is effectively avoided.

Description

Technical Field

[0001] The present invention relates to a semiconductor packaging technology, and in particular to an electronic packaging component capable of improving heat dissipation performance and a manufacturing method thereof. Background Art

[0002] As the demand for electronic products in terms of functions and processing speed increases, semiconductor chips, as the core components of electronic products, need to have higher density electronic components and electronic circuits. Therefore, semiconductor chips will generate more heat energy during operation. This situation is particularly evident for packaging stacking structures with multiple chips.

[0003] like Figure 1 As shown, the conventional semiconductor package 1 combines a semiconductor chip 11 on a packaging substrate 10 in a flip-chip manner, and forms a plurality of conductive pillars 13 on the packaging substrate 10, and then forms a packaging colloid 15 on the packaging substrate 10 to cover the semiconductor chip 11 and the conductive pillars 13, so that the conductive pillars 13 are exposed from the packaging colloid 15 for external connection to another electronic module 1a.

[0004] However, in the existing semiconductor package 1, the thermal conductivity of the packaging colloid 15 is poor, so the semiconductor chip 11 is embedded in the packaging colloid 15, and heat is easily accumulated around the semiconductor chip 11, causing the semiconductor chip 11 to fail due to overheating during operation, causing the terminal electronic product to be scrapped.

[0005] Therefore, how to overcome the above-mentioned problems of the prior art has become a difficult problem that needs to be overcome urgently in the industry. Summary of the invention

[0006] In view of the various deficiencies of the above-mentioned prior art, the present invention provides an electronic package, comprising: a supporting structure; an electronic component, which is combined and electrically connected to the supporting structure; a heat dissipation covering layer, which is formed on the supporting structure to cover the electronic component; and a metal layer, which is formed on the side of the supporting structure and contacts the heat dissipation covering layer.

[0007] The present invention also provides a method for manufacturing an electronic package, comprising: providing a supporting structure with an electronic component, and the electronic component is electrically connected to the supporting structure; forming a heat dissipation covering layer on the supporting structure so that the heat dissipation covering layer covers the electronic component; and forming a metal layer on the side of the supporting structure, and making the metal layer contact the heat dissipation covering layer.

[0008] In the aforementioned electronic package and its manufacturing method, the material forming the heat dissipation covering layer is a metal material.

[0009] In the aforementioned electronic package and its manufacturing method, the material forming the heat dissipation covering layer is a thermally conductive insulating material.

[0010] The aforementioned electronic package and its manufacturing method further include forming at least one conductive column on the supporting structure, and the conductive column is electrically connected to the supporting structure. For example, the heat dissipation cover layer contacts the conductive column. Alternatively, the heat dissipation cover layer has an opening so that the conductive column passes through the opening without touching the opening. It may even include forming a circuit structure on the heat dissipation cover layer, and the circuit structure is electrically connected to the conductive column.

[0011] The aforementioned electronic package and its manufacturing method also include forming a packaging layer on the supporting structure so that the packaging layer covers the electronic component and the heat dissipation cover layer. For example, it also includes forming at least one conductive column on the supporting structure, and the conductive column is electrically connected to the supporting structure, and the conductive column is embedded in the packaging layer. Furthermore, it also includes forming a circuit structure on the packaging layer, and the circuit structure is electrically connected to the conductive column.

[0012] As can be seen from the above, the electronic package and its manufacturing method of the present invention mainly dissipate heat quickly around the electronic component by bringing the heat dissipation covering layer with extremely good thermal conductivity into contact with the metal layer on the side of the supporting structure. Therefore, compared with the prior art, the present invention covers the electronic component with the heat dissipation covering layer, which can effectively avoid the problem of the electronic component failing due to overheating during operation, thereby avoiding the problem of terminal electronic products being scrapped. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a cross-sectional schematic diagram of a conventional semiconductor package.

[0014] Figures 2A to 2G FIG. 4 is a cross-sectional schematic diagram of a method for manufacturing an electronic package according to a first embodiment of the present invention.

[0015] Figure 2H for Figure 2G A partial top view of the diagram.

[0016] Figure 3A FIG. 4 is a cross-sectional schematic diagram of a second embodiment of an electronic package of the present invention.

[0017] Figure 3B for Figure 3A A partial top view of the diagram.

[0018] Main component symbols

[0019] 1 Semiconductor Package

[0020] 1a Electronic module

[0021] 10 Package substrate

[0022] 11. Semiconductor Chip

[0023] 12. Second semiconductor chip

[0024] 13 Conductive column

[0025] 15 Encapsulation colloid

[0026] 2,3 Electronic packaging

[0027] 2a Encapsulation module

[0028] 20 Load-bearing structure

[0029] 20a First side

[0030] 20b Second side

[0031] 200 Insulation

[0032] 201 Wiring Layer

[0033] 203 Insulation protective layer

[0034] 21 Electronic components

[0035] 21a Action surface

[0036] 21b Non-active surface

[0037] 210 Electrode pads

[0038] 211 Conductive bump

[0039] 212 Primer

[0040] 22,32 Heat dissipation cover

[0041] 220 Opening

[0042] 23,23a,33 conductive pillars

[0043] 23a First conductive column

[0044] 23b Second conductive column

[0045] 230 End face

[0046] 25 Encapsulation layer

[0047] 25a First coating layer

[0048] 25b Second coating layer

[0049] 26 Line Structure

[0050] 260 Dielectric layer

[0051] 261 Line Layer

[0052] 262 Electrical contact pads

[0053] 27 Conductive element

[0054] 28 Metal Layer

[0055] 29 Auxiliary Function Elements

[0056] 9 Loading plate

[0057] 90 Release layer

[0058] 91 Adhesive layer

[0059] L Cutting path

[0060] S side. DETAILED DESCRIPTION

[0061] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and technical effects of the present invention from the contents disclosed in this specification.

[0062] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings attached to this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present invention, so they have no substantial technical significance. Any modification of the structure, change in the proportion relationship, or adjustment of the size should still fall within the scope of the technical content disclosed by the present invention without affecting the technical effects and purposes that can be achieved by the present invention. At the same time, the terms such as "on", "first", "second", and "one" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present invention without substantially changing the technical content.

[0063] Figures 2A to 2G It is a cross-sectional schematic diagram of a manufacturing method of a first embodiment of an electronic package 2 of the present invention.

[0064] like Figure 2A As shown, a supporting structure 20 is disposed on a supporting board 9 , a plurality of first conductive pillars 23 a are formed on the supporting structure 20 , and at least one electronic component 21 is disposed on the supporting structure 20 .

[0065] The carrier plate 9 is, for example, a plate made of semiconductor material (such as silicon or glass), on which a release layer 90 and an adhesive layer 91 may be sequentially formed according to needs.

[0066] The supporting structure 20 has a first side 20a and a second side 20b opposite to each other, and the first side 20a is provided with a plurality of the first conductive pillars 23a and the electronic components 21, while the second side 20b is combined with the adhesive layer 91. For example, the supporting structure 20 is a package substrate with a core layer and a circuit structure, a package substrate with a coreless circuit structure, a silicon interposer (TSI) with conductive through-silicon vias (TSV), or other board types.

[0067] In the present embodiment, the carrier structure 20 is formed into a coreless package substrate by a redistribution layer (RDL) manufacturing method, which includes at least one insulating layer 200 disposed on the adhesive layer 91 and a wiring layer 201 combined with the insulating layer 200. For example, the material forming the wiring layer 201 is copper, and the material forming the insulating layer 200 is a dielectric material such as polybenzoxazole (PBO), polyimide (PI), prepreg (PP), etc.

[0068] The first conductive pillar 23 a is formed on the wiring layer 201 of the first side 20 a by electroplating to electrically connect the wiring layer 201 .

[0069] In this embodiment, the first conductive pillar 23 a is made of a metal material such as copper or a solder material.

[0070] The electronic component 21 is an active component, a passive component or a combination of the two, wherein the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor or an inductor.

[0071] In the present embodiment, the electronic component 21 is a semiconductor chip having an active surface 21a and an inactive surface 21b opposite to each other, and the electrode pad 210 of the active surface 21a is disposed on the wiring layer 201 by a flip-chip method through a plurality of conductive bumps 211 such as copper pillars, solder balls, etc., and electrically connected to the wiring layer 201 of the first side 20a, and the conductive bumps 211 are coated with a primer 212; or, the electronic component 21 is disposed on the supporting structure 20 by its inactive surface 21b, and can be electrically connected to the wiring layer 201 by a bonding method through a plurality of welding wires (not shown). However, the method of electrically connecting the electronic component 21 to the wiring layer 201 is not limited to the above.

[0072] like Figure 2BAs shown, a first cladding layer 25a is formed on the first side 20a of the supporting structure 20, so that the first cladding layer 25a covers the electronic component 21, the primer 212 and the first conductive pillars 23a, wherein the first cladding layer 25a is combined with the insulating layer 200. Then, through a removal process, the upper surface of the first cladding layer 25a is made lower than the end surface 230 of the first conductive pillar 23a and the inactive surface 21b of the electronic component 21, so that the end surface 230 of the first conductive pillar 23a and the inactive surface 21b of the electronic component 21 are exposed from the first cladding layer 25a.

[0073] In this embodiment, the first coating layer 25a is an insulating material, such as polyimide (PI), dry film, epoxy resin packaging colloid or packaging material (molding compound), which can be formed on the insulating layer 200 by lamination or molding.

[0074] like Figure 2C As shown, a heat dissipation covering layer 22 is formed on the upper surface of the first cladding layer 25 a and the first conductive pillar 23 a and the portion of the electronic component 21 that is exposed outside the first cladding layer 25 a .

[0075] In this embodiment, the heat dissipation cover layer 22 is a metal material, such as copper. For example, the heat dissipation cover layer 22 is formed by electroplating or other methods to make it extremely thin.

[0076] Furthermore, the heat dissipation cover layer 22 has at least one opening 220, so that the heat dissipation cover layer 22 is not connected between two of the first conductive pillars 23a. Figure 2H shown.

[0077] like Figure 2D As shown, a second conductive column 23b is formed on each of the first conductive columns 23a, and a second cladding layer 25b is formed on the first cladding layer 25a, so that the second cladding layer 25b covers the heat dissipation cover layer 22 and the plurality of second conductive columns 23b.

[0078] In this embodiment, the second conductive pillars 23 b are formed on the heat dissipation covering layer 22 of the end surfaces 230 of the first conductive pillars 23 a by electroplating to electrically connect the first conductive pillars 23 a .

[0079] Furthermore, the second coating layer 25b is an insulating material, such as polyimide (PI), dry film, epoxy resin or molding compound, which can be formed on the first coating layer 25a by lamination or molding. It should be understood that the material forming the first coating layer 25a and the material forming the second coating layer 25b can be the same or different.

[0080] In addition, a flattening process such as grinding can be performed as required to make the outer surface of the second cladding layer 25b flush with the tops of the second conductive pillars 23b so that the second conductive pillars 23b are exposed outside the second cladding layer 25b.

[0081] In addition, the second encapsulation layer 25b contacts and combines with the first encapsulation layer 25a through the opening 220, so that the first encapsulation layer 25a and the second encapsulation layer 25b serve as the packaging layer 25, and at the same time, the connected first conductive column 23a and the second conductive column 23b together constitute the conductive column 23, wherein a portion of the heat dissipation covering layer 22 is sandwiched between the first conductive column 23a and the second conductive column 23b.

[0082] like Figure 2E As shown, a circuit structure 26 is formed on the second cladding layer 25b, and the circuit structure 26 is electrically connected to the plurality of conductive pillars 23. Next, the carrier plate 9 and the release layer 90 and the adhesive layer 91 thereon are removed to expose the second side 20b of the carrier structure 20.

[0083] In this embodiment, the circuit structure 26 includes a plurality of dielectric layers 260, and a plurality of fan-out (Fan-Out) type circuit redistribution layer (RDL) type circuit layers 261 disposed on the dielectric layer 260, and the outermost dielectric layer 260 can be used as a solder mask, so that the outermost circuit layer 261 is partially exposed from the solder mask, and is used as an electrical contact pad 262 for external connection to another electronic module or other electronic components (not shown). For example, the material forming the circuit layer 261 is copper, and the material forming the dielectric layer 260 is a dielectric material such as poly(p-oxadiazole) (PBO), polyimide (PI), prepreg (PP) or other materials.

[0084] like Figure 2F As shown in FIG. 1 , a plurality of conductive elements 27 such as solder balls are formed on the wiring layer 201 of the second side 20b of the supporting structure 20, so that the plurality of conductive elements 27 are electrically connected to the conductive pillars 23 and / or the electronic components 21. Figure 2EThe cutting path L shown in the figure is used for the singulation process to obtain the packaging module 2a, and the side surfaces of the supporting structure 20, the first coating layer 25a, the second coating layer 25b and the circuit structure 26 together constitute the side surface S of the packaging module 2a, so that the heat dissipation covering layer 22 is exposed on the side surface S of the packaging module 2a.

[0085] In this embodiment, an insulating protective layer 203 such as a solder mask may be formed on the insulating layer 200 of the second side 20b, and a plurality of openings may be formed on the insulating protective layer 203 to expose the wiring layer 201 through the openings for combining with the conductive element 27.

[0086] Furthermore, at least one auxiliary functional element 29 , such as a passive element, may be disposed on the wiring layer 201 of the second side 20 b of the supporting structure 20 .

[0087] like Figure 2G As shown, a metal layer 28 connected to the heat dissipation cover layer 22 is formed on the side surface S of the packaging module 2 a.

[0088] Therefore, the manufacturing method of the present invention mainly embeds the heat dissipation covering layer 22 with excellent thermal conductivity in the packaging layer 25 and contacts the metal layer 28, so as to quickly dissipate heat around the electronic component 21. Therefore, compared with the prior art, the present invention covers the electronic component 21 with the heat dissipation covering layer 22, which can effectively avoid the problem of the electronic component 21 failing due to overheating during operation, thereby avoiding the problem of terminal electronic products being scrapped.

[0089] Please refer to Figure 3A and Figure 3B In the second embodiment of the electronic package 3 shown in FIG. 1 , the first coating layer 25a and the second coating layer 25b may be omitted. Figure 2B In the process of forming the heat conductive insulating material, a heat conductive insulating material is formed on the insulating layer 200 by lamination or molding to form a heat dissipation covering layer 32 covering a plurality of conductive pillars 33 and the electronic components 21. It should be understood that in the subsequent process, it is not necessary to form the second conductive pillar of the aforementioned embodiment, and the heat conductive insulating material can be directly formed. Figure 2E to Figure 2G According to the manufacturing process shown, the circuit structure 26 is formed on the heat dissipation cover layer 32 and electrically connected to the plurality of conductive pillars 33 .

[0090] Therefore, the manufacturing method of the present invention mainly covers the electronic component 21 with a heat dissipation covering layer 32 with excellent thermal conductivity and contacts the metal layer 28, so as to quickly dissipate heat around the electronic component 21 and effectively avoid the problem of failure of the electronic component 21 due to overheating during operation.

[0091] The present invention further provides an electronic package 2 , 3 , which includes: a supporting structure 20 , at least one electronic component 21 , a heat dissipation covering layer 22 , 32 and a metal layer 28 .

[0092] The electronic component 21 is combined with and electrically connected to the supporting structure 20 .

[0093] The heat dissipation covering layers 22 , 32 are formed on the supporting structure 20 to cover the electronic component 21 .

[0094] The metal layer 28 is formed on the side surface S of the supporting structure 20 and contacts the heat dissipation covering layers 22 , 32 .

[0095] In one embodiment, the heat dissipation cover layer 22 is formed of metal material.

[0096] In one embodiment, the heat dissipation cover layer 32 is made of a thermally conductive insulating material.

[0097] In one embodiment, the electronic package 2, 3 further includes at least one conductive column 23, 33 disposed on the support structure 20 and electrically connected to the support structure 20. For example, the heat dissipation cover layer 22, 32 contacts the conductive column 23, 33. Alternatively, the heat dissipation cover layer 22 has an opening 220 so that the conductive column 23 passes through the opening 220 without touching the opening 220. Furthermore, the electronic package 3 further includes a circuit structure 26 disposed on the heat dissipation cover layer 32 and electrically connected to the conductive column 33.

[0098] In one embodiment, the electronic package 2 further includes a packaging layer 25 formed on the supporting structure 20, so that the packaging layer 25 covers the electronic component 21 and the heat dissipation cover layer 22. For example, it also includes at least one conductive column 23, 23a disposed on the supporting structure 20 and electrically connected to the supporting structure 20, which is embedded in the packaging layer 25. Further, it may include a circuit structure 26 disposed on the packaging layer 25 and electrically connected to the conductive columns 23, 23a.

[0099] In summary, the electronic package and its manufacturing method of the present invention can quickly dissipate heat around the electronic component by contacting the heat dissipation covering layer with excellent thermal conductivity to the metal layer. Therefore, the present invention covers the electronic component with the heat dissipation covering layer, which can effectively avoid the problem of the electronic component failing due to overheating during operation, thereby avoiding the problem of terminal electronic products being scrapped.

[0100] The above embodiments are only used to illustrate the principles and technical effects of the present invention, and are not used to limit the present invention. Any person skilled in the art may modify the above embodiments without violating the inventive concept and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.

Claims

1. An electronic package, comprising: load-bearing structure; an electronic component that is bonded to and electrically connected to the supporting structure; a heat dissipation covering layer formed on the supporting structure to cover the electronic component; as well as A metal layer is formed on the side of the supporting structure and contacts the heat dissipation covering layer.

2. The electronic package of claim 1, wherein: The heat dissipation covering layer is made of metal material.

3. The electronic package of claim 1, wherein: The material forming the heat dissipation covering layer is a heat conductive insulating material.

4. The electronic package of claim 1, wherein: The electronic package also includes a plurality of conductive pillars which are arranged on the supporting structure and electrically connected to the supporting structure.

5. The electronic package of claim 4, wherein: The heat dissipation cover layer contacts the plurality of conductive pillars.

6. The electronic package of claim 4, wherein: The heat dissipation covering layer has a plurality of openings so that the plurality of conductive pillars pass through the plurality of openings without touching the plurality of openings.

7. The electronic package of claim 4, wherein: The electronic package also includes a circuit structure which is arranged on the heat dissipation covering layer and electrically connected to the plurality of conductive pillars.

8. The electronic package of claim 1, wherein: The electronic package also includes a packaging layer formed on the supporting structure, so that the packaging layer covers the electronic element and the heat dissipation covering layer.

9. The electronic package of claim 8, wherein: The electronic package also includes a plurality of conductive pillars which are arranged on the supporting structure and electrically connected to the supporting structure and are embedded in the packaging layer.

10. The electronic package of claim 9, wherein: The electronic package also includes a circuit structure which is arranged on the packaging layer and electrically connected to the plurality of conductive pillars.

11. A method for manufacturing an electronic package, comprising: Providing a supporting structure with an electronic component, and the electronic component is electrically connected to the supporting structure; forming a heat dissipation covering layer on the supporting structure so that the heat dissipation covering layer covers the electronic component; as well as A metal layer is formed on the side of the supporting structure, and the metal layer contacts the heat dissipation covering layer.

12. The method for manufacturing an electronic package according to claim 11, wherein: The heat dissipation covering layer is formed of metal material.

13. The method for manufacturing an electronic package according to claim 11, wherein: The material forming the heat dissipation covering layer is a heat conductive insulating material.

14. The method for manufacturing an electronic package according to claim 11, wherein: The manufacturing method further includes forming a plurality of conductive pillars on the supporting structure, and the plurality of conductive pillars are electrically connected to the supporting structure.

15. The method for manufacturing an electronic package according to claim 14, wherein: The heat dissipation cover layer contacts the plurality of conductive pillars.

16. The method for manufacturing an electronic package as claimed in claim 14, wherein: The heat dissipation covering layer has a plurality of openings so that the plurality of conductive pillars pass through the plurality of openings without touching the plurality of openings.

17. The method for manufacturing an electronic package as claimed in claim 14, wherein: The manufacturing method also includes forming a circuit structure on the heat dissipation covering layer, and the circuit structure is electrically connected to the plurality of conductive pillars.

18. The method for manufacturing an electronic package according to claim 11, wherein: The manufacturing method further comprises forming a packaging layer on the supporting structure so that the packaging layer covers the electronic element and the heat dissipation covering layer.

19. The method for manufacturing an electronic package according to claim 18, wherein: The manufacturing method also includes forming a plurality of conductive pillars on the supporting structure, wherein the plurality of conductive pillars are electrically connected to the supporting structure, and the plurality of conductive pillars are embedded in the packaging layer.

20. The method for manufacturing an electronic package according to claim 19, wherein: The manufacturing method also includes forming a circuit structure on the packaging layer, and the circuit structure is electrically connected to the plurality of conductive pillars.

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