Monitoring structure and preparation method thereof, display mother board and lap resistance testing method

Abstract

The invention discloses a monitoring structure and a preparation method thereof, a display mother board and a lap resistance testing method. The monitoring structure comprises a substrate, an insulating layer, an isolation structure and a first electrode layer. The insulating layer is located on one side of the substrate, and a first opening is formed in the insulating layer; the isolation structure is at least partially arranged on one side, away from the substrate, of the insulation layer, and defines a second opening communicated with the first opening; the first electrode layer comprises a first part, a second part and a third part, and the first part is arranged in the first opening; the second part is connected with one side of the first part, extends to the side surface of the isolation structure at the edge of the second opening, and is electrically conducted with the first power supply end and the first monitoring end through the isolation structure; and the third part is connected with the other side of the first part and is used for being directly and electrically conducted with the second power supply end and the second monitoring end. According to the scheme, the overlapping impedance of the first electrode layer can be accurately monitored.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a monitoring structure and a preparation method thereof, a display motherboard, and a test method for a lap resistor. Background Art

[0002] Organic Light Emitting Display (OLED) and flat display panels based on technologies such as Light Emitting Diode (LED) are widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc. due to their advantages such as high image quality, power saving, thin body and wide application range, becoming the mainstream in display panels.

[0003] However, the electrical testing of current OLED display products is not accurate enough. Summary of the invention

[0004] The main technical problem solved by the present application is to provide a monitoring structure and a preparation method thereof, a display motherboard, and a test method for overlapping resistance, so as to accurately monitor the overlapping impedance of the first electrode layer.

[0005] In order to solve the above technical problems, a technical solution adopted in the present application is: to provide a monitoring structure, the monitoring structure comprising: a substrate, an insulating layer, an isolation structure and a first electrode layer; the insulating layer is located on one side of the substrate, and a first opening is provided on the insulating layer; the isolation structure is at least partially arranged on the side of the insulating layer away from the substrate, and the isolation structure defines a second opening connected to the first opening; the first electrode layer comprises a first part, a second part and a third part, the first part is arranged at the first opening; the second part is connected to one side of the first part, the second part extends to the side surface of the isolation structure at the edge of the second opening, and is electrically connected to the first power supply end and the first monitoring end through the isolation structure; the third part is connected to the other side of the first part, and is electrically connected to the second power supply end and the second monitoring end.

[0006] Preferably, the monitoring structure further includes: a second electrode layer, disposed between the substrate and the insulating layer, at least a portion of the second electrode layer is exposed from the first opening.

[0007] Preferably, the first portion of the first electrode layer overlaps the second electrode layer.

[0008] Preferably, the thickness of the third portion of the first electrode layer is equal to the thickness of the first portion of the first electrode layer.

[0009] Preferably, it further comprises an organic material layer, which is at least arranged in the first opening and located between the first portion of the first electrode layer and the second electrode layer.

[0010] Preferably, the thickness of the third portion of the first electrode layer is smaller than the thickness of the first portion of the first electrode layer.

[0011] Preferably, in the direction in which the substrate points to the first electrode layer, the substrate includes a metal layer and a planarization layer which are stacked in sequence; the metal layer includes a first routing line, a second routing line, a third routing line and a fourth routing line; the planarization layer and the insulating layer are provided with a third opening and a fourth opening which penetrate through the metal layer, one end of the first routing line and one end of the second routing line are at least partially exposed from the third opening to respectively form the first power supply end and the first monitoring end, which are connected to the isolation structure through the third opening, one end of the third routing line and one end of the fourth routing line are at least partially exposed from the fourth opening to respectively form the second monitoring end and the second power supply end, and are directly connected to the third part of the first electrode layer.

[0012] Preferably, the isolation structure comprises a first isolation layer and a second isolation layer stacked in a thickness direction perpendicular to the substrate, and an orthographic projection of the first isolation layer on the substrate is located within an orthographic projection of the second isolation layer on the substrate.

[0013] Preferably, the metal layer further includes four test pads respectively connected to the first routing line, the second routing line, the third routing line and the fourth routing line.

[0014] To solve the above technical problems, another technical solution adopted in the present application is: providing a display motherboard, wherein the display motherboard is divided into a first area and a second area, the first area corresponds to the display panel, the second area at least partially surrounds the first area, and the second area is provided with the monitoring structure described in any embodiment.

[0015] The substrate, the isolation structure, the first electrode layer, the insulating layer, the metal layer and the second electrode layer of the monitoring structure all correspond to the film layer of the display panel;

[0016] The metal layer of the display panel is electrically connected to the first electrode layer of the display panel;

[0017] The display panel further includes a light emitting layer located between the first electrode layer and the second electrode layer.

[0018] To solve the above technical problems, another technical solution adopted in the present application is: a method for preparing a monitoring structure, the method for preparing the monitoring structure comprising: forming an insulating layer on one side of a substrate, wherein the insulating layer is formed with a first opening; forming an isolation structure on the side of the insulating layer away from the substrate, wherein the isolation structure defines a second opening, and the second opening is connected to the first opening; forming a first electrode layer on the side of the insulating layer away from the substrate, wherein the first electrode layer includes a first part corresponding to the first opening, a second part connected to one side of the first part and corresponding to the edge of the second opening and extending to the side surface of the isolation structure, and a third part connected to the other side of the first part and directly electrically connected to the second power supply terminal and the second monitoring terminal, and the second part is electrically connected to the first power supply terminal and the first monitoring terminal through the isolation structure.

[0019] Preferably, before the step of forming an insulating layer on one side of the substrate, the step further includes: forming a metal layer on one side of the substrate, the metal layer including a first routing line, a second routing line, a third routing line and a fourth routing line arranged at intervals; forming a planarization layer on the side of the metal layer away from the substrate; before the step of forming an isolation structure on the side of the insulating layer away from the substrate, the step further includes: forming a third opening and a fourth opening penetrating the insulating layer and the planarization layer, wherein one end of the first routing line and one end of the second routing line are at least partially exposed from the third opening to form the first power supply terminal and the first monitoring terminal respectively, and one end of the third routing line and one end of the fourth routing line are at least partially exposed from the fourth opening to form the second monitoring terminal and the second power supply terminal respectively; the step of forming an isolation structure on the side of the insulating layer away from the substrate includes: forming the isolation structure on the side of the insulating layer away from the planarization layer, wherein the isolation structure fills the third opening and is connected to the first routing line and the second routing line; the step of forming a first electrode layer on the side of the insulating layer away from the substrate includes: a third portion of the first electrode layer is connected to one end of the third routing line and one end of the fourth routing line.

[0020] Preferably, the step of forming an isolation structure on the side of the insulating layer facing away from the substrate includes: forming a whole isolation film layer on the side of the insulating layer facing away from the substrate; removing at least a portion of the isolation film layer corresponding to a sub-region to form the isolation structure, wherein the sub-region includes a region corresponding to the first opening and at least a portion of the region around the first opening; before the step of forming a first electrode layer on the side of the insulating layer facing away from the substrate, the step also includes: forming a second electrode layer on a side of the substrate facing the insulating layer, wherein at least a portion of the second electrode layer is exposed from the first opening.

[0021] Preferably, before the step of forming a first electrode layer on the side of the insulating layer facing away from the substrate, the step also includes: forming a second electrode layer on the side of the substrate facing the insulating layer, wherein at least a portion of the second electrode layer is exposed from the first opening; and vapor depositing an organic material layer on the side of the second electrode layer of the monitoring structure facing away from the substrate, wherein the orthographic projection of the organic material layer on the substrate is outside the orthographic projection of the fourth opening on the substrate.

[0022] To solve the above technical problems, another technical solution adopted in the present application is: a method for testing the overlap resistance, which is applied to the monitoring structure described in any embodiment, and the testing method includes: the first power supply end and the second power supply end are respectively connected to a constant current source, and the first monitoring end and the second monitoring end are respectively connected to a probe to measure the voltage difference between the first monitoring end and the second monitoring end; the ratio of the voltage difference to the current intensity of the constant current source is calculated to obtain the overlap resistance. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a structural schematic diagram of an embodiment of a display motherboard of the present application;

[0024] Figure 2 It is a structural schematic diagram of an implementation method of a monitoring structure of the present application;

[0025] Figure 3 yes Figure 2 Sectional view along AA direction;

[0026] Figure 4 is a schematic structural diagram of an embodiment of a display panel of the present application;

[0027] Figure 5 It is a structural schematic diagram of another implementation mode of the monitoring structure of the present application;

[0028] Figure 6 It is a schematic flow chart of an implementation method of a method for preparing a monitoring structure of the present application;

[0029] Figure 7 It is a schematic flow chart of another embodiment of the method for preparing the monitoring structure of the present application;

[0030] Figure 8 It is a flowchart diagram of step S260. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solution and effect of the present application clearer and more specific, the present application is further described in detail with reference to the accompanying drawings and examples. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0032] See also Figure 1 , Figure 1 It is a schematic diagram of the structure of an embodiment of a display motherboard of the present application. The display motherboard 100 is divided into a first area 110 and a second area 120, the first area 110 corresponds to the display panel 10, the second area 120 at least partially surrounds the first area 110, and a corresponding monitoring structure is set. Specifically, the display motherboard 100 includes a plurality of first areas 110 distributed in an array, one first area 110 corresponds to forming a display panel 10, and the second area 120 between adjacent first areas 110 is used to form a corresponding monitoring structure 20 and other functional structures, which are used to perform electrical and other tests on the display panel 10 located on the same display motherboard 100. After the process of the display motherboard 100 is completed, the second area 120 can be cut to form a display panel 10 corresponding to the first area 110.

[0033] In the electrical test of the display panel 10 , the overlap resistance of the electrode layer is an important test parameter. However, the inventors have found through research that the existing monitoring structure 20 cannot accurately monitor the overlap resistance of the electrode layer (eg, cathode) in the display panel 10 .

[0034] In view of this, the present application provides a monitoring structure 20, see Figure 2 and Figure 3 , Figure 2 is a schematic diagram of the structure of an implementation scheme of the monitoring structure of the present application, Figure 3 yes Figure 2The monitoring structure 20 includes: a substrate 21, an insulating layer 23, an isolation structure 24 and a first electrode layer 25. Optionally, the monitoring structure 20 also includes a second electrode layer 22, which is located between the substrate 21 and the insulating layer 23. In other embodiments, the monitoring structure 20 may not include the second electrode layer 22. In some embodiments, the first electrode layer 25 may be a cathode, and the second electrode layer 22 may be an anode. The insulating layer 23 is located on one side of the substrate 21, and a first opening 23a is provided on the insulating layer 23. The isolation structure 24 is at least partially disposed on the side of the insulating layer 23 away from the substrate 21, and the isolation structure 24 defines a second opening 24a connected to the first opening 23a, and the orthographic projection of the second opening 24a defined by the isolation structure 24 on the substrate 21 covers the orthographic projection of the first opening 23a on the substrate 21. The first electrode layer 25 includes a first part 251, a second part 252 and a third part 253, the first part 251 is arranged at the first opening 23a; the second part 252 is connected to at least one side of the first part 251, the second part 252 extends to the side surface of the isolation structure 24 at the edge of the second opening 24a, and is electrically connected to the first power supply terminal 2121 and the first monitoring terminal 2122 through the isolation structure 24; the third part 253 is connected to the other side of the first part 251, and is used to directly electrically connect to the second power supply terminal 2124 and the second monitoring terminal 2123.

[0035] Optionally, see Figure 4 , Figure 4: is a schematic diagram of the structure of an embodiment of a display panel of the present application. The substrate 21, the insulating layer 23, the isolation structure 24, the first electrode layer 25, and the second electrode layer 22 correspond to the first substrate portion 11, the first insulating portion 13, the first isolation portion 14, the first electrode portion 15, and the second electrode portion 12 in the display panel 10 located in the first area 110, respectively. Among them, the first insulating portion 13 is a pixel definition layer, and the first opening corresponding to the pixel definition layer is a pixel opening 13a, and at least part of the second electrode portion 12 is exposed in the pixel opening 13a. The first isolation portion 14 extending to the first area 110 and located in the display panel 10 is arranged on the side of the pixel definition layer away from the first substrate portion 11, and is used to define the isolation opening 14a and separate the vapor-deposited film layer. It should be noted that the first isolation portion 14 located in the display panel 10 is a mesh structure, defining a plurality of isolation openings 14a, and since the monitoring structure 20 is only used for monitoring, the isolation structure 24 located in the monitoring structure 20 can have only a frame-shaped structure, defining a second opening 24a. Specifically, the isolation structure 24 may include a first isolation layer 241 and a second isolation layer 242 stacked along the Z direction, the orthographic projection of the first isolation layer 241 on the substrate 21 is located within the orthographic projection of the second isolation layer 242 on the substrate 21, the material of the first isolation layer 241 may be aluminum, and the material of the second isolation layer 242 may be titanium. It should be noted that the isolation structure 24 may also include a third isolation layer (not shown), the third isolation layer is located on the side of the first isolation layer close to the substrate, and the material of the third isolation layer may be titanium or molybdenum. Figure 4 It can be seen from the figure that the first electrode portion 15 of the display panel 10 covers the isolation opening 14a and the pixel opening 13a, and its outer edge overlaps the side wall of the first isolation portion 14, so there is a overlap resistance between the first electrode portion 15 and the first isolation portion 14. Figure 2 and Figure 3 It can be seen that the first electrode layer 25 of the monitoring structure 20 includes a second part 252, a first part 251 and a third part 253 connected in sequence from the outside to the inside, wherein the edge of the second part 252 located in the outermost circle overlaps with the side wall of the isolation structure 24, the isolation structure 24 is electrically connected with the first power supply terminal 2121 and the first monitoring terminal 2122, the second part 252 covers the first opening 23a, and the third part 253 located in the innermost part is directly electrically connected with the second power supply terminal 2124 and the second monitoring terminal 2123. The thickness of the third part 253 is equal to the thickness of the first part 251 to facilitate the preparation of the first electrode layer 25. The first electrode layer 25 in the monitoring structure 20 provided in the present application is overlapped with the isolation structure 24 only in the outer circle, which is the same as the first electrode part 15 in the display panel 10. Therefore, the overlap resistance measured by the monitoring structure 20 can be equivalent to the overlap impedance in the display panel 10, and the measured overlap resistance is more accurate.

[0036] Optionally, continue to Figure 2 and Figure 3 In some embodiments, in the direction from the substrate 21 to the first electrode layer 25 ( Figure 3 In the Z direction, i.e., perpendicular to the thickness direction of the substrate 21, the substrate 21 includes a metal layer 212 and a planarization layer 213 stacked in sequence. Specifically, in the Z direction, the substrate 21 includes a substrate 211 and an array layer stacked in sequence. The metal layer 212 in the monitoring structure 20 includes a first wiring 212a, a second wiring 212b, a third wiring 212c, and a fourth wiring 212d that are spaced apart. A third opening 23b and a fourth opening 23c which penetrate the metal layer 212 are provided on the planarization layer 213 and the insulating layer 23; one end of the first routing line 212a and one end of the second routing line 212b are exposed from the third opening 23b to form a first power supply terminal 2121 and a first monitoring terminal 2122, respectively, which are connected to the isolation structure 24 through the third opening 23b; one end of the third routing line 212c and one end of the fourth routing line 212d are exposed from the fourth opening 23c to form a second monitoring terminal 2123 and a second power supply terminal 2124, respectively, and are directly connected to the third portion 253 of the first electrode layer 25. Specifically, the third opening 23b is located outside the second opening 24a, and the third opening 23b passes through the insulating layer 23 and the planarization layer 213, so that the ends of the first wiring 212a and the second wiring 212b are exposed at the third opening 23b, forming a first power supply terminal 2121 and a first monitoring terminal 2122. The isolation structure 24 is partially located on the side of the insulating layer 23 away from the substrate 21, and partially located in the third opening 23b. The material of the isolation structure 24 is metal, so the isolation structure 24 is electrically connected to the first power supply terminal 2121 and the first monitoring terminal 2122. The fourth opening 23c is located within the orthographic projection of the second opening 24a on the substrate 21, and is located inside the enclosed area of ​​the first opening 23a. The fourth opening 23c penetrates the insulating layer 23 and the planarization layer 213. Further, the insulating layer 23 covers the side wall of the planarization layer 213 to ensure the ability to isolate water and oxygen. The ends of the third wiring 212c and the fourth wiring 212d are at least partially exposed in the fourth opening 23c to form a second monitoring terminal 2123 and a second power supply terminal 2124. After the first electrode layer 25 is evaporated, part of the first electrode layer 25 is located in the fourth opening 23c and is directly electrically connected to the second monitoring terminal 2123 and the second power supply terminal 2124. Optionally, as Figure 4As shown, the substrate 211 corresponds to the first substrate 111 in the display panel 10, the metal layer 212 in the array layer corresponds to the first metal portion 112 in the display panel 10, and the planarization layer 213 corresponds to the first planarization portion 113 in the display panel 10. The present application forms the wiring for providing a constant current source and for monitoring the current in the array layer, so as to facilitate monitoring the lap resistance between the first electrode layer 25 and the isolation structure 24, and in the structure, the third portion 253 of the first electrode layer 25 is directly electrically connected to the second monitoring terminal 2123 and the second power supply terminal 2124, and the second portion 252 of the first electrode layer 25 is electrically connected to the first monitoring terminal 2122 and the first power supply terminal 2121 through the isolation structure 24, so that the lap resistance between the first electrode layer 25 and the isolation structure 24 can be accurately monitored through the first wiring 212a, the second wiring 212b, the third wiring 212c and the fourth wiring 212d. Optionally, the other ends of the first wiring 212a, the second wiring 212b, the third wiring 212c and the fourth wiring 212d away from the first power supply terminal 2121, the first monitoring terminal 2122, the second monitoring terminal 2123 and the second power supply terminal 2124 may have test pads exposed on the surface, so as to facilitate electrical connection with power supply and monitoring probes.

[0037] Optionally, see Figure 5 , Figure 5 2 is a schematic diagram of another embodiment of the monitoring structure of the present application. In another embodiment, the monitoring structure 20 further includes an organic material layer 26, which is at least disposed in the first opening 23a and is located between the first portion 251 of the first electrode layer 25 and the second electrode layer 22. The thickness of the third portion 253 is less than the thickness of the first portion 251, so as to achieve direct connection between the third portion 253 and the third wiring 212c and the fourth wiring 212d exposed by the fourth opening 23c. Figure 3 The difference of the monitoring structure 20 shown is that there is an organic material layer 26 between the first electrode layer 25 and the second electrode layer 22 in the first opening 23a. Since there is also a light-emitting layer 16 made of organic material between the first electrode portion 15 and the second electrode portion 12 in the pixel opening 13a of the display panel 10, which is the same material as the organic material layer 26 of the present embodiment, the lap impedance monitored by this structure is more accurate. However, since the organic material layer 26 is an insulating material, in order to ensure the conduction of the monitoring circuit, the organic material layer 26 cannot extend into the fourth opening 23c.

[0038] The present application also provides a method for testing the lap resistance, including: connecting the first power supply terminal 2121 and the second power supply terminal 2124 to a constant current source (i.e., a constant current) through the first wiring 212a and the fourth wiring 212d, respectively, to provide a stable current flow; the first monitoring terminal 2122 and the second monitoring terminal 2123 are respectively connected to a probe through the second wiring 212b and the third wiring 212c to measure the voltage difference U between the first monitoring terminal 2122 and the second monitoring terminal 2123; and the lap resistance is obtained by calculating the ratio of the voltage difference U to the current intensity I of the constant current source.

[0039] See also Figure 6 , Figure 6 1 is a flow chart of an embodiment of a method for preparing a monitoring structure of the present application. The method comprises the following steps:

[0040] Step S110: forming an insulating layer 23 on one side of the substrate 21, wherein the insulating layer 23 is formed with a first opening 23a. Optionally, the insulating layer 23 corresponding to the display panel 10 and the monitoring structure 20 is simultaneously prepared and formed, specifically, the insulating layer 23 includes a first insulating portion corresponding to the display panel 10 and a second insulating portion corresponding to the monitoring structure 20, the first insulating portion 13 is a pixel definition layer, and a pixel opening 13a is formed on the pixel definition layer. The material of the insulating layer 23 can be an inorganic material, and the first opening 23a can be formed by etching.

[0041] Step S120: forming an isolation structure 24 on the side of the insulating layer 23 facing away from the substrate 21, wherein the isolation structure 24 defines a second opening 24a, and the second opening 24a is connected to the first opening 23a. The isolation structure 24 surrounds the first opening 23a to form the second opening 24a. Optionally, the isolation structure 24 can be formed on the monitoring structure 20 and the display panel 10 at the same time. The isolation structure 24 can first form an isolation layer as a whole layer, and then be formed by etching through a mask.

[0042] Step S130: forming a first electrode layer 25 on the side of the insulating layer 23 facing away from the substrate 21, wherein the first electrode layer 25 includes a first portion 251 corresponding to the first opening 23a, a second portion 252 connected to one side of the first portion 251 and corresponding to the edge of the second opening 24a and extending to the side surface of the isolation structure 24, and a third portion 253 connected to the other side of the first portion 251 and directly electrically connected to the second power supply terminal 2124 and the second monitoring terminal 2123, and the second portion 252 is electrically connected to the first power supply terminal 2121 and the first monitoring terminal 2122 through the isolation structure 24. Specifically, the first electrode layer 25 is formed by evaporation of the entire layer. Due to the isolation structure 24 that is wide at the top and narrow at the bottom, the first electrode layer 25 is separated by the isolation structure 24, and only the edge overlaps the side wall of the isolation structure 24. Optionally, the first electrode layer 25 can be formed by evaporation on the monitoring structure 20 and the display panel 10 at the same time.

[0043] Optionally, see Figure 7 , Figure 7 It is a flow chart of another embodiment of the method for preparing the monitoring structure of the present application, which specifically includes:

[0044] Step S210: forming a metal layer 212 on one side of the substrate 21, the metal layer 212 including a first wiring 212a, a second wiring 212b, a third wiring 212c and a fourth wiring 212d arranged at intervals. Compared with the previous embodiment, this embodiment includes forming wiring in the substrate 21, and optionally, the metal layer 212 can also be formed in the display panel 10 at the same time.

[0045] Step S220: forming a planarization layer 213 on the side of the metal layer 212 facing away from the substrate 21. The planarization layer 213 can also be formed in the display panel 10 at the same time.

[0046] Step S230 : forming a second electrode layer 22 on the side of the planarization layer 213 facing away from the substrate 21 .

[0047] Step S240 : forming an insulating layer 23 on a side of the planarization layer 213 away from the substrate 21 , and exposing the second electrode layer 22 in the first opening 23 a .

[0048] Step S250: forming a third opening 23b and a fourth opening 23c penetrating the insulating layer 23 and the planarization layer 213, wherein one end of the first wiring 212a and one end of the second wiring 212b are at least partially exposed from the third opening 23b to respectively form a first power supply terminal 2121 and a first monitoring terminal 2122, and one end of the third wiring 212c and one end of the fourth wiring 212d are at least partially exposed from the fourth opening 23c to respectively form a second monitoring terminal 2123 and a second power supply terminal 2124. Specifically, the openings on the insulating layer 23 and the openings on the planarization layer 213 can also be formed separately.

[0049] Step S260: forming an isolation structure 24 on the side of the insulating layer 23 away from the planarization layer 213, wherein the isolation structure 24 fills the third opening 23b and is connected to the first wiring 212a and the second wiring 212b.

[0050] Optionally, see Figure 8 , Figure 8 This is a flow chart of step S260. This step also specifically includes:

[0051] Step S261: forming a whole isolation film layer on the side of the insulating layer 23 facing away from the substrate 21. Specifically, multiple isolation film layers may be formed in sequence.

[0052] Step S262: at least remove part of the isolation film layer corresponding to the sub-region to form an isolation structure 24, wherein the sub-region includes the region corresponding to the first opening 23a and the region enclosed by at least part of the first opening 23a. The isolation structure 24 formed in this step is annular and completely hollow inside, so that the first electrode layer 25 formed by subsequent evaporation can only overlap the inner side wall of the annular isolation structure 24, that is, there is only one circle of overlap resistance between the first electrode layer 25 and the isolation structure 24, which is equivalent to the overlap resistance of the display panel 10.

[0053] Step S270: forming a first electrode layer 25 on the side of the insulating layer 23 away from the substrate 21, wherein the third portion 253 of the first electrode layer 25 is connected to one end of the third wiring 212c and one end of the fourth wiring 212d. Figure 3 The structure shown.

[0054] Optionally, the display panel and the monitoring structure may be prepared synchronously, and therefore, the following steps may be further included before step S270:

[0055] After shielding the second area 120, an organic material layer is evaporated on the side of the second electrode layer 22 corresponding to the first area 110 away from the substrate 21 to form a light-emitting layer 16 in the pixel opening 13a of the first insulating portion 13. Since the second area 120 is shielded, an organic material layer cannot be formed in the second area 120, thereby preventing the organic material layer 26 of the insulating material from affecting the conduction of the monitoring circuit. At the same time, a light-emitting layer is formed in the display panel 10 of the first area 110.

[0056] Alternatively, an organic material layer is simultaneously deposited on the side of the second electrode layer of the display panel 10 and the monitoring structure 20 away from the substrate 21 to form a light-emitting layer at least in the first opening 23a of the first insulating portion, and the orthographic projection of the organic material layer 26 on the substrate 21 is located outside the orthographic projection of the fourth opening 23c on the substrate 21. Different from the previous embodiment, in this embodiment, the organic material layer 26 in the monitoring structure 20 is patterned and can be formed using a mask plate to form a light-emitting layer such as Figure 5 The structure shown.

[0057] The above are only implementation methods of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A monitoring structure, characterized in that: The monitoring structure includes: substrate; An insulating layer, located on one side of the substrate, and having a first opening; an isolation structure, at least partially disposed on a side of the insulating layer away from the substrate, the isolation structure defining a second opening communicating with the first opening; The first electrode layer includes a first part, a second part and a third part, the first part is arranged at the first opening; the second part is connected to one side of the first part, the second part extends to the side surface of the isolation structure at the edge of the second opening, and is electrically connected to the first power supply end and the first monitoring end through the isolation structure; the third part is connected to the other side of the first part, and is electrically connected to the second power supply end and the second monitoring end.

2. The monitoring structure according to claim 1, characterized in that: Also includes: A second electrode layer is disposed between the substrate and the insulating layer, and at least a portion of the second electrode layer is exposed from the first opening; Preferably, the first portion of the first electrode layer overlaps the second electrode layer; Preferably, the thickness of the third portion of the first electrode layer is equal to the thickness of the first portion of the first electrode layer.

3. The monitoring structure according to claim 2, characterized in that: Also includes: an organic material layer, at least disposed in the first opening and between the first portion of the first electrode layer and the second electrode layer Preferably, the thickness of the third portion of the first electrode layer is smaller than the thickness of the first portion of the first electrode layer.

4. The monitoring structure according to any one of claims 1 to 3, characterized in that: In the direction from the substrate to the first electrode layer, the substrate includes a metal layer and a planarization layer stacked in sequence; The metal layer includes a first routing line, a second routing line, a third routing line and a fourth routing line; a third opening and a fourth opening penetrating the metal layer are provided on the planarization layer and the insulating layer, one end of the first routing line and one end of the second routing line are at least partially exposed from the third opening to form the first power supply terminal and the first monitoring terminal respectively, and are connected to the isolation structure through the third opening, and one end of the third routing line and one end of the fourth routing line are at least partially exposed from the fourth opening to form the second monitoring terminal and the second power supply terminal respectively and are directly connected to the third part of the first electrode layer; Preferably, the isolation structure comprises a first isolation layer and a second isolation layer stacked in a thickness direction perpendicular to the substrate, and the orthographic projection of the first isolation layer on the substrate is located within the orthographic projection of the second isolation layer on the substrate; Preferably, the metal layer further includes four test pads respectively connected to the first routing line, the second routing line, the third routing line and the fourth routing line.

5. A display motherboard, characterized in that: The display motherboard is divided into a first area and a second area, the first area corresponds to the display panel, the second area at least partially surrounds the first area, and the second area is provided with a monitoring structure as described in any one of rights 1 to 4; The substrate, the isolation structure, the first electrode layer, the insulating layer, the metal layer and the second electrode layer of the monitoring structure are all arranged corresponding to the film layer of the display panel; The metal layer of the display panel is electrically connected to the first electrode layer of the display panel; The display panel further includes a light emitting layer located between the first electrode layer and the second electrode layer.

6. A method for preparing a monitoring structure, characterized in that: The preparation method of the monitoring structure comprises: forming an insulating layer on one side of the substrate, wherein the insulating layer is formed with a first opening; An isolation structure is formed on a side of the insulating layer facing away from the substrate, wherein the isolation structure defines a second opening, and the second opening is connected to the first opening; A first electrode layer is formed on a side of the insulating layer facing away from the substrate, wherein the first electrode layer includes a first portion corresponding to the first opening, a second portion connected to one side of the first portion and corresponding to an edge of the second opening and extending to a side surface of the isolation structure, and a third portion connected to the other side of the first portion and directly electrically connected to the second power supply terminal and the second monitoring terminal, and the second portion is electrically connected to the first power supply terminal and the first monitoring terminal through the isolation structure.

7. The preparation method according to claim 6, characterized in that: Before the step of forming an insulating layer on one side of the substrate, the step further includes: Forming a metal layer on one side of the substrate, the metal layer comprising a first routing line, a second routing line, a third routing line and a fourth routing line arranged at intervals; forming a planarization layer on a side of the metal layer facing away from the substrate; Before the step of forming an isolation structure on the side of the insulating layer away from the substrate, the step further includes: forming a third opening and a fourth opening that penetrate the insulating layer and the planarization layer, wherein one end of the first routing line and one end of the second routing line are at least partially exposed from the third opening to form the first power supply terminal and the first monitoring terminal respectively, and one end of the third routing line and one end of the fourth routing line are at least partially exposed from the fourth opening to form the second monitoring terminal and the second power supply terminal respectively; The step of forming an isolation structure on a side of the insulating layer away from the substrate comprises: forming the isolation structure on a side of the insulating layer away from the planarization layer, wherein the isolation structure fills the third opening and is connected to the first routing line and the second routing line; The step of forming a first electrode layer on a side of the insulating layer away from the substrate includes: a third portion of the first electrode layer is connected to one end of the third wiring and one end of the fourth wiring.

8. The preparation method according to claim 7, characterized in that: The step of forming an isolation structure on a side of the insulating layer away from the substrate comprises: forming a whole isolation film layer on a side of the insulating layer away from the substrate; removing at least a portion of the isolation film layer corresponding to a sub-region to form the isolation structure, wherein the sub-region includes a region corresponding to the first opening and a region enclosed by at least a portion of the first opening; Before the step of forming a first electrode layer on a side of the insulating layer away from the substrate, the step further includes: A second electrode layer is formed on a side of the substrate facing the insulating layer, wherein at least a portion of the second electrode layer is exposed from the first opening.

9. The preparation method according to claim 7, characterized in that: Before the step of forming a first electrode layer on a side of the insulating layer away from the substrate, the step further includes: forming a second electrode layer on a side of the substrate facing the insulating layer, wherein at least a portion of the second electrode layer is exposed from the first opening; An organic material layer is evaporated on a side of the second electrode layer of the monitoring structure facing away from the substrate, wherein an orthographic projection of the organic material layer on the substrate is outside an orthographic projection of the fourth opening on the substrate.

10. A method for testing lap resistance, characterized in that: Applied to the monitoring structure according to any one of claims 1 to 4, the testing method comprises: The first power supply terminal and the second power supply terminal are respectively connected to a constant current source, and the first monitoring terminal and the second monitoring terminal are respectively connected to a probe to measure a voltage difference between the first monitoring terminal and the second monitoring terminal; The ratio of the voltage difference to the current intensity of the constant current source is calculated to obtain the bridging resistance.

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