Radio frequency switch chip structure

Abstract

The invention relates to the technical field of wireless communication, and provides a radio frequency switch chip structure which comprises a substrate, and a coupler area, an antenna switch area, a grounding area and an analog and digital control area which are sequentially arranged on the substrate, the antenna switch area comprises a series switch group, a parallel switch group and a metal layer; the control end of the series switch group is used for being connected to the antenna end, the output end of the series switch group is connected with the output end of the parallel switch group, and the control end of the parallel switch group is grounded; the metal layers are arranged on the sides, away from the substrate, of the series switch group and the parallel switch group respectively, and the metal layers are connected with the series switch group and the parallel switch group respectively. According to the radio frequency switch chip structure, the influence of analog signals on radio frequency switch harmonic waves can be reduced.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technology, and in particular to a radio frequency switch chip structure. Background Art

[0002] In the field of wireless communications, RF switches are one of the most important devices in 4G and 5G communications. They are responsible for switching between different transmission links and receiving links. The most concerned indicators are insertion loss (IL), isolation (ISO) and harmonics. Especially in the RF front-end module (L-PAMID module), it is responsible for controlling the signal transmission path to ensure that the signal flows to the correct circuit part as required. The antenna switch in the L-PAMID module requires a higher harmonic suppression capability, especially in the case of mismatch, when the voltage standing wave ratio VSWR is 5:1 or 6:1, to ensure that no excessive harmonic components are caused when transmitting signals.

[0003] Many existing RF switches suppress harmonics by adjusting the design parameters of the switch itself, such as the width of the switch tube, the gate length, and the number of transistor stacks. However, in actual applications, the analog control signal has a certain impact on the RF signal. When the RF signal passes through the switch, the conduction (+2.6V) and cutoff (-2.6V) of the switch will cause transient changes in the voltage, so that the analog control signal fluctuates at a certain frequency and generates certain harmonic components. However, these harmonic components may interfere with the RF signal passing through the switch, and the harmonics of the switch signal will deteriorate, resulting in poor RF switch performance. Summary of the invention

[0004] In view of the above deficiencies in the prior art, the present invention proposes a radio frequency switch chip structure to solve the problem of signal harmonic deterioration in the existing radio frequency switch chip structure.

[0005] In order to solve the above technical problems, the present invention adopts the following technical solutions: An embodiment of the present invention provides a radio frequency switch chip structure, the radio frequency switch chip structure comprising a substrate, a coupler region, an antenna switch region, a ground region and an analog and digital control region sequentially arranged on the substrate; the input end of the coupler region is used to connect to the antenna end, the output end of the coupler region is connected to the input end of the antenna switch region, and the output end of the antenna switch region is connected to the analog and digital control region; the ground region is respectively connected to the antenna switch region and the analog and digital control region, and is used to separate the antenna switch region from the analog and digital control region; The antenna switch area includes a series switch group, a parallel switch group and a metal layer; the control end of the series switch group is used to connect to the antenna end, the output end of the series switch group is connected to the output end of the parallel switch group, and the control end of the parallel switch group is grounded; the metal layers are respectively arranged on the side of the series switch group and the parallel switch group away from the substrate, and the metal layers are respectively connected to the series switch group and the parallel switch group; The RF switch chip structure also includes a first annular metal structure and a first resistor; a first opening is provided on the side of the antenna switch area, and the first opening is used to separate the antenna switch area from the analog and digital control area; the first annular metal structure is located in the first opening, and the analog and digital control area is connected to the ground area by connecting the first resistor in series.

[0006] Preferably, the RF switch chip structure also includes a second annular metal structure and a second resistor; a second opening is also provided on the side of the antenna switch area, and a projection of the second opening along the width direction of the grounding area toward the grounding area falls within the range of the grounding area, and the second opening is used to separate the antenna switch area from the analog and digital control area; the second annular metal structure is located in the second opening, and the analog and digital control area is connected to the grounding area by connecting the second resistor in series.

[0007] Preferably, the series switch group includes n first transistors, a third resistor and a fourth resistor; the gate of each first transistor is respectively connected to the first end of the third resistor, and the second end of the third resistor is used to receive an external first control signal; the substrate of each first transistor is respectively connected to the first end of the fourth resistor, and the second end of the fourth resistor is used to receive an external second control signal; of two adjacent first transistors, the drain of the latter first transistor is connected to the source of the former first transistor; in the series switch group, the drain of the first first transistor serves as the control end of the series switch group, and the source of the nth first transistor serves as the output end of the series switch group; The parallel switch group includes n second transistors, a fifth resistor and a sixth resistor; the gate of each second transistor is respectively connected to the first end of the fifth resistor, and the second end of the fifth resistor is used to receive the first control signal; the substrate of each second transistor is respectively connected to the first end of the sixth resistor, and the second end of the sixth resistor is used to receive the second control signal; among two adjacent second transistors, the source of the latter second transistor is connected to the drain of the former second transistor; in the parallel switch group, the source of the first second transistor serves as the control end of the parallel switch group, and the drain of the nth second transistor serves as the output end of the parallel switch group; Wherein, n is a positive integer greater than or equal to 2.

[0008] Preferably, the resistance of the first resistor is 10-30 kohm.

[0009] Preferably, the resistance of the second resistor is 10-30 kohm.

[0010] Preferably, the radio frequency switch chip structure further includes an isolating switch, and the isolating switch is arranged in the analog and digital control area and is used to disconnect the first annular metal structure of the analog and digital control area.

[0011] Preferably, the RF switch chip structure also includes a control line, a first end of the control line is respectively connected to the series switch group and the parallel switch group, and is used to control the conduction and disconnection of the series switch group and the parallel switch group; the second end of the control line passes through the ground area and is connected to the analog and digital control area.

[0012] Preferably, the RF switch chip structure also includes two switch control lines, the first ends of the switch control lines are respectively connected to the series switch group and the parallel switch group, and the second ends of the switch control lines pass through the ground area and are connected to the analog and digital control area.

[0013] Compared with the related art, in the embodiment of the present invention, the input end of the coupler area is used to connect to the antenna end, the output end of the coupler area is connected to the input end of the antenna switch area, and the output end of the antenna switch area is connected to the analog and digital control area; the grounding area is respectively connected to the antenna switch area and the analog and digital control area, and is used to separate the antenna switch area from the analog and digital control area; the control end of the series switch group of the antenna switch area is used to connect to the antenna end, the output end of the series switch group is connected to the output end of the parallel switch group, and the control end of the parallel switch group is grounded; the metal layers are respectively arranged on the side of the series switch group and the parallel switch group away from the substrate, and the metal layers are respectively connected to the series switch group and the parallel switch group, and the corresponding layout of the metal layer is used to connect the antenna switch group and the parallel switch group. The layout can reduce the influence of analog signals on RF switch harmonics; a first opening is provided on the side of the antenna switch area, and the first opening is used to separate the antenna switch area from the analog and digital control area; the first annular metal structure is located in the first opening, and the analog and digital control area is connected to the grounding area after being connected in series with a first resistor; the antenna switch area is disconnected from the analog and digital control area through the grounding area, and the first annular metal structure is used to seal the first opening position to prevent moisture from invading from the side disconnection; at the same time, the first resistor is connected to analog ground the analog and digital control area to avoid crosstalk between the signals in the analog and digital control area and the signals in the antenna switch area, thereby reducing the influence of analog signals on RF switch harmonics and avoiding interference outside the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings: Figure 1 A module diagram of a radio frequency switch chip structure provided by an embodiment of the present invention; Figure 2 A top view of the radio frequency switch chip structure provided by an embodiment of the present invention; Figure 3 A specific switch circuit diagram of the antenna switch area of ​​the RF switch chip structure provided in the second embodiment of the present invention.

[0015] Among them, 100, RF switch chip structure, 1, substrate, 2, coupler area, 3, antenna switch area, 31, series switch group, 32, parallel switch group, 4, grounding area, 5, analog and digital control area, 6, first annular metal structure, 7, second annular metal structure, 8, first opening, 9, second opening, 10, isolation switch, 11, switch control line, 12, first control signal, 13, second control signal, 14, control line, 15, metal layer. DETAILED DESCRIPTION

[0016] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application; the terms "including" and "having" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present application or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.

[0017] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0018] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0019] See also Figure 1-Figure 3 As shown, an embodiment of the present invention provides a radio frequency switch chip structure 100, and the radio frequency switch chip structure 100 includes a substrate 1, a coupler area 2, an antenna switch area 3, a grounding area 4, and an analog and digital control area 5 sequentially arranged on the substrate 1. The input end of the coupler area 2 is used to connect to the antenna end, the output end of the coupler area 2 is connected to the input end of the antenna switch area 3, and the output end of the antenna switch area 3 is connected to the analog and digital control area 5. The grounding area 4 is respectively connected to the antenna switch area 3 and the analog and digital control area 5, and is used to separate the antenna switch area 3 from the analog and digital control area 5.

[0020] The antenna switch area 3 includes a series switch group 31, a parallel switch group 32 and a metal layer 15; the control end of the series switch group 31 is used to connect to the antenna end, the output end of the series switch group 31 is connected to the output end of the parallel switch group 32, and the control end of the parallel switch group 32 is grounded. The metal layer 15 is respectively arranged on the side of the series switch group 31 and the parallel switch group 32 away from the substrate, and the metal layer 15 is respectively connected to the series switch group 31 and the parallel switch group 32. Through the corresponding layout of the metal layer 15, the influence of the analog signal on the RF switch harmonics is reduced.

[0021] The metal layer 15 is an aluminum layer, generally a PAD (bare die) made of aluminum.

[0022] The RF switch chip structure 100 also includes a first annular metal structure 6 and a first resistor R1. A first opening 8 is provided on the side of the antenna switch area 3, and the first opening 8 is used to separate the antenna switch area 3 from the analog and digital control area 5. The first annular metal structure 6 is located in the first opening 8, and the analog and digital control area 5 is connected to the grounding area 4 by connecting the first resistor R1 in series. The antenna switch area 3 is disconnected from the analog and digital control area 5 through the grounding area 4, and the first opening 8 position is sealed by the first annular metal structure 6 to prevent moisture from invading from the side. At the same time, by connecting the first resistor R1 to analog ground the analog and digital control area 5, the signals of the analog and digital control area 5 are prevented from crosstalking with the signals of the antenna switch area 3, thereby reducing the influence of the analog signal on the harmonics of the RF switch, and also avoiding interference outside the chip.

[0023] In this embodiment, the RF switch chip structure 100 further includes a second annular metal structure 7 and a second resistor R2. A second opening 9 is also provided on the side of the antenna switch area 3, and the projection of the second opening 9 along the width direction of the grounding area 4 to the grounding area 4 falls within the range of the grounding area 4, and the second opening 9 is used to separate the antenna switch area 3 from the analog and digital control area 5. The second annular metal structure 7 is located in the second opening 9, and the analog and digital control area 5 is connected to the grounding area 4 by connecting the second resistor R2 in series. By disconnecting the antenna switch area 3 from the second annular metal structure 7, the second resistor R2 is connected to the grounding area 4 to realize the grounding function, so as to avoid the signals of the analog and digital control area 5 and the signals of the antenna switch area 3 from crosstalking with each other, thereby affecting the harmonics of the RF switch, and avoiding interference outside the chip, and preventing moisture from invading from the side disconnection.

[0024] Optionally, the first annular metal structure 6 and the second annular metal structure 7 may also be sealing ring structures, etc., which can prevent moisture from invading from the sides and have good reliability.

[0025] In this embodiment, the series switch group 31 includes n first transistors M, a third resistor R3 and a fourth resistor R4. The gate of each first transistor M is respectively connected to the first end of the third resistor R3, and the second end of the third resistor R3 is used to receive the first control signal 12. The substrate of each first transistor M is respectively connected to the first end of the fourth resistor R4, and the second end of the fourth resistor R4 is used to receive the external second control signal 13. Among two adjacent first transistors M, the drain of the latter first transistor M is connected to the source of the former first transistor M; in the series switch group 31, the drain of the first first transistor M1 is used as the control end of the series switch group 31, and the source of the nth first transistor Mn is used as the output end of the series switch group 31. The first control signal 12 is received after the gates of multiple first transistors M are connected to the third resistor R3, and the first transistors M are controlled by the first control signal 12 to achieve switching. The second control signal 13 is received after the substrates of each first transistor M are connected to the fourth resistor R4, which is generally ±2.6V.

[0026] The parallel switch group 32 includes n second transistors Q, a fifth resistor R5 and a sixth resistor R6; the gate of each second transistor Q is respectively connected to the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is used to receive the first control signal 12; the substrate of each second transistor Q is respectively connected to the first end of the sixth resistor R6, and the second end of the sixth resistor R6 is used to receive the second control signal 13; in two adjacent second transistors Q, the source of the latter second transistor Q is connected to the drain of the second transistor Q; in the parallel switch group 32, the source of the first second transistor Q1 is used as the control end of the parallel switch group 32, and the drain of the nth second transistor Qn is used as the output end of the parallel switch group 32; wherein n is a positive integer greater than or equal to 2. The gate of the second transistor Q of the parallel switch group 32 receives the first control signal 12 through each fifth resistor R5, and the substrate of each second transistor Q receives the second control signal 13 through each sixth resistor R6, which is generally ±2.6V. By controlling the transient change of the line voltage, the simulated control signal fluctuates at a certain frequency, which will generate certain harmonic components. Through this layout, the control line 14 (the bottom layer M1) and the PAD metal (the top layer AL) of the receiving end do not cross each other in the path from the receiving end to the antenna end, and they are far apart. All layouts, by analogy, can reduce the harmonic components that may interfere with the RF signal passing through the switch, and the control line 14 passes through the ground GND of the RF of the next unit, which can absorb part of the harmonic components. Among them, the voltage on the switch control line 11 of the coupler area 2 is a small signal, the transient change amplitude is not large, and the harmonic components are relatively small.

[0027] In this embodiment, the resistance of the first resistor R1 is 10-30 kohm (kilo ohms). By connecting the first resistor R1 with a large resistance value to analog ground the analog and digital control area 5, it is avoided that the signal of the analog and digital control area 5 and the signal of the antenna switch area 3 crosstalk each other, thereby reducing the influence of the analog signal on the RF switch harmonics and avoiding interference outside the chip.

[0028] In this embodiment, the resistance of the second resistor R2 is 10-30 kohm (kilo ohms). By connecting the second resistor R2 with a large resistance value to analog ground the analog and digital control area 5, it is avoided that the signal of the analog and digital control area 5 and the signal of the antenna switch area 3 crosstalk each other, thereby reducing the influence of the analog signal on the RF switch harmonics and avoiding interference outside the chip.

[0029] In this embodiment, the RF switch chip structure 100 further includes an isolating switch 10 . The isolating switch 10 is disposed in the analog and digital control area 5 and is used to disconnect the first annular metal structure 6 of the analog and digital control area 5 .

[0030] In this embodiment, the RF switch chip structure 100 further includes a control line 14, a first end of the control line 14 is respectively connected to the series switch group 31 and the parallel switch group 32, and is used to control the conduction and disconnection of the series switch group 31 and the parallel switch group 32; a second end of the control line 14 passes through the grounding area 4 and is connected to the analog and digital control area 5. The second end of the control line 14 passes through the lower layer of the grounding area 4 and is connected to the analog and digital control area 5.

[0031] In this embodiment, the RF switch chip structure 100 further includes two switch control lines 11, the first ends of the switch control lines 11 are respectively connected to the series switch group 31 and the parallel switch group 32, and the second ends of the switch control lines 11 pass through the grounding area 4 to connect to the analog and digital control area 5. The voltage on the switch control line 11 passing through the coupler area 2 is a small signal, the transient change amplitude is not large, and the harmonic components are relatively small. Among them, the second end of the switch control line 11 passes through the lower layer of the grounding area 4 to connect to the analog and digital control area 5.

[0032] It should be noted that the various embodiments described above with reference to the accompanying drawings are only used to illustrate the present invention rather than to limit the scope of the present invention. Those skilled in the art should understand that any modification or equivalent substitution of the present invention without departing from the spirit and scope of the present invention should be included within the scope of the present invention. In addition, unless otherwise indicated by the context, words appearing in the singular include the plural form, and vice versa. In addition, unless otherwise specified, all or part of any embodiment may be used in combination with all or part of any other embodiment.

Claims

1. A radio frequency switch chip structure, characterized in that: The RF switch chip structure includes a substrate, a coupler region, an antenna switch region, a ground region, and an analog and digital control region sequentially arranged on the substrate; the input end of the coupler region is used to connect to the antenna end, the output end of the coupler region is connected to the input end of the antenna switch region, and the output end of the antenna switch region is connected to the analog and digital control region; the ground region is respectively connected to the antenna switch region and the analog and digital control region, and is used to separate the antenna switch region from the analog and digital control region; The antenna switch area includes a series switch group, a parallel switch group and a metal layer; the control end of the series switch group is used to connect to the antenna end, the output end of the series switch group is connected to the output end of the parallel switch group, and the control end of the parallel switch group is grounded; the metal layers are respectively arranged on the side of the series switch group and the parallel switch group away from the substrate, and the metal layers are respectively connected to the series switch group and the parallel switch group; The RF switch chip structure further includes a first annular metal structure and a first resistor; a first opening is provided on a side of the antenna switch area, and the first opening is used to separate the antenna switch area from the analog and digital control area; The first annular metal structure is located in the first opening, and the analog and digital control area is connected to the ground area by connecting the first resistor in series.

2. The RF switch chip structure according to claim 1, characterized in that: The RF switch chip structure further includes a second annular metal structure and a second resistor; a second opening is further provided on the side of the antenna switch area, a projection of the second opening along the width direction of the grounding area toward the grounding area falls within the range of the grounding area, and the second opening is used to separate the antenna switch area from the analog and digital control area; The second annular metal structure is located in the second opening, and the analog and digital control area is connected to the ground area by connecting the second resistor in series.

3. The RF switch chip structure according to claim 1, characterized in that: The series switch group includes n first transistors, a third resistor and a fourth resistor; the gate of each first transistor is respectively connected to the first end of the third resistor, and the second end of the third resistor is used to receive an external first control signal; the substrate of each first transistor is respectively connected to the first end of the fourth resistor, and the second end of the fourth resistor is used to receive an external second control signal; among two adjacent first transistors, the drain of the latter first transistor is connected to the source of the former first transistor; in the series switch group, the drain of the first first transistor serves as the control end of the series switch group, and the source of the nth first transistor serves as the output end of the series switch group; The parallel switch group includes n second transistors, a fifth resistor and a sixth resistor; the gate of each second transistor is respectively connected to the first end of the fifth resistor, and the second end of the fifth resistor is used to receive the first control signal; the substrate of each second transistor is respectively connected to the first end of the sixth resistor, and the second end of the sixth resistor is used to receive the second control signal; among two adjacent second transistors, the source of the latter second transistor is connected to the drain of the former second transistor; in the parallel switch group, the source of the first second transistor serves as the control end of the parallel switch group, and the drain of the nth second transistor serves as the output end of the parallel switch group; Wherein, n is a positive integer greater than or equal to 2.

4. The RF switch chip structure according to claim 1, characterized in that: The resistance of the first resistor is 10-30kohm.

5. The RF switch chip structure according to claim 2, characterized in that: The resistance of the second resistor is 10-30kohm.

6. The RF switch chip structure according to claim 1, characterized in that: The radio frequency switch chip structure further includes an isolating switch, which is disposed in the analog and digital control area and is used to disconnect the first annular metal structure in the analog and digital control area.

7. The radio frequency switch chip structure according to claim 1, characterized in that: The RF switch chip structure also includes a control line, a first end of which is connected to the series switch group and the parallel switch group respectively, and is used to control the conduction and disconnection of the series switch group and the parallel switch group; a second end of the control line passes through the ground area and is connected to the analog and digital control area.

8. The radio frequency switch chip structure according to claim 1, characterized in that: The RF switch chip structure also includes two switch control lines, wherein the first ends of the switch control lines are respectively connected to the series switch group and the parallel switch group, and the second ends of the switch control lines pass through the grounding area and are connected to the analog and digital control area.

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