A equipment detection system and method based on standard PCIE connector

Abstract

The present invention provides an equipment detection system and method based on a standard PCIE connector, relating to the field of server management technology. The present invention includes a test server and a test loopback board, which are connected via a standard PCIE connector. The PCIE management chip and CPU processor are used to generate and execute loopback test tasks to ensure that the PCIE connector meets the standard state. The test method includes starting the device, generating and sending a loopback test packet, detecting the integrity of the data packet, configuring the interface, executing the loopback test task, and obtaining PCIE indicator data. The present invention effectively solves the problem of rapid PCIE detection and improves the reliability and performance of detection. The system can also perform equipment detection of the server network card and USB interface through the iperf tool, realize communication quality detection of a single server, simplify the test process, and ensure high accuracy of the test results.

Description

Technical Field

[0001] The present invention relates to the technical field of server management, and in particular to an equipment detection system and method based on a standard PCIE connector. Background Art

[0002] To meet the high scalability requirements of many existing server devices, PCIe has become a universal expansion interface. Furthermore, with the gradual implementation of large models, the large-model inference market requires high-computing density models. Currently, many companies in the market have begun to promote general-purpose products for high-density standard card training scenarios. Therefore, testing PCIe expansion boards that support high-density standard cards is crucial.

[0003] Currently, the integrity test of PCIE signals is mainly carried out by inserting PCIE standard cards for coverage testing. This type of PCIE bus signal integrity test is inefficient and often causes pain for factories and R&D. The integrity test of PCIE signals is carried out by inserting PCIE standard cards of different bandwidths to run IO coverage tests. This has the problem of high testing costs, and the testing process is cumbersome and difficult to operate.

[0004] Therefore, a device detection system and method based on a standard PCIE connector is needed to solve the above technical problems. Summary of the Invention

[0005] To solve the above technical problems, the present invention provides an equipment detection system based on a standard PCIE connector, comprising a test server and a test loopback board; wherein the test server comprises a server A-end interface, a server B-end interface, a server PCIE management chip, and a server CPU processor; the test loopback board comprises a loopback board A-end interface, a loopback board B-end interface, a loopback board PCIE management chip, and a loopback board transceiver controller;

[0006] The server A-end interface, the server B-end interface, the loopback board A-end interface and the loopback board B-end interface are all provided by standard PCIE connectors; the server A-end interface is connected to the loopback board A-end interface via an A-end PCIE connection line, and the server B-end interface is connected to the loopback board B-end interface via a B-end PCIE connection line;

[0007] The server PCIE management chip is used to manage and configure the server A-end interface and the server B-end interface; the loopback board PCIE management chip is used to manage and configure the loopback board A-end interface and the loopback board B-end interface; the server CPU processor is used to formulate loopback test tasks for each standard PCIE connector of the server and generate corresponding loopback test packets; the loopback board transceiver controller is used to receive the loopback test packets, parse them, and execute the corresponding loopback test tasks to determine whether each standard PCIE connector meets the standard status.

[0008] As a further solution, the loopback test packet includes a test mode item, an interface configuration item, a sending address item, a receiving address item, a forwarding time item, an information content item, an encapsulation method item and a data packet verification item.

[0009] As a further solution, the test server further includes a server network card, and the test loopback board further includes a loopback board network card.

[0010] As a further solution, the test server further includes a server USB interface, and the test loopback board further includes a loopback board USB interface.

[0011] A device detection method based on a standard PCIE connector is applied to a device detection system based on a standard PCIE connector as described in any of the above items, and performs device detection on each standard PCIE connector of a server through the following steps:

[0012] Step 1: Start the test server and test loopback board, and set the test loopback board to the waiting state;

[0013] Step 2: The user sets loopback test tasks for each standard PCIE connector of the server and generates corresponding loopback test packages;

[0014] Step 3: The test server sends the loopback test packet to the test loopback board through the server A interface and the server B interface respectively;

[0015] Step 4: The test loopback board determines the integrity of the loopback test packet through the data packet check item; if the loopback test packet is received completely, proceed to step 5; otherwise, record the loopback board A-end interface and / or loopback board B-end interface that received the incomplete loopback test packet, and perform equipment detection on the test loopback board;

[0016] Step 5: The test loopback board unpacks the loopback test packet and obtains the test mode item, interface configuration item, sending address item, receiving address item, forwarding time item, information content item, and encapsulation method item;

[0017] Step 6: Test the loopback board by configuring the PCIE management chip of the loopback board through the interface configuration items, the sending address items, and the receiving address items. Determine the connection between the TX port and the RX port when executing the loopback test task. Connect the server TX port and the loopback board RX port. Connect the server RX port and the loopback board TX port.

[0018] Step 7: The test loopback board configures the loopback board transceiver controller through the test mode item, forwarding time item, information content item, and encapsulation method item, determines the forwarding time, information content, and encapsulation method for executing the loopback test task, and enables the test loopback board to receive data from the loopback board RX port and send data to the loopback board RX port in the selected test mode;

[0019] Step 8: The test server and the test loopback board cooperate with each other to perform the loopback test task, obtain the PCIE indicator data of the server A-side interface and the server B-side interface, and determine whether each standard PCIE connector meets the standard status.

[0020] As a further solution, perform equipment inspection on the test loopback board through the following steps:

[0021] Connect the A-side interface of the loopback board and the B-side interface of the loopback board through the A-side PCIE cable;

[0022] The test loopback board sends verification data to each other through the loopback board A-end interface and the loopback board B-end interface;

[0023] If the verification data is complete, the loopback board A-end interface, loopback board B-end interface and A-end PCIE connection cable are all normal;

[0024] If the verification data is incomplete, the test loopback board is marked as the first equipment abnormality;

[0025] Connect the A-side interface of the loopback board to the B-side interface of the loopback board using the B-side PCIE cable;

[0026] The test loopback board sends verification data to each other through the loopback board A-end interface and the loopback board B-end interface;

[0027] If the verification data is complete, the loopback board A-end interface, loopback board B-end interface and B-end PCIE connection cable are all normal;

[0028] If the verification data is incomplete, the test loopback board is marked as a second equipment anomaly;

[0029] Determine the test loopback board mark status; if only the first device is abnormal, then only the PCIE connection cable at end A is faulty; if only the second device is abnormal, then only the PCIE connection cable at end B is faulty;

[0030] If the first equipment abnormality and the second equipment abnormality exist at the same time, compare the abnormal characteristics of the verification data. If the abnormal characteristics of the verification data appear with the A-end interface and the B-end interface of the loopback board, the A-end interface and the B-end interface of the loopback board are faulty; if the abnormal characteristics of the verification data appear with the A-end PCIE connection cable failure and the B-end PCIE connection cable failure, the A-end PCIE connection cable failure and the B-end PCIE connection cable failure are faulty; if the abnormal characteristics of the verification data do not appear regularly, the fault cannot be located.

[0031] As a further solution, perform equipment detection on the server network card through the following steps:

[0032] Step A1: Determine whether the standard PCIE connectors of the current server A-side interface and the server B-side interface meet the standard status. If so, proceed to step A2;

[0033] Step A2: Deploy the iperf network performance testing tool on the test server;

[0034] Step A3: Use the ifconfig tool to set the IP address and MAC address of the server network card, use the route add tool to configure the routing table, and establish a routing forwarding link between the loopback board network card and the server network card.

[0035] Step A4: Use the server A-side interface and the server B-side interface to establish a standard forwarding link with the loopback board A-side interface and the loopback board B-side interface.

[0036] Step A5: Obtain standard test information through the standard forwarding link, forward the standard test information through the routing forwarding link and obtain actual routing information;

[0037] Step A6: Acquire routing communication quality data by comparing actual routing information with standard test information, and complete routing equipment detection.

[0038] As a further solution, perform equipment detection on the server USB interface by following the steps below:

[0039] Step B1: Determine whether the standard PCIE connectors of the current server A-side interface and the server B-side interface meet the standard status. If so, proceed to step B2;

[0040] Step B2: Establish a connection between the server USB interface and the loopback board USB interface via a USB cable; obtain the serial port address of the server USB interface and use it to send and receive data to the transceiver loopback board USB interface to obtain a USB transceiver link;

[0041] Step B3: Use the server A-side interface and the server B-side interface to establish a standard transceiver link with the loopback board A-side interface and the loopback board B-side interface;

[0042] Step B5: obtaining standard test information through the standard transceiver link, transmitting and receiving the standard test information through the USB transceiver link and obtaining actual transceiver information;

[0043] Step B6: Obtain USB communication quality data by comparing actual sent and received information with standard test information, and complete USB equipment detection.

[0044] Compared with related technologies, the equipment detection system and method based on a standard PCIE connector provided by the present invention has the following beneficial effects:

[0045] The present invention includes a test server and a test loopback board, which are connected via a standard PCIE connector. The system utilizes a PCIE management chip and CPU processor to generate and execute loopback test tasks, ensuring that the PCIE connector meets standard conditions. The test method includes starting the device, generating and sending a loopback test packet, checking packet integrity, configuring the interface, executing the loopback test task, and obtaining PCIE indicator data. The present invention effectively solves the problem of rapid PCIE detection and improves detection reliability and performance. The system can also use the iperf tool to perform equipment detection on the server network card and USB interface, enabling communication quality testing of a single server. This simplifies the test process and ensures high-precision test results. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 A schematic diagram of the structure of an equipment detection system based on a standard PCIE connector provided by the present invention;

[0047] Figure 2 This is a schematic diagram of the connection between the TX port and the RX port provided by the present invention;

[0048] Figure 3 A schematic diagram of the steps of an equipment detection method based on a standard PCIE connector provided by the present invention. DETAILED DESCRIPTION

[0049] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0050] like Figure 1 As shown, an equipment detection system based on a standard PCIE connector includes a test server and a test loopback board; wherein the test server includes a server A-end interface, a server B-end interface, a server PCIE management chip and a server CPU processor; the test loopback board includes a loopback board A-end interface, a loopback board B-end interface, a loopback board PCIE management chip and a loopback board transceiver controller;

[0051] The server A-end interface, the server B-end interface, the loopback board A-end interface and the loopback board B-end interface are all provided by standard PCIE connectors; the server A-end interface is connected to the loopback board A-end interface via an A-end PCIE connection line, and the server B-end interface is connected to the loopback board B-end interface via a B-end PCIE connection line;

[0052] The server PCIE management chip is used to manage and configure the server A-end interface and the server B-end interface; the loopback board PCIE management chip is used to manage and configure the loopback board A-end interface and the loopback board B-end interface; the server CPU processor is used to formulate loopback test tasks for each standard PCIE connector of the server and generate corresponding loopback test packets; the loopback board transceiver controller is used to receive the loopback test packets, parse them, and execute the corresponding loopback test tasks to determine whether each standard PCIE connector meets the standard status.

[0053] As a further solution, the loopback test packet includes a test mode item, an interface configuration item, a sending address item, a receiving address item, a forwarding time item, an information content item, an encapsulation method item and a data packet verification item.

[0054] As a further solution, the test server further includes a server network card, and the test loopback board further includes a loopback board network card.

[0055] As a further solution, the test server further includes a server USB interface, and the test loopback board further includes a loopback board USB interface.

[0056] like Figure 3 As shown, a device detection method based on a standard PCIE connector is applied to a device detection system based on a standard PCIE connector as described in any of the above items, and performs device detection on each standard PCIE connector of the server through the following steps:

[0057] Step 1: Start the test server and test loopback board, and set the test loopback board to the waiting state;

[0058] Step 2: The user sets loopback test tasks for each standard PCIE connector of the server and generates corresponding loopback test packages;

[0059] Step 3: The test server sends the loopback test packet to the test loopback board through the server A interface and the server B interface respectively;

[0060] Step 4: The test loopback board determines the integrity of the loopback test packet through the data packet check item; if the loopback test packet is received completely, proceed to step 5; otherwise, record the loopback board A-end interface and / or loopback board B-end interface that received the incomplete loopback test packet, and perform equipment detection on the test loopback board;

[0061] Step 5: The test loopback board unpacks the loopback test packet and obtains the test mode item, interface configuration item, sending address item, receiving address item, forwarding time item, information content item, and encapsulation method item;

[0062] Step 6: Test the loopback board by configuring the PCIE management chip of the loopback board through the interface configuration items, the sending address items, and the receiving address items. Determine the connection between the TX port and the RX port when executing the loopback test task. Connect the server TX port and the loopback board RX port. Connect the server RX port and the loopback board TX port.

[0063] Step 7: The test loopback board configures the loopback board transceiver controller through the test mode item, forwarding time item, information content item, and encapsulation method item, determines the forwarding time, information content, and encapsulation method for executing the loopback test task, and enables the test loopback board to receive data from the loopback board RX port and send data to the loopback board RX port in the selected test mode;

[0064] Step 8: The test server and the test loopback board cooperate with each other to perform the loopback test task, obtain the PCIE indicator data of the server A-side interface and the server B-side interface, and determine whether each standard PCIE connector meets the standard status.

[0065] It should be noted that: Figure 2 As shown, this embodiment needs to coordinate each port to confirm whether it is an RX port or a TX port, so as to determine the direction of data flow and ensure that the test is carried out normally.

[0066] As a further solution, perform equipment inspection on the test loopback board through the following steps:

[0067] Connect the A-side interface of the loopback board and the B-side interface of the loopback board through the A-side PCIE cable;

[0068] The test loopback board sends verification data to each other through the loopback board A-end interface and the loopback board B-end interface;

[0069] If the verification data is complete, the loopback board A-end interface, loopback board B-end interface and A-end PCIE connection cable are all normal;

[0070] If the verification data is incomplete, the test loopback board is marked as the first equipment abnormality;

[0071] Connect the A-side interface of the loopback board to the B-side interface of the loopback board using the B-side PCIE cable;

[0072] The test loopback board sends verification data to each other through the loopback board A-end interface and the loopback board B-end interface;

[0073] If the verification data is complete, the loopback board A-end interface, loopback board B-end interface and B-end PCIE connection cable are all normal;

[0074] If the verification data is incomplete, the test loopback board is marked as a second equipment anomaly;

[0075] Determine the test loopback board mark status; if only the first device is abnormal, then only the PCIE connection cable at end A is faulty; if only the second device is abnormal, then only the PCIE connection cable at end B is faulty;

[0076] If the first equipment abnormality and the second equipment abnormality exist at the same time, compare the abnormal characteristics of the verification data. If the abnormal characteristics of the verification data appear with the A-end interface and the B-end interface of the loopback board, the A-end interface and the B-end interface of the loopback board are faulty; if the abnormal characteristics of the verification data appear with the A-end PCIE connection cable failure and the B-end PCIE connection cable failure, the A-end PCIE connection cable failure and the B-end PCIE connection cable failure are faulty; if the abnormal characteristics of the verification data do not appear regularly, the fault cannot be located.

[0077] It should be noted that when an incomplete loopback test packet is received in step 4, it indicates that there are one or more problems with at least the server port, the loopback board port, and the intermediate PCIE connection line. We must first ensure that there is no problem with the test loopback board, so that we can further determine whether there is a problem with the test server. Therefore, this embodiment performs equipment detection on the test loopback board to determine whether there is a fault in the test loopback board and preliminarily locate the fault.

[0078] As a further solution, perform equipment detection on the server network card through the following steps:

[0079] Step A1: Determine whether the standard PCIE connectors of the current server A-side interface and the server B-side interface meet the standard status. If so, proceed to step A2;

[0080] Step A2: Deploy the iperf network performance testing tool on the test server;

[0081] Step A3: Use the ifconfig tool to set the IP address and MAC address of the server network card, use the route add tool to configure the routing table, and establish a routing forwarding link between the loopback board network card and the server network card.

[0082] Step A4: Use the server A-side interface and the server B-side interface to establish a standard forwarding link with the loopback board A-side interface and the loopback board B-side interface.

[0083] Step A5: Obtain standard test information through the standard forwarding link, forward the standard test information through the routing forwarding link and obtain actual routing information;

[0084] Step A6: Acquire routing communication quality data by comparing actual routing information with standard test information, and complete routing equipment detection.

[0085] It should be noted that iperf is an open source network performance testing tool that can test the performance of TCP and UDP connections, including indicators such as bandwidth, jitter and packet loss rate. Iperf is based on TCP / IP and UDP / IP protocols and is suitable for multiple operating systems and platforms, including Windows, Linux and Mac. In TCP testing, iperf can report information such as bandwidth, maximum segment size (MSS) and maximum transmission unit (MTU), and supports adjustment of TCP window value through socket buffer. At the same time, iperf also supports multi-threaded testing, which can make full use of the performance of multi-core processors and improve testing efficiency. In UDP testing, iperf can create a UDP stream of specified bandwidth and measure indicators such as packet loss and latency. In addition, iperf also supports multicast testing, which can test the performance of multiple network connections at the same time.

[0086] Current tests require one server as the test end and another as the client. The server is responsible for listening for incoming test requests, while the client is responsible for initiating the connection session. By manually sending commands to adjust different parameters and settings, network performance indicators such as maximum bandwidth, latency, and packet loss rate can be tested. This embodiment, however, obtains standard test information through a standard forwarding link. Combined with a test loopback board, this allows a single server to independently perform communication quality testing, eliminating the need for two servers to form a network. Furthermore, PCIE communication links outperform routing communications in terms of communication quality and speed, ensuring the credibility of test results (based on the principle of high-precision testing of low-precision).

[0087] As a further solution, perform equipment detection on the server USB interface by following the steps below:

[0088] Step B1: Determine whether the standard PCIE connectors of the current server A-side interface and the server B-side interface meet the standard status. If so, proceed to step B2;

[0089] Step B2: Establish a connection between the server USB interface and the loopback board USB interface via a USB cable; obtain the serial port address of the server USB interface and use it to send and receive data to the transceiver loopback board USB interface to obtain a USB transceiver link;

[0090] Step B3: Use the server A-side interface and the server B-side interface to establish a standard transceiver link with the loopback board A-side interface and the loopback board B-side interface;

[0091] Step B5: obtaining standard test information through the standard transceiver link, transmitting and receiving the standard test information through the USB transceiver link and obtaining actual transceiver information;

[0092] Step B6: Obtain USB communication quality data by comparing actual sent and received information with standard test information, and complete USB equipment detection.

[0093] It should be noted that: similar to the principle of routing equipment detection, the USB communication quality is measured through a normal PCIE link, thereby expanding the purpose of this application without increasing the cost.

[0094] The above are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention description and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. An equipment detection system based on a standard PCIE connector, characterized in that: It includes a test server and a test loopback board; wherein, the test server includes a server A-end interface, a server B-end interface, a server PCIE management chip and a server CPU processor; the test loopback board includes a loopback board A-end interface, a loopback board B-end interface, a loopback board PCIE management chip and a loopback board transceiver controller; The server A-end interface, the server B-end interface, the loopback board A-end interface and the loopback board B-end interface are all provided by standard PCIE connectors; the server A-end interface is connected to the loopback board A-end interface via an A-end PCIE connection line, and the server B-end interface is connected to the loopback board B-end interface via a B-end PCIE connection line; The server PCIE management chip is used to manage and configure the server A-end interface and the server B-end interface; the loopback board PCIE management chip is used to manage and configure the loopback board A-end interface and the loopback board B-end interface; the server CPU processor is used to formulate loopback test tasks for each standard PCIE connector of the server and generate corresponding loopback test packets; the loopback board transceiver controller is used to receive the loopback test packets, parse them, and execute the corresponding loopback test tasks to determine whether each standard PCIE connector meets the standard status; Perform equipment inspection on each standard PCIE connector of the server through the following steps: Step 1: Start the test server and test loopback board, and set the test loopback board to the waiting state; Step 2: The user sets loopback test tasks for each standard PCIE connector of the server and generates corresponding loopback test packages; Step 3: The test server sends the loopback test packet to the test loopback board through the server A interface and the server B interface respectively; Step 4: The test loopback board determines the integrity of the loopback test packet through the data packet check item; if the loopback test packet is received completely, proceed to step 5; otherwise, record the loopback board A-end interface and / or loopback board B-end interface that received the incomplete loopback test packet, and perform equipment detection on the test loopback board; Step 5: The test loopback board unpacks the loopback test packet and obtains the test mode item, interface configuration item, sending address item, receiving address item, forwarding time item, information content item, and encapsulation method item; Step 6: Test the loopback board by configuring the PCIE management chip of the loopback board through the interface configuration items, the sending address items, and the receiving address items. Determine the connection between the TX port and the RX port when executing the loopback test task. Connect the server TX port and the loopback board RX port. Connect the server RX port and the loopback board TX port. Step 7: The test loopback board configures the loopback board transceiver controller through the test mode item, forwarding time item, information content item, and encapsulation method item, determines the forwarding time, information content, and encapsulation method for executing the loopback test task, and enables the test loopback board to receive data from the loopback board RX port and send data to the loopback board RX port in the selected test mode; Step 8: The test server and the test loopback board cooperate with each other to perform the loopback test task, obtain the PCIE indicator data of the server A-side interface and the server B-side interface, and determine whether each standard PCIE connector meets the standard status.

2. The equipment detection system based on a standard PCIE connector according to claim 1, characterized in that: The loopback test packet includes a test mode item, an interface configuration item, a sending address item, a receiving address item, a forwarding time item, an information content item, an encapsulation method item and a data packet verification item.

3. The equipment detection system based on a standard PCIE connector according to claim 1, characterized in that: The test server further includes a server network card, and the test loopback board further includes a loopback board network card.

4. The equipment detection system based on a standard PCIE connector according to claim 1, characterized in that: The test server further includes a server USB interface, and the test loopback board further includes a loopback board USB interface.

5. The equipment detection system based on a standard PCIE connector according to claim 1, characterized in that: Perform equipment inspection on the test loopback board by following the steps below: Connect the A-side interface of the loopback board and the B-side interface of the loopback board through the A-side PCIE cable; The test loopback board sends verification data to each other through the loopback board A-end interface and the loopback board B-end interface; If the verification data is complete, the loopback board A-end interface, loopback board B-end interface and A-end PCIE connection cable are all normal; If the verification data is incomplete, the test loopback board is marked as the first equipment abnormality; Connect the A-side interface of the loopback board to the B-side interface of the loopback board using the B-side PCIE cable; The test loopback board sends verification data to each other through the loopback board A-end interface and the loopback board B-end interface; If the verification data is complete, the loopback board A-end interface, loopback board B-end interface and B-end PCIE connection cable are all normal; If the verification data is incomplete, the test loopback board is marked as a second equipment anomaly; Determine the test loopback board marking status; If only the first device is abnormal, then only the PCIE cable at end A is faulty; if only the second device is abnormal, then only the PCIE cable at end B is faulty; If both the first and second equipment are abnormal, compare the abnormal characteristics of the verification data. If the abnormal characteristics of the verification data appear along with the loopback board A-end interface and the loopback board B-end interface, the loopback board A-end interface and the loopback board B-end interface are faulty. If the abnormal verification data characteristics occur with the PCIE connection cable failure on end A and the PCIE connection cable on end B, it is a PCIE connection cable failure on end A and the PCIE connection cable on end B. If the abnormal verification data characteristics do not appear regularly, the fault cannot be located.

6. The equipment detection system based on a standard PCIE connector according to claim 1, characterized in that: Perform the following steps to check the server network card: Step A1: Determine whether the standard PCIE connectors of the current server A-side interface and the server B-side interface meet the standard status. If so, proceed to step A2; Step A2: Deploy the iperf network performance testing tool on the test server; Step A3: Use the ifconfig tool to set the IP address and MAC address of the server network card, use the route add tool to configure the routing table, and establish a routing forwarding link between the loopback board network card and the server network card. Step A4: Use the server A-side interface and the server B-side interface to establish a standard forwarding link with the loopback board A-side interface and the loopback board B-side interface. Step A5: Obtain standard test information through the standard forwarding link, forward the standard test information through the routing forwarding link and obtain actual routing information; Step A6: Acquire routing communication quality data by comparing actual routing information with standard test information, and complete routing equipment detection.

7. The equipment detection system based on a standard PCIE connector according to claim 1, characterized in that: Perform the following steps to check the USB port of the server: Step B1: Determine whether the standard PCIE connectors of the current server A-side interface and the server B-side interface meet the standard status. If so, proceed to step B2; Step B2: Establish a connection between the server USB interface and the loopback board USB interface via a USB cable; obtain the serial port address of the server USB interface and use it to send and receive data to the transceiver loopback board USB interface to obtain a USB transceiver link; Step B3: Use the server A-side interface and the server B-side interface to establish a standard transceiver link with the loopback board A-side interface and the loopback board B-side interface; Step B5: obtaining standard test information through the standard transceiver link, transmitting and receiving the standard test information through the USB transceiver link and obtaining actual transceiver information; Step B6: Obtain USB communication quality data by comparing actual sent and received information with standard test information to complete USB device detection.

Images