A planar bump packaging process for an integrated circuit

Abstract

The present invention provides a planar bump packaging process for integrated circuits, including: inputting constraint conditions such as chip power consumption and frequency to generate a gradient bump topology, and verifying it through a multi-physics field simulation model; mapping the bump parameters after optimizing the gradient bump topology to the photolithography mask design to generate a coordinate file; importing the bump parameters after optimizing the gradient bump topology, constructing a finite element model of a thin wafer, predicting the warping trend under ball mounting pressure, and generating a compensation coefficient library; scanning the surface of the thin wafer in real time, comparing the actual deformation with the twin prediction data, dynamically adjusting the robotic arm path to obtain the actual position and alignment information of the thin wafer; calculating the current density and heat flux density distributions in real time through the multi-physics field simulation model and the alignment information, and reversely optimizing the bump height and pitch according to the measured parameters. The present invention ensures the high performance and reliability of integrated circuit packaging, can optimize the packaging structure to the greatest extent, and improve the quality and lifespan of products.

Description

Technical Field

[0001] The present invention relates to the technical field of solid device manufacturing, and particularly to a planar bump packaging process for integrated circuits. Background Art

[0002] With the development of integrated circuits (ICs) towards high density, miniaturization, and high performance, the core contradiction of packaging technology has gradually focused on the compatibility between semiconductor material properties and packaging structures. Semiconductor materials represented by silicon have become the mainstream chip substrates due to their excellent carrier mobility and thermal conductivity. However, in high-power / high-frequency scenarios, wide-bandgap semiconductor materials such as gallium nitride and silicon carbide are widely used due to their higher breakdown field strength and temperature resistance. However, traditional packaging technologies (such as wire bonding and monolithic metal-based islands) have problems such as thermal expansion coefficient mismatch, high-frequency signal loss, and solid device interface defects in terms of material adaptability. Planar bump packaging directly connects the chip and the substrate through metal bumps (such as copper pillars and solder balls), shortening the interconnection path, reducing parasitic effects, and being compatible with various semiconductor materials at the same time. However, there are still problems of material compatibility and process adaptability in the existing technologies: for example, the process conflict between the high-temperature tolerance of GaN chips and low-temperature solder, or the heat dissipation bottleneck of the high thermal conductivity requirement of SiC chips and low-cost substrates.

[0003] Prior Art One, Application No.: CN 202410221257.3 discloses a packaging method for integrated circuits and its integrated circuit packaging structure. The method includes: fixing a clamping plate with a limiting groove on the operating table of a parallel seam welder; placing an integrated circuit package with a receiving groove in the limiting groove, and setting a metal sealing frame on the top surface of the integrated circuit package; placing the integrated circuit to be packaged in the receiving groove and covering it with a packaging cover plate; performing seam welding on the surface of the packaging cover plate through the roller electrode on the parallel seam welder to obtain two parallel first weld seams; driving the clamping plate fixed on it by the operating table on the parallel seam welder to rotate 90°, and performing seam welding on the packaging cover plate through the roller electrode to obtain two second weld seams, thus obtaining the packaged integrated circuit; performing primary leak detection and secondary leak detection on the packaged integrated circuit in sequence to obtain a packaged integrated circuit with better sealing performance. Although it improves the reliability level of the packaged integrated circuit and reduces the potential safety hazards during its use; however, its process does not specifically optimize the thermal stress and high-frequency signal loss inside the chip, resulting in potential reliability hazards in high-power / high-frequency scenarios; the adaptability of traditional packaging technologies to wide-bandgap semiconductor materials (such as GaN and SiC) is poor, which may lead to problems such as thermal expansion coefficient mismatch or interface defects.

[0004] Prior Art Two, Application Number: CN202410165521.6 discloses an integrated circuit package and a method for forming the same. The integrated circuit package includes: a substrate including conductive pads; a package assembly bonded to the conductive pads of the substrate using solder connectors, the package assembly including an integrated circuit die, the integrated circuit die including die connectors, and one of the solder connectors being coupled to each of the die connectors and the corresponding conductive pads of the substrate; a first dielectric layer laterally surrounding each of the die connectors and a portion of the solder connectors; and a second dielectric layer located between the first dielectric layer and the substrate, the second dielectric layer laterally surrounding each of the conductive pads of the substrate. Although the coplanarity of the solder is improved; in addition, the second layer can have lower fluidity than the solder at high temperatures, which prevents solder collapse and bridging; by improving the solder coplanarity and preventing solder collapse and solder bridging after bump reflow, the yield and reliability of the package are improved; however, its process does not solve the problems of solder fluidity and thermal stress at high temperatures, which may lead to a decrease in long-term reliability; the traditional packaging technology has insufficient optimization of the transmission performance of high-frequency signals, which may lead to signal integrity loss.

[0005] Prior Art Three, Application Number: CN 202411815515.7 discloses an integrated circuit package module with a detachable structure and a packaging method. Aiming at the problem that the existing integrated circuit package module cannot be quickly disassembled after packaging, the following solution is proposed, including a packaging base, a packaging upper cover is arranged on the upper side of the packaging base, and two symmetrical insertion bolts are arranged on the packaging upper cover, and disassembly and assembly modules are arranged outside both of the two insertion bolts. The disassembly and assembly module includes a cylinder body, and two symmetrical grooves are opened on the upper side of the packaging base. Although the packaging module of the packaged integrated circuit body can be quickly and conveniently disassembled, so that the integrated circuit body can be taken out conveniently, effectively avoiding the grinding operation required for conventional disassembly and packaging, greatly improving the efficiency of packaging disassembly, and at the same time ensuring the integrity and use function of the integrated circuit body after disassembly; however, its process does not optimize the thermal stress and high-frequency performance of the package body, which may cause damage to the integrated circuit body during use; the introduction of the detachable structure may increase the complexity and cost of the packaging process.

[0006] Currently, Prior Art One, Prior Art Two and Prior Art Three have problems that in high-power / high-frequency application scenarios, thermal stress concentration inside the chip leads to the failure or performance degradation of the packaging structure; the physical property differences between wide-bandgap semiconductor materials and traditional packaging materials result in thermal expansion coefficient mismatch or interface defects; the detachable structure may increase the complexity and cost of the packaging process, affecting the feasibility of mass production. Therefore, the present invention provides a planar bump packaging process for integrated circuits. Summary of the Invention

[0007] To solve the above technical problems, the present invention provides a planar bump packaging process for integrated circuits, comprising the following steps:

[0008] Integrate the physical property parameters of semiconductor materials, bump metals and substrates to establish a thermo-mechanical-electrical coupling response matrix; input the chip power consumption and frequency constraint conditions, generate a gradient bump topology, and verify it through a multi-physics simulation model; map the bump parameters after gradient bump topology optimization to the photolithography mask design to generate a coordinate file;

[0009] Import the bump parameters after gradient bump topology optimization, construct a finite element model of the thin wafer, and generate a compensation coefficient library; scan the surface of the thin wafer in real time, dynamically adjust the robotic arm path, and obtain the actual position and alignment information of the thin wafer;

[0010] Calculate the current density and heat flux density distributions in real time through the multi-physics simulation model and alignment information, and reverse-optimize the bump height and pitch based on the measured parameters.

[0011] Optionally, the process of generating the gradient bump topology includes the following steps:

[0012] Obtain the physical property parameters of semiconductor materials, bump metals and substrates to obtain a set of physical property parameters, and construct a response matrix describing the behavior of semiconductor materials under different thermo-mechanical-electrical actions based on the set of physical characteristic parameters; set constraint conditions according to the working conditions of the integrated circuit;

[0013] Based on the set of physical characteristic parameters and constraint conditions, construct a gradient bump topology, and obtain bumps with different densities and distributions according to the current and heat requirements of different regions of the integrated circuit with the support of the response matrix;

[0014] Verify the results of the gradient bump topology through a multi-physics simulation model, and simulate the response of the bump structure to current and heat flow and its impact on the packaging performance under actual working conditions.

[0015] Optionally, the process of constructing a response matrix describing the behavior of semiconductor materials under different thermo-mechanical-electrical actions includes the following steps:

[0016] Define a semiconductor material state vector and a reference state vector;

[0017] Decompose the material state vector into a combination of a reference state and a correction term through a non-linear constitutive matrix, reflecting the variation law of material properties with temperature and current density;

[0018] Block the non-linear constitutive matrix, and separately explain the structures of the thermo-mechanical coupling sub-matrix and the electro-thermal coupling sub-matrix, showing the correlation between the physical quantities of the semiconductor material state vector and the reference state vector.

[0019] Optionally, the semiconductor material state vector includes temperature, current density, thermal conductivity, electrical conductivity, Young's modulus, and coefficient of thermal expansion; the reference state parameter vector includes reference temperature, zero current density, thermal conductivity at the reference temperature, electrical conductivity at the reference temperature, Young's modulus at the reference temperature, and coefficient of thermal expansion at the reference temperature.

[0020] Optionally, the process of setting the constraint conditions includes the following steps:

[0021] Determine the maximum current density, which cannot exceed the reference current density multiplied by a temperature-dependent adjustment coefficient; the current density flowing through the semiconductor device will not exceed the load-bearing limit of the semiconductor material.

[0022] Evaluate whether the actual stress meets the mechanical strength requirements, where the actual stress is less than or equal to the yield strength of the material multiplied by a temperature adjustment coefficient.

[0023] Verify the matching of the thermal expansion behavior between the substrate and the bumps, where the difference in the coefficient of thermal expansion is less than or equal to half of the difference in the coefficient of thermal expansion between the substrate and the bumps multiplied by a temperature adjustment coefficient, and the thermal expansion behavior of the substrate and the bumps will not cause structural misalignment or damage.

[0024] Optionally, the process of obtaining bumps with different densities and distributions includes the following steps:

[0025] Define the size and shape parameters of the bumps, set the density and distribution rules of the bumps, and determine the distribution method of the bumps in space; create a basic grid or surface as the support structure for the bumps, and evenly scatter the bumps on the basic structure to form an initial topology.

[0026] Define a gradient field that describes the density change of the bumps in space, calculate the gradient value of each bump in the gradient field to guide the density change of the bumps; according to the gradient value, dynamically adjust the density of the bumps, and change the spatial distribution of the bumps by rotation and displacement methods to make the arrangement of the bumps in different regions show diversity.

[0027] Iteratively optimize the bump topology, and continuously adjust the density and distribution of the bumps according to the optimization results until the topological structure is obtained; output the optimized bump topological structure as a model file, visualize the bump topological structure, and display the effects of bumps with different densities and distributions.

[0028] Optionally, the process of obtaining the actual position and alignment information of the thin wafer includes the following steps:

[0029] Based on the optimized bump parameters, establish a finite element model of the thin wafer, simulate the behavior of the thin wafer under the ball mounting pressure, and predict the warping phenomenon that occurs.

[0030] Perform a scan of the surface of the thin wafer to obtain in real-time the actual deformation data of the new thin wafer surface; compare the actual deformation data with the predicted data of the finite element model to determine the deviation between the actual deformation and the prediction;

[0031] Based on the deviation, dynamically adjust the path of the robotic arm to align the bumps onto the target pads.

[0032] Optionally, collect the thin wafer deformation data and the alignment data of the bumps and pads, and combine with the prediction results of the finite element model to establish a compensation coefficient library for guiding the dynamic adjustment of the robotic arm during the actual ball placement process to compensate for the predicted warping.

[0033] Optionally, the process of establishing the compensation coefficient library includes the following steps:

[0034] Construct a finite element model of the thin wafer to predict through simulation what kind of warping phenomenon the thin wafer will produce when applying the ball placement pressure;

[0035] Obtain the deformation data of the thin wafer in the actual production environment, including the curvature of the thin wafer and the positions of the bumps; compare the deformation data with the results predicted by the finite element model to determine the deviation between the actual deformation and the prediction;

[0036] Construct a compensation coefficient library based on the deviation.

[0037] Optionally, the compensation coefficient library includes instructions on how the robotic arm dynamically adjusts its ball placement path according to the actual deformation data.

[0038] Establishment of the thermo-mechanical-electrical coupling response matrix and generation of gradient bump topologies of the present invention. Input of physical property parameters and the coupling response matrix are the basis of the packaging process. By integrating the physical property parameters of semiconductor materials, bump metals, and substrates, a model capable of describing the interaction between temperature, mechanics, and electrical performance is established to predict the response of the packaging structure during actual operation; the generation of gradient bump topologies is based on constraints such as chip power consumption and frequency, and a multi-physics simulation model is used to generate gradient bump topologies. The optimization of gradient bump topologies helps improve the electrical connection efficiency and thermal management; the lithography mask design maps the optimized bump parameters to the lithography mask design to generate a coordinate file, providing accurate parameters for the lithography process to ensure the accurate manufacturing of bumps. Finite element model construction and thin wafer deformation compensation. The finite element model of the thin wafer imports the optimized bump parameters to construct the finite element model of the thin wafer, which is used to predict the warping trend of the wafer under the action of ball mounting pressure; a compensation coefficient library is generated to correct the deformation in actual production and improve the accuracy and reliability of the packaging; real-time scanning and path adjustment dynamically adjust the robotic arm path by real-time scanning the surface of the thin wafer and comparing the actual deformation with the twin prediction data to obtain the actual position and alignment information of the thin wafer, ensuring accurate alignment during the packaging process. Calculation of current density and heat flux density distribution and reverse optimization. The calculation of current and heat flux density distribution calculates the current density and heat flux density distribution in real time through a multi-physics simulation model and alignment information, which is crucial for ensuring the stable operation of the circuit and preventing overheating; the generation of microchannels in the substrate dynamically generates microchannels in the substrate according to the thermal field distribution to achieve effective thermal management and prevent performance degradation or damage caused by high temperature; the regulation of coolant flow combines a piezoelectric pump to regulate the coolant flow, optimize the heat dissipation effect, and improve the thermal stability of the packaging; reverse optimization of bump height and pitch reversely optimizes the bump height and pitch based on the measured parameters to further improve the reliability of electrical connection and the efficiency of thermal management.

[0039] Other features and advantages of the present invention will be described in the following specification, and in part, will be obvious from the specification, or will be understood by implementing the present invention. The objectives and other advantages of the present invention can be achieved and obtained by the structures particularly pointed out in the written specification and the drawings.

[0040] The technical solutions of the present invention will be further described in detail below through the drawings and embodiments. Description of the Drawings

[0041] The drawings are used to provide a further understanding of the present invention and constitute a part of the specification. They are used together with the embodiments of the present invention to explain the present invention and do not constitute a limitation to the present invention. In the drawings:

[0042] Figure 1 It is the process flow chart of the planar bump packaging process of the integrated circuit in Embodiment 1 of the present invention;

[0043] Figure 2 It is the process diagram for generating the gradient bump topology in Embodiment 2 of the present invention;

[0044] Figure 3 It is the process diagram for constructing the matrix describing the behavior and response of semiconductor materials under different thermal-mechanical-electrical actions in Embodiment 3 of the present invention;

[0045] Figure 4 It is the process diagram for setting the constraint conditions in Embodiment 4 of the present invention;

[0046] Figure 5 It is the process diagram for obtaining bumps with different densities and distributions in Embodiment 5 of the present invention;

[0047] Figure 6 It is the process diagram for obtaining the actual position and alignment information of the thin wafer in Embodiment 6 of the present invention;

[0048] Figure 7 It is the process diagram for establishing the compensation coefficient library in Embodiment 7 of the present invention;

[0049] Figure 8 It is the process diagram for dynamically adjusting the path of the robotic arm based on the deviation in Embodiment 8 of the present invention;

[0050] Figure 9 It is the process diagram for calculating the joint angles to be adjusted in Embodiment 9 of the present invention;

[0051] Figure 10 It is the process diagram for calculating the current density and heat flux density distributions in Embodiment 10 of the present invention. Detailed implementation manners

[0052] The preferred embodiments of the present invention are described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are only for the purpose of illustrating and explaining the present invention, and are not used to limit the present invention.

[0053] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the embodiments of the present application. The singular forms "a", "the" and "said" used in the embodiments of the present application are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0054] When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application. In the description of the present application, it should be understood that the terms "first", "second", "third", etc. are only used to distinguish similar objects and do not have to be used to describe a specific order or sequence, nor can they be understood as indicating or implying relative importance. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0055] Embodiment 1: As Figure 1 shown, an embodiment of the present invention provides a planar bump packaging process for an integrated circuit, including the following steps:

[0056] S100: Integrate the physical property parameters of the integrated semiconductor material, bump metal, and substrate to establish a thermo-mechanical-electrical coupling response matrix; input constraint conditions such as chip power consumption and frequency, generate a gradient bump topology, and verify it through a multi-physics simulation model; map the bump parameters after optimizing the gradient bump topology to the photolithography mask design to generate a coordinate file;

[0057] S200: Import the bump parameters after optimizing the gradient bump topology, construct a finite element model of the thin wafer, predict the warping trend under the ball mounting pressure, and generate a compensation coefficient library; scan the surface of the thin wafer in real time, compare the actual deformation with the twin prediction data, and dynamically adjust the path of the robotic arm to obtain the actual position and alignment information of the thin wafer;

[0058] S300: Calculate the current density and heat flux density distributions in real time through a multi-physics simulation model and alignment information, dynamically generate microchannels in the substrate according to the thermal field distribution, and adjust the coolant flow rate in combination with a piezoelectric pump; reverse-optimize the bump height and pitch based on the measured parameters; the measured parameters are the current density and heat flux density distributions.

[0059] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, the physical property parameters of semiconductor materials, bump metals, and substrates are first integrated to establish a thermo-mechanical-electrical coupling response matrix; input the constraint conditions such as chip power consumption and frequency, generate a gradient bump topology, and verify it through a multi-physics simulation model; map the bump parameters after gradient bump topology optimization to the photolithography mask design to generate a coordinate file; secondly, import the bump parameters after gradient bump topology optimization, construct a finite element model of the thin wafer, predict the warping trend under the ball mounting pressure, and generate a compensation coefficient library; scan the surface of the thin wafer in real time, compare the actual deformation with the twin prediction data, dynamically adjust the robotic arm path, and obtain the actual position and alignment information of the thin wafer; finally, calculate the current density and heat flux density distributions in real time through the multi-physics simulation model and alignment information, dynamically generate microchannels in the substrate according to the thermal field distribution, and adjust the coolant flow rate in combination with a piezoelectric pump; reverse-optimize the bump height and pitch based on the measured parameters. In step S100 of the above solution, the establishment of the thermo-mechanical-electrical coupling response matrix and the generation of the gradient bump topology, the input of physical property parameters and the coupling response matrix are the basis of the packaging process. By integrating the physical property parameters of semiconductor materials, bump metals, and substrates, a model that can describe the interaction between temperature, mechanics, and electrical performance is established, so as to predict the response of the packaging structure during actual operation; the generation of the gradient bump topology is based on constraint conditions such as chip power consumption and frequency, and a multi-physics simulation model is used to generate the gradient bump topology. The optimization of the gradient bump topology helps to improve the electrical connection efficiency and thermal management; the photolithography mask design maps the optimized bump parameters to the photolithography mask design to generate a coordinate file, providing accurate parameters for the photolithography process to ensure the accurate manufacture of bumps. In step S200, the construction of the finite element model and the compensation for the deformation of the thin wafer, the finite element model of the thin wafer imports the optimized bump parameters to construct a finite element model of the thin wafer, which is used to predict the warping trend of the wafer under the ball mounting pressure; the generation of the compensation coefficient library generates a compensation coefficient library, which is used to correct the deformation in actual production and improve the accuracy and reliability of the packaging; real-time scanning and path adjustment scan the surface of the thin wafer in real time, compare the actual deformation with the twin prediction data, and dynamically adjust the robotic arm path to obtain the actual position and alignment information of the thin wafer to ensure accurate alignment during the packaging process. In step S300, the calculation of the current density and heat flux density distributions and the reverse optimization, the calculation of the current and heat flux density distributions calculates the current density and heat flux density distributions in real time through the multi-physics simulation model and alignment information, which is crucial for ensuring the stable operation of the circuit and preventing overheating; the generation of microchannels in the substrate dynamically generates microchannels in the substrate according to the thermal field distribution to achieve effective thermal management and prevent performance degradation or damage caused by high temperature; the adjustment of the coolant flow rate adjusts the coolant flow rate in combination with a piezoelectric pump to optimize the heat dissipation effect and improve the thermal stability of the packaging; the reverse optimization of the bump height and pitch reversely optimizes the bump height and pitch based on the measured parameters to further improve the reliability of the electrical connection and the thermal management efficiency.

[0060] In summary, this embodiment ensures the high performance and reliability of the integrated circuit package, can optimize the package structure to the greatest extent, and improve the quality and lifespan of the product.

[0061] Embodiment 2: As Figure 2 shown, based on Embodiment 1, the process of generating a gradient bump topology provided by the embodiment of the present invention includes the following steps:

[0062] S101: Obtain the physical property parameters of the semiconductor material, bump metal, and substrate to obtain a set of physical property parameters, and construct a matrix describing the behavior and response of the semiconductor material under different thermal-mechanical-electrical actions according to the set of physical characteristic parameters; set the constraint conditions according to the working conditions of the integrated circuit;

[0063] S102: Based on the set of physical characteristic parameters and the constraint conditions, construct a gradient bump topology, and obtain bumps with different densities and distributions according to the current and heat requirements of different regions of the integrated circuit with the support of the response matrix;

[0064] S103: Verify the results of the gradient bump topology through a multi-physics field simulation model, and simulate the response of the bump structure to current and heat flow and its impact on the package performance under actual working conditions.

[0065] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, the physical property parameters of the semiconductor material, bump metal, and substrate are first obtained to form a set of physical property parameters, and a response matrix describing the behavior and response of the semiconductor material under different thermal-mechanical-electrical actions is constructed according to the set of physical characteristic parameters; according to the working conditions of the integrated circuit, constraint conditions are set; secondly, based on the set of physical characteristic parameters and the constraint conditions, a gradient bump topology is constructed, and bumps with different densities and distributions are obtained according to the current and heat requirements of different regions of the integrated circuit with the support of the response matrix; finally, the results of the gradient bump topology are verified through a multi-physics simulation model to simulate the response of the bump structure to current and heat flow and the impact on the packaging performance under actual working conditions. In step S101 of the above solution, physical property parameters are obtained and a response matrix is constructed. By collecting the physical property parameters of the semiconductor material, bump metal, and substrate, a response matrix can be constructed, which is a key tool for describing the behavior and response of materials under different thermal, mechanical, and electrical actions; at the same time, setting constraint conditions according to the working conditions of the integrated circuit is to ensure the feasibility and reliability of the design and provide theoretical guidance for topology design. In step S102, a gradient bump topology is constructed. The gradient bump topology is constructed through the set of physical characteristic parameters and the constraint conditions, and bumps with different densities and distributions are designed according to the current and heat requirements of different regions of the integrated circuit; the electrical performance and thermal management of the circuit can be optimized, making the bump layout more reasonable and meeting the functional requirements of specific regions. In step S103, the multi-physics simulation model is verified. After the gradient bump topology design is completed, the design results are verified through the multi-physics simulation model; by simulating the response of the bump structure to current and heat flow and the impact on the packaging performance under actual working conditions, the performance of the gradient bump topology design in actual applications is predicted, and the simulation results can guide design adjustments to ensure that the performance of the integrated circuit meets the expectations.

[0066] In summary, this embodiment together constitutes a complete technical chain from theory to practice and from design to verification, ensuring the scientificity and practicality of the gradient bump topology design.

[0067] Embodiment 3: As Figure 3 shown, on the basis of Embodiment 2, the process of constructing a response matrix describing the behavior and response of a semiconductor material under different thermal-mechanical-electrical actions provided by the embodiment of the present invention includes the following steps:

[0068] S1011: Define a semiconductor material state vector and a reference state vector; wherein, the semiconductor material state vector includes temperature, current density, thermal conductivity, electrical conductivity, Young's modulus, and coefficient of thermal expansion; the reference state parameter vector includes reference temperature, zero current density, thermal conductivity at the reference temperature, electrical conductivity at the reference temperature, Young's modulus at the reference temperature, and coefficient of thermal expansion at the reference temperature;

[0069] S1012: Decompose the material state vector into a combination of a reference state and a correction term through a non - linear constitutive matrix, reflecting the variation law of material properties with temperature and current density;

[0070] S1013: Partition the non - linear constitutive matrix and separately explain the structures of the thermal - mechanical coupling sub - matrix and the electro - thermal coupling sub - matrix, showing the correlation between the physical quantities of the semiconductor material state vector and the reference state vector.

[0071] Among them, the material state vector The expression:

[0072]

[0073] In the formula, represents the current temperature (unit: K); represents the current density (unit: A / m²); represents the temperature - dependent thermal conductivity (unit: W / (m·K)); represents the conductivity related to temperature and current density (unit: S / m); represents the Young's modulus related to temperature (unit: Pa); represents the thermal expansion coefficient related to temperature (unit: ppm / ℃ or 1 / K);

[0074] The reference state parameters The vector expression:

[0075]

[0076] In the formula, represents the thermal conductivity at the reference temperature; represents the conductivity at the reference temperature; represents the Young's modulus at the reference temperature; represents the thermal expansion coefficient at the reference temperature;

[0077] The non - linear constitutive matrix The decomposition expression:

[0078]

[0079] In the formula, represents the Hadamard product, describing element - by - element multiplication of vectors; represents the temperature coefficient of thermal conductivity (unit: 1 / K), describing the linear variation of thermal conductivity with temperature; represents the current density coefficient of conductivity, characterizing the attenuation effect of current density on conductivity; represents the activation energy (unit: eV), reflecting the energy barrier for carrier transport in the semiconductor material; kB represents the Boltzmann constant; represents the temperature change coefficient of Young's modulus (unit: 1 / K²), controlling the quadratic temperature dependence of Young's modulus; represents the temperature change coefficient of the coefficient of thermal expansion (unit: 1 / K³), describing the cubic temperature dependence of the coefficient of thermal expansion; represents the reference temperature (usually room temperature, such as 298 K); J = 0 represents zero current density (static condition);

[0080] block matrix :

[0081]

[0082] thermo-mechanical coupling submatrix Expression:

[0083]

[0084] where represents the scaling factor of the thermal conductivity relative to the reference value; represents the quadratic temperature decay term of Young's modulus; represents the normalized cubic temperature growth term of the coefficient of thermal expansion; 0 represents no direct coupling between the thermal conductivity, Young's modulus, and the coefficient of thermal expansion;

[0085] electro-thermal coupling submatrix Expression:

[0086]

[0087] where represents the decay term of the current density on the conductivity (the conductivity decreases as the current density increases); represents the Arrhenius equation term, characterizing the enhancement effect of temperature increase on the carrier mobility;

[0088]

[0089] where represents the cubic temperature correction term of the coefficient of thermal expansion (not normalized), which is directly superimposed on the normalized expression to ensure the integrity of the coefficient of thermal expansion model.

[0090] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, a semiconductor material state vector and a reference state vector are first defined. Among them, the semiconductor material state vector includes temperature, current density, thermal conductivity, electrical conductivity, Young's modulus, and coefficient of thermal expansion. The reference state parameter vector includes reference temperature, zero current density, thermal conductivity at the reference temperature, electrical conductivity at the reference temperature, Young's modulus at the reference temperature, and coefficient of thermal expansion at the reference temperature. Secondly, the material state vector is decomposed into a combination of a reference state and a correction term through a nonlinear constitutive matrix, reflecting the variation law of material properties with temperature and current density. Finally, the nonlinear constitutive matrix is partitioned, and the structures of the thermo-mechanical coupling submatrix and the electro-thermal coupling submatrix are respectively explained, showing the correlation between the physical quantities of the semiconductor material state vector and the reference state vector. Step S1011 of the above solution defines the semiconductor material state vector and the reference state vector. The semiconductor material state vector includes the key physical parameters of the semiconductor material under the actual working state, such as temperature, current density, thermal conductivity, etc. These parameters directly reflect the physical state of the material. The reference state vector includes the material parameters under specific reference conditions, providing a benchmark for model establishment and a comparison reference under the actual working state, so as to accurately describe the behavior changes of the material under different conditions. In step S1012, the material state vector is decomposed into a combination of a reference state and a correction term through a nonlinear constitutive matrix. The nonlinear constitutive matrix is a mathematical model used to describe how material properties change with temperature and current density. Decomposing the material state vector under the actual working state into a reference state and a correction term can more accurately capture the behavior differences of the material under different conditions, providing a framework that can quantify the change of material properties and laying a mathematical foundation for model establishment and prediction of material behavior. In step S1013, the partitioned nonlinear constitutive matrix is decomposed into multiple submatrices, corresponding to different physical coupling effects, such as thermo-mechanical coupling and electro-thermal coupling. The partitioning process enables each submatrix to describe the material behavior under one coupling effect, thereby improving the accuracy and interpretability of the model. Through structured partitioning, the mutual relationship between different physical quantities can be more clearly revealed, providing the possibility for in-depth analysis and understanding of the complex behavior of semiconductor materials.

[0091] In summary, this embodiment constructs a mathematical model that can comprehensively describe the behavior and response of semiconductor materials under the multiple actions of heat, force, and electricity. Each step corresponds to a key link in the model construction process, ensuring the accuracy and practicality of the model.

[0092] In this embodiment, in the planar bump packaging process of integrated circuits, the response matrix expression is mainly used to describe the non-linear response characteristics of packaging materials under complex working conditions such as temperature and current density, and to guide the optimization and simulation verification of packaging design; incorporating the temperature and current density dependencies of key parameters such as thermal conductivity, electrical conductivity, Young's modulus, and coefficient of thermal expansion; the current density affects the temperature field through Joule heat, and the temperature change in turn reversely changes the material's electrical conductivity, forming a two-way coupling relationship; the temperature gradient causes a change in the coefficient of thermal expansion, and the thermal stress is calculated by combining with Young's modulus to predict the risk of delamination or warping of the packaging structure; the cubic temperature correction terms of thermal conductivity and coefficient of thermal expansion reflect the non-linear thermal behavior of wide-bandgap semiconductors (such as SiC, GaN) at high temperatures; the Arrhenius equation term of electrical conductivity describes the temperature dependence of the carrier mobility in semiconductor materials, and the current density decay term simulates the electromigration effect at high current densities; the response matrix expression adapts to the stiffness matrix in finite element analysis through normalized parameters and a block matrix structure (thermal-mechanical, electro-thermal sub-matrices), supporting cross-scale simulation of packaging structures, such as wafer-level thermal stress analysis and system-level heat dissipation optimization. In this embodiment, through the coupling model of Young's modulus and coefficient of thermal expansion, the thermal stress distribution of the package during temperature cycling is calculated to guide the design of substrate materials (such as Cu-Mo interlayer) and bump layout, reducing the risk of delamination; the conductivity model combined with Joule heat calculation can locate current hotspots and optimize the wiring density to avoid excessive local temperature rise; the temperature correction term of thermal conductivity supports the selection of gradient materials (such as high-thermal-conductivity AlN substrate) to improve the heat dissipation efficiency.

[0093] Example 4: As Figure 4 shown, based on Example 2, the process of setting constraint conditions provided by the embodiment of the present invention includes the following steps:

[0094] S1014: Determine the maximum current density, which cannot exceed the reference current density multiplied by a temperature-related adjustment coefficient; the current density flowing through the semiconductor device will not exceed the load-bearing limit of the semiconductor material;

[0095] S1015: Evaluate whether the actual stress meets the mechanical strength requirements, where the actual stress is less than or equal to the yield strength of the material multiplied by a temperature adjustment coefficient;

[0096] S1016: Verify the matching of the thermal expansion behavior between the substrate and the bump, where the difference in the coefficient of thermal expansion is less than or equal to half of the difference in the coefficient of thermal expansion between the substrate and the bump multiplied by a temperature adjustment coefficient, and the thermal expansion behavior of the substrate and the bump will not cause structural misalignment or damage.

[0097] Among them, the constraint condition expression:

[0098]

[0099] Among them, the maximum current density constraint:

[0100]

[0101] Among them, represents the maximum current density; represents the reference current density; represents the temperature adjustment coefficient; represents the highest operating temperature; represents the reference temperature;

[0102] Mechanical strength requirement constraint:

[0103]

[0104] Among them, represents the yield strength of the semiconductor material, represents the actual stress, represents the temperature adjustment coefficient;

[0105] Thermal expansion matching constraint:

[0106]

[0107] Among them, represents the difference in thermal expansion coefficients, and are the thermal expansion coefficients of the substrate and the bump respectively, is the temperature adjustment coefficient.

[0108] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, the maximum current density is first determined, which shall not exceed the reference current density multiplied by a temperature-related adjustment coefficient; the current density flowing through the semiconductor device will not exceed the load-bearing limit of the semiconductor material; secondly, it is evaluated whether the actual stress meets the mechanical strength requirements, and the actual stress is less than or equal to the yield strength of the material multiplied by a temperature-related adjustment coefficient; finally, the matching of the thermal expansion behavior between the substrate and the bump is verified, and the difference in thermal expansion coefficients is less than or equal to half of the difference in thermal expansion coefficients between the substrate and the bump multiplied by a temperature-related adjustment coefficient, and the thermal expansion behavior of the substrate and the bump will not cause structural misalignment or damage. The steps S1014 described above determine the maximum current density constraint, which restricts the current density of the semiconductor device during temperature changes, preventing the electrical performance degradation or thermal failure of the material due to excessive current density, thereby ensuring the electrical stability and reliability of the semiconductor device. Step S1015 evaluates whether the actual stress meets the mechanical strength requirements, verifying whether the semiconductor material can withstand the externally applied stress during temperature changes, and avoiding mechanical failure (such as plastic deformation or fracture) of the semiconductor material due to excessive stress, thereby ensuring the structural integrity and long-term service performance of the solid device. Step S1016 verifies the matching of the thermal expansion behavior between the substrate and the bump, preventing interface stress concentration, structural misalignment or interface delamination caused by mismatched thermal expansion coefficients, thereby ensuring the thermo-mechanical reliability of the solid device in different temperature environments.

[0109] In this embodiment, for the maximum current density constraint formula, the conductivity and current density of the semiconductor material are significantly affected by temperature. As the temperature increases, the thermal excitation of electrons increases, which may lead to an increase in current density; this formula is based on the relationship between conductivity and temperature in semiconductor physics and introduces a temperature adjustment coefficient to quantify this effect; by restricting the maximum current density, it is prevented that the semiconductor device undergoes electrical breakdown, Joule heating effect or thermal failure due to excessive current density under high-temperature working conditions, thereby ensuring the electrical stability and reliability of the device. For the mechanical strength requirement constraint formula, the yield strength of the material decreases with temperature change, especially under high-temperature conditions, and the mechanical properties of the material may be significantly reduced; this formula is based on the strength-temperature relationship in material mechanics and introduces a temperature adjustment coefficient to describe this change; by restricting the actual stress, it is ensured that the semiconductor material can still withstand the external stress during temperature changes, avoiding plastic deformation, crack propagation or mechanical failure due to excessive stress, and ensuring the structural integrity and mechanical reliability of the device. For the thermal expansion matching constraint formula, during temperature changes, the difference in thermal expansion coefficients of different materials will cause interface stress concentration, which may lead to delamination or fracture; this formula is based on the thermal expansion behavior model in thermodynamics and materials science and introduces a temperature adjustment coefficient to quantify the thermal expansion matching problem; by restricting the difference in thermal expansion coefficients, it is ensured that the substrate and the bump have consistent expansion behavior during temperature changes, avoiding interface stress concentration, delamination or structural failure caused by mismatched thermal expansion, and ensuring the thermo-mechanical reliability of the device.

[0110] During the operation of an integrated circuit, the chip temperature fluctuates with the load, especially in high-frequency, high-current, or high-power scenarios. By introducing a temperature factor, the above formula incorporates temperature changes into the constraint conditions to ensure the performance and reliability of the device in a dynamic temperature environment. The current density constraint is directly related to the electrical performance and thermal management of the device. Integrated circuits are prone to thermal effects and electromigration at high current densities, which can affect the device lifespan. By restricting the maximum current density, the integrated circuit design and thermal management strategy are optimized. The packaging materials and structure of the integrated circuit are subjected to mechanical stress during actual operation, especially when the temperature changes, and the thermal expansion mismatch can lead to interfacial stress. The mechanical strength constraint and thermal expansion matching constraint optimize the packaging design and material selection by restricting, thereby enhancing the mechanical reliability of the device.

[0111] In summary, this embodiment sets comprehensive constraint conditions for semiconductor devices from three aspects: electrical, mechanical, and thermomechanical, ensuring their multi-physical field collaborative performance under complex working conditions, and ultimately achieving high reliability and long-term stability of solid devices.

[0112] Example 5: As Figure 5 shown, based on Example 2, the process of obtaining bumps with different densities and distributions provided by the embodiment of the present invention includes the following steps:

[0113] S1021: Define the size and shape parameters of the bumps, set the density and distribution rules of the bumps, and determine the distribution mode of the bumps in space; create a basic grid or surface as the support structure for the bumps, and evenly sprinkle the bumps on the basic structure to form an initial topology.

[0114] S1022: Define a gradient field that describes the density change of the bumps in space, calculate the gradient value of each bump in the gradient field to guide the density change of the bumps; according to the gradient value, dynamically adjust the density of the bumps, and change the spatial distribution of the bumps by means of rotation and displacement, etc., so that the arrangement of the bumps in different regions shows diversity.

[0115] S1023: Iteratively optimize the bump topology, and continuously adjust the density and distribution of the bumps according to the optimization results until the topological structure is obtained; output the optimized bump topological structure as a model file, visualize the bump topological structure, and display the effects of bumps with different densities and distributions.

[0116] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, the size and shape parameters of the bumps are first defined, the density and distribution rules of the bumps are set, and the distribution mode of the bumps in space is determined; a basic grid or surface is created as the support structure of the bumps, and the bumps are evenly scattered on the basic structure to form an initial topology; secondly, a gradient field describing the density change of the bumps in space is defined, and the gradient value of each bump in the gradient field is calculated to guide the density change of the bumps; according to the gradient value, the density of the bumps is dynamically adjusted, and the spatial distribution of the bumps is changed by means of rotation and displacement, etc., so that the arrangement of the bumps in different regions shows diversity; finally, the bump topology is iteratively optimized, and according to the optimization result, the density and distribution of the bumps are continuously adjusted until the topological structure is obtained; the optimized bump topological structure is output as a model file, and the bump topological structure is visualized to display the effects of bumps with different densities and distributions. Step S1021 of the above solution defines parameters and creates an initial topology, which involves the definition of the size and shape parameters of the bumps, as well as the determination of the density and rules of the bump distribution; it includes creating a basic grid or surface to support the bumps, and evenly scattering the bumps on this structure to form an initial topology; it provides a starting point for gradient field definition and bump distribution optimization, ensuring that the initial distribution of the bumps meets the designer's expectations. Step S1022 defines the gradient field and dynamically adjusts the bump density. Defining a gradient field is to describe the density change of the bumps in space and is the key to optimizing the bump distribution. By calculating the gradient value of each bump in the gradient field to guide the density change of the bumps, the density of the bumps is dynamically adjusted, and the spatial distribution of the bumps is changed by means of rotation, displacement, etc.; the diversity and adaptability of the bump distribution are realized, so that the arrangement of the bumps shows the required differences in different regions to meet specific design or functional requirements. Step S1023 iteratively optimizes and outputs the model file. By iteratively optimizing the bump topology, the density and distribution of the bumps are continuously adjusted until a topological structure that meets the design requirements is obtained; it is ensured that the final bump distribution not only meets the design expectations but also can achieve specific performance goals; the optimized bump topological structure is output as a model file, which can be visually displayed.

[0117] In summary, the three steps of this embodiment jointly construct a complete process from parameter setting to final model output, aiming to realize the design of bump structures with specific densities and distributions.

[0118] Embodiment 6: As Figure 6 shown, on the basis of Embodiment 1, the process of obtaining the actual position and alignment information of the thin wafer provided by the embodiment of the present invention includes the following steps:

[0119] S201: Based on the optimized bump parameters, establish a finite element model of the thin wafer, simulate the behavior of the thin wafer under the ball mounting pressure, and predict the warping phenomenon that occurs; collect the thin wafer deformation data and the alignment data between the bumps and the pads, and combine with the prediction results of the finite element model to establish a compensation coefficient library for guiding the dynamic adjustment of the robotic arm during the actual ball mounting process to compensate for the predicted warping.

[0120] S202: Perform a surface scan of the thin wafer to obtain the actual deformation data of the new thin wafer surface in real time; compare the actual deformation data with the prediction data of the finite element model to determine the deviation between the actual deformation and the prediction.

[0121] S203: Dynamically adjust the path of the robotic arm based on the deviation so that the bumps are aligned to the target pads.

[0122] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, first, based on the optimized bump parameters, a finite element model of the thin wafer is established to simulate the behavior of the thin wafer under the ball mounting pressure and predict the warping phenomenon that occurs; collect the thin wafer deformation data and the alignment data between the bumps and the pads, and combine with the prediction results of the finite element model to establish a compensation coefficient library for guiding the dynamic adjustment of the robotic arm during the actual ball mounting process to compensate for the predicted warping. Secondly, perform a surface scan of the thin wafer to obtain the actual deformation data of the new thin wafer surface in real time; compare the actual deformation data with the prediction data of the finite element model to determine the deviation between the actual deformation and the prediction. Finally, dynamically adjust the path of the robotic arm based on the deviation so that the bumps are aligned to the target pads. In step S201 of the above solution, the finite element model is constructed and the parameters are optimized. During the ball mounting process of the thin wafer, warping will occur due to the pressure. By establishing a finite element model simulation, the warping degree and shape can be predicted; collect the data of the thin wafer during actual deformation and bump alignment to provide a basis for verifying and calibrating the finite element model; combine the prediction results of the finite element model and the actual data to establish a compensation coefficient library to provide a basis for the dynamic adjustment of the robotic arm during the actual ball mounting process, thereby compensating for the predicted warping error. In step S202, the thin wafer surface is scanned and the data is compared. By scanning the thin wafer surface, the actual deformation data of the current thin wafer is obtained in real time; compare the actually obtained actual deformation data with the prediction data of the finite element model to determine the deviation between the two, ensuring the accurate alignment of the thin wafer during actual operation. In step S203, the robotic arm path is dynamically adjusted. According to the determined deviation, dynamically adjust the path and movement of the robotic arm to ensure that the bumps can be accurately aligned to the target pads; through dynamic adjustment, the alignment error caused by warping can be reduced, and the accuracy and success rate of ball mounting can be improved.

[0123] In summary, this embodiment constitutes a continuous and dynamically adjustable process, from prediction, data collection to real-time adjustment, enabling high-precision alignment of the thin wafer during the ball mounting process, thereby improving the quality and reliability of semiconductor packaging.

[0124] Embodiment 7: As Figure 7 shown, based on Embodiment 6, the process of establishing a compensation coefficient library provided by the embodiment of the present invention includes the following steps:

[0125] S2011: Construct a finite element model of the thin wafer, and predict through simulation what kind of warping phenomenon the thin wafer will generate when applying the ball mounting pressure;

[0126] S2012: Obtain the deformation data of the thin wafer in the actual production environment, including the curvature of the thin wafer and the positions of the bumps, etc.; compare the deformation data with the results predicted by the finite element model to determine the deviation between the actual deformation and the prediction;

[0127] S2013: Based on the deviation, construct a compensation coefficient library, including guiding the robotic arm to dynamically adjust its ball mounting path according to the actual deformation data.

[0128] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, first, a finite element model of the thin wafer is constructed, and by simulation, it is predicted what kind of warping phenomenon the thin wafer will produce when the ball mounting pressure is applied; secondly, the deformation data of the thin wafer in the actual production environment is obtained, including the curvature of the thin wafer and the position of the bumps, etc.; the deformation data is compared with the results predicted by the finite element model to determine the deviation between the actual deformation and the prediction; finally, a compensation coefficient library is constructed, which includes instructions on how the robotic arm dynamically adjusts its ball mounting path according to the actual deformation data. In step S2011 of the above solution, a finite element model of the thin wafer is constructed to simulate and predict the warping phenomenon that the thin wafer may produce when the ball mounting pressure is applied. Through finite element analysis, an accurate wafer model is created, and the physical loading process is simulated in a virtual environment; it is possible to predict the deformation behavior of the wafer under actual production conditions, such as stress, strain distribution, and warping shape. In step S2012, the deformation data of the thin wafer in the actual production environment is obtained. Collecting the actual deformation data of the thin wafer from the production line, including but not limited to the curvature of the wafer and the position of the bumps, is crucial for verifying the accuracy of the finite element model and provides a benchmark for comparing the simulation prediction values with what actually occurs in production; by comparing the finite element model prediction results with the measured deformation data, the effectiveness of the model can be evaluated, and the deviation between the actual deformation and the prediction can be determined. In step S2013, a compensation coefficient library is constructed based on the deviation. A compensation coefficient library is constructed to instruct the robotic arm how to dynamically adjust the ball mounting path according to the actual deformation data to compensate for the deviation; quantifying the deviation and converting it into specific action instructions for the robotic arm is the key to ensuring the accuracy and efficiency of the ball mounting operation; the establishment of the compensation coefficient library means that the robotic arm can automatically adjust its operation to adapt to the unique deformation situation of each wafer, thereby improving production quality and efficiency.

[0129] In summary, this embodiment constitutes a closed-loop correction and optimization process, which optimizes the ball mounting path of the robotic arm through simulation prediction, actual verification, and dynamic adjustment to adapt to any wafer deformation that may occur during the production process.

[0130] Embodiment 8: As Figure 8 shown, on the basis of Embodiment 6, the process of dynamically adjusting the path of the robotic arm based on the deviation provided by this embodiment of the present invention includes the following steps:

[0131] S2031: Establish a kinematic model according to the structure of the robotic arm to describe the relationship between the angular changes of each joint of the robotic arm and the position and orientation of the end effector; input the collected deformation deviation into the kinematic model, calculate the joint angles that need to be adjusted, and convert the deformation deviation into specific action instructions for the robotic arm;

[0132] S2032: Take the calculated joint angle adjustment value as a control instruction, and drive the robotic arm to perform motion adjustment through the end effector;

[0133] S2033: After the robotic arm executes the action instruction, obtain the actual motion state through the sensors installed on the robotic arm, compare it with the motion adjustment state, and form a closed-loop control; if there is an error, adjust the control strategy according to the feedback and optimize the adjustment.

[0134] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, first establish a kinematic model according to the structure of the robotic arm to describe the relationship between the angular changes of each joint of the robotic arm and the position and orientation of the end effector; input the collected deformation deviation into the kinematic model, calculate the joint angles that need to be adjusted, and convert the deformation deviation into specific action instructions for the robotic arm; secondly, use the calculated joint angle adjustment value as the control instruction, and drive the robotic arm to perform motion adjustment through the end effector; finally, after the robotic arm executes the action instruction, obtain the actual motion state through the sensors installed on the robotic arm, compare it with the motion adjustment state, and form a closed-loop control; if there is an error, adjust the control strategy according to the feedback and optimize the adjustment. In step S2031 of the above solution, a kinematic model is established and the adjustment instruction is calculated. By establishing a kinematic model according to the structural characteristics of the robotic arm, the relationship between the angular changes of each joint and the position and orientation of the end effector in space can be accurately described, and the abstract action requirements can be converted into specific action instructions executable by the robotic arm; inputting the actual deformation deviation into the kinematic model can dynamically calculate the joint angles that need to be adjusted, quantify the influence of external factors (such as deformation) on the robotic arm's movement, and thus convert it into specific action instructions that the robotic arm can respond to. In step S2032, execute the action instruction. Using the calculated joint angle adjustment value as the control instruction ensures that the robotic arm can perform accurate motion adjustment according to the predetermined path and speed; driving the robotic arm to perform motion adjustment through the end effector reflects the execution ability of the robotic arm and can convert the calculated theoretical motion into actual physical motion. In step S2033, closed-loop control and error adjustment. By obtaining the actual motion state of the robotic arm through the sensor and comparing it with the expected motion adjustment state, the accuracy and reliability of the robotic arm's movement are ensured; forming a closed-loop control system can immediately adjust the control strategy when an error is detected, optimize the adjustment action, and ensure the real-time and dynamic adaptability of the robotic arm's movement; adjusting the control strategy according to the feedback and optimizing the adjustment enables the robotic arm to continuously self-adjust and optimize, improving the stability and accuracy of the system.

[0135] In summary, this embodiment constitutes a complete dynamic adjustment process, which can ensure that the robotic arm can still accurately execute the predetermined task in the face of external environmental changes and internal deformations; through precise model establishment, execution of action instructions, and real-time adjustment of closed-loop control, the operation accuracy and reliability of the robotic arm can be significantly improved.

[0136] Embodiment 9: AsFigure 9 As shown, on the basis of Embodiment 8, the process of calculating the joint angles that need to be adjusted provided by the embodiment of the present invention includes the following steps:

[0137] S20311: When the deviation data is input into the kinematic model, determine the offset between the end effector and the target position in the spatial coordinate system, including position deviation and direction deviation. The deviation data is decomposed into the directions and magnitudes of the movements of each joint of the robotic arm to determine the angle values for adjusting each joint;

[0138] S20312: When analyzing the geometric relationships in the kinematic model, establish a coordinate system chain from the base to the end effector according to the structure of the robotic arm; through inverse kinematics, convert the deviation target position and direction of the end effector into the adjustment values of each joint angle;

[0139] S20313: Based on the calculated adjustment values of each joint angle, decompose the deviation information into the collaborative adjustment instructions for multiple joints.

[0140] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, first, when the deviation data is input into the kinematic model, the offset between the end effector and the target position in the space coordinate system is determined, including position deviation and direction deviation. The deviation data is decomposed into the direction and magnitude of the movement of each joint of the robotic arm to adjust the angle value of each joint. Secondly, when analyzing the geometric relationship in the kinematic model, a coordinate system chain from the base to the end effector is established according to the structure of the robotic arm. Through inverse kinematics, the deviation target position and direction of the end effector are converted into the angle adjustment values of each joint. Finally, based on the calculated angle adjustment values of each joint, the deviation information is decomposed into coordinated adjustment instructions for multiple joints. In step S20311 of the above solution, the deviation data input and the determination of the offset of the end effector. By inputting the deviation data into the kinematic model, the spatial deviation between the end effector of the robotic arm and the target position can be determined. The deviation includes position deviation and direction deviation, indicating the direction and distance that the end effector needs to move. Calculate the Euclidean distance between the current position of the end effector and the target position. Calculate the rotation difference between the current direction of the end effector and the target direction using vector cross product and angle calculation. In step S20312, inverse kinematics and the establishment of the coordinate system chain. Through the inverse kinematics algorithm, the spatial position and direction deviation of the end effector are converted into the angle adjustment values of each joint, which is the key to accurately controlling the robotic arm. Establish a coordinate system chain from the base of the robotic arm to the end effector to describe the position and direction of the end effector relative to the base. Use the inverse kinematics algorithm (such as the DH parameter method or the Jacobian matrix method) to calculate the angles that each joint needs to reach according to the target position and direction of the end effector. In step S20313, the deviation information decomposition and the generation of coordinated adjustment instructions enable the robotic arm to move in a coordinated manner to reach the established target position and direction. Decompose the overall deviation information into the adjustment requirements of each joint. Generate specific motion instructions according to the joint adjustment values, so that each joint of the robotic arm works together to achieve smooth and accurate motion.

[0141] In summary, this embodiment together constitutes a complete process for the robotic arm to adjust the joint angles through inverse kinematics, ensuring that the robotic arm can accurately reach the target position and direction.

[0142] Embodiment 10: As Figure 10 shown, on the basis of Embodiment 1, the process of calculating the current density and heat flux density distribution provided by the embodiment of the present invention includes the following steps:

[0143] S301: Based on the alignment information, combined with the current distribution of the circuit, calculate the current density at each bump through the simulation model. The current density refers to the current flow per unit area, and the calculation formula is the current divided by the cross-sectional area of the conductor.

[0144] S302: Calculate the heat flux density based on the calculation result of the current density and the temperature distribution during the operation of the circuit. The heat flux density refers to the heat flow rate per unit area.

[0145] S303: Dynamically generate the microchannel structure within the substrate according to the heat flux density distribution obtained by real-time calculation based on the heat field distribution. For the obtained heat flux density distribution, use a piezoelectric pump to adjust the flow rate of the coolant.

[0146] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, first, based on the alignment information and combined with the current distribution of the circuit, calculate the current density at each bump through a simulation model. The current density refers to the current flow rate per unit area, and the calculation formula is the current divided by the cross-sectional area of the conductor. Secondly, calculate the heat flux density based on the calculation result of the current density and the temperature distribution during the operation of the circuit. The heat flux density refers to the heat flow rate per unit area. Finally, according to the heat field distribution, dynamically generate the microchannel structure within the substrate according to the heat flux density distribution obtained by real-time calculation. For the obtained heat flux density distribution, use a piezoelectric pump to adjust the flow rate of the coolant. In step S301 of the above solution, calculate the current density distribution to quantify the current concentration degree at each bump (i.e., connection point) in the circuit. Through the calculation of the current density, the current distribution in the circuit can be understood, which is crucial for predicting the hot spots (i.e., regions with higher temperature) in the circuit. In step S302, calculate the heat flux density. Based on the calculation result of the current density and combined with the actual temperature distribution of the circuit during operation, calculate the heat flux density. The heat flux density reflects the heat flow rate per unit area, which is a key indicator for evaluating the performance of the circuit under thermal load. By calculating the heat flux density, the heat concentration regions in the circuit can be identified, and then the heat dissipation requirements and the risk of potential thermal failure in these regions can be evaluated. In step S303, generate the microchannel structure according to the heat field distribution and adjust the coolant flow rate. The heat field distribution provides guidance for dynamically generating the microchannel structure within the substrate. Dynamically adjust the cooling system according to the heat flux density distribution obtained by real-time calculation to achieve more effective thermal management. By adjusting the coolant flow rate with a piezoelectric pump, the heat concentration regions can be cooled specifically to maintain the circuit within a safe operating temperature range, thereby improving the reliability and lifespan of the device.

[0147] In summary, the calculation of the current density in this embodiment provides basic data for the analysis of the heat flux density, and the calculation result of the heat flux density is the key to optimizing the heat dissipation design and preventing overheating failure. By dynamically adjusting the cooling system to respond to the changes in the heat field distribution, more refined and effective thermal management can be achieved.

[0148] Obviously, those skilled in the art can make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of equivalent technologies of the present invention, the present invention also intends to include these modifications and variations.

Claims

1. A planar bump packaging process for integrated circuits, characterized in that: The following steps are involved: Integrate the physical properties of semiconductor materials, bump metals and substrates to establish a matrix that describes the behavior and response of semiconductor materials under different thermal, mechanical and electrical effects; input chip power consumption and frequency constraints to generate gradient bump topology, and verify it through multi-physics field simulation models; map the bump parameters after gradient bump topology optimization to the photolithography mask design to generate a coordinate file; Import the bump parameters after gradient bump topology optimization, build a finite element model of the thin wafer, and generate a compensation coefficient library to guide the robot arm to dynamically adjust during the actual ball planting process; scan the thin wafer surface in real time, dynamically adjust the robot arm path, and obtain the actual position and alignment information of the thin wafer; The current density and heat flux density distribution are calculated in real time through multi-physics simulation models and alignment information, and the bump height and spacing are reversely optimized based on the measured parameters; The process of obtaining the actual position and alignment information of the thin wafer includes the following steps: Based on the optimized bump parameters, a finite element model of the thin wafer is established to simulate the behavior of the thin wafer under ball implant pressure and predict the warpage phenomenon. Scan the thin wafer surface and obtain the actual deformation data of the new thin wafer surface in real time; Compare the actual deformation data with the finite element model prediction data to determine the deviation between the actual deformation and the prediction; The path of the robot is dynamically adjusted based on the deviation, and the bumps are aligned to the target pads.

2. The planar bump packaging process for integrated circuits as claimed in claim 1, characterized in that: The process of generating the gradient bump topology includes the following steps: Obtain the physical characteristic parameters of semiconductor materials, bump metals and substrates, obtain a set of physical characteristic parameters, and construct a matrix describing the behavior and response of semiconductor materials under different thermal, mechanical and electrical effects based on the set of physical characteristic parameters; set constraints based on the working conditions of the integrated circuit; Based on the set of physical characteristic parameters and constraints, a gradient bump topology is constructed, and bumps of different densities and distributions are obtained according to the current and heat requirements of different regions of the integrated circuit with the support of the behavior and response matrix; The results of the gradient bump topology are verified through a multi-physics simulation model to simulate the response of the bump structure to current and heat flow under actual working conditions, as well as the impact on packaging performance.

3. The planar bump packaging process for integrated circuits as claimed in claim 2, characterized in that: The process of constructing a matrix that describes the behavior and response of semiconductor materials under different thermal, mechanical and electrical effects consists of the following steps: Define a semiconductor material state vector and a reference state vector; The material state vector is decomposed into a combination of reference state and correction term through nonlinear constitutive matrix, reflecting the variation of material properties with temperature and current density; The nonlinear constitutive matrix is ​​divided into blocks to explain the structures of the thermal-mechanical coupling submatrix and the electro-thermal coupling submatrix respectively, showing the correlation between the various physical quantities of the semiconductor material state vector and the reference state vector.

4. The planar bump packaging process for integrated circuits as claimed in claim 3, characterized in that: in, The semiconductor material state vector includes temperature, current density, thermal conductivity, electrical conductivity, Young's modulus and thermal expansion coefficient; the reference state parameter vector includes reference temperature, zero current density, thermal conductivity at reference temperature, electrical conductivity at reference temperature, Young's modulus at reference temperature and thermal expansion coefficient at reference temperature.

5. The planar bump packaging process for integrated circuits as claimed in claim 2, characterized in that: The process of setting constraints includes the following steps: Determine the maximum current density, which cannot exceed the reference current density multiplied by a temperature-related adjustment factor; the current density flowing through the semiconductor device will not exceed the carrying limit of the semiconductor material; Evaluate whether the actual stress meets the mechanical strength requirements. The actual stress is less than or equal to the yield strength of the material multiplied by an adjustment factor for temperature. Verify the matching of thermal expansion behavior between the substrate and the bumps. The difference in thermal expansion coefficient is less than or equal to half of the difference in thermal expansion coefficient between the substrate and the bumps multiplied by an adjustment factor with temperature. The thermal expansion behavior of the substrate and the bumps will not cause structural misalignment or damage.

6. The planar bump packaging process for integrated circuits as claimed in claim 2, characterized in that: The process of obtaining convex points of different densities and distributions includes the following steps: Define the size and shape parameters of the convex points, set the density and distribution rules of the convex points, and determine how the convex points are distributed in space; create a basic grid or surface as a supporting structure for the convex points, and evenly spread the convex points on the basic structure to form an initial topology; Define a gradient field that describes the density change of convex points in space, calculate the gradient value of each convex point in the gradient field, and use it to guide the density change of the convex points; dynamically adjust the density of the convex points according to the gradient value, and change the spatial distribution of the convex points by rotation and displacement, so that the arrangement of convex points in different areas presents diversity; The bump topology is iteratively optimized, and the density and distribution of the bumps are continuously adjusted according to the optimization results until the topological structure is obtained; the optimized bump topological structure is output as a model file, the bump topological structure is visualized, and the bump effects of different densities and distributions are displayed.

7. The planar bump packaging process for integrated circuits as claimed in claim 1, characterized in that: The thin wafer deformation data and the bump and pad alignment data are collected, and combined with the prediction results of the finite element model, a compensation coefficient library is established to guide the robot arm to dynamically adjust during the actual ball planting process to compensate for the predicted warpage.

8. The planar bump packaging process for integrated circuits as claimed in claim 7, characterized in that: The process of establishing a compensation coefficient library includes the following steps: Construct a finite element model of a thin wafer and simulate and predict the warping phenomenon of the thin wafer when ball planting pressure is applied; Obtain the deformation data of the thin wafer in the actual production environment, including the curvature of the thin wafer and the position of the bumps; compare the deformation data with the results predicted by the finite element model to determine the deviation between the actual deformation and the prediction; Build a compensation coefficient library based on the deviation.

9. The planar bump packaging process for integrated circuits as claimed in claim 8, characterized in that: The compensation coefficient library contains instructions for how the robot arm should dynamically adjust its ball placement path according to the actual deformation data.

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