Semiconductor product processing method, device, equipment, storage medium and program product

Abstract

The embodiment of the invention provides a semiconductor product processing method, device and equipment, a storage medium and a program product, and the processing method comprises the steps: determining a processing scheme for processing all batches of products on respective processing equipment, the processing scheme comprises the batch of processed products on the processing equipment, the maintained processing equipment, the batch of the processed products on the processing equipment, and the batch of the maintained products on the processing equipment; the execution sequence of the processed product batch and the maintained processing equipment is determined; selecting a to-be-selected processing scheme from the processing schemes; the execution sequence in the to-be-selected machining schemes is rearranged, a plurality of recombined machining schemes are generated, and the manufacturing cost of each recombined machining scheme is obtained; and when it is determined that the difference value of the manufacturing cost of any two adjacent recombination machining schemes is within a preset difference value, the recombination machining scheme with the lowest manufacturing cost serves as a target machining scheme, and all batches of products are machined according to the execution sequence in the target machining scheme. By adopting the technical scheme, the manufacturing cost can be reduced.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor manufacturing technology, and in particular, to a semiconductor product processing method, device, equipment, storage medium and program product. Background Art

[0002] In semiconductor manufacturing, the device manufacturing process is precise and complex, and usually requires multiple processing procedures, such as multiple rounds of ion implantation and annealing.

[0003] At present, in the manufacturing process of devices, there are some equipment that executes multiple different processes, or there are some differences in the processing processes of different devices. Due to factors such as planning or tasks, there will be priorities in the processing of devices. When conflicts occur in the task allocation process of the processing production line, processing is often carried out according to the priority level. Although this can ensure the efficiency of the highest level of device processing, it will be relatively inefficient for the entire production line and increase manufacturing costs. Summary of the invention

[0004] In view of this, embodiments of the present invention provide a semiconductor product processing method, device, equipment, storage medium and program product, which can reduce manufacturing costs.

[0005] An embodiment of the present invention provides a semiconductor product processing method, comprising:

[0006] Determine a processing plan for processing all batches of products on respective processing equipment, the processing plan including: product batches processed on the processing equipment, processing equipment to be repaired, and an execution order between the product batches processed and the processing equipment to be repaired;

[0007] Select a processing scheme to be selected from the processing schemes;

[0008] Rearranging the execution order of the processing schemes to be selected to generate a plurality of reorganized processing schemes, and obtaining the manufacturing cost of each reorganized processing scheme;

[0009] When it is determined that the difference in manufacturing cost between any two adjacent reorganization processing plans is within the preset difference, the reorganization processing plan with the lowest manufacturing cost is used as the target processing plan, and all batches of products are processed according to the execution order in the target processing plan.

[0010] Optionally, the step of determining a processing plan for processing all batches of products includes:

[0011] Determine the length of the processing plan based on the number of batches of the product batches, the number of processing equipment used for each batch of products, and the total number of maintenance times of the processing equipment used for all batches of products;

[0012] According to the length of the processing plan and the preset processing strategy, the execution order between the processed product batches and the repaired processing equipment is determined, and the corresponding processing plan is generated, and each processing plan has a different execution order.

[0013] Optionally, the length of the processing scheme is determined using the following formula:

[0014]

[0015] Among them, n represents the total batch size, m i represents any batch of products, k i Indicates the processing equipment corresponding to any batch of products. Indicates the total number of maintenance operations.

[0016] Optionally, the step of selecting a processing scheme to be selected from the processing schemes includes at least one of the following:

[0017] Determine the probability interval of each processing scheme according to the manufacturing cost of each processing scheme, and select the processing scheme to be selected from the processing schemes by using a numerical matching method;

[0018] A preset number of processing solutions with lower manufacturing costs are selected from the processing solutions as processing solutions to be selected.

[0019] Optionally, the step of determining the probability interval of each processing scheme according to the manufacturing cost of each processing scheme, and selecting the processing scheme to be selected from the processing schemes by numerical matching includes:

[0020] Determine the total manufacturing cost of all processing options;

[0021] Determine the probability value of each processing scheme being selected according to the manufacturing cost of each processing scheme and the total manufacturing cost;

[0022] Taking the probability value of any one of the processing schemes being selected as the probability value benchmark, the probability values ​​of each processing scheme being selected are accumulated to determine the probability interval of each processing scheme;

[0023] The operation of selecting random numbers from a preset interval is performed multiple times, and the random numbers of each selection operation are matched with the probability intervals of each processing scheme, so that the random number is located in any probability interval, and the matching processing scheme is used as the processing scheme to be selected.

[0024] Optionally, the number of times the operation of selecting a random number from a preset interval is performed is not greater than the total number of the processing solutions.

[0025] Optionally, the step of rearranging the execution order of the candidate processing schemes to generate a plurality of reorganized processing schemes, wherein one reorganized processing scheme corresponds to one manufacturing cost, comprises at least one of the following:

[0026] Selecting at least two processing schemes to be selected from the processing schemes to be selected, and replacing a part of the execution order of the selected at least two processing schemes to generate corresponding reorganized processing schemes, and determining a manufacturing cost corresponding to a reorganized processing scheme in one replacement process;

[0027] For any one of the candidate processing schemes, the partial execution order thereof is changed to generate a corresponding reorganized processing scheme, and in one change process, a manufacturing cost corresponding to a reorganized processing scheme is determined.

[0028] Optionally, each processing plan has identification information for characterizing the execution order;

[0029] Selecting any at least two processing schemes to be selected from the processing schemes to be selected, and replacing a part of the execution order of the selected at least two processing schemes to be selected, to generate a corresponding reorganized processing scheme, including:

[0030] In the step of replacing part of the execution order in any at least two selected processing schemes to generate a corresponding reorganized processing scheme, if the identification information corresponding to the execution order replaced in the processing scheme is the same as the identification information corresponding to the execution order of the processing scheme that has not been replaced, a modification operation is performed so that the reorganized processing scheme has exactly the same identification information as the processing scheme; the modification operation includes: modifying the identification information in the execution order of the processing scheme that has not been replaced that is the same as the identification information in the execution order replaced in the processing scheme to the missing identification information.

[0031] Optionally, the execution order of the processing schemes to be selected is rearranged multiple times;

[0032] The step of rearranging the execution order of the processing schemes to be selected to generate multiple reorganized processing schemes is to select the reorganized processing scheme with the lowest manufacturing cost as the optimal reorganized processing scheme each time a round of rearrangement is completed, and the optimal reorganized processing scheme is applied to the next round of rearrangement.

[0033] Optionally, when the number of times of rearranging the execution order in the processing scheme to be selected reaches a preset number of rounds, or when the manufacturing costs of rearranging the execution order in the processing scheme to be selected in each round tend to be the same, the product processing method further includes:

[0034] A disturbance processing plan is obtained, and the disturbance processing plan is applied to the rearrangement, wherein the disturbance processing plan is determined based on other batches of products, and the type of constituent elements of the disturbance processing plan is the same as the type of constituent elements of the processing plan.

[0035] Optionally, the manufacturing cost is determined in the following manner:

[0036] Determine the storage cost, extension cost, processing cost and maintenance cost of all batches of products according to the execution order of each processing plan, wherein for the same batch of products, the execution order and priority are different, and the storage cost and the processing cost are different;

[0037] The manufacturing cost is determined based on the storage cost, extension cost, processing cost and maintenance cost of completing each batch of products, as well as the execution sequence.

[0038] Optionally, when it is determined that there are multiple restructuring processing schemes with the same manufacturing cost and the lowest cost, the product processing method further includes:

[0039] Determine the processing time of each reorganization processing plan, and process all batches of products in the execution order corresponding to the reorganization processing plan with the shortest processing time.

[0040] Accordingly, an embodiment of the present invention further provides a semiconductor product processing device, comprising:

[0041] A scheme determination module is configured to determine a processing scheme for processing all batches of products on respective processing equipment, wherein the processing scheme includes: product batches to be processed on the processing equipment, processing equipment to be repaired, and an execution order between the product batches to be processed and the processing equipment to be repaired;

[0042] A scheme selection module is configured to select a processing scheme to be selected from the processing schemes;

[0043] A scheme reorganization module is configured to rearrange the execution order of the processing schemes to be selected, generate multiple reorganized processing schemes, and obtain the manufacturing cost of each reorganized processing scheme;

[0044] The processing module is configured to, when it is determined that the difference in manufacturing cost between any two adjacent reorganization processing plans is within a preset difference, take the reorganization processing plan with the lowest manufacturing cost as the target processing plan, and process all batches of products according to the execution order in the target processing plan.

[0045] Correspondingly, an embodiment of the present invention also provides an electronic device, comprising: at least one memory and at least one processor, the memory storing one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the semiconductor product processing method as described in any of the aforementioned embodiments.

[0046] Correspondingly, an embodiment of the present invention further provides a storage medium, wherein the storage medium stores one or more computer instructions, and the one or more computer instructions are used to implement the semiconductor product processing method as described in any of the aforementioned embodiments.

[0047] Accordingly, an embodiment of the present invention further provides a computer program product, including computer instructions, which are used to implement the semiconductor product processing method as described in any of the above embodiments when executed by a processor.

[0048] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0049] In the semiconductor product processing method provided by the embodiment of the present invention, the processing schemes of all batches of products on their respective processing equipment are comprehensively considered, and one processing scheme corresponds to one execution order, so that each processing scheme to be selected has a different execution order, so that when the processing schemes to be selected are rearranged, multiple reorganized processing schemes can be generated, so that each reorganized processing scheme has randomness, which can reduce the interference of human sorting, and each reorganized processing scheme has a corresponding manufacturing cost, so that the reorganized processing scheme with the lowest manufacturing cost can be used as the target processing scheme, and all batches of products can be processed according to the execution order in the target processing scheme. In other words, the product processing method in the embodiment of the present invention takes into account the overall production line efficiency, as well as the processing time and maintenance times of the processing equipment. Compared with the priority-based processing scheme in the existing scheme, it can reasonably plan the processing schemes for each batch of products, thereby improving the production line utilization rate and reducing the manufacturing cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments of the present invention or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0051] Figure 1 is a flow chart of a semiconductor product processing method according to an embodiment of the present invention;

[0052] Figure 2 is a flow chart for determining a processing plan in an embodiment of the present invention;

[0053] Figure 3 is a flow chart of a method for selecting a processing solution to be selected in an embodiment of the present invention;

[0054] Figure 4 is a specific flow chart of a semiconductor product processing method in an embodiment of the present invention;

[0055] Figure 5 is a schematic structural diagram of a semiconductor product processing device according to an embodiment of the present invention;

[0056] Figure 6 It is a structural schematic diagram of an electronic device in an embodiment of the present invention. DETAILED DESCRIPTION

[0057] As described in the background technology, when conflicts occur in the task allocation process of the processing production line, processing is performed according to priority levels to ensure the efficiency of processing the highest level devices. However, there is a processing production line that is used to process multiple batches of products at the same time, which will reduce the processing efficiency of the overall production line and increase manufacturing costs.

[0058] In order to solve the above technical problems, an embodiment of the present invention provides a product processing method, including: determining a processing plan for processing all batches of products on respective processing equipment, the processing plan including: product batches processed on the processing equipment, the processing equipment to be repaired, and the execution order between the product batches processed and the processing equipment to be repaired; selecting a candidate processing plan from the processing plans; rearranging the execution order in the candidate processing plans to generate multiple reorganized processing plans, and obtaining the manufacturing cost of each reorganized processing plan; when it is determined that the difference in manufacturing cost between any two adjacent reorganized processing plans is within a preset difference, taking the reorganized processing plan with the lowest manufacturing cost as the target processing plan, and processing all batches of products according to the execution order in the target processing plan.

[0059] In the product processing method provided in the embodiment of the present invention, the processing schemes for all batches of products on their respective processing equipment are comprehensively considered, and one processing scheme corresponds to one execution order, so that each processing scheme to be selected has a different execution order, so that when the processing schemes to be selected are rearranged, multiple reorganized processing schemes can be generated, so that each reorganized processing scheme has randomness, which can reduce the interference of human sorting, and each reorganized processing scheme has a corresponding manufacturing cost, so that the reorganized processing scheme with the lowest manufacturing cost can be used as the target processing scheme, and all batches of products can be processed according to the execution order in the target processing scheme. In other words, the product processing method in the embodiment of the present invention takes into account the overall production line efficiency, as well as the processing time and maintenance times of the processing equipment. Compared with the priority-based processing scheme in the existing scheme, it can reasonably plan the processing schemes for each batch of products, thereby improving the production line utilization rate and reducing the manufacturing cost.

[0060] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, the present invention is exemplarily described below with reference to the accompanying drawings.

[0061] See also Figure 1 A flowchart of a semiconductor product processing method according to an embodiment of the present invention is shown in FIG. Figure 1 As shown, the following steps can be performed:

[0062] Step A, determine the processing plan for all batches of products on their respective processing equipment.

[0063] Specifically, when processing all batches of products, information such as the processing equipment and processing procedures used for each batch of products can be determined. In this way, when formulating the processing time for all batches of products, there will be multiple plans, and each plan can achieve the processing of all batches of products. The difference is that the order in which each processing plan is executed is not exactly the same.

[0064] In this embodiment, the processing plan may include: product batches processed on the processing equipment (i.e., the number of product batches that need to be processed by the same processing equipment), the processing equipment to be repaired (i.e., those processing equipment that will be repaired during the processing process), and the execution order between the processed product batches and the processing equipment to be repaired (i.e., the existing order between product processing and equipment maintenance).

[0065] As a non-limiting example, there are 5 batches of products (recorded as L1, L2, L3, L4 and L5), there are 3 processing equipment (recorded as E1, E2 and E3), and the number of times it is repaired during the processing is 3 times (R1, R2 and R3), then:

[0066] Scheme 1 can be {(L 1,1 ),(L2,1 ),(L 3,1 ),(L 4,1 ),(L 5,1 ),R1,(L 1,2 ),(L 2,2 ),(L 3,2 ),(L 4,2 ),(L 5,2 ),R2,(L 1,3 ),(L 2,3 ),(L 3,3 ),(L 4,3 ),(L 5,3 ),R3};

[0067] Scheme 2 can be {(L 1,1 ),(L 2,1 ),(L 3,1 ),(L 4,1 ),R1,(L 5,1 ),(L 3,2 ),(L 4,2 ),(L 1,2 ),(L 5,2 ),(L 2,2 ),R2,(L 5,3 ),(L 4,3 ),(L 3,3 ),(L 2,3 ),(L 1,3 ),R3}.

[0068] In other words, each processing plan includes all batches of products, all processing equipment and the number of times they are maintained. The difference is that the actual execution order of each processing plan is different.

[0069] It should be noted that, first, the processing schemes listed in the above examples are only examples, which are used to indicate that multiple processing schemes can be adopted to perform processing on all batches of products, such as wafers, CMOS devices, etc.; second, when determining a processing scheme, the corresponding processing cost can also be determined.

[0070] Step B: Select a processing scheme to be selected from the processing schemes.

[0071] Specifically, each processing plan is an abstract representation of all batches of products, and the "value" of each processing plan is the same (as a non-limiting example, the probability of Plan 1 and Plan 2 in the above example being used as actual processing plans is the same), and all can achieve the processing of all batches of products. Therefore, in determining all processing plans, a selection operation can be performed to obtain multiple candidate processing plans, which will serve as the basic plans for the final processing plan.

[0072] In this embodiment, a random selection method can be adopted to obtain the processing scheme to be selected, which makes the processing scheme to be selected have greater randomness and can be closer to the actual scheme.

[0073] In some other embodiments, selection conditions can also be pre-set (as a non-limiting example, the selection condition is: the last step in the processing plan is the step in which the equipment is repaired) to obtain the processing plans to be selected. The embodiments of the present invention do not limit this, as long as the processing plans to be selected can be obtained.

[0074] Step C, rearrange the execution order of the processing schemes to be selected, generate multiple reorganized processing schemes, and obtain the manufacturing cost of each reorganized processing scheme.

[0075] Specifically, the number of candidate processing schemes determined by steps A and B is limited, and the execution order of each processing scheme is known in advance. However, in the actual processing process, the processing order in the processing scheme may be changed. Therefore, by performing the operation of flushing and arranging, on the one hand, the number of processing schemes is expanded; on the other hand, the uncertainty of the execution order of the processing schemes is taken into account, so that the reorganized processing scheme can more truly reflect the actual processing process.

[0076] In this embodiment, after the reorganization processing scheme is determined, the manufacturing cost of each reorganization processing scheme can be determined according to the execution order of each reorganization processing scheme.

[0077] It should be noted that for the same batch of products, the processing costs of the batch of products are different when using different processing plans, so there is a reorganization processing plan with the same manufacturing cost.

[0078] In this embodiment, the "rearrangement" may be to reconstruct the execution order of only one of the processing schemes to be selected, or may be based on a plurality of different processing schemes to be selected, by exchanging different processing schemes to be selected, so as to reconstruct the processing scheme.

[0079] Step D, when it is determined that the difference in manufacturing cost between any two adjacent reorganization processing schemes is within a preset difference, the reorganization processing scheme with the lowest manufacturing cost is used as the target processing scheme, and all batches of products are processed according to the execution order in the target processing scheme.

[0080] Specifically, when each rearrangement is performed, at least one corresponding reorganization processing plan can be output. As the number of reorganization processing plans increases, the number of reorganization processing plans gradually increases, so that these reorganization processing plans can be sorted (as a non-limiting example, the reorganization processing plans are sorted according to the order in which the reorganization is performed).

[0081] And each reorganization processing plan has a corresponding manufacturing cost. Therefore, the difference in manufacturing costs between any two adjacent reorganization processing plans can be calculated. When it is determined that the difference is within the preset difference, it means that the manufacturing cost of the reorganization processing plan determined according to steps A to C tends to converge, or it is considered that the manufacturing cost of the reorganization processing plan has tended to the actual manufacturing cost. At this time, the rearrangement operation can be stopped, which can reduce the calculation time.

[0082] Then, the manufacturing costs of all reorganization processing plans whose differences are within the preset difference are traversed, and the reorganization processing plan with the lowest manufacturing cost can be determined. In this way, the reorganization processing plan with the lowest manufacturing cost can be used as the target processing plan (or actual processing plan), and all batches of products can be processed according to the execution order in the target processing plan, so that the manufacturing cost of the product processing process is the lowest.

[0083] Alternatively, it is considered that when multiple differences are within the preset difference, it indicates that the manufacturing cost is the optimal manufacturing cost, and it is difficult to search for a better solution through the current execution steps, that is, the manufacturing cost of the default target processing solution is close enough to the global optimal solution.

[0084] The product processing method in the above example takes into account the overall production line efficiency, as well as the processing time and maintenance times of the processing equipment. Compared with the priority-based processing plan in the existing plan, it can reasonably plan the processing plans for each batch of products, thereby improving the production line utilization rate and reducing manufacturing costs.

[0085] In the embodiment of the present invention, due to the randomness of the rearrangement, there are multiple reorganization processing schemes with the same manufacturing costs. When these manufacturing costs are the lowest, according to the above selection criteria, there will be multiple target processing schemes.

[0086] Based on this, when it is determined that there are multiple restructuring and processing plans with the same and lowest manufacturing costs, the product processing method also includes: determining the processing time of each restructuring and processing plan, and processing all batches of products according to the execution order corresponding to the restructuring and processing plan with the shortest processing time.

[0087] Specifically, the execution order in the reorganization processing scheme is different, which will lead to differences in the required processing time. Therefore, when determining multiple reorganization processing schemes with the same manufacturing cost and the lowest manufacturing cost, the reorganization processing scheme with the smallest processing time can be used as the target processing scheme to process all batches of products. It should be noted that when there are reorganization processing schemes with the same minimum processing time and the lowest manufacturing cost, any reorganization processing scheme can be randomly selected as the target processing scheme.

[0088] In some other embodiments, when it is determined that there are multiple reorganization processing schemes with the same manufacturing cost and the lowest cost, any one of the reorganization processing schemes can be randomly selected as the target processing scheme.

[0089] In this embodiment, for different processing steps, the batches of products to be processed, the processing equipment used, and the number of times the processing equipment is repaired are all determined. Therefore, when determining the processing plan for processing all batches of products (i.e., step A), refer to Figure 2 A flowchart for determining a processing plan in an embodiment of the present invention is shown in FIG. Figure 2 As shown, the following steps can be performed:

[0090] Step A1, determining the length of the processing plan according to the batch number of product batches, the number of processing equipment used for each batch of products, and the total maintenance times of the processing equipment used for all batches of products.

[0091] Specifically, the batch quantity of the product batch determines the total amount of products to be processed by the processing equipment in the current processing process. The number of processing equipment used for each batch of products determines the type and quantity of products that need to be processed by any processing equipment, as well as the corresponding processing time. The total maintenance times limit the length of the non-processing state when completing the current batch of products. Based on the above factors, the length of the processing plan can be determined.

[0092] In other words, the length of the processing plan limits all the process steps for executing the current batch of products, that is, the total steps to be performed to complete this batch of products. These steps may include: batch product processing sequence and processing steps, equipment use sequence, and maintenance sequence, etc. For all batches of products, the length of the processing plan is the same.

[0093] In this embodiment, the following formula can be used to determine the length of the processing plan:

[0094]

[0095] Among them, n represents the total batch size, m i represents any batch of products, k i Indicates the processing equipment corresponding to any batch of products. Indicates the total number of maintenance operations.

[0096] Step A2, according to the length of the processing plan and the preset processing strategy, determine the execution order between the processed product batches and the repaired processing equipment, generate corresponding processing plans, and each processing plan has a different execution order.

[0097] Specifically, the length of the processing plan defines all the process steps for executing the current batch of products. Corresponding to different processing strategies, the execution order of the process steps in the length of the processing plan can be swapped to generate multiple processing plans with different execution orders.

[0098] As a non-limiting example, in one processing scheme, processing equipment 1 is first used to process the product of lot 1; and in another processing scheme, processing equipment 1 is first used to process the product of lot 2, so that each processing scheme has a different execution order.

[0099] By determining the length of the processing plan, all process steps for the current batch of products can be clearly executed. Then, by presetting the processing strategy, each processing plan can have a different execution order. This comprehensively considers the processing plans under different circumstances, so that the final target processing plan has higher accuracy and better credibility.

[0100] In this embodiment, as mentioned above, the probability of each processing scheme being used as the actual processing scheme is the same, so each processing scheme can be used as a candidate processing scheme. For ease of understanding and explanation, two methods for selecting candidate processing schemes are shown below.

[0101] Example 1: According to the manufacturing cost of each processing scheme, the probability interval of each processing scheme is determined, and the candidate processing scheme is selected from the processing schemes by using a numerical matching method.

[0102] Specifically, each processing scheme has a manufacturing cost, and there are different manufacturing costs for different schemes, so the total manufacturing cost corresponding to all schemes can be determined, and then based on the ratio of manufacturing cost to total manufacturing cost (that is, the proportion of each processing scheme in the total manufacturing cost), the probability interval of each processing scheme can be determined, and the probability interval is used to characterize the position of one of the processing schemes in all processing schemes. And the probability interval corresponds to an interval range, and through the method of numerical matching, it is inevitable that a candidate processing scheme can be determined by comparing the numerical value and the probability interval.

[0103] In this embodiment, see Figure 3 A flowchart of a method for selecting a processing scheme to be selected in an embodiment of the present invention is shown in FIG. Figure 3 As shown, the following steps can be performed:

[0104] Step E1, determining the total manufacturing cost of the manufacturing costs of all processing solutions.

[0105] Specifically, each processing plan has a manufacturing cost. The sum of the manufacturing costs of all processing plans is the total manufacturing cost.

[0106] In this embodiment, for any processing scheme (including the original processing scheme, the processing scheme to be selected, and the reorganized processing scheme), the manufacturing cost can be determined in the following manner:

[0107] According to the execution order of each processing plan, the storage cost, extension cost, processing cost and maintenance cost of completing all batches of products are determined. For the same batch of products, the execution order and priority are different, and the storage cost and the processing cost are different.

[0108] Specifically, the execution order of the processing plan limits the processing steps of the product batches, and different execution orders result in different plans having different storage costs, extension costs, processing costs and maintenance costs. Therefore, when determining one of the processing plans, the storage costs, extension costs, processing costs and maintenance costs for completing all batches of products can be determined according to the execution order of the processing plan, historical experience or simulation.

[0109] And because in different processing plans, if the execution order and priority of the same batch of products are different, the storage cost and processing cost will be different, which makes the manufacturing cost diverse, which increases the richness of the optional options.

[0110] Next, the manufacturing cost is determined based on the storage cost, extension cost, processing cost and maintenance cost of completing each batch of products, as well as the execution sequence.

[0111] Specifically, in determining the storage cost, extension cost, processing cost and maintenance cost of all batches of products, it is also necessary to determine the final manufacturing cost based on the specific execution order of each processing plan. This is because even for the same batch of products, due to differences in processing characteristics, different processing plans will result in different storage costs and processing costs for the same batch of products.

[0112] For example, in the first processing plan, lot1 is processed first in each process, so that lot1 can be processed and completed in a very short time, and after processing, it can be shipped immediately. In the first processing plan, the storage cost and processing cost of lot1 are both low; while in the second processing plan, lot1 is processed first in each process, so that lot1 can be processed and completed in a very short time, and after processing, it can be shipped after a period of time. In this way, the storage cost of lot1 will increase.

[0113] In other words, when determining the manufacturing cost, not only the overall efficiency of the processing line is taken into account, but also other factors are taken into account, so that the final manufacturing cost can better reflect the authenticity of the processing plan.

[0114] In this embodiment, the manufacturing cost can be determined in the following manner:

[0115]

[0116] Where C represents the manufacturing cost of the processing solution, n represents the number of products in any batch, It represents the number of times the processing equipment for completing this batch of products has been repaired, SE represents the storage cost of this batch of products, DE represents the deferred cost of this batch of products, PE represents the processing cost of this batch of products, and ME represents the maintenance cost of this batch of products.

[0117] It should be noted that for the same product in the same batch, PE may vary due to different processing techniques and different urgency levels. Similarly, differences in delivery time and processing speed may also lead to differences in SE and DE.

[0118] It should be noted that the above is only an illustration of a method of determining manufacturing cost based on the storage cost, extension cost, processing cost and maintenance cost of batch products, as well as the execution sequence. In actual application, it can also be based on other calculation methods and should not be construed as a limitation to the present invention.

[0119] Step E2, determining the cost of each processing scheme according to the manufacturing cost of each processing scheme and the total manufacturing cost.

[0120] The probability value of the work plan being selected.

[0121] In an optional example, the ratio of the manufacturing cost of each processing scheme to the total manufacturing cost can be used as the probability value of each processing scheme being selected, which can reflect the proportion of the manufacturing cost of the processing scheme in the total manufacturing cost.

[0122] In some other embodiments, the probability value of each processing solution being selected may be determined by other methods.

[0123] Step E3, taking the probability value of any one of the processing schemes being selected as a probability value reference, performing an accumulation operation on the probability values ​​of each processing scheme being selected to determine the probability interval of each processing scheme.

[0124] Specifically, based on step E2, the probability value of each processing scheme being selected can be determined, so that the probability value of one of the processing schemes being selected can be selected as the probability value benchmark, and the probability value of this processing scheme being selected can be used as the maximum value of the probability interval, and zero can be used as the minimum value of this probability interval to obtain the first probability interval.

[0125] If the other processing plans all have corresponding probability values ​​of being selected, the maximum value of the first probability interval can be used as the minimum value of the second probability interval of the next processing plan, and the sum of the maximum value of the first probability interval and the probability value of the next processing plan being selected can be used as the maximum value of the second probability interval, and so on, so that the maximum value of the probability interval of the last processing plan is 1, and the minimum value is the difference between 1 and the probability value of the last processing plan being selected.

[0126] In other words, by executing step E3, all processing plans can be made to form a range interval with a probability interval of (0, 1].

[0127] It should be noted that there is no intersection between any two adjacent probability intervals. For example, if one of the probability intervals is (a1, a2], then the next probability interval is (a2, a3], that is, the probability intervals are completely different, where the values ​​of a1, a2 and a3 are between 0 and 1.

[0128] In this embodiment, when determining the probability value benchmark, the probability interval of each processing scheme can be obtained and determined in a variety of ways.

[0129] As an optional example, when determining the probability value benchmark, the selected probability values ​​may be accumulated in order from small to large, so that processing schemes with lower manufacturing costs can be grouped together.

[0130] It should be noted that, in the above example, the probability value benchmark may refer to the selected probability value corresponding to the processing solution with the smallest selected probability value.

[0131] As another optional example, when determining the probability value benchmark, the selected probability values ​​may be accumulated in sequence according to the ID numbers corresponding to the various processing plans, which is helpful in improving the consistency between the processing plans and the probability intervals.

[0132] It should be noted that, in the above example, the probability value benchmark may refer to the probability value of being selected corresponding to the processing plan with the first ID number.

[0133] As another optional example, when determining the probability value benchmark, the selected probability values ​​may be accumulated in a random selection manner, which can improve the randomness of the probability intervals of each processing solution.

[0134] It is understandable that, in actual operation, the above three schemes can be combined to determine the probability interval of each processing scheme.

[0135] Step E4, repeatedly executing the operation of selecting random numbers from a preset interval, and matching the random numbers of each selection operation with the probability intervals of each processing scheme, so that the random number is located in any probability interval, and taking the matching processing scheme as the processing scheme to be selected.

[0136] Specifically, for any operation of selecting a random number from a preset interval, a random number can be obtained, and each probability interval has two endpoint values ​​and an interval value between the two endpoint values, and each probability interval is different, so the obtained random number can be matched with all the probability intervals so that the random number is located in any of the probability intervals. In this way, the processing plan containing this random number can be used as a candidate processing plan.

[0137] Then, the operation of selecting a random number is performed again, and a processing plan to be selected is obtained again, until the selected processing plan to be selected meets the set requirements.

[0138] In this embodiment, the preset interval may be (0, 1], so that any random number selected can ensure that the random number can match one of the probability intervals.

[0139] In some other embodiments, the preset interval can also be a range interval with other endpoint values. When any random number is obtained, the random number can be normalized based on the two endpoint values ​​of the interval and then matched with the probability interval, so that the random number can be matched to one of the probability intervals.

[0140] For example, when the preset interval is (0, 10], in a random number selection process, the random number is 7.9, then after the random number 7.9 is normalized, the processing scheme whose probability interval includes 0.79 is used as the processing scheme to be selected.

[0141] In this embodiment, due to the randomness of random number selection, in different selection operations, the selected multiple random numbers may correspond to a probability interval. At this time, it is still necessary to use the selected repeated processing scheme as a processing scheme to be selected to enter the rearrangement process. At this time, because:

[0142] On the one hand, it can improve the randomness and accuracy of the target processing scheme obtained; on the other hand, due to the randomness of the rearrangement, even if the processing scheme is exactly the same, there may be differences in the reorganized processing scheme obtained after rearrangement.

[0143] In this embodiment, any random number selection operation can obtain a processing plan to be selected. Taking into account the time cost and calculation complexity, the number of operations of selecting random numbers from a preset interval should not be too many or too few. Too few operations will result in a small number of processing plans to be selected, and it will not be possible to take all processing plans into account.

[0144] In a specific embodiment, the number of times the operation of selecting a random number from a preset interval is performed is not greater than the total number of the processing solutions.

[0145] In other words, the number of selected processing solutions is less than or equal to the total number of determined processing solutions.

[0146] Furthermore, the number of times the operation of selecting a random number from a preset interval is performed is equal to the total number of the processing solutions, which can improve the consistency of the number of processing solutions to be selected and the processing solutions.

[0147] To facilitate understanding, an example is used to explain in detail the process of obtaining the processing solutions to be selected.

[0148] Assume that there are N processing schemes (N is an integer greater than 1), and the manufacturing costs of these N processing schemes are C1, C2, ..., C N (For ease of explanation, assume that the manufacturing costs are C1, C2, ..., C N The total manufacturing cost Ct = C1 + C2 + ... + C N , so the probability of each processing scheme being selected is:

[0149] β1=C1 / Ct*100%, β2=C2 / Ct*100%,…,β N =C N / Ct*100%.

[0150] Taking the selected probability β1 as the probability value benchmark, the first probability interval is (0, β1], and the accumulation operation is performed in sequence, then the second probability interval is (β1, β1+β2], the third probability interval is (β1+β2, β1+β2+β3], ..., and the last probability interval is (1-β N , 1].

[0151] Then, a random number X is randomly selected from the preset interval (0, 1], and the random number X is matched with the N probability intervals, so that a corresponding processing solution to be selected can be selected.

[0152] The operation of selecting random numbers is repeated N times to obtain N processing schemes to be selected, and the N processing schemes to be selected will continue to perform the rearrangement operation.

[0153] The step of selecting a processing scheme to be selected from the processing schemes includes at least one of the following:

[0154] A preset number of processing solutions with lower manufacturing costs are selected from the processing solutions as processing solutions to be selected.

[0155] Example 2: Select a preset number of processing solutions with lower manufacturing costs from the processing solutions as candidate processing solutions.

[0156] Specifically, when determining multiple processing plans, the manufacturing cost of each processing plan can be obtained, so that the processing plans can be sorted from low to high according to the manufacturing cost, and then a preset number of processing plans can be selected as candidate processing plans to reduce the complexity of the calculation.

[0157] It should be noted that the descriptions for selecting the processing schemes to be selected in Examples 1 and 2 above are only examples, indicating that a variety of methods can be used to select the processing schemes to be selected from the processing schemes, and should not be construed as limiting the present invention. For example, in some other embodiments, a processing scheme can be randomly selected as the processing scheme to be selected.

[0158] By adopting the method in the above example, multiple candidate processing schemes that meet the set requirements can be selected based on the manufacturing costs of each processing scheme, so that each candidate processing scheme has a corresponding manufacturing cost. In order to further obtain the manufacturing cost suitable for the actual processing scheme, the execution order of the candidate processing schemes can also be rearranged.

[0159] For ease of understanding and description, two methods for rearranging the processing solutions to be selected are shown below.

[0160] Example 1: Select any at least two processing schemes from the processing schemes to be selected, and replace part of the execution order of any at least two selected processing schemes to generate corresponding reorganized processing schemes, and in one replacement process, determine a manufacturing cost corresponding to a reorganized processing scheme.

[0161] Specifically, each candidate processing scheme includes the product batches processed on the processing equipment, the processing equipment to be repaired, and the execution order between the product batches to be processed and the processing equipment to be repaired. In this way, any candidate processing scheme can be regarded as an arrangement and combination of the above factors. In this way, a partial combination can be selected from any candidate processing scheme to replace it with a partial combination in at least one remaining candidate processing scheme, that is, to achieve cross-mapping of different candidate processing schemes, so as to obtain a new combined scheme as a reorganized processing scheme.

[0162] And because the reorganized processing plan obtained by replacement is still a processing plan, the manufacturing cost of each reorganized processing plan can be determined.

[0163] In this way, by performing the replacement operation again on the candidate processing schemes obtained by executing the selection process, a better reorganized processing scheme can be obtained, in the hope of obtaining a better manufacturing cost and further reducing the manufacturing cost of the actual processing scheme.

[0164] In this embodiment, in order to facilitate the replacement operation, each processing plan can be further processed. For example, each processing plan has identification information used to characterize the execution order. The execution order of the processing plan can be determined by the identification information. In this way, by replacing the identification information in any two candidate processing plans, a reorganized processing plan can be obtained.

[0165] For example, as a non-limiting example, assume that there are two processing solutions to be selected, and the two processing solutions to be selected are:

[0166] parent1: 1, 2, [3, 4, 5], 6, 7, 8, 9, 10.

[0167] parent2: 9, 8, [4, 3, 5], 1, 10, 7, 6, 2.

[0168] Then, [3, 4, 5] in parent1 and [4, 3, 5] in parent2 are used as crossover operators for replacement (or cross mapping), and two reorganization schemes can be obtained:

[0169] child1: 1, 2, [4, 3, 5], 6, 7, 8, 9, 10.

[0170] child 2: 9, 8, [3, 4, 5], 1, 10, 7, 6, 2.

[0171] In this way, according to the execution order of child1 and child 2 after the reorganization, the manufacturing costs of child1 and child 2 can be determined respectively.

[0172] The inventors further discovered that in the actual execution of selecting any at least two candidate processing schemes from the candidate processing schemes, and replacing part of the execution order of any at least two selected candidate processing schemes to generate corresponding reorganized processing schemes, there is a situation where the identification information serving as the crossover operator conflicts with the identification information of the remaining part (for example, the same identification information exists in the reorganized processing scheme after the replacement operation is performed), and further optimization steps need to be performed at this time.

[0173] Specifically, if the identification information corresponding to the execution order replaced in the processing plan to be selected is the same as the identification information corresponding to the execution order of the processing plan to be selected that has not been replaced, a deduplication operation is performed so that the reorganized processing plan has exactly the same identification information as the processing plan to be selected, so that each reorganized processing plan can be correctly executed, avoiding the situation where the processing cannot be correctly performed due to the existence of the same identification information, thereby improving the authenticity of the processing plan.

[0174] In this embodiment, the modification operation may include: modifying the identification information in the execution sequence that has not been replaced in the processing scheme to be selected, which is the same as the identification information in the execution sequence that is replaced in the processing scheme to be selected, to the missing identification information.

[0175] The missing identification information can be determined by comparing the identification information in the original processing solution to be selected with the identification information after the replacement operation is performed.

[0176] By performing the modification operation, the reorganized processing plan can have the same identification information as the processing plan to be selected.

[0177] For ease of understanding and explanation, an example is provided for illustration.

[0178] Assume that there are two processing schemes to be selected, which are:

[0179] parent3: 10, 5, [8, 3, 9, 2], 7, 6, 1, 4.

[0180] parent4: 10, 3, [2, 9, 5, 6], 1, 8, 7, 4.

[0181] Then, [8, 3, 9, 2] in parent3 and [2, 9, 5, 6] in parent4 are used as crossover operators for replacement (or cross mapping), and two reorganization schemes can be obtained:

[0182] child3: 10, 5, [2, 9, 5, 6], 7, 6, 1, 4.

[0183] child 4: 10, 3, [8, 3, 9, 2], 1, 8, 7, 4.

[0184] Among them, child3 has the same identification information 5 and 6, and lacks identification information 3 and 8; while child4 has the same identification information 3 and 8, and lacks identification information 5 and 6, so it is necessary to perform deduplication operations on child3 and child4 respectively.

[0185] As a non-limiting example, after performing the deduplication operation, the final reorganization processing schemes are obtained respectively:

[0186] child3-1: 10, 8, [2, 9, 5, 6], 7, 3, 1, 4.

[0187] child 4-1: 10, 5, [8, 3, 9, 2], 1, 6, 7, 4.

[0188] In this way, both child 3 - 1 and child 4 - 1 include identification information consistent with the original processing scheme to be selected, so that there is no repeated identification information in the reorganized processing scheme.

[0189] It should be noted that the embodiments of the replacement and deduplication operations listed above are only examples for illustrating the process of performing replacement and deduplication operations to obtain a reorganization processing plan, and should not be understood as a limitation of the present invention. In actual operations, other methods may also be used to perform replacement and deduplication operations.

[0190] In this embodiment, the execution order of the processing scheme to be selected is generally rearranged multiple times, and each round of rearrangement can generate multiple reorganization processing schemes. In the continuous iterative calculation process, each rearrangement will generate a reorganization processing scheme with the best fitness (i.e., the lowest cost), but in multiple rounds of rearrangement schemes, it cannot be guaranteed that the excellent genes (i.e., the best execution order) of the reorganization processing scheme with the best fitness (i.e., the lowest cost) can be completely passed on.

[0191] In this case, the execution order of the candidate processing schemes is rearranged to generate multiple reorganization processing schemes. After each round of rearrangement is completed, the reorganization processing scheme with the lowest manufacturing cost is selected as the optimal reorganization processing scheme, and the optimal reorganization processing scheme is applied to the next round of rearrangement.

[0192] In other words, when a round of rearrangement is completed, the optimal reorganization processing plan will no longer participate in the subsequent operation process in this round of iteration, but will directly prepare for the next round of iterative calculation with the reorganization processing plan that has undergone the above operations, so that the reorganization processing plan with the best execution order can be inherited multiple times, so that the final target processing plan has the optimal manufacturing cost.

[0193] The rearrangement in Example 1 is performed based on at least two processing solutions to be selected. In some embodiments, the rearrangement can also be performed based on the processing solutions to be selected themselves.

[0194] Specifically, Example 2 includes: for any one of the candidate processing plans, changing its partial execution order, generating a corresponding reorganized processing plan, and in one change process, determining a manufacturing cost corresponding to a reorganized processing plan.

[0195] Specifically, for any candidate processing scheme, by changing its execution order, different reorganized processing schemes can be obtained. By making minor changes to individuals, the diversity of processing schemes can be improved, the search range can be expanded, and in the later stage of iteration, the possibility of escaping from the local optimal solution (i.e., the lowest manufacturing cost) can be increased.

[0196] In this embodiment, the method of changing the partial execution order of the processing scheme to be selected itself may include: at least one of an interchange operation and a reverse operation to enhance the impact on the processing scheme to be selected itself, so that the manufacturing cost of the reorganized processing scheme fluctuates.

[0197] The interchange operation refers to exchanging the processing order of product batches in the selected processing scheme, as well as the order of product processing and maintenance, etc.

[0198] As a non-limiting example, taking parent1: 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 as an example, by performing an interchange operation (for example, exchanging 10 and 2), a reorganization processing scheme child1-1: 1, 10, 3, 4, 5, 6, 7, 8, 9, 2 is obtained.

[0199] The reverse order operation may refer to an execution order that is completely opposite to the previous execution order.

[0200] As a non-limiting example, taking parent1: 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 as an example, by performing the reverse operation, the reorganization processing plan child1-2: 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 is obtained.

[0201] The adjustment idea of ​​Example 2 is that in the stage where the differentiation of the processing schemes to be selected is large, the impact on the overall processing schemes to be selected is small by changing the execution order of itself, and in the iterative process, the excellent gene segments in the processing schemes to be selected are cleared due to mutation. However, as the number of iterations continues to increase (as a non-limiting example, if the number of iterations is 50% of the preset number), the recombination processing schemes of different rounds tend to be the same, and the excellent gene segments have been inherited by enough recombination processing schemes. At this time, it is necessary to improve the diversity of the population through "mutation", and thereby increase the probability of further degeneration of excellent genes, so as to obtain the processing scheme with the best manufacturing cost.

[0202] It can be understood that in the step of generating multiple reorganization processing plans by changing the partial execution order of the candidate processing plans themselves, the reorganization processing plan with the lowest manufacturing cost can be selected as the optimal reorganization processing plan, and the optimal reorganization processing plan can be applied to the next round of rearrangement.

[0203] In this embodiment, as the number of rearrangements increases, the various recombination processing schemes begin to converge, so that the manufacturing costs of multiple different processing schemes converge or fluctuate less. Even if differentiated individuals are created by executing the operations in the above examples, as the enrichment of excellent gene ends in the current optimal individual (i.e., the processing scheme with the lowest manufacturing cost) increases, the target processing scheme finally obtained is not easy to break through the fitness of the optimal individual.

[0204] Based on this, when the number of times of rearranging the execution order in the processing scheme to be selected reaches a preset number of rounds, or when the manufacturing costs of rearranging the execution order in the processing scheme to be selected in each round tend to be the same, the product processing method further includes:

[0205] A perturbation processing plan is obtained, and the perturbation processing plan is applied to the rearrangement.

[0206] Specifically, when the number of times the execution order in the candidate processing schemes is rearranged reaches the preset rounds, it means that all the reorganization processing schemes have been fully considered, and when the manufacturing costs of each round of rearrangement tend to be the same, it means that the optimal processing scheme already exists, and a processing scheme with a lower manufacturing cost cannot be obtained based only on the existing candidate processing schemes and / or reorganization processing schemes. In this case, a disturbed processing scheme can be obtained, that is, the "introduction of alien species" mechanism is activated to apply the disturbed processing scheme to the rearrangement of the candidate processing schemes.

[0207] Since the perturbation processing plan is determined based on other batches of products (for example, the perturbation processing plan is determined randomly), and the types of constituent elements of the perturbation processing plan are the same as the types of constituent elements of the processing plan, when the perturbation processing plan is applied to the rearrangement, the selection probability of the selection mechanism has changed, so it can be ensured that the retained parts of these perturbation processing plans enter the subsequent rearrangement (such as crossover and mutation operations), thereby introducing the genetic factors of the perturbation processing plan (that is, the processing execution order) into the current convergent reorganization processing plan to bring new possibilities.

[0208] In order to enable those skilled in the art to better understand and implement the product processing method in the embodiment of the present invention, the following is a detailed description through examples and in combination with specific application scenarios.

[0209] See also Figure 4 A specific flow chart of a semiconductor product processing method in an embodiment of the present invention is shown in FIG. Figure 4 As shown, the following steps can be performed:

[0210] S1, determine the length of the processing plan based on the batch number of the product batch, the number of processing equipment used for each batch of products, and the total maintenance times of the processing equipment used for all batches of products.

[0211] S2, according to the length of the processing plan and the preset processing strategy, determine the execution order between the processed product batches and the repaired processing equipment, generate the corresponding processing plan, and each processing plan has a different execution order.

[0212] S3, according to the execution order of each processing plan, determine the storage cost, extension cost, processing cost and maintenance cost of completing all batches of products. For the same batch of products, the execution order and priority are different, and the storage cost and processing cost are different.

[0213] S4, based on the storage cost, extension cost, processing cost and maintenance cost of completing each batch of products,

[0214] and the execution sequence to determine the manufacturing cost of each processing plan.

[0215] S5, determining the total manufacturing cost of the manufacturing costs of all processing solutions.

[0216] S6, determining the probability value of each processing scheme being selected according to the manufacturing cost of each processing scheme and the total manufacturing cost.

[0217] S7, taking the probability value of any one of the processing schemes being selected as a probability value reference, performing a cumulative operation on the probability values ​​of each processing scheme being selected to determine the probability interval of each processing scheme.

[0218] S8, according to the total number of processing schemes, execute the operation of selecting random numbers from a preset interval, and match the random numbers of each selection operation with the probability intervals of each processing scheme, so that the random numbers are located in any probability interval, and the matching processing schemes are used as the processing schemes to be selected.

[0219] S9, select any at least two processing schemes to be selected from the processing schemes to be selected, and replace part of the execution order of any at least two processing schemes selected to be selected, generate corresponding reorganized processing schemes, and in one replacement process, determine a manufacturing cost corresponding to a reorganized processing scheme.

[0220] S10, when the number of times the execution order in the selected processing scheme is rearranged reaches a preset number of rounds, or when the manufacturing costs of each round of rearrangement of the execution order in the selected processing scheme tend to be the same, a disturbed processing scheme is obtained, and the disturbed processing scheme is applied to the rearrangement, and the corresponding manufacturing cost is obtained.

[0221] S11, determine whether the difference in manufacturing cost between any two adjacent reorganization processing schemes is within the preset difference. If so (that is, the difference in manufacturing cost between any two adjacent reorganization processing schemes is within the preset difference), execute step S12, take the reorganization processing scheme with the lowest manufacturing cost as the target processing scheme, and process all batches of products according to the execution order in the target processing scheme; if not (that is, the difference in manufacturing cost between any two adjacent reorganization processing schemes is not within the preset difference), return to execute step S10 or step S9.

[0222] It should be noted that, first, there are two situations for returning to step S9. The first situation is that after executing step S9, step S11 is executed directly. When the judgment result of step S11 is no, the process returns to step S9. The second situation is that after executing step S9, step S10 is executed in sequence, and then step S11 is executed. When the judgment result of step S11 is no, the process returns to step S9, or returns to step S10.

[0223] Second, some steps in the above embodiment may be replaced. For example, in step S9, the method of "selecting a preset number of processing solutions with lower manufacturing costs from the processing solutions as the processing solutions to be selected" may be adopted.

[0224] Third, some steps in the above embodiment may not be executed. For example, after executing step S9, step S11 is executed and step S10 is ignored.

[0225] Fourth, the steps in the above embodiments can be further expanded and supplemented. For example, during the execution of step S9, a deduplication operation can also be performed. For example, after executing step S12, when multiple reorganization processing schemes with the same manufacturing cost and the lowest manufacturing cost are determined, the reorganization processing scheme with the shortest processing time can be used as the target processing scheme, etc.

[0226] Fifth, after executing step S12, if it is determined that the difference in manufacturing cost between any two adjacent reorganization processing plans is not within the preset difference, it is possible to return to step S4 and re-execute the confirmation of the selected processing plan and the subsequent reorganization operation; or, if it is determined that the difference in manufacturing cost between any two adjacent reorganization processing plans is within the preset difference, it is also possible to return to step S4.

[0227] It can be understood that the above describes multiple implementation schemes provided by the embodiments of the present invention, and the various optional methods introduced in each implementation scheme can be combined and cross-referenced with each other without conflict, thereby extending a variety of possible implementation schemes, which can all be considered as the implementation schemes disclosed and open to the public by the present invention.

[0228] This embodiment also provides a product processing device corresponding to the above-mentioned product processing method, which is exemplarily described below with reference to the accompanying drawings.

[0229] It should be noted that the content of the product processing device described below can be referenced in correspondence with the content of the product processing method described above.

[0230] See also Figure 5 The structure diagram of a semiconductor product processing device according to an embodiment of the present invention is shown in FIG. Figure 5 As shown, the semiconductor product processing device may include:

[0231] The scheme determination module 110 is configured to determine a processing scheme for processing all batches of products on respective processing equipment, wherein the processing scheme includes: product batches to be processed on the processing equipment, processing equipment to be repaired, and an execution order between the product batches to be processed and the processing equipment to be repaired;

[0232] A scheme selection module 120 is configured to select a processing scheme to be selected from the processing schemes;

[0233] The scheme reorganization module 130 is configured to rearrange the execution order of the processing schemes to be selected, generate multiple reorganized processing schemes, and obtain the manufacturing cost of each reorganized processing scheme;

[0234] The processing module 140 is configured to, when it is determined that the difference in manufacturing cost between any two adjacent reorganization processing plans is within a preset difference, take the reorganization processing plan with the lowest manufacturing cost as the target processing plan, and process all batches of products according to the execution order in the target processing plan.

[0235] For more information about the working principle, working method and beneficial effects of the semiconductor product processing device, please refer to the specific description of the product processing method above, which will not be repeated here.

[0236] It is understandable that the division of the above modules is only a division of logical functions, and in actual implementation, they can be fully or partially integrated into one physical entity, or physically separated. In addition, the above modules can be implemented in the form of a processor calling software.

[0237] The embodiment of the present invention further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a computer, the above-mentioned communication method is executed. The storage medium may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc. The storage medium may also include a non-volatile memory (non-volatile) or a non-transitory memory, etc.

[0238] An embodiment of the present invention also provides an electronic device, comprising at least one memory and at least one processor, wherein the memory stores one or more computer instructions, and the memory stores one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the steps of the semiconductor product processing method as described above.

[0239] Reference Figure 6 , Figure 6 It is a schematic diagram of the hardware structure of an electronic device in an embodiment of the present invention.

[0240] Figure 6 The electronic device shown may include a memory 210, a processor 220 and a display 230. The processor 220 is coupled to the memory 210 and the display 230. The memory 210 may be located inside or outside the terminal. The memory 210, the processor 220 and the display 230 may be connected via a communication bus. The display 230 is used to display the execution results of each step of the product processing plan.

[0241] The memory 210 stores a computer program that can be run on the processor 220. When the processor 220 runs the computer program, the steps of the product processing method provided in the above embodiment are executed.

[0242] It should be understood that in the embodiment of the present invention, the processor may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0243] It should also be understood that the memory in the embodiment of the present invention can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a ROM, a programmable read-only memory (programmable ROM, PROM), an erasable programmable read-only memory (erasable PROM, EPROM), an electrically erasable programmable read-only memory (electrically EPROM, EEPROM) or a flash memory. The volatile memory can be a random access memory (random access memory, RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (static RAM, SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (synchronous DRAM, SDRAM), double data rate synchronous dynamic random access memory (doubledata rate SDRAM, DDR SDRAM), enhanced synchronous dynamic random access memory (enhanced SDRAM, ESDRAM), synchronous connection dynamic random access memory (synchlink DRAM, SLDRAM) and direct memory bus random access memory (direct rambus RAM, DR RAM).

[0244] An embodiment of the present invention further provides a computer program product, including a computer program / instruction, which implements the steps of the above communication method when executed by a processor.

[0245] The above embodiments can be implemented in whole or in part by software, hardware, firmware or any other combination thereof. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer program can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer program can be transmitted from one website site, computer, server or data center to another website site, computer, server or data center by wired or wireless means.

[0246] It should be understood that in various embodiments of the present invention, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0247] In the several embodiments provided by the present invention, it should be understood that the disclosed methods, devices and systems can be implemented in other ways. For example, the device embodiments described above are only schematic; for example, the division of the units is only a logical function division, and there may be other division methods in actual implementation; for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0248] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0249] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may be physically included separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional units. For example, for each device or product applied to or integrated in a chip, each module / unit contained therein may be implemented in the form of hardware such as circuits, or at least part of the modules / units may be implemented in the form of software programs, which run on a processor integrated inside the chip, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits; for each device or product applied to or integrated in a chip module, each module / unit contained therein may be implemented in the form of hardware such as circuits, and different modules / units may be located in the same component (such as a chip, circuit module, etc.) or different components of the chip module, or at least part of the modules / units may be implemented in the form of software programs. The element can be implemented in the form of a software program, which runs on a processor integrated inside the chip module, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits; for various devices and products applied to or integrated in the terminal, the various modules / units contained therein can be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component (for example, chip, circuit module, etc.) or in different components in the terminal, or, at least some modules / units can be implemented in the form of a software program, which runs on a processor integrated inside the terminal, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits.

[0250] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform some steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: a U disk, a mobile hard disk, a ROM, a random access memory RAM, a magnetic disk or an optical disk, etc., which can store program codes.

[0251] It should be understood that the term "and / or" in this article is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article indicates that the associated objects before and after are in an "or" relationship.

[0252] The “plurality” mentioned in the embodiments of the present invention refers to two or more than two.

[0253] In the present invention, "equal to" can be used in conjunction with "less than" or "greater than", but not in conjunction with "less than" and "greater than" at the same time. When "equal to" is used in conjunction with "less than", the technical solution adopted by "less than" is applicable. When "equal to" is used in conjunction with "greater than", the technical solution adopted by "greater than" is applicable.

[0254] The first, second, etc. descriptions appearing in the embodiments of the present invention are only used for illustration and distinction of the description objects. There is no order, nor does it indicate any special limitation on the number of devices in the embodiments of the present invention, and cannot constitute any limitation on the embodiments of the present invention.

[0255] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A semiconductor product processing method, characterized in that: include: Determine a processing plan for processing all batches of products on respective processing equipment, the processing plan including: product batches processed on the processing equipment, processing equipment to be repaired, and an execution order between the product batches processed and the processing equipment to be repaired; Select a processing scheme to be selected from the processing schemes; Rearranging the execution order of the processing schemes to be selected to generate a plurality of reorganized processing schemes, and obtaining the manufacturing cost of each reorganized processing scheme; When it is determined that the difference in manufacturing cost between any two adjacent reorganization processing plans is within the preset difference, the reorganization processing plan with the lowest manufacturing cost is used as the target processing plan, and all batches of products are processed according to the execution order in the target processing plan.

2. The semiconductor product processing method according to claim 1, characterized in that: The step of determining a processing plan for processing all batches of products comprises: Determine the length of the processing plan based on the number of batches of the product batches, the number of processing equipment used for each batch of products, and the total number of maintenance times of the processing equipment used for all batches of products; According to the length of the processing plan and the preset processing strategy, the execution order between the processed product batches and the repaired processing equipment is determined, and the corresponding processing plan is generated, and each processing plan has a different execution order.

3. The semiconductor product processing method according to claim 2, characterized in that: The length of the processing plan is determined using the following formula: Among them, n represents the total batch size, m i represents any batch of products, k i Indicates the processing equipment corresponding to any batch of products. Indicates the total number of maintenance operations.

4. The semiconductor product processing method according to claim 1, characterized in that: The step of selecting a processing scheme to be selected from the processing schemes includes at least one of the following: Determine the probability interval of each processing scheme according to the manufacturing cost of each processing scheme, and select the processing scheme to be selected from the processing schemes by using a numerical matching method; A preset number of processing solutions with lower manufacturing costs are selected from the processing solutions as candidate processing solutions.

5. The semiconductor product processing method according to claim 4, characterized in that: The step of determining the probability interval of each processing scheme according to the manufacturing cost of each processing scheme, and selecting the processing scheme to be selected from the processing schemes by means of numerical matching comprises: Determine the total manufacturing cost of all processing options; Determine the probability value of each processing scheme being selected according to the manufacturing cost of each processing scheme and the total manufacturing cost; Taking the probability value of any one of the processing schemes being selected as the probability value benchmark, the probability values ​​of each processing scheme being selected are accumulated to determine the probability interval of each processing scheme; The operation of selecting random numbers from a preset interval is performed multiple times, and the random numbers of each selection operation are matched with the probability intervals of each processing scheme, so that the random number is located in any probability interval, and the matching processing scheme is used as the processing scheme to be selected.

6. The semiconductor product processing method according to claim 5, characterized in that: The number of times the operation of selecting a random number from a preset interval is performed is not greater than the total number of the processing solutions.

7. The semiconductor product processing method according to claim 1, characterized in that: The step of rearranging the execution order of the processing schemes to be selected to generate a plurality of reorganized processing schemes, wherein one reorganized processing scheme corresponds to one manufacturing cost, comprises at least one of the following: Selecting at least two processing schemes to be selected from the processing schemes to be selected, and replacing a part of the execution order of the selected at least two processing schemes to generate corresponding reorganized processing schemes, and determining a manufacturing cost corresponding to a reorganized processing scheme in one replacement process; For any one of the candidate processing schemes, the partial execution order thereof is changed to generate a corresponding reorganized processing scheme, and in one change process, a manufacturing cost corresponding to a reorganized processing scheme is determined.

8. The semiconductor product processing method according to claim 7, characterized in that: Each processing plan has identification information for characterizing the execution order; Selecting any at least two processing schemes to be selected from the processing schemes to be selected, and replacing a part of the execution order of the selected at least two processing schemes to be selected, to generate a corresponding reorganized processing scheme, including: In the step of replacing part of the execution order in any at least two selected processing schemes to generate a corresponding reorganized processing scheme, if the identification information corresponding to the execution order replaced in the processing scheme is the same as the identification information corresponding to the execution order of the processing scheme that has not been replaced, a modification operation is performed so that the reorganized processing scheme has exactly the same identification information as the processing scheme; the modification operation includes: modifying the identification information in the execution order of the processing scheme that has not been replaced that is the same as the identification information in the execution order replaced in the processing scheme to the missing identification information.

9. The semiconductor product processing method according to claim 7, characterized in that: The execution order of the processing schemes to be selected is rearranged multiple times; The step of rearranging the execution order of the processing schemes to be selected to generate multiple reorganized processing schemes is to select the reorganized processing scheme with the lowest manufacturing cost as the optimal reorganized processing scheme each time a round of rearrangement is completed, and the optimal reorganized processing scheme is applied to the next round of rearrangement.

10. The semiconductor product processing method according to claim 7, characterized in that: When the number of times of rearranging the execution order in the processing scheme to be selected reaches a preset number of rounds, or when the manufacturing costs of rearranging the execution order in the processing scheme to be selected in each round tend to be the same, the product processing method further includes: A disturbance processing plan is obtained, and the disturbance processing plan is applied to the rearrangement, wherein the disturbance processing plan is determined based on other batches of products, and the type of constituent elements of the disturbance processing plan is the same as the type of constituent elements of the processing plan.

11. The semiconductor product processing method according to claim 1, characterized in that: The manufacturing cost is determined as follows: Determine the storage cost, extension cost, processing cost and maintenance cost of all batches of products according to the execution order of each processing plan, wherein for the same batch of products, the execution order and priority are different, and the storage cost and the processing cost are different; The manufacturing cost is determined based on the storage cost, extension cost, processing cost and maintenance cost of completing each batch of products, as well as the execution sequence.

12. The semiconductor product processing method according to claim 1, characterized in that: When it is determined that there are multiple lowest reorganization processing schemes with the same manufacturing cost, the product processing method further includes: Determine the processing time of each reorganization processing plan, and process all batches of products in the execution order corresponding to the reorganization processing plan with the shortest processing time.

13. A semiconductor product processing device, characterized in that: include: A scheme determination module is configured to determine a processing scheme for processing all batches of products on respective processing equipment, wherein the processing scheme includes: product batches to be processed on the processing equipment, processing equipment to be repaired, and an execution order between the product batches to be processed and the processing equipment to be repaired; A scheme selection module is configured to select a processing scheme to be selected from the processing schemes; A scheme reorganization module is configured to rearrange the execution order of the processing schemes to be selected, generate multiple reorganized processing schemes, and obtain the manufacturing cost of each reorganized processing scheme; The processing module is configured to, when it is determined that the difference in manufacturing cost between any two adjacent reorganization processing plans is within a preset difference, take the reorganization processing plan with the lowest manufacturing cost as the target processing plan, and process all batches of products according to the execution order in the target processing plan.

14. An electronic device, characterized in that: include: At least one memory and at least one processor, the memory storing one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the semiconductor product processing method according to any one of claims 1 to 12.

15. A storage medium, characterized in that: The storage medium stores one or more computer instructions, and the one or more computer instructions are used to implement the semiconductor product processing method according to any one of claims 1 to 12.

16. A computer program product, characterized in that The method comprises computer instructions, which are used to implement the semiconductor product processing method according to any one of claims 1 to 12 when executed by a processor.

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