Semiconductor device

Abstract

Provided is a semiconductor device that effectively cools a portion that generates heat locally. The semiconductor device includes a heat dissipation substrate and a plurality of heat dissipation fins. The heat dissipation substrate dissipates heat generated by the semiconductor element. The plurality of heat dissipation fins are bonded to the lower surface of the heat dissipation base material, and the plurality of heat dissipation fins are arranged in parallel with each other. The semiconductor element is held on the upper surface of the heat dissipation substrate. Each of the plurality of heat dissipation fins includes a plurality of peaks formed by repeatedly bending a strip-shaped plate material extending in one direction. The cross-sectional shape of each of the plurality of heat dissipation fins is distorted due to the left-right asymmetrical shape of each of the plurality of peaks. The plurality of peaks have sparse regions in which the spacing between each other is sparse in the extending direction of each of the plurality of heat dissipation fins, and dense regions in which the spacing between each other is denser than the spacing between each other in the extending direction of each of the plurality of heat dissipation fins.

Description

Technical Field

[0001] The present invention relates to semiconductor devices. Background Art

[0002] A semiconductor device having a heat dissipation fin for dissipating heat generated by a semiconductor element has been proposed. For example, Patent Document 1 discloses a cooling system for electronic components in which a heat dissipation element is provided on one side of a heat exchanger plate. A plurality of rings are formed on the heat dissipation element, and the plurality of rings have a regular pattern.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2016-82237

[0004] When the heat dissipation fins have a regular shape, the heat dissipation fins work to uniformly cool the surface of the heat dissipation substrate. Such heat dissipation fins cannot effectively cool the parts with high local heat generation in the semiconductor device such as semiconductor elements, wire bonding parts, and terminal parts. Summary of the invention

[0005] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a semiconductor device that can effectively cool a portion that generates local heat.

[0006] The semiconductor device of the present invention comprises a heat dissipation substrate and a plurality of heat dissipation fins. The heat dissipation substrate dissipates heat generated by a semiconductor element. A plurality of heat dissipation fins are bonded to the lower surface of the heat dissipation substrate, and the plurality of heat dissipation fins are arranged in parallel with each other. The semiconductor element is held on the upper surface of the heat dissipation substrate. Each of the plurality of heat dissipation fins comprises a plurality of peaks formed by repeatedly bending a strip-shaped plate extending in one direction. The cross-sectional shape of each of the plurality of heat dissipation fins is distorted because each of the plurality of peaks has a left-right asymmetric shape. The plurality of peaks have a sparse region in which the spacing between each other is sparse in the extension direction of each of the plurality of heat dissipation fins, and a dense region in which the spacing between each other is denser than the sparse region in the extension direction.

[0007] Effects of the Invention

[0008] According to the present invention, a semiconductor device is provided which can effectively cool a portion where local heat is generated.

[0009] The objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a plan view showing the structure of the semiconductor device in the first embodiment.

[0011] Figure 2 It is a bottom view showing the structure of a semiconductor device.

[0012] Figure 3 is a cross-sectional view showing the structure of a semiconductor device.

[0013] Figure 4 is a cross-sectional view showing the structure of a semiconductor device.

[0014] Figure 5 is a cross-sectional view showing the structure of a semiconductor device.

[0015] Figure 6 This is a diagram showing the temperature distribution inside the semiconductor device in the first embodiment.

[0016] Figure 7 It is a diagram showing the temperature distribution inside the semiconductor device in the comparative example.

[0017] Figure 8 This is a cross-sectional view showing the structure of a semiconductor device in Modification 1 of Embodiment 1.

[0018] Fig. 9 It is a cross-sectional view showing the structure of a semiconductor device in a second variation of the first embodiment.

[0019] Fig.10 It is a cross-sectional view showing the structure of a semiconductor device in the second embodiment.

[0020] Fig.11 It is a cross-sectional view showing the structure of a semiconductor device in the second embodiment.

[0021] Fig.12 It is a bottom view showing the structure of the semiconductor device in the third embodiment.

[0022] Fig.13 It is a cross-sectional view showing the structure of a semiconductor device in a fourth embodiment.

[0023] Fig.14 It is a cross-sectional view showing the structure of a semiconductor device in a fifth embodiment.

[0024] Fig.15 It is a diagram showing the angle between the lower surface of the heat dissipation substrate and the peak of the heat dissipation fin. DETAILED DESCRIPTION

[0025] <Implementation Method 1>

[0026] Figure 1 It is a plan view showing the structure of the semiconductor device 101 in the first embodiment. Figure 2 It is a bottom view showing the structure of the semiconductor device 101 . Figures 3 to 5 is a cross-sectional view showing the structure of the semiconductor device 101 . Figure 3 Shown along Figure 2The structure of the cross section of line segment AA is shown. Figure 4 Shows Figure 3 The structure of region C is shown. Figure 5 Shown along Figure 2 The structure of the cross section of line segment BB is shown.

[0027] The semiconductor device 101 includes a heat dissipation substrate 10 , an insulating layer 20 , a circuit pattern 30 , a semiconductor element 40 , a housing 50 , a terminal 60 , a sealing material 70 , a plurality of heat dissipation fins 80 , and a cooling liquid flow path 90 .

[0028] The heat dissipation substrate 10 is, for example, a plate formed of a metal such as copper or aluminum, or a plate formed of an AlSiC composite material. The heat dissipation substrate 10 is also called a heat dissipation plate or a base plate. The heat dissipation substrate 10 has a function of conducting heat generated by electronic components such as the semiconductor element 40 to the outside, that is, a heat dissipation function.

[0029] The insulating layer 20 is provided on the upper surface of the heat dissipation substrate 10. The insulating layer 20 is formed of, for example, resin.

[0030] The circuit pattern 30 is provided on the upper surface of the heat dissipation substrate 10 via the insulating layer 20. The circuit pattern 30 is formed of a conductive material such as metal.

[0031] The semiconductor element 40 is arranged on the circuit pattern 30 via the bonding material 31. That is, the semiconductor element 40 is maintained on the upper surface of the heat dissipation substrate 10. The bonding material 31 is a conductive material such as solder. The semiconductor element 40 is formed of a semiconductor such as Si. The semiconductor is preferably a so-called wide bandgap semiconductor such as SiC, GaN, Ga2O3, GeO2, diamond, etc. The semiconductor element 40 is a power semiconductor element, a control IC (Integrated Circuit) for controlling the power semiconductor element, etc. The semiconductor element 40 includes, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a Schottky barrier diode, etc. Alternatively, the semiconductor element 40 may also include an RC-IGBT (Reverse-Conducting IGBT) in which an IGBT and a freewheeling diode are formed in one semiconductor substrate.

[0032] The housing 50 has a rectangular frame when viewed from above. The housing 50 accommodates the heat dissipation substrate 10, the insulating layer 20, the circuit pattern 30, and the semiconductor element 40 inside its frame. The housing 50 is configured to surround the outer periphery of the heat dissipation substrate 10 and is bonded to the heat dissipation substrate 10. The housing 50 is formed of, for example, resin.

[0033] The terminal 60 is held in the housing 50. For example, the plurality of terminals 60 are provided on four sides constituting the frame of the housing 50. Figure 3 as well as Figure 5 As shown, the terminal 60 is provided at both ends of the housing 50. The terminal 60 is a conductor configured to be connected to an external circuit provided outside the semiconductor device 101. The terminal 60 is, for example, a metal frame formed by processing a flat plate made of a metal such as copper into a predetermined shape. The terminal 60 is fixed to the housing 50 by embedding a portion of the terminal 60 into the interior of the housing 50. The terminal 60 is electrically connected to the semiconductor element 40. A metal wire 61 is bonded to one end of the terminal 60. The metal wire 61 is bonded to the circuit pattern 30 or the semiconductor element 40. The terminal 60 includes a C electrode 60A, a P electrode 60B, and an N electrode 60C.

[0034] The encapsulating material 70 fills the space inside the housing 50. The encapsulating material 70 encapsulates the insulating layer 20, the circuit pattern 30, the semiconductor element 40, a part of the terminal 60, and the metal wire 61. The encapsulating material 70 is formed of an insulating and curable resin. For example, the encapsulating material 70 is a silicone resin, an epoxy resin, or the like.

[0035] The plurality of heat dissipation fins 80 are bonded to the lower surface of the heat dissipation substrate 10 and arranged in parallel with each other. The plurality of heat dissipation fins 80 in the first embodiment extend in the width direction of the housing 50. Each of the plurality of heat dissipation fins 80 includes a plurality of peaks 81 and a plurality of valleys formed by repeatedly bending a strip-shaped plate extending in its width direction, i.e., in one direction.

[0036] The heat dissipation fin 80 is bonded to the lower surface of the heat dissipation substrate 10 at a plurality of bonding portions 82. The plurality of bonding portions 82 are provided between a plurality of valleys, that is, a plurality of peaks 81. At least one of the plurality of bonding portions 82 is located directly below the semiconductor element 40. Alternatively, at least one of the plurality of bonding portions 82 is located directly below the bonding position between the circuit pattern 30 and the metal wire 61 bonded to the terminal 60. The metal wire 61 is wired downward from any one of the terminals 60 among the C electrode 60A, the P electrode 60B, and the N electrode 60C to the circuit pattern 30.

[0037] The plurality of peaks 81 have a sparse region where the intervals between them are sparse in the extending direction of the heat dissipation fin 80 and a dense region where the intervals between them are denser than the sparse region in the extending direction. Figure 3 as well as Figure 4In the figure, the sparse area is arranged on the left side, and the dense area is arranged on the right side. Although not shown in the figure, a plurality of sparse areas and a plurality of dense areas may be arranged in one heat sink 80. The sparse areas and the dense areas may be arranged irregularly in one heat sink 80, for example. Alternatively, the sparse areas and the dense areas may be arranged at predetermined positions so that the coolant described later flows intensively through the local heat generating parts inside the semiconductor device 101.

[0038] The cross-sectional shape of the heat dissipation fin 80 is distorted along one of the left and right directions because each of the plurality of peaks 81 has a left-right asymmetric shape. Figure 3 as well as Figure 4 As shown, in Embodiment 1, the plurality of peaks 81 provided on one heat dissipation fin 80 are distorted in the same direction, but may be distorted irregularly in directions different from each other.

[0039] like Figure 4 As shown, the joint positions (for example, the center position of the joint 82) of the first heat sink fin 80A and the second heat sink fin 80B in the extension direction with the lower surface of the heat sink substrate 10 are offset from each other. In other words, the position of the joint 82A of the first heat sink fin 80A in the extension direction is offset from the position of the joint 82B of the second heat sink fin 80B in the extension direction. In embodiment 1, the position of the joint 82 in the extension direction is different for each heat sink fin 80. The first heat sink fin 80A and the second heat sink fin 80B are any heat sink fins among the plurality of heat sink fins 80. For example, the first heat sink fin 80A is a heat sink fin in the first column, and the second heat sink fin 80B is a heat sink fin in the second column.

[0040] The cooling liquid flow path 90 is provided on the lower surface of the heat dissipation substrate 10 in a manner including a plurality of heat dissipation fins 80. The cooling liquid for cooling the heat dissipation fins 80 flows through the cooling liquid flow path 90. The cooling liquid in the first embodiment flows in a direction from the C electrode 60A toward the P electrode 60B or the N electrode 60C. The heat dissipation fins 80 extend in a direction intersecting with the direction in which the cooling liquid flows. For example, the cooling fins 80 extend in a direction orthogonal to the direction in which the cooling liquid flows.

[0041] When the joint portion 82 is located directly below the semiconductor element 40 and directly below the joint position between the metal wire 61 and the circuit pattern 30, the heat generated inside the semiconductor device 101 is efficiently transferred to the heat dissipation fins 80. The sparse areas and dense areas of the plurality of peaks 81 are arranged at predetermined positions corresponding to the local heat generating parts. Therefore, the coolant flows through the heat generating parts in a concentrated manner. As a result, the cooling effect is improved.

[0042] In addition, the cross-sectional shape of the heat dissipation fin 80 is distorted, and the joint position in the extension direction is different for each heat dissipation fin 80. Due to such a structure, the coolant generates slight turbulence. Due to this turbulence, the heat dissipation effect of the heat dissipation fin 80 is improved. Even if the joint positions of each heat dissipation fin 80 in the extension direction are the same, turbulence is generated due to the distortion of the cross-sectional shape of the heat dissipation fin 80. In order to generate greater turbulence, it is preferred that the joint position in the extension direction is different for each heat dissipation fin 80.

[0043] When the semiconductor device 101 is driven, current always flows through the C electrode 60A. Therefore, the heat generated at the bonding position of the metal wire 61 from the C electrode 60A to the circuit pattern 30 becomes large. The cooling liquid cooled by the chiller flows in from the C electrode 60A side, thereby effectively cooling the heat generated around the C electrode 60A.

[0044] In summary, the semiconductor device 101 in Embodiment 1 includes a heat dissipation substrate 10 and a plurality of heat dissipation fins 80. The heat dissipation substrate 10 dissipates heat generated by the semiconductor element 40. The plurality of heat dissipation fins 80 are bonded to the lower surface of the heat dissipation substrate 10 and are arranged in parallel with each other. The semiconductor element 40 is held on the upper surface of the heat dissipation substrate 10. Each of the plurality of heat dissipation fins 80 includes a plurality of peaks 81 formed by repeatedly bending a strip-shaped plate extending in one direction. The cross-sectional shape of each of the plurality of heat dissipation fins 80 is distorted because each of the plurality of peaks 81 has a left-right asymmetric shape. The plurality of peaks 81 have a sparse region in which the spacing between each other is sparse in the extension direction of each of the plurality of heat dissipation fins 80, and a dense region in which the spacing between each other is denser than the sparse region in the extension direction.

[0045] Figure 6 1 is a diagram showing the temperature distribution inside the semiconductor device 101 in the first embodiment. Figure 7 1 is a diagram showing the temperature distribution inside the semiconductor device in the comparative example. According to the semiconductor device 101, the portion generating local heat is effectively cooled. In other words, the local heat generation inside the semiconductor device 101 is suppressed. Such a structure realizes the miniaturization and high density of the semiconductor device 101.

[0046] When the semiconductor element 40 is formed of a wide bandgap semiconductor, the semiconductor element 40 can be miniaturized. Such a structure realizes further miniaturization and high density of the semiconductor device 101.

[0047] (Variation 1 of Implementation Example 1)

[0048] Figure 8 is a cross-sectional view showing the structure of a semiconductor device 101A in a first variation of the first embodiment. Figure 3 Similarly, Figure 8Shown along Figure 2 The structure of the cross section of line segment AA is shown.

[0049] The semiconductor device 101A includes an insulating substrate 25. The insulating substrate 25 is bonded to the upper surface of the heat dissipation base material 10 via a bonding material 32. The insulating substrate 25 includes an insulating layer 20, a surface circuit pattern 35, and a back circuit pattern 36. The insulating layer 20 is formed of, for example, ceramic. The surface circuit pattern 35 is provided on the upper surface of the insulating layer 20. The back circuit pattern 36 is provided on the lower surface of the insulating layer 20. The surface circuit pattern 35 corresponds to the circuit pattern 30 shown in Embodiment 1. Even with such a structure, the same effect as Embodiment 1 can be obtained.

[0050] (Variation 2 of Implementation Example 1)

[0051] Fig. 9 is a cross-sectional view showing the structure of a semiconductor device 101B in a second variation of the first embodiment. Figure 5 Similarly, Fig. 9 Shown along Figure 2 The structure of the cross section of line segment BB is shown.

[0052] The C electrode 60A and the P electrode 60B as the terminal 60 are bonded to the circuit pattern 30 not through the metal wire 61 but through the bonding material 33. These terminals 60 may be directly bonded to the circuit pattern 30. At least one of the plurality of bonding portions 82 of the heat sink 80 is located directly below the bonding position between the terminal 60 and the circuit pattern 30. Even with such a structure, the same effect as that of the first embodiment can be obtained.

[0053] <Implementation Method 2>

[0054] In the second embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted. Fig.10 as well as Fig.11 It is a cross-sectional view showing the structure of the semiconductor device 102 in the second embodiment. Fig.11 Shows Fig.10 The structure of region D is shown. Fig.11 Only the cross section of the second heat dissipation fin 80B among the plurality of heat dissipation fins 80 is shown.

[0055] Each of the plurality of peaks 81 of the heat sink 80 includes two or more narrowed portions 83. The surface area of ​​the heat sink 80 increases, thereby improving the cooling capacity of the heat sink 80. The semiconductor device 102 of the second embodiment is cooled more efficiently than the semiconductor device 101 of the first embodiment. With such a structure, the semiconductor device 102 can be miniaturized and made high-density.

[0056] <Implementation Method 3>

[0057] In Embodiment 3, the same reference numerals are used for the same components as those in Embodiment 1 or 2, and detailed description thereof will be omitted. Fig.12 It is a bottom view showing the structure of the semiconductor device 103 in the third embodiment.

[0058] The plurality of joints 82 that join the heat dissipation fins 80 and the heat dissipation substrate 10 between the peaks 81 are in a "ハ" shape (V-shape) when viewed from above. Since the flow of the coolant is complicated, greater turbulence is generated. As a result, the cooling effect is improved. Such a structure improves the cooling effect compared to the semiconductor device 101 of embodiment 1, for example, and further realizes the miniaturization and high density of the semiconductor device 103. The "ハ"-shaped joint 82 can be applied not only to the semiconductor device 101, but also to the semiconductor device 102.

[0059] <Implementation Method 4>

[0060] In Embodiment 4, the same reference numerals are used for the same components as those in Embodiments 1 to 3, and detailed description thereof will be omitted. Fig.13 It is a cross-sectional view showing the structure of the semiconductor device 104 in the fourth embodiment.

[0061] The lower surface of the heat dissipation substrate 10 is recessed compared to the back surface of the housing 50. The heat dissipation fins 80 are arranged in the valley, and the cooling liquid flow path 90 is formed. Such a structure has the same cooling effect as the semiconductor device 101 of the first embodiment, and further achieves miniaturization, lower height and higher density than the semiconductor device 101. In addition, this structure can be applied not only to the semiconductor device 101, but also to both the semiconductor device 102 and the semiconductor device 103.

[0062] <Implementation method 5>

[0063] In the fifth embodiment, the same components as those in any of the first to fourth embodiments are denoted by the same reference numerals, and detailed description thereof is omitted. Fig.14 It is a cross-sectional view showing the structure of a semiconductor device 105 in the fifth embodiment. Fig.15 1 is a diagram showing the angle between the lower surface of the heat dissipation substrate 10 and the peak portion 81 of the heat dissipation fin 80 . Fig.15 Only a cross section of the first heat dissipation fin 80A among the plurality of heat dissipation fins 80 is shown.

[0064] At least one of the two external angles 84 formed by the lower surface of the heat dissipation substrate 10 and a peak 81 has an angle greater than or equal to 90°. When the two external angles 84 are greater than or equal to 90° and the cross-sectional shape of the peak 81 is approximately triangular, the strength of the heat dissipation fin 80 against external forces is increased. In particular, the strength against external forces from the direction directly below the heat dissipation substrate 10 is increased. Compared with the semiconductor device 101 of embodiment 1, the flow rate of the coolant can be increased, thereby improving the cooling effect. Such a structure realizes miniaturization and high density of the semiconductor device 105. In addition, the structure of embodiment 3 or the structure of embodiment 4 can also be applied to the semiconductor device 105. In Fig.14 as well as Fig.15 An example in which two external angles 84 are greater than or equal to 90° is shown in FIG. 1 , but only one external angle 84 may be greater than or equal to 90°.

[0065] The present invention can freely combine the various embodiments, and can appropriately modify or omit the various embodiments.

[0066] The various aspects of the present invention are summarized and described below as an appendix.

[0067] (Appendix 1)

[0068] A semiconductor device comprising:

[0069] a heat dissipation substrate that dissipates heat generated by the semiconductor element; and

[0070] A plurality of heat dissipation fins are bonded to the lower surface of the heat dissipation substrate and arranged in parallel with each other.

[0071] The semiconductor element is held on the upper surface of the heat dissipation substrate.

[0072] Each of the plurality of heat dissipation fins comprises a plurality of peaks formed by repeatedly bending a strip-shaped plate extending in one direction,

[0073] The cross-sectional shape of each of the plurality of heat dissipation fins is distorted because each of the plurality of peaks has a left-right asymmetric shape.

[0074] The plurality of peaks include a sparse region where the intervals between them are sparse in the extending direction of each of the plurality of heat dissipation fins, and a dense region where the intervals between them are denser than the sparse region in the extending direction.

[0075] (Appendix 2)

[0076] A semiconductor device according to Appendix 1, wherein:

[0077] The first heat dissipation fin and the second heat dissipation fin among the plurality of heat dissipation fins are joined to the lower surface of the heat dissipation substrate at positions that are offset from each other in the extending direction.

[0078] (Appendix 3)

[0079] A semiconductor device according to Appendix 1 or Appendix 2, wherein:

[0080] The sparse regions and the dense regions of the plurality of peaks are irregularly arranged.

[0081] (Appendix 4)

[0082] A semiconductor device according to any one of Appendix 1 to Appendix 3, wherein:

[0083] The plurality of heat dissipation fins are each joined to the lower surface of the heat dissipation substrate at a plurality of joints disposed between the plurality of peaks.

[0084] At least one of the plurality of bonding portions is located directly below the semiconductor element.

[0085] (Appendix 5)

[0086] A semiconductor device according to any one of Appendix 1 to Appendix 4, wherein:

[0087] The semiconductor device has:

[0088] a circuit pattern disposed on the upper surface of the heat dissipation substrate via an insulating layer; and

[0089] a terminal held in a housing accommodating the semiconductor element and electrically connected to the semiconductor element,

[0090] The semiconductor element is disposed on the circuit pattern.

[0091] The plurality of heat dissipation fins are each joined to the lower surface of the heat dissipation substrate at a plurality of joints disposed between the plurality of peaks.

[0092] At least one of the plurality of bonding portions is located directly below a bonding position between the circuit pattern and a metal wire bonded to the terminal, or directly below a bonding position between the terminal and the circuit pattern.

[0093] (Appendix 6)

[0094] A semiconductor device according to any one of Appendix 1 to Appendix 5, wherein:

[0095] The semiconductor device further comprises a cooling liquid flow path, which is arranged on the lower surface of the heat dissipation substrate in a manner including the plurality of heat dissipation fins, and the cooling liquid for cooling the plurality of heat dissipation fins flows through the cooling liquid flow path.

[0096] The plurality of heat dissipation fins extend in a direction intersecting a direction in which the coolant in the coolant flow path flows.

[0097] (Appendix 7)

[0098] A semiconductor device according to Appendix 6, wherein:

[0099] The semiconductor device further comprises a terminal, which is held in a housing accommodating the semiconductor element and is electrically connected to the semiconductor element.

[0100] The cooling liquid flows in a direction from the C electrode toward the P electrode or the N electrode, and the C electrode, the P electrode, and the N electrode are respectively provided as the terminals.

[0101] (Appendix 8)

[0102] A semiconductor device according to any one of Appendix 1 to Appendix 7, wherein:

[0103] The heat dissipation substrate is bonded to a housing that houses the semiconductor element, and the heat dissipation substrate is encapsulated by an encapsulation material filled into the housing.

[0104] (Appendix 9)

[0105] A semiconductor device according to any one of Appendix 1 to Appendix 8, wherein:

[0106] Each of the plurality of peaks includes greater than or equal to 2 narrowing portions.

[0107] (Appendix 10)

[0108] A semiconductor device according to any one of Appendix 1 to Appendix 9, wherein:

[0109] The plurality of heat dissipation fins are each joined to the lower surface of the heat dissipation substrate at a plurality of joints disposed between the plurality of peaks.

[0110] The plurality of joining portions are in a “ハ” shape when viewed from above.

[0111] (Appendix 11)

[0112] A semiconductor device according to any one of Appendix 1 to Appendix 10, wherein:

[0113] A housing is also provided, the housing accommodating the semiconductor element and being arranged to surround the outer periphery of the heat dissipation substrate.

[0114] The lower surface of the heat dissipation substrate is recessed compared to the back surface of the housing.

[0115] (Appendix 12)

[0116] A semiconductor device according to any one of Appendix 1 to Appendix 11, wherein:

[0117] At least one of two external angles formed by the lower surface of the heat dissipation substrate and the plurality of peaks is greater than or equal to 90°.

[0118] (Appendix 13)

[0119] A semiconductor device according to any one of Appendix 1 to Appendix 12, wherein:

[0120] The semiconductor element is formed of a wide bandgap semiconductor.

[0121] Description of the label

[0122] 10 heat dissipation substrate, 20 insulating layer, 25 insulating substrate, 30 circuit pattern, 31 bonding material, 32 bonding material, 33 bonding material, 35 surface circuit pattern, 36 back circuit pattern, 40 semiconductor element, 50 housing, 60 terminal, 60A C electrode, 60BP electrode, 60C N electrode, 61 metal wire, 70 packaging material, 80 heat dissipation fin, 80A first heat dissipation fin, 80B second heat dissipation fin, 81 peak portion, 82 bonding portion, 82A bonding portion, 82B bonding portion, 83 narrowing portion, 84 outer corner, 90 cooling liquid flow path, 101 to 105 semiconductor device.

Claims

1. A semiconductor device comprising: a heat dissipation substrate that dissipates heat generated by the semiconductor element; and A plurality of heat dissipation fins are bonded to the lower surface of the heat dissipation substrate and arranged in parallel with each other. The semiconductor element is held on the upper surface of the heat dissipation substrate. Each of the plurality of heat dissipation fins comprises a plurality of peaks formed by repeatedly bending a strip-shaped plate extending in one direction, The cross-sectional shape of each of the plurality of heat dissipation fins is distorted because each of the plurality of peaks has a left-right asymmetric shape. The plurality of peaks include a sparse region where the intervals between them are sparse in the extending direction of each of the plurality of heat dissipation fins, and a dense region where the intervals between them are denser than the sparse region in the extending direction.

2. The semiconductor device according to claim 1, wherein The first heat dissipation fin and the second heat dissipation fin among the plurality of heat dissipation fins are joined to the lower surface of the heat dissipation substrate at positions that are offset from each other in the extending direction.

3. The semiconductor device according to claim 1 or 2, wherein: The sparse regions and the dense regions of the plurality of peaks are irregularly arranged.

4. The semiconductor device according to any one of claims 1 to 3, wherein: The plurality of heat dissipation fins are each joined to the lower surface of the heat dissipation substrate at a plurality of joints disposed between the plurality of peaks. At least one of the plurality of bonding portions is located directly below the semiconductor element.

5. The semiconductor device according to any one of claims 1 to 4, wherein: The semiconductor device has: a circuit pattern disposed on the upper surface of the heat dissipation substrate via an insulating layer; as well as a terminal held in a housing accommodating the semiconductor element and electrically connected to the semiconductor element, The semiconductor element is disposed on the circuit pattern. The plurality of heat dissipation fins are each joined to the lower surface of the heat dissipation substrate at a plurality of joints disposed between the plurality of peaks. At least one of the plurality of bonding portions is located directly below a bonding position between the circuit pattern and a metal wire bonded to the terminal, or directly below a bonding position between the terminal and the circuit pattern.

6. The semiconductor device according to any one of claims 1 to 5, wherein: The semiconductor device further comprises a cooling liquid flow path, which is arranged on the lower surface of the heat dissipation substrate in a manner including the plurality of heat dissipation fins, and the cooling liquid for cooling the plurality of heat dissipation fins flows through the cooling liquid flow path. The plurality of heat dissipation fins extend in a direction intersecting a direction in which the coolant in the coolant flow path flows.

7. The semiconductor device according to claim 6, wherein: The semiconductor device further comprises a terminal, which is held in a housing accommodating the semiconductor element and is electrically connected to the semiconductor element. The cooling liquid flows in a direction from the C electrode toward the P electrode or the N electrode, and the C electrode, the P electrode, and the N electrode are respectively provided as the terminals.

8. The semiconductor device according to any one of claims 1 to 7, wherein: The heat dissipation substrate is bonded to a housing that houses the semiconductor element, and the heat dissipation substrate is encapsulated by an encapsulation material filled into the housing.

9. The semiconductor device according to any one of claims 1 to 8, wherein: Each of the plurality of peaks includes greater than or equal to 2 narrowing portions.

10. The semiconductor device according to any one of claims 1 to 9, wherein: The plurality of heat dissipation fins are each joined to the lower surface of the heat dissipation substrate at a plurality of joints disposed between the plurality of peaks. The plurality of joining portions are in a "ハ" shape when viewed from above.

11. The semiconductor device according to any one of claims 1 to 10, wherein: A housing is also provided, the housing accommodating the semiconductor element and being arranged to surround the outer periphery of the heat dissipation substrate. The lower surface of the heat dissipation substrate is recessed compared to the back surface of the housing.

12. The semiconductor device according to any one of claims 1 to 11, wherein: At least one of two external angles formed by the lower surface of the heat dissipation substrate and the plurality of peaks is greater than or equal to 90°.

13. The semiconductor device according to any one of claims 1 to 12, wherein: The semiconductor element is formed of a wide bandgap semiconductor.

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