A circuit breaker topology suitable for suppressing dc faults and a control method thereof

Abstract

The application discloses a circuit breaker topology suitable for inhibiting DC faults and a control method thereof U The discharge branch, the voltage limiting branch composed of a first thyristor SCR1 and a second thyristor SCR2, and a current limiting branch; the current limiting branch comprises a current limiting reactor L lim and a resistor R lim ; the transfer branch is composed of a first semiconductor switch IGBT T unit in series and parallel connection, the energy absorption branch comprises a metal oxide varistor MOV, and the main branch circuit comprises an ultra-fast isolation switch UFD; the main branch circuit, the transfer branch, the energy absorption branch and the voltage limiting branch are connected in parallel, and are connected in series with the current limiting branch. The current limiting branch designed in the application can be started rapidly in the initial stage of the fault, and effectively reduces the overcurrent amplitude in the initial stage. Meanwhile, through the synergistic effect of the voltage limiting branch, the overvoltage problem in the fault isolation process is significantly reduced, the breaking capacity, safety, reliability, economy of the circuit breaker are improved, and a powerful guarantee is provided for the stable operation of the power grid.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power distribution system protection, and in particular to a circuit breaker topology suitable for suppressing DC faults and a control method thereof. BACKGROUND

[0002] With the increasing demand for renewable energy, DC power grids based on modular multi-level converters (MMC) have obvious advantages in reliable power supply and distributed energy access. However, when a DC short circuit fault occurs in the DC power grid, the fault current rises sharply, so the DC circuit breaker is required to quickly isolate the DC fault. The higher the DC voltage level and the larger the transmission capacity, the higher the isolation capacity required for the DC circuit breaker.

[0003] The widespread access of distributed energy systems (such as solar and wind energy) has made the operation of power systems more complex. The volatility and instability of these systems can cause abnormal current and voltage in the power grid. A large number of power electronic devices are used in AC / DC distribution systems, and these devices are very sensitive to overcurrent and overvoltage. Once a fault occurs, it may cause damage to the equipment and even paralysis of the system. At the same time, with the increase of DC voltage level and capacity, the peak current of DC circuit breaker also increases. Therefore, overcurrent and overvoltage protection functions are particularly important for reducing the voltage and current stress of DC circuit breaker. For this reason, those skilled in the art urgently need to develop a circuit breaker topology with DC fault suppression capability and a method of using it. To ensure that the distributed circuit breaker completes the DC breaking within milliseconds, further improve the economy, safety and reliability of the circuit breaker, and enhance the stability and efficiency of the power system operation. SUMMARY

[0004] This section is intended to summarize some aspects of the embodiments of the present application and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and the abstract and title of the specification to avoid obscuring the purpose of this section, abstract and title, and such simplifications or omissions cannot be used to limit the scope of the present application.

[0005] In view of the above existing problems, the present application is proposed.

[0006] Therefore, the present application provides a circuit breaker topology suitable for suppressing DC faults and a control method thereof to solve the problem of excessive current and voltage stress faced by existing DC circuit breakers when handling faults.

[0007] To solve the above technical problems, the present application provides the following technical solutions:

[0008] In a first aspect, embodiments of the present invention provide a circuit breaker topology suitable for suppressing DC faults, comprising: a pre-charge capacitor C U The discharge branch, the voltage limiting branch, and the voltage limiting branch consisting of the first thyristor SCR1 and the second thyristor SCR2; the current limiting branch includes the current limiting reactor L. lim and resistance R lim First semiconductor switch IGBT T The transfer branch is composed of series and parallel units, as well as the energy absorption branch including the metal oxide varistor MOV and the main branch including the ultra-fast disconnect switch UFD.

[0009] The main branch, transfer branch, energy absorption branch, and pressure limiting branch are connected in parallel and then connected in series with the current limiting branch.

[0010] As a preferred embodiment of the circuit breaker topology for suppressing DC faults described in this invention, wherein: the pre-charge capacitor C U The discharge branch is connected in series with resistor R. U Second semiconductor switch IGBT U With pre-charge capacitor C U The pre-charged capacitor C is connected in parallel. U Also with diode D U The voltage limiting branch is formed by connecting the two transistors in series. One side of the voltage limiting branch is connected in series with a first thyristor SCR1, and the other side is connected in series with a second thyristor SCR2.

[0011] As a preferred embodiment of the circuit breaker topology for suppressing DC faults described in this invention, the current-limiting branch further includes: a third semiconductor switch IGBT. Lim The third semiconductor switch IGBT Lim With series current-limiting reactor L lim and resistance R lim They are connected in parallel to form a current-limiting branch.

[0012] As a preferred embodiment of the circuit breaker topology for suppressing DC faults described in this invention, wherein: the first semiconductor switch IGBT of the transfer branch T Unit and Inductor L com and inductor C com The inductor C is connected in series. com It is connected in parallel to the series branch of the switch S and the DC power supply.

[0013] Secondly, the present invention provides a control method for a circuit breaker topology suitable for suppressing DC faults, comprising: when the DC system is operating normally, current flows through the main branch and the current-limiting branch;

[0014] When detecting that the DC system fails, the fault current growth is inhibited by the current limiting branch, and the fault current is commutated to the transfer branch, so that the voltage across the energy absorbing branch and the voltage limiting branch rises;

[0015] The voltage limiting branch absorbs the fault energy and provides the transient voltage required for the MOV to act, when the voltage of the MOV exceeds its rated threshold, the fault current is guided to the energy absorbing branch for energy consumption, and the fault isolation is completed.

[0016] As a preferred solution of the control method of the circuit breaker topology for suppressing DC faults, it further comprises: when the DC system is in normal operation, the current flows through the ultra-fast disconnector UFD of the main branch and the third semiconductor switch IGBT of the current limiting branch Lim ;

[0017] When detecting that the DC system fails, the third semiconductor switch IGBT Lim is in the off state, the current flows through the current limiting inductor L lim and the resistor R lim of the current limiting branch to inhibit the growth of the fault current.

[0018] As a preferred solution of the control method of the circuit breaker topology for suppressing DC faults, when detecting that the DC system fails, the fault current growth is inhibited by the current limiting branch, and the fault current is commutated to the transfer branch, which comprises: the ultra-fast disconnector UFD of the main branch performs opening operation to disconnect the fault current, so that the current flows through the transfer branch.

[0019] As a preferred solution of the control method of the circuit breaker topology for suppressing DC faults, the voltage limiting branch absorbs the fault energy and provides the transient voltage required for the MOV to act, which comprises: the thyristors on both sides of the voltage limiting branch receive a conduction signal, the pre-charging capacitor C U is charged to provide a starting voltage for the metal oxide varistor MOV, and the voltage rising rate is slowed down.

[0020] As a preferred solution of the control method of the circuit breaker topology for suppressing DC faults, when the voltage of the MOV exceeds its rated threshold, the fault current is guided to the energy absorbing branch for energy consumption, which comprises: when the voltage of the MOV exceeds its rated threshold, the internal resistance thereof decreases to allow a large amount of current to pass and convert the overvoltage energy into heat energy, the voltage rise is limited by the nonlinear characteristic, and the voltage is controlled within a safe threshold.

[0021] As a preferred solution of the control method of the circuit breaker topology for suppressing DC faults, when the energy consumption of the fault current is 0, the DC fault isolation is completed.

[0022] Compared with the prior art, the application has the advantages that: the application realizes fast and effective DC fault isolation and energy consumption by designing a topology in which multiple branches work cooperatively, thereby improving the breaking capacity, safety and economy of the circuit breaker; the application effectively reduces the voltage and current stress during breaking of the DC fault current and the difficulty of isolating the DC fault while improving the DC circuit breaker and using the current-limiting and voltage-limiting branches, thereby significantly improving the operation efficiency and reliability of the circuit breaker and providing technical support for a more miniaturized, efficient and economical circuit breaker. BRIEF DESCRIPTION OF DRAWINGS

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiments description. Obviously, the drawings in the following description only some of the embodiments of the application, and for those skilled in the art, other drawings can be obtained without creative labor based on these drawings. Among them:

[0024] Figure 1 A circuit breaker topology diagram of a circuit breaker topology and control method suitable for suppressing DC faults according to an embodiment of the application;

[0025] Figure 2 A low-voltage DC power distribution network topology diagram of a circuit breaker topology and control method suitable for suppressing DC faults according to an embodiment of the application;

[0026] Figure 3 A voltage and current waveform diagram in the breaking process of a DC circuit breaker of a circuit breaker topology and control method suitable for suppressing DC faults according to an embodiment of the application. DETAILED DESCRIPTION

[0027] In order to make the above-mentioned purposes, features and advantages of the application more apparent and easy to understand, the specific embodiments of the application will be described in detail below with reference to the drawings of the specification. Obviously, the described embodiments are only some of the embodiments of the application, not all the embodiments. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative labor should be within the scope of protection of the application.

[0028] In the following description, many specific details are set forth in order to provide a thorough understanding of the application, but the application can also be implemented in other ways different from those described herein, and those skilled in the art can make similar generalizations without departing from the scope of the application. Therefore, the application is not limited to the specific embodiments disclosed below.

[0029] Secondly, the "one embodiment" or "embodiment" referred to herein is intended to represent a specific feature, structure, characteristic, or combination of features and characteristics described herein that can be included in at least one implementation of the present application. The appearance of the phrase "in one embodiment" in various places in the specification is not necessarily referring to the same embodiment, nor is it exclusive of other embodiments or options in connection with the features and implementations described herein.

[0030] The application is described in detail in conjunction with the schematic drawings, and in the detailed description of the embodiments of the application, the sectional view of the device structure is partially enlarged without the general proportion for the convenience of illustration, and the schematic drawings are only examples which should not limit the scope of protection of the application herein. In addition, the three-dimensional spatial dimensions of length, width and depth should be included in actual production.

[0031] Meanwhile, in the description of the application, it should be noted that the orientation or position relationship indicated by the terms "up, down, inside and outside" is based on the orientation or position relationship shown in the drawings, and is only for the convenience of describing the application and simplifying the description, and does not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the application. In addition, the terms "first, second or third" are only for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0032] Unless otherwise expressly specified and limited, the terms "mounting, connecting, connection" in the application should be understood broadly, for example: it can be fixed connection, detachable connection or integral connection; it can also be mechanical connection, electrical connection or direct connection, it can also be indirectly connected through an intermediate medium, or it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the application can be understood according to the specific circumstances.

[0033] Embodiment 1

[0034] Reference Figure 1 For one embodiment of the application, the embodiment provides a circuit breaker topology suitable for suppressing DC faults, comprising:

[0035] Pre-charge capacitor C U The discharge branch, the voltage limiting branch composed of the first thyristor SCR1 and the second thyristor SCR2, and the current limiting branch including the current limiting reactor L lim And the resistance R lim The first semiconductor switch IGBT T The transfer branch composed of the unit in series and parallel, the energy absorption branch including the metal oxide varistor MOV, and the main branch including the ultra-fast isolation switch UFD;

[0036] The main branch, the transfer branch, the energy absorption branch and the voltage limiting branch are connected in parallel with each other and in series with the current limiting branch.

[0037] It should be noted that with the increase in DC voltage levels and transmission power, flexible DC power grids place increasingly higher demands on the breaking capacity of DC switchgear, while also bringing a high cost burden. To address the problem of excessive voltage and current stress during fault interruption in existing DC circuit breakers, this application designs a current-limiting and voltage-limiting branch topology with DC fault suppression capabilities, based on a mechanical DC circuit breaker, and provides corresponding usage methods. This current-limiting branch can quickly activate in the early stages of a fault, effectively reducing the overcurrent amplitude in the initial phase. Simultaneously, through synergy with the voltage-limiting branch, it significantly mitigates overvoltage problems during fault isolation. These improvements greatly enhance the breaking capacity, safety, reliability, and economy of the circuit breaker, providing strong support for the stable operation of the power grid.

[0038] In this embodiment of the application, the pre-charge capacitor C U The discharge branch is connected in series with resistor R. U Second semiconductor switch IGBT U With pre-charge capacitor C U Parallel connection is performed, pre-charge capacitor C U Also with diode D U The voltage limiting branch is formed by connecting the first thyristor SCR1 in series on one side and the second thyristor SCR2 in series on the other side.

[0039] In this embodiment, the current-limiting branch further includes: a third semiconductor switch IGBT. Lim Third semiconductor switch IGBT Lim With series current-limiting reactor L lim and resistance R lim They are connected in parallel to form a current-limiting branch.

[0040] It should be noted that when a fault overcurrent is detected, the third semiconductor switch IGBT... Lim Bypassing, allowing fault current to flow through current-limiting inductor L lim With resistance R lim This limits the rate of rise and peak value of the fault current.

[0041] In this embodiment of the application, the first semiconductor switch IGBT of the transfer branch T Unit and Inductor L com and inductor C com Inductor C is connected in series. com It is connected in parallel to the series branch of the switch S and the DC power supply.

[0042] On the control method, the application realizes effective suppression of overcurrent and overvoltage in the fault isolation process through the innovative design of the multi-branch collaborative topology, including the main branch, the transfer branch, the energy absorption branch, the current limiting branch and the voltage limiting branch; through the dynamic response and collaborative control of the current limiting and voltage limiting branches, the rapid isolation and energy consumption of the DC fault are realized, the operation efficiency and reliability of the circuit breaker are significantly improved, and technical support is provided for the realization of small size and high efficiency and economical circuit breaker.

[0043] In the embodiment of the application, when the DC system is normally operated, the current flows through the main branch and the current limiting branch;

[0044] When it is detected that the DC system has a fault, the growth of the fault current is suppressed through the current limiting branch, and the fault current is commutated to the transfer branch, so that the voltage across the energy absorption branch and the voltage limiting branch rises.

[0045] The voltage limiting branch absorbs the fault energy and provides the transient voltage required for the MOV action, when the voltage of the MOV exceeds the rated threshold value, the fault current is guided to the energy absorption branch for energy consumption, and the fault isolation is completed.

[0046] It should be noted that the voltage across the energy absorption branch and the voltage limiting branch rises, the pre-charge capacitor C U is charged, and has a specific limiting effect on the overvoltage generated during the transfer branch shutdown. In addition, the voltage limiting branch can absorb short-circuit fault energy, while providing the transient voltage required for the MOV action, at this stage, if the voltage is within the normal working range of the MOV, the MOV behaves as a high impedance state, and the influence on the circuit can be ignored.

[0047] In the embodiment of the application, it also includes: when the DC system is normally operated, the current flows through the ultra-fast isolation switch UFD of the main branch and the third semiconductor switch IGBT Lim of the current limiting branch.

[0048] When it is detected that the DC system has a fault, the third semiconductor switch IGBT Lim is in an off state, the current flows through the current limiting inductor L lim and the resistor R lim of the current limiting branch to suppress the growth of the fault current.

[0049] In the embodiment of the application, when it is detected that the DC system has a fault, the growth of the fault current is suppressed through the current limiting branch, and the fault current is commutated to the transfer branch, including: the ultra-fast isolation switch UFD of the main branch performs a tripping operation for disconnecting the fault current, so that the current flows through the transfer branch.

[0050] In the embodiment of the present application, the voltage limiting branch absorbs fault energy, and the transient voltage required for the MOV to act includes: the thyristors on both sides of the voltage limiting branch receive a gate signal, a pre-charge capacitor C U is charged, providing a starting voltage for the metal oxide varistor MOV, and slowing down the voltage rise rate.

[0051] In the embodiment of the present application, when the voltage of the MOV exceeds its rated threshold, the fault current is guided to the energy absorbing branch for energy consumption, including: when the voltage of the MOV exceeds its rated threshold, its internal resistance decreases, allowing a large amount of current to pass and converting overvoltage energy into heat energy, limiting the voltage rise through the nonlinear characteristic, controlling the voltage within a safe threshold, and protecting the circuit and electrical equipment from damage.

[0052] In the embodiment of the present application, when the energy consumption of the fault current is 0, the DC fault isolation is completed.

[0053] It should be noted that, on the basis of the mechanical DC circuit breaker, the present application designs a current limiting and voltage limiting branch topology with overcurrent and overvoltage suppression capability and provides a corresponding use method. The current limiting branch can quickly start at the initial stage of the fault and effectively reduce the overcurrent amplitude at the initial stage. At the same time, through the synergistic effect with the voltage limiting branch, the overvoltage problem in the fault isolation process is significantly alleviated. These improvements greatly improve the breaking capacity, safety, reliability, and economy of the circuit breaker, providing a strong guarantee for the stable operation of the power grid.

[0054] Embodiment 2

[0055] Reference Figure 2 For an embodiment of the present application, which is different from the first embodiment, a low-voltage DC power distribution network topology is provided in a control method of a circuit breaker topology suitable for suppressing DC faults, comprising:

[0056] By innovatively designing a multi-branch synergistic topology structure, including a main branch, a transfer branch, an energy absorbing branch, a current limiting branch, and a voltage limiting branch, effective suppression of overcurrent and overvoltage during fault isolation is achieved; through the dynamic response and synergistic control of the current limiting and voltage limiting branches, rapid isolation and energy consumption of DC faults are achieved, significantly improving the operating efficiency and reliability of the circuit breaker, and providing technical support for the realization of small-sized and efficient and economical circuit breakers.

[0057] Short-circuit faults of DC lines have a significant impact on system safety, especially bipolar short-circuit faults and single-pole ground faults. This embodiment takes the low-voltage side fault of a DC power distribution network as an example, and the power distribution network topology is as shown in Figure 2 The circuit breaker with DC fault suppression capability provided by the present application is installed between the low-voltage feeder and the DC converter to protect the DC system and its cable feeder.

[0058] Assuming that at t0, a bipolar short circuit fault occurs between the cables on the DC converter side, after the protection device identifies the bipolar short circuit fault, the circuit breaker with DC fault suppression capability proposed in the application is triggered, and the fault current passes through the main branch, the conversion branch, the current limiting branch, the voltage limiting branch and the energy absorbing branch, realizing reliable and rapid isolation of the fault.

[0059] Embodiment 3

[0060] Reference Figure 3 For an embodiment of the application, which is different from the first embodiment, a voltage and current waveform in the process of breaking of a DC circuit breaker in a control method of a circuit breaker topology suitable for suppressing DC faults is provided, comprising:

[0061] The DC fault isolation method successfully realizes microsecond-level fault commutation and energy consumption through the dynamic response of the current limiting branch and the bidirectional current blocking capability of the transfer branch, as well as the cooperative control of the energy absorbing branch and the voltage limiting branch, reducing the isolation difficulty.

[0062] Assuming that a short circuit fault occurs in the DC line at time t0.i main is the main branch current; i trans is the transfer branch current; i C is the voltage limiting branch current; i mov is the fault energy consumption branch current; I dc_0 is the DC steady-state value; U dc is the rectifier side DC voltage steady-state value; I main_max is the main branch current peak value; I trans_max is the transfer branch current peak value; U max is the transfer branch peak voltage; U main_on is the main branch turn-on voltage; U trans_on is the transfer branch turn-on voltage; i dc is the total current flowing into the circuit breaker.

[0063] The DC fault isolation process is as follows:

[0064] (a) At time t0: a DC short circuit fault occurs, i dc (t0) = I dc_0 .

[0065] (b) t0-t1: fault detection and identification by the protection device. During this period, the current i dc rises rapidly, i dc = i main .

[0066] (c) t1-t2: stage of fault current conversion to the transfer branch. At time t1, fault identification is completed, the current limiting inductance Llim With the resistance R lim Access circuit, the time period from t1 to t2, the current i dc = i main + i trans , and i main Rapidly falls, while i trans Rapidly rises. The current i main At time t2 falls to zero, the completion time of commutation is microseconds, which can be basically ignored.

[0067] (d) t2-t3: UFD opening process. At time t2, the fault current is completely commutated to the transfer branch. At this time, the UFD receives a tripping command, and the UFD starts arc extinguishing action. At time t3, the UFD completes the tripping action, and i dc At time t3 reaches the peak I trans_max . During the period from t2 to t3, i dc = i trans , i trans Slowly rises due to the current limiting effect of the current limiting branch.

[0068] (e) t3-t4: stage of fault current commutation to voltage limiting branch. At time t3, the IGBT T In the transfer branch receives a turn-off signal, and the thyristor SCR1-SCR2 in the voltage limiting branch receives a turn-on signal. At time t4, the voltage of the capacitor C rises to the MOV starting voltage. During the period from t3 to t4, the current i dc = i trans + i C , the capacitor C is charged, i trans Rapidly falls, while i C Rapidly rises.

[0069] (f) t4-t5: rising stage of current flowing through the energy absorption branch MOV. From t4 to t5, the arrester group MOV gradually changes from high resistance to low resistance, and the current i dc = i C + i mov . i C Rapidly falls, while i mov Rapidly rises, at time t5, i C Falls to zero, i mov Reaches the peak.

[0070] (g) t5-t6: stage of energy absorption branch MOV consuming fault energy. At time t5, the fault current is completely commutated to the energy absorption branch. After the current i C Falls to zero, the thyristor SCR1-SCR2 is turned off by the reverse voltage. During the period from t5 to t6, the fault current rapidly decays to zero, and i dc = imov DC fault isolation is successful, IGBT U is closed. Capacitor C U is discharged quickly, capacitor C U during fault isolation. The discharge process does not affect the result of DC fault isolation.

[0071] As can be seen from the above, in the fault isolation stage, the overvoltage and overcurrent can be effectively suppressed. The circuit breaker reduces the problem of excessive voltage and current stress while ensuring breaking capacity, and provides strong support for the economic design of the circuit breaker. The improved DC circuit breaker simultaneously uses the current limiting branch and the voltage limiting branch, effectively reduces the voltage and current stress during the breaking of the DC fault current, reduces the difficulty of isolating the DC fault, and provides the possibility for a more miniaturized, efficient and economic circuit breaker.

[0072] It should be noted that the above examples are only used to illustrate the technical solutions of the present application and are not limiting. Although the present application has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solutions of the present application can be modified or replaced by equivalents without departing from the spirit and scope of the present application, and they should be covered in the scope of the claims of the present application.

Claims

1. A circuit breaker topology suitable for suppressing DC faults, characterized in that, include: Pre-charge capacitor C U The discharge branch, the voltage limiting branch, and the voltage limiting branch consisting of the first thyristor SCR1 and the second thyristor SCR2; the current limiting branch includes the current limiting reactor L. lim and resistance R lim First semiconductor switch IGBT T The system includes a transfer branch composed of series and parallel units, an energy absorption branch including a metal oxide varistor (MOV), and a main branch including an ultra-fast disconnector (UFD). The main branch, transfer branch, energy absorption branch, and voltage limiting branch are connected in parallel to each other and then connected in series with the current limiting branch. The pre-charged capacitor C U The discharge branch is connected in series with resistor R. U Second semiconductor switch IGBT U With pre-charge capacitor C U The pre-charged capacitor C is connected in parallel. U Also with diode D U The voltage limiting branch is formed by connecting the two transistors in series. One side of the voltage limiting branch is connected in series with a first thyristor SCR1, and the other side is connected in series with a second thyristor SCR2.

2. The circuit breaker topology for suppressing DC faults as described in claim 1, characterized in that, The current-limiting branch also includes: the third semiconductor switch IGBT. Lim The third semiconductor switch IGBT Lim With series current-limiting reactor L lim and resistance R lim They are connected in parallel to form a current-limiting branch.

3. The circuit breaker topology for suppressing DC faults as described in claim 2, characterized in that, The first semiconductor switch IGBT in the transfer branch T Unit and Inductor L com and inductor C com The inductor C is connected in series. com It is connected in parallel to the series branch of the switch S and the DC power supply.

4. A control method for a circuit breaker topology suitable for suppressing DC faults, applied to the circuit breaker topology for suppressing DC faults as described in claim 1, characterized in that, include: When the DC system is operating normally, the current flows through the main branch and the current-limiting branch; When a fault is detected in the DC system, the fault current is suppressed by the current limiting branch and the fault current is diverted to the transfer branch, which causes the voltage across the energy absorption branch and the voltage limiting branch to rise. The voltage limiting branch absorbs fault energy and provides the transient voltage required for MOV operation. When the MOV voltage exceeds its rated threshold, the fault current is guided to the energy-absorbing branch for energy consumption, thus completing fault isolation.

5. The control method for circuit breaker topologies suitable for suppressing DC faults as described in claim 4, characterized in that, Also includes: When the DC system is operating normally, current flows through the ultra-fast isolation switch UFD in the main branch and the third semiconductor switch IGBT in the current-limiting branch. Lim ; When a fault is detected in the DC system, the third semiconductor switch IGBT Lim When in the off state, current flows through the current-limiting inductor L in the current-limiting branch. lim With resistance R lim This is to suppress the growth of fault current.

6. The control method for circuit breaker topologies suitable for suppressing DC faults as described in claim 5, characterized in that, When a fault is detected in the DC system, the fault current is suppressed by the current limiting branch and the fault current is diverted to the transfer branch. This includes the ultra-fast disconnecting switch (UFD) of the main branch performing a tripping operation to disconnect the fault current and allow the current to flow through the transfer branch.

7. The control method for circuit breaker topologies suitable for suppressing DC faults as described in claim 6, characterized in that, The voltage limiting branch absorbs fault energy and provides the transient voltage required for MOV operation, including: thyristors on both sides of the voltage limiting branch receiving the turn-on signal, and a pre-charge capacitor C. U Charging provides the startup voltage for the metal oxide varistor (MOV) and slows down the voltage rise rate.

8. The control method for a circuit breaker topology suitable for suppressing DC faults as described in claim 7, characterized in that, When the voltage of the MOV exceeds its rated threshold, the fault current is directed to the energy absorption branch for energy consumption. This includes: when the voltage of the MOV exceeds its rated threshold, its internal resistance decreases, allowing a large current to pass through and converting the overvoltage energy into heat energy, limiting the voltage rise through nonlinear characteristics, and controlling the voltage within the safe threshold.

9. The control method for a circuit breaker topology suitable for suppressing DC faults as described in claim 8, characterized in that, include: DC fault isolation is completed when the energy consumption of the fault current is 0.

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