Driving device and method for diode clamping type three-level bridge arm

Abstract

The invention discloses a driving device and method for a diode clamping type three-level bridge arm, and the device comprises a signal processing module which carries out the distinguishing processing of an input signal from a system controller or a bottom driver, and generates a corresponding output driving signal; the state judgment module is used for detecting the current state according to the input signal, the current output driving signal and a built-in counter and selecting a driving signal output strategy to be adopted; the output selection module outputs a corresponding driving signal according to a selected driving signal output strategy to be adopted, the signal processing module generates a turn-off driving signal when receiving a stop signal from a system controller or a fault signal from a bottom driver, and the signal processing module generates a turn-off driving signal when receiving an input driving signal from the system controller. And carrying out overall digital filtering processing. According to the invention, the phenomenon that input signals in the diode clamping type three-level bridge arm may be negatively influenced is eliminated, so that output signals meet requirements, and normal work of power devices is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronic equipment, and in particular to a driving device and method for a diode clamped three-level bridge arm. Background Art

[0002] Compared with the two-level topology, the three-level topology has better harmonic performance at the same device switching frequency, which is more friendly to the power grid and can save additional power grid filtering equipment or filtering devices. The three-level converter is an advanced power electronic conversion device. Compared with the traditional two-level converter, it can provide three voltage levels at the output end, namely positive, zero and negative levels. This design can significantly reduce the harmonic content of the output voltage, improve the efficiency of the system, and reduce the impact on the power system. Three-level converters are widely used in high-voltage and high-power occasions, such as wind power converters, electric vehicle charging stations and other fields.

[0003] However, the three-level topology has four independent power devices on a single bridge arm. This multi-degree-of-freedom system is prone to interference or logic errors, which may cause the system to malfunction, malfunction or even be damaged. Therefore, the three-level bridge arm has strict requirements on the drive signal it receives.

[0004] Figure 5 Schematic diagram of the structure of a diode clamped three-level bridge arm in the prior art. Figure 5 As shown, the input control signal of the three-level bridge arm is generated by the system controller according to the system voltage and current, and after being processed by the bridge arm logic unit, the driving signal is output to the bottom layer driver, which controls the power device.

[0005] Specifically, the bridge arm of the diode-clamped three-level converter consists of four IGBTs, two diodes and capacitors. The drain of the first IGBT, Q1, is connected to the positive DC bus, the source of the first IGBT, Q1, is connected to the drain of the second IGBT, Q2, and the anode of the first diode, D5, the source of the second IGBT, Q2, is connected to the drain of the third IGBT, Q3, as an AC output point, the source of the third IGBT, Q3, is connected to the cathode of the second diode, D6, and the drain of the fourth IGBT, Q4, the source of the fourth IGBT, Q4, is connected to the negative DC bus, the cathode of the first diode, D5, is connected to the anode of the second diode, D6, and the midpoint of the DC bus. A group of capacitors C1 is set between the positive DC bus and the midpoint of the DC bus, and a group of capacitors C2 is set between the midpoint of the DC bus and the negative DC bus.

[0006] During operation, the bottom-level drivers z1~z4 output drive signals to the four IGBTs respectively, so that the potential of the bridge arm AC output point is equal to the potential of the positive DC bus, the negative DC bus or the DC bus midpoint. The drive signal is described in the order of the first IGBT, the second IGBT, the third IGBT, and the fourth IGBT. If 1 is used to indicate that the drive signal is high level and 0 is used to indicate that the drive signal is low level, the output drive signal has the following working states: at 1100, the AC output point potential is the positive DC bus potential; at 0110, the AC output point potential is the DC bus midpoint potential; at 0011, the AC output point potential is the negative DC bus potential. Because there is a certain time delay from the IGBT receiving the shutdown drive signal to the actual shutdown, the above three drive signals need an intermediate state drive signal when switching between each other, which is generally called a dead zone. There are two dead zone states: 0100 is the intermediate state between 1100 and 0110; 0010 is the intermediate state between 0110 and 0011. Some system controllers do not send out dead zone signals. In addition, the starting working state or the ending working state of the three-level bridge arm, the driving signal is 0000. The bridge arm logic unit will receive an error signal from the underlying driver z1~z4 and a stop signal from the system controller. At this time, it is necessary to enter the stop process and finally realize the driving signal is 0000.

[0007] Except for the above working conditions, other forms of drive signals are all error signals. For example, if the drive signal is 1000, if the IGBT bottom driver z1~z4 is executed according to this, the first or second IGBT will be over-voltage and broken down; if the drive signal is 1110, if the IGBT bottom driver z1~z4 is executed according to this, the fourth IGBT will be over-voltage and broken down; if the drive signal is 1111, if the IGBT bottom driver z1~z4 is executed according to this, a certain IGBT will be over-current and burnt out. This also requires that the drive signals of the first and fourth IGBTs must be 0 first during fault protection, and then the drive signals of the second and third IGBTs must be 0. When the IGBT is turned on, some initial conditions will be accompanied by the reverse recovery process of the adjacent diode. If the IGBT is turned on for a very short time, it will cause the IGBT to turn off the sum of the reverse recovery current and the AC output current. At this time, the turn-off overvoltage will appear and damage the IGBT. The time when the reverse recovery current disappears depends on the characteristics of the IGBT anti-parallel diode. Generally, the drive signal must be maintained for at least a certain time, which is called narrow pulse suppression. In diode-clamped three-level converters, especially those with power greater than 100kW, there are usually long signal cables between the system controller and the power unit. Due to the consistency of the devices and the different line lengths between the devices, the driver devices in the controller and the receiver devices in the power unit will receive the wrong signal; since the long signal cable is generally capacitive, the slope of the signal edge becomes lower, resulting in the signal received by the signal receiving device being an erroneous signal; due to the high-energy switching action of the power unit, interference is easily coupled into the drive signal, which will cause the receiving device to receive an erroneous signal.

[0008] Therefore, the power unit driving part that receives the control signal needs to have the following functions: be able to be compatible with control signals with and without dead zones at the input end; be able to judge and shield erroneous signals caused by interference and device differences; be able to achieve narrow pulse suppression at the output end; be able to achieve dead zones at the output end; be able to turn off the IGBT in the correct order during the stop process; and be able to minimize the delay of input and output signals to reduce the impact on control accuracy. Summary of the invention

[0009] In view of this, the present application proposes a driving method and device for a diode-clamped three-level bridge arm to at least solve the above technical problems.

[0010] In order to achieve the above-mentioned purpose, the technical solution of this application is implemented in the following way.

[0011] According to one aspect of the present application, a driving device for a diode-clamped three-level bridge arm is provided, comprising: a signal processing module, which distinguishes and processes input signals from a system controller or a bottom-layer driver of the diode-clamped three-level bridge arm to generate corresponding output drive signals; a state judgment module, which detects the state of the diode-clamped three-level bridge arm at this time according to the input signal, the current output drive signal, and a built-in counter, and selects a drive signal output strategy to be adopted at this time; and an output selection module, which outputs a corresponding drive signal to the bottom-layer driver according to the drive signal output strategy to be adopted selected by the state judgment module, so as to drive each IGBT in the diode-clamped three-level bridge arm, wherein the signal processing module generates a shutdown drive signal when receiving a stop signal from the system controller or a fault signal from the bottom-layer driver, and performs overall digital filtering on the input drive signal when receiving an input drive signal from the system controller.

[0012] In the above scheme, the signal processing module includes a filter counter. In the overall digital filtering process, each time the input drive signal received from the system controller changes, the signal processing module triggers the filter counter to recount. After the input drive signal stabilizes for a predetermined time, the input drive signal is identified as a normal drive signal.

[0013] In the above scheme, in the overall digital filtering process,

[0014] If the input drive signal is the same as the output drive signal, that is, the input drive signal has not changed, the signal processing module determines that the input drive signal is stable and a normal drive signal, and clears the filter counter.

[0015] If the input drive signal is the same as the content of the previous cycle recorded in the register, the signal processing module determines that the input drive signal is stable and is a normal drive signal, and clears the filter counter.

[0016] If the input drive signal is different from the content of the previous cycle recorded in the register, the filter counter starts counting until the count reaches the set value. After the filter counter completes counting, the input signal is screened and the normal drive signal is output as input. In addition, all other input signals are classified as error signals and the output drive signal is turned off.

[0017] In the above scheme,

[0018] During the stable state in which the state judgment module determines that the input signal is completely identical to the output drive signal and each counter is not counting, the output drive signal is continuously sent according to the input signal, and the counter does not count, and the state judgment module checks whether it is still in a stable state in each clock cycle,

[0019] During the stable state, if the state judgment module detects that the number of 1s in the input signal is less than or equal to the number of 1s in the output drive signal, that is, the shutdown state, the IGBT position to be shut down is selected, its output drive signal is set to the shutdown drive signal, and the shutdown counter is started to enter the shutdown state,

[0020] During the stable state, if the state judgment module detects that the number of 1s in the input signal is greater than the number of 1s in the output drive signal and does not meet the state of a certain time, that is, a dead zone state, the dead zone counter is started and the dead zone state is entered.

[0021] In the dead zone state, before the dead zone counter completes counting, if the state judgment module detects that the number of 1s in the input signal is greater than the number of 1s in the output drive signal, the dead zone state is maintained; otherwise, the dead zone state is jumped out, and the dead zone counter is cleared. When the dead zone counter completes counting, the state judgment module selects the IGBT position that needs to be turned on, sets its output drive signal to 1, and starts the narrow pulse counter to enter the turned-on state.

[0022] In the on state, the narrow pulse counter is in the on state until the narrow pulse counter completes counting, and re-enters the stable state after the narrow pulse counter completes counting.

[0023] In the above scheme,

[0024] When entering the shutdown state, the state judgment module first checks whether the input signal of the first IGBT and the fourth IGBT is 0 and the output signal is 1. If yes, the output drive signal of the IGBT that meets the conditions is set to 0; if not, it checks whether the input signal of the second IGBT and the third IGBT is 0 and the output signal is 1. If yes, the output drive signal of the IGBT that meets the conditions is set to 0; after reaching the shutdown setting time, it enters the stable state and re-compares the input signal and the output drive signal.

[0025] When entering the on state, the state judgment module first checks whether the input signal of the second IGBT and the third IGBT is 1 and the output signal is 0. If so, the output drive signal of the IGBT that meets the conditions is set to 1; if not, it checks whether the input signal of the first IGBT and the fourth IGBT is 1 and the output signal is 0. If so, the output drive signal of the IGBT that meets the conditions is set to 1; after reaching the minimum on setting time, it enters the stable state and re-compares the input signal and the output drive signal.

[0026] According to another aspect of the present application, a driving method for a diode-clamped three-level bridge arm is provided, comprising: receiving an input signal from a system controller or a bottom-layer driver of the diode-clamped three-level bridge arm; distinguishing and processing the input signal to generate a corresponding output drive signal; detecting the state of the diode-clamped three-level bridge arm at this time according to the input signal, the current output drive signal, and each built-in counter, and selecting a drive signal output strategy to be adopted at this time; outputting a corresponding drive signal to the bottom-layer driver according to the selected drive signal output strategy to be adopted; the bottom-layer driver uses the obtained drive signal to drive each IGBT in the diode-clamped three-level bridge arm, and in the step of distinguishing and processing the input signal, if it is determined that a stop signal from the system controller or a fault signal from the bottom-layer driver is received, a shutdown drive signal is generated, and if it is determined that an input drive signal from the system controller is received, the input drive signal is subjected to overall digital filtering processing.

[0027] The above scheme includes a filter counter. In the overall digital filtering process, each time the input drive signal received from the system controller changes, the filter counter is triggered to re-count. After the input drive signal is stable for a predetermined time, the input drive signal is identified as a normal drive signal.

[0028] In the above scheme, in the overall digital filtering process,

[0029] When it is determined that the input drive signal is the same as the output drive signal, that is, the input drive signal has not changed, the input drive signal is considered to be stable and a normal drive signal, and the filter counter is cleared.

[0030] When it is determined that the input drive signal is the same as the content of the previous cycle recorded in the register, the input drive signal is deemed to be stable and a normal drive signal, and the filter counter is cleared.

[0031] When it is determined that the input drive signal is different from the content of the previous cycle recorded in the register, the filter counter starts counting until the count reaches the set value, and when it is determined that the filter counter has completed counting, the input signal is screened, and the normal drive signal is output as input. In addition, all other input signals are classified as error signals, and the output drive signal is turned off.

[0032] In the above solution, in the step of detecting the state of the diode clamped three-level bridge arm at this time,

[0033] During the stable state in which the input signal is determined to be identical to the output drive signal and the counters are not counting, the output drive signal is continuously sent according to the input signal, the counters do not count, and whether it is still in the stable state is checked in each clock cycle,

[0034] During the stable state, if it is detected that the number of 1s in the input signal is less than or equal to the number of 1s in the output drive signal, that is, the shutdown state, the IGBT position to be shut down is selected, its output drive signal is set to the shutdown drive signal, and the shutdown counter is started to enter the shutdown state,

[0035] During the stable state, if it is detected that the number of 1s in the input signal is greater than the number of 1s in the output drive signal and does not meet a certain time, that is, a dead zone state, the dead zone counter is started and the dead zone state is entered.

[0036] In the dead zone state, before the dead zone counter completes counting, if it is detected that the number of 1s in the input signal is greater than the number of 1s in the output drive signal, the dead zone state is maintained, otherwise the dead zone state is jumped out, and the dead zone counter is cleared. When the dead zone counter completes counting, the IGBT position to be turned on is selected, its output drive signal is set to 1, and the narrow pulse counter is started to enter the turned-on state.

[0037] In the on state, the narrow pulse counter is in the on state until the narrow pulse counter completes counting, and re-enters the stable state after the narrow pulse counter completes counting.

[0038] In the above solution, in the step of detecting the state of the diode clamped three-level bridge arm at this time,

[0039] When entering the shutdown state, first check whether the input signal of the first IGBT and the fourth IGBT is 0 and the output signal is 1. If yes, set the output drive signal of the IGBT that meets the conditions to 0; if not, check whether the input signal of the second IGBT and the third IGBT is 0 and the output signal is 1. If yes, set the output drive signal of the IGBT that meets the conditions to 0; after reaching the shutdown setting time, enter the stable state and re-compare the input signal with the output drive signal.

[0040] When entering the on state, first check whether the input signal of the second IGBT and the third IGBT is 1 and the output signal is 0. If so, set the output drive signal of the IGBT that meets the conditions to 1; if not, check whether the input signal of the first IGBT and the fourth IGBT is 1 and the output signal is 0. If so, set the output drive signal of the IGBT that meets the conditions to 1; after reaching the minimum on setting time, enter the stable state and re-compare the input signal and the output drive signal.

[0041] According to the present invention, the phenomenon that the input signal in the diode clamped three-level bridge arm may be negatively affected can be effectively eliminated, so that the output signal meets the objective requirements of the three-level bridge arm, and the normal operation of the power device is guaranteed, which has high engineering significance. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 A schematic diagram of the structure of a driving device for a diode-clamped three-level bridge arm according to an embodiment of the present invention;

[0043] Figure 2 is an overall flow chart of a driving method for a diode-clamped three-level bridge arm according to an embodiment of the present invention;

[0044] Figure 3 A detailed flow chart of the signal processing steps in the driving method for a diode-clamped three-level bridge arm according to an embodiment of the present invention;

[0045] Figure 4 A detailed flow chart of a state determination step in a driving method for a diode-clamped three-level bridge arm according to an embodiment of the present invention;

[0046] Figure 5 A logic diagram for selecting a specific driving signal in the off state in the state judgment step in the driving method for a diode clamped three-level bridge arm according to an embodiment of the present invention;

[0047] Figure 6 A logic diagram for selecting a specific driving signal in an on state in a state judgment step in a driving method for a diode-clamped three-level bridge arm according to an embodiment of the present invention;

[0048] Figure 7 It is a schematic diagram of the structure of a diode clamped three-level bridge arm in the prior art. DETAILED DESCRIPTION

[0049] The technical solution of the present application is further elaborated in detail below in conjunction with the accompanying drawings and specific embodiments of the specification.

[0050] The various specific technical features in the various embodiments described in the specific implementation methods can be combined in various ways without contradiction. For example, different implementation methods can be formed by combining different specific technical features. In order to avoid unnecessary repetition, the various possible combinations of the specific technical features in this application will not be described separately.

[0051] In the bridge arm of the diode-clamped three-level converter power unit, as mentioned above, the system controller generates control signals, which are sent to the bridge arm logic unit through the signal cable. The bridge arm logic unit processes the input control signals, generates drive signals and sends them to the underlying driver. The underlying driver is responsible for converting these drive signals into gate signals of the IGBT. If there is a fault, it will be fed back from the underlying driver to the bridge arm logic unit.

[0052] The driving device and method for a diode-clamped three-level bridge arm proposed in the present invention are intended to eliminate the phenomenon that the input signal in the diode-clamped three-level bridge arm may be negatively affected as in the prior art, so that the output signal meets the objective requirements of the three-level bridge arm to ensure the normal operation of the power device.

[0053] Figure 1 FIG. 1 is a schematic diagram of the structure of a driving device for a diode-clamped three-level bridge arm according to an embodiment of the present invention. Figure 1 As shown, the driving device 100 for the diode-clamped three-level bridge arm is implemented in a bridge arm logic unit 10 of the diode-clamped three-level bridge arm, and includes a signal processing module 101 , a state determination module 102 , and an output selection module 103 .

[0054] The signal processing module 101 implements the following functions: distinguishing and processing the input signal from the system controller or the bottom-layer driver, generating a corresponding output drive signal, and sending the signal to the state determination module 102 .

[0055] Specifically, when the bridge arm logic unit 10 receives a stop signal from the system controller or a fault signal from the bottom drivers z1-z4, the signal processing module 101 generates a shutdown drive signal, which is set to a drive signal 0000 in this embodiment; on the other hand, when the bridge arm logic unit 10 receives an input drive signal from the system controller, the signal processing module 101 performs overall digital filtering on the input drive signal. The drive signal generated by the signal processing module 101 is output to the state judgment module 102.

[0056] Furthermore, the signal processing module 101 includes a filter counter.

[0057] The overall digital filtering process means that each time the input drive signal received by the bridge arm logic unit 10 changes, the filter counter is triggered to re-count; otherwise, after the input drive signal is stable for a predetermined time, the input drive signal is recognized as a normal drive signal.

[0058] The specific process of the overall digital filtering processing is: when the input drive signal is the same as the output drive signal, that is, when the input drive signal has not changed, the input drive signal is determined to be stable and a normal drive signal, and the filter counter is cleared; when the input drive signal is the same as the content of the previous cycle recorded by the register, the input drive signal is determined to be stable and a normal drive signal, and the filter counter is cleared; when the input drive signal is different from the content of the previous cycle recorded by the register, the filter counter starts counting until the count reaches the set value, so that if the drive signal input in the previous cycle is different from the input drive signal in this cycle during the counting process, the counting is restarted and the comparison process is continued; after the filter counter counts, that is, the input drive signal is stable, the signal is screened, and the normal drive signal, here 0000, 1100, 0110, 0011, 0100 and 0010 six drive signals are output according to the input, and all other input signals are classified as error signals, and the output is the shutdown drive signal 0000, so that the module stops working.

[0059] The signal processing module 101 can effectively eliminate the error signal caused by the difference of the circuit or the device in the diode clamped three-level bridge arm.

[0060] The function implemented by the state judgment module 102 is: according to the input signal input to the bridge arm logic unit 10, the current output drive signal of the signal processing module 101, and the built-in counters such as the shutdown counter, the dead zone counter and the narrow pulse counter, etc., it detects the current state, selects the drive signal output strategy to be adopted at this time, and outputs it to the output selection module 103.

[0061] Here, the state when the input signal and the output drive signal are exactly the same and none of the counters are counting is defined as a stable state; the state when the number of 1s in the input signal is less than or equal to the number of 1s in the output drive signal is defined as an off state; the state when the number of 1s in the input signal is greater than the number of 1s in the output drive signal and has not been satisfied for a certain time is defined as a dead zone state; the state when the number of 1s in the input signal is greater than the number of 1s in the output drive signal and has been satisfied for a certain time is defined as an on state.

[0062] The state determination module 102 detects the current state based on the above state definition and selects the driving signal output strategy to be adopted as follows.

[0063] The state determination module 102 determines whether the input signal and the output drive signal are completely the same and each counter is not counting. If yes, it means that it is in a stable state.

[0064] During the stable state, because the input does not change, the state determination module 102 continues to send the output drive signal according to the input signal, and the counter does not count. In addition, the state determination module 102 checks whether it is still in the stable state in each clock cycle.

[0065] During the stable state, if the state judgment module 102 detects that the number of 1s in the input signal is less than or equal to the number of 1s in the output drive signal, that is, the shutdown state, the IGBT position to be shut down is selected, its output drive signal is set to the shutdown drive signal 0, and the shutdown counter is started to enter the shutdown state. Before the shutdown counter completes counting, it is in the shutdown state, and the input signal and the output drive signal are not compared, and the output drive signal is maintained unchanged. When the shutdown counter completes counting, it re-enters the stable state.

[0066] On the other hand, during the stable state, if the state judgment module 102 detects that the number of 1s in the input signal is greater than the number of 1s in the output drive signal and does not meet a certain time, that is, the dead zone state, the dead zone counter is started and the dead zone state is entered. In the dead zone state, before the dead zone counter completes counting, the number of 1s in the input signal is greater than the number of 1s in the output drive signal, and the dead zone state is maintained, otherwise the dead zone state is jumped out and the dead zone counter is cleared. When the dead zone counter completes counting, the state judgment module 102 selects the IGBT position that needs to be turned on, sets its output drive signal to 1, and starts the narrow pulse counter to enter the turned-on state.

[0067] In the on state, the narrow pulse counter remains in the on state until it completes counting, does not compare the input signal with the output drive signal, and maintains the output drive signal unchanged. When the narrow pulse counter completes counting, it re-enters the stable state.

[0068] The following is a detailed description of the specific driving signal selection logic of the state judgment module 102 in the off state. In this state, the driving signals of the first and fourth IGBTs on the outer side of the input and output signals are first compared, and then the driving signals of the second and third IGBTs on the inner side of the input and output signals are compared.

[0069] In detail, when entering the shutdown state, the output drive signal of the IGBT changes according to the following strategy: first check whether the input signal of the first IGBT and the fourth IGBT is 0 and the output signal is 1. If yes, set the output drive signal of the IGBT that meets the conditions to 0; if not, check whether the input signal of the second IGBT and the third IGBT is 0 and the output signal is 1. If yes, set the output drive signal of the IGBT that meets the conditions to 0. Then, as mentioned above, start the counter after the shutdown setting is performed, and count until the shutdown setting time is reached. During this period, the input signal and the output drive signal are not detected and compared. After reaching the shutdown setting time, enter the stable state and re-compare the input signal and the output drive signal.

[0070] The following is a detailed description of the specific driving signal selection logic of the state judgment module 102 in the on state. In this state, the driving signals of the second and third IGBTs on the inner side of the input and output signals are first compared, and then the driving signals of the first and fourth IGBTs on the outer side of the input and output signals are compared.

[0071] In detail, when entering the on state, the output drive signal of the IGBT changes according to the following strategy: first check whether the input signal of the second IGBT and the third IGBT is 1 and the output signal is 0, if yes, set the output drive signal of the IGBT that meets the conditions to 1; if not, check whether the input signal of the first IGBT and the fourth IGBT is 1 and the output signal is 0, if yes, set the output drive signal of the IGBT that meets the conditions to 1. Then, as mentioned above, after an on setting, start the on counter, and count until the minimum on setting time is reached. During this period, no detection and comparison of the input signal and the output drive signal are performed. After reaching the minimum on setting time, enter the stable state and re-compare the input signal and the output drive signal.

[0072] After the state judgment module 102 selects the drive signal output strategy to be adopted as above, the output selection module 103 outputs the corresponding drive signal to the bottom driver according to the drive signal output strategy to be adopted selected by the state judgment module 102 to drive each IGBT in the diode clamped three-level bridge arm.

[0073] As described above, the driving device for the diode-clamped three-level bridge arm according to the embodiment of the present application can effectively eliminate the phenomenon that the input signal in the diode-clamped three-level bridge arm may be negatively affected, so that the output signal meets the objective requirements of the three-level bridge arm, ensures the normal operation of the power device, and has high engineering significance.

[0074] Figure 2 FIG. 1 is a general flow chart of a driving method for a diode-clamped three-level bridge arm according to an embodiment of the present invention, and the method is implemented in a bridge arm logic unit 10 of a diode-clamped three-level bridge arm. Figure 2 As shown, the method includes the following steps.

[0075] In step 201, an input signal is received from a system controller or an underlying driver.

[0076] In step 202, the input signal is differentiated and processed to generate a corresponding output drive signal.

[0077] Figure 3 Detailed flow chart of the signal processing steps in the driving method for a diode-clamped three-level bridge arm according to an embodiment of the present invention, such as Figure 3 As shown, the signal processing steps include: in step 301, if it is determined that the bridge arm logic unit 10 receives a stop signal from the system controller or a fault signal from the bottom-level drivers z1~z4, then in step 302, a sequential shutdown drive signal is generated, which is set to drive signal 0000 in this embodiment; otherwise, in step 303, if it is determined that the bridge arm logic unit 10 receives an input drive signal from the system controller, then in steps 304~307, the input drive signal is subjected to overall digital filtering processing.

[0078] The bridge arm logic unit 10 includes a filter counter.

[0079] The overall digital filtering process means that each time the input drive signal received by the bridge arm logic unit 10 changes, the filter counter is triggered to re-count; otherwise, after the input drive signal is stable for a predetermined time, the input drive signal is recognized as a normal drive signal. Figure 3 As shown, the specific process of the overall digital filtering processing is as follows.

[0080] In step 303, when it is determined that the input drive signal is the same as the output drive signal, that is, the input drive signal has not changed, in step 304, the input drive signal is determined to be stable and a normal drive signal, and the filter counter is cleared.

[0081] In step 305, when it is determined that the input drive signal is the same as the content of the previous cycle recorded in the register, the input drive signal is determined to be stable and a normal drive signal in step 306, and the filter counter is cleared. Otherwise, in step 307, the filter counter starts counting until the count reaches the set value. Therefore, if the drive signal input in the previous cycle is different from the input drive signal in this cycle during the counting process, the counting is restarted and the comparison process is continued.

[0082] In step 308, when it is determined that the filter counter has completed counting, that is, the input drive signal is stable, the input signal is screened, and the normal drive signals, here 0000, 1100, 0110, 0011, 0100 and 0010, are output according to the input. In addition, all other input signals are classified as error signals, and the shutdown drive signal 0000 is output to stop the module from working.

[0083] Through this signal processing step, the error signal caused by the difference of the line or the device in the diode clamped three-level bridge arm can be effectively eliminated.

[0084] Return to Figure 2 In step 203, based on the input signal to the bridge arm logic unit 10, the current output drive signal, and built-in counters such as the shutdown counter, the dead zone counter, and the narrow pulse counter, the current state is detected and the drive signal output strategy to be adopted is selected.

[0085] Here, the state when the input signal and the output drive signal are exactly the same and none of the counters are counting is defined as a stable state; the state when the number of 1s in the input signal is less than or equal to the number of 1s in the output drive signal is defined as an off state; the state when the number of 1s in the input signal is greater than the number of 1s in the output drive signal and has not been satisfied for a certain time is defined as a dead zone state; the state when the number of 1s in the input signal is greater than the number of 1s in the output drive signal and has been satisfied for a certain time is defined as an on state.

[0086] In this step, the current state is detected based on the above state definition, and the driving signal output strategy to be adopted is selected.

[0087] Figure 4 The figure is a detailed flow chart of the state judgment step in the driving method for a diode-clamped three-level bridge arm according to an embodiment of the present invention.

[0088] like Figure 4 As shown, in step 401, it is determined whether the input signal and the output drive signal are completely the same and each counter is not counting. If yes, it means that it is in a stable state.

[0089] During the stable state, since the input does not change, the output drive signal is continuously sent according to the input signal in step 402, and the counter does not count. In addition, it is checked whether it is still in the stable state in each clock cycle.

[0090] During the stable state, if the state in which the number of 1s in the input signal is less than or equal to the number of 1s in the output drive signal is detected in step 403, that is, the shutdown state, then in step 404, the IGBT position to be shut down is selected, its output drive signal is set to the shutdown drive signal 0, and the shutdown counter is started in step 405 to enter the shutdown state. Before the shutdown counter completes counting, it is in the shutdown state, and the input signal and the output drive signal are not compared, and the output drive signal is maintained unchanged. When the shutdown counter completes counting, it re-enters the stable state.

[0091] On the other hand, during the stable state, if it is detected in step 403 that the number of 1s in the input signal is greater than the number of 1s in the output drive signal and the state, i.e., the dead zone state, is not satisfied for a certain period of time, then the dead zone counter is started in step 406 to enter the dead zone state. In the dead zone state, before the dead zone counter completes counting, if the number of 1s in the input signal is greater than the number of 1s in the output drive signal, the dead zone state is maintained, otherwise the dead zone state is jumped out and the dead zone counter is cleared. When the dead zone counter completes counting, the IGBT position to be turned on is selected in step 407, its output drive signal is set to 1, and the narrow pulse counter is started in step 408 to enter the turned-on state.

[0092] In the on state, the narrow pulse counter remains in the on state until it completes counting, does not compare the input signal with the output drive signal, and maintains the output drive signal unchanged. When the narrow pulse counter completes counting, it re-enters the stable state.

[0093] The specific logic of the drive signal selection in step 404 is described below.

[0094] Figure 5 The logic diagram of the specific drive signal selection in the state judgment step in the driving method for the diode clamped three-level bridge arm of the embodiment of the present invention in the off state. In this state, the drive signals of the first and fourth IGBTs on the outer side of the input and output signals are first compared, and then the drive signals of the second and third IGBTs on the inner side of the input and output signals are compared.

[0095] In detail, Figure 5 As shown, when entering the off state, the output drive signal of the IGBT changes according to the following strategy.

[0096] First, in steps 501 and 502, check whether the input signal of the first IGBT and the fourth IGBT is 0 and the output signal is 1. If yes, set the output drive signal of the qualified IGBT to 0 in step 503; if no, check whether the input signal of the second IGBT and the third IGBT is 0 and the output signal is 1 in steps 504 and 505. If yes, set the output drive signal of the qualified IGBT to 0 in step 506. Then, Figure 4 As shown, after entering step 405 to perform the shutdown setting, the counter is started and the count reaches the shutdown setting time. During this period, the input signal and the output drive signal are not detected and compared. After reaching the shutdown setting time, the stable state is entered and the input signal and the output drive signal are compared again.

[0097] The specific logic of the drive signal selection in step 404 is described below.

[0098] Figure 6 The logic diagram of the specific drive signal selection in the state judgment step in the driving method for the diode clamped three-level bridge arm in the embodiment of the present invention when in the on state. In this state, the drive signals of the second and third IGBTs on the inner side of the input and output signals are first compared, and then the drive signals of the first and fourth IGBTs on the outer side of the input and output signals are compared.

[0099] In detail, Figure 6 As shown, when entering the turn-on state, the output drive signal of the IGBT changes according to the following strategy.

[0100] First, in steps 601 and 602, check whether the input signal of the second IGBT and the third IGBT is 1 and the output signal is 0. If yes, set the output drive signal of the qualified IGBT to 1 in step 603; if no, check whether the input signal of the first IGBT and the fourth IGBT is 1 and the output signal is 0 in steps 604 and 605. If yes, set the output drive signal of the qualified IGBT to 1 in step 606. Then, Figure 4 As shown, after entering step 408 and performing an opening setting, the counter is started and the counting reaches the minimum opening setting time. During this period, the input signal and the output drive signal are not detected and compared. After reaching the minimum opening setting time, the input signal and the output drive signal are compared again in a stable state.

[0101] Return to Figure 2 As described above, after the driving signal output strategy to be adopted is selected in step 203, in step 204, the corresponding driving signal is output to the bottom layer driver according to the selected driving signal output strategy to be adopted.

[0102] Next, in step 205, the bottom-layer driver drives each IGBT in the diode-clamped three-level bridge arm using the obtained driving signal.

[0103] As described above, according to the driving method for the diode-clamped three-level bridge arm according to the embodiment of the present application, the phenomenon that the input signal in the diode-clamped three-level bridge arm may be negatively affected can be effectively eliminated, so that the output signal meets the objective requirements of the three-level bridge arm, and the normal operation of the power device is ensured, which has high engineering significance.

[0104] It should be noted that the driving method for the diode clamped three-level bridge arm provided in the above embodiment is similar to the above Figure 1 The driving method provided for the diode-clamped three-level bridge arm belongs to the same concept, and the specific implementation process can refer to the above system embodiment, which will not be repeated here.

[0105] The above is only an embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A driving device for a diode clamped three-level bridge arm, characterized in that: include: A signal processing module, which distinguishes and processes the input signal from the system controller or the bottom driver of the diode clamped three-level bridge arm to generate a corresponding output drive signal; a state judgment module, which detects the state of the diode clamped three-level bridge arm at this time according to the input signal, the current output drive signal, and a built-in counter, and selects a drive signal output strategy to be adopted at this time; and an output selection module, which outputs a corresponding drive signal to the bottom driver according to the drive signal output strategy selected by the state judgment module to drive each IGBT in the diode clamped three-level bridge arm, The signal processing module generates a shutdown drive signal when receiving a stop signal from the system controller or a fault signal from the bottom driver, and performs overall digital filtering on the input drive signal when receiving an input drive signal from the system controller.

2. The driving device for a diode-clamped three-level bridge arm according to claim 1, characterized in that: The signal processing module includes a filter counter, In the overall digital filtering process, each time the input drive signal received from the system controller changes, the signal processing module triggers the filter counter to recount, and after the input drive signal stabilizes for a predetermined time, the input drive signal is identified as a normal drive signal.

3. The driving device for a diode-clamped three-level bridge arm according to claim 2, characterized in that: In the overall digital filtering process, If the input drive signal is the same as the output drive signal, that is, the input drive signal has not changed, the signal processing module determines that the input drive signal is stable and a normal drive signal, and clears the filter counter. If the input drive signal is the same as the content of the previous cycle recorded in the register, the signal processing module determines that the input drive signal is stable and is a normal drive signal, and clears the filter counter. If the input drive signal is different from the content of the previous cycle recorded in the register, the filter counter starts counting until the count reaches the set value. After the filter counter completes counting, the input signal is screened and the normal drive signal is output as input. In addition, all other input signals are classified as error signals and the output drive signal is turned off.

4. The driving device for a diode-clamped three-level bridge arm according to claim 1, characterized in that: During the stable state in which the state judgment module determines that the input signal is completely identical to the output drive signal and each counter is not counting, the output drive signal is continuously sent according to the input signal, and the counter does not count, and the state judgment module checks whether it is still in a stable state in each clock cycle, During the stable state, if the state judgment module detects that the number of 1s in the input signal is less than or equal to the number of 1s in the output drive signal, that is, the shutdown state, the IGBT position to be shut down is selected, its output drive signal is set to the shutdown drive signal, and the shutdown counter is started to enter the shutdown state, During the stable state, if the state judgment module detects that the number of 1s in the input signal is greater than the number of 1s in the output drive signal and does not meet the state of a certain time, that is, a dead zone state, the dead zone counter is started and the dead zone state is entered. In the dead zone state, before the dead zone counter completes counting, if the state judgment module detects that the number of 1s in the input signal is greater than the number of 1s in the output drive signal, the dead zone state is maintained; otherwise, the dead zone state is jumped out, and the dead zone counter is cleared. When the dead zone counter completes counting, the state judgment module selects the IGBT position that needs to be turned on, sets its output drive signal to 1, and starts the narrow pulse counter to enter the turned-on state. In the on state, the narrow pulse counter is in the on state until the narrow pulse counter completes counting, and re-enters the stable state after the narrow pulse counter completes counting.

5. The driving device for a diode-clamped three-level bridge arm according to claim 4, characterized in that: When entering the shutdown state, the state judgment module first checks whether the input signal of the first IGBT and the fourth IGBT is 0 and the output signal is 1. If yes, the output drive signal of the IGBT that meets the conditions is set to 0; if not, it checks whether the input signal of the second IGBT and the third IGBT is 0 and the output signal is 1. If yes, the output drive signal of the IGBT that meets the conditions is set to 0; after reaching the shutdown setting time, it enters the stable state and re-compares the input signal and the output drive signal. When entering the on state, the state judgment module first checks whether the input signal of the second IGBT and the third IGBT is 1 and the output signal is 0. If so, the output drive signal of the IGBT that meets the conditions is set to 1; if not, it checks whether the input signal of the first IGBT and the fourth IGBT is 1 and the output signal is 0. If so, the output drive signal of the IGBT that meets the conditions is set to 1; after reaching the minimum on setting time, it enters the stable state and re-compares the input signal and the output drive signal.

6. A driving method for a diode clamped three-level bridge arm, characterized in that: include: Receiving an input signal from a system controller or a bottom-layer driver of the diode-clamped three-level bridge arm; Performing differentiation processing on the input signal to generate a corresponding output drive signal; According to the input signal, the current output drive signal, and each built-in counter, the state of the diode clamped three-level bridge arm is detected at this time, and the drive signal output strategy to be adopted at this time is selected; Outputting corresponding driving signals to the bottom layer driver according to the selected driving signal output strategy to be adopted; The bottom layer driver drives each IGBT in the diode clamped three-level bridge arm using the obtained driving signal, In the step of distinguishing and processing the input signal, if it is determined that a stop signal is received from the system controller or a fault signal is received from the underlying driver, a shutdown drive signal is generated; if it is determined that an input drive signal is received from the system controller, the input drive signal is subjected to overall digital filtering processing.

7. The driving method for a diode-clamped three-level bridge arm according to claim 6, characterized in that: Contains filter counters, In the overall digital filtering process, each time the input drive signal received from the system controller changes, the filter counter is triggered to re-count, and after the input drive signal is stable for a predetermined time, the input drive signal is identified as a normal drive signal.

8. The driving method for a diode-clamped three-level bridge arm according to claim 7, characterized in that: In the overall digital filtering process, When it is determined that the input drive signal is the same as the output drive signal, that is, the input drive signal has not changed, the input drive signal is considered to be stable and a normal drive signal, and the filter counter is cleared. When it is determined that the input drive signal is the same as the content of the previous cycle recorded in the register, the input drive signal is deemed to be stable and a normal drive signal, and the filter counter is cleared. When it is determined that the input drive signal is different from the content of the previous cycle recorded in the register, the filter counter starts counting until the count reaches the set value, and when it is determined that the filter counter has completed counting, the input signal is screened, and the normal drive signal is output as input. In addition, all other input signals are classified as error signals, and the output drive signal is turned off.

9. The driving method for a diode-clamped three-level bridge arm according to claim 6, characterized in that: In the step of detecting the state of the diode clamped three-level bridge arm at this time, During the stable state in which the input signal is determined to be identical to the output drive signal and the counters are not counting, the output drive signal is continuously sent according to the input signal, the counters do not count, and whether it is still in the stable state is checked in each clock cycle, During the stable state, if it is detected that the number of 1s in the input signal is less than or equal to the number of 1s in the output drive signal, that is, the shutdown state, the IGBT position to be shut down is selected, its output drive signal is set to the shutdown drive signal, and the shutdown counter is started to enter the shutdown state, During the stable state, if it is detected that the number of 1s in the input signal is greater than the number of 1s in the output drive signal and does not meet a certain time, that is, a dead zone state, the dead zone counter is started and the dead zone state is entered. In the dead zone state, before the dead zone counter completes counting, if it is detected that the number of 1s in the input signal is greater than the number of 1s in the output drive signal, the dead zone state is maintained, otherwise the dead zone state is jumped out, and the dead zone counter is cleared. When the dead zone counter completes counting, the IGBT position to be turned on is selected, its output drive signal is set to 1, and the narrow pulse counter is started to enter the turned-on state. In the on state, the narrow pulse counter is in the on state until the narrow pulse counter completes counting, and re-enters the stable state after the narrow pulse counter completes counting.

10. The driving method for a diode-clamped three-level bridge arm according to claim 9, characterized in that: In the step of detecting the state of the diode clamped three-level bridge arm at this time, When entering the shutdown state, first check whether the input signal of the first IGBT and the fourth IGBT is 0 and the output signal is 1. If yes, set the output drive signal of the IGBT that meets the conditions to 0; if not, check whether the input signal of the second IGBT and the third IGBT is 0 and the output signal is 1. If yes, set the output drive signal of the IGBT that meets the conditions to 0; after reaching the shutdown setting time, enter the stable state and re-compare the input signal with the output drive signal. When entering the on state, first check whether the input signal of the second IGBT and the third IGBT is 1 and the output signal is 0. If so, set the output drive signal of the IGBT that meets the conditions to 1; if not, check whether the input signal of the first IGBT and the fourth IGBT is 1 and the output signal is 0. If so, set the output drive signal of the IGBT that meets the conditions to 1; after reaching the minimum on setting time, enter the stable state and re-compare the input signal and the output drive signal.

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