Control circuit adopting digital and analog circuits to realize phase interlaced wave transmission

Abstract

The invention discloses a control circuit adopting digital and analog circuits to realize phase-interleaved wave transmission, which belongs to the field of DC-DC converters and comprises a waveform generation circuit, a constant current circuit and a power supply circuit. The power supply circuit is electrically connected with the waveform generating circuit and the waveform generating circuit, and the power supply circuit is used for supplying energy to the waveform generating circuit and the constant current circuit; the waveform generation circuit is electrically connected with the constant current circuit. According to the invention, a combined circuit of the PWM controller and the single-chip microcomputer is utilized to realize control of parallel interlaced work of the plurality of converters, ensure the accuracy of phases, do not need a high-performance digital processor, simplify the circuit structure, reduce the internal space occupation of the power converter, and facilitate improvement of the power density and the anti-interference capability of the converter. A complex logic circuit is omitted, the control algorithm of the single-chip microcomputer is simplified, and the reliability of interleaving parallel operation of the converter is improved.

Description

Technical Field

[0001] The invention relates to the field of DC-DC converters, in particular to a phase-interleaved wave control circuit using digital and analog circuits. Background Art

[0002] DC-DC converters are widely used due to their high efficiency and high reliability. To achieve energy storage and release during the switching cycle, inductors and capacitors are required inside the converter to act as energy storage elements. The inductor and capacitor values ​​are limited by voltage and current ripples. To reduce voltage and current fluctuations, the inductor and capacitor values ​​are generally selected to be larger. However, large-capacity energy storage elements increase the size of the converter and reduce the transient response speed of the converter. Multiple converters working in parallel can effectively reduce input and output current ripples, reduce the size of input and output filters, and improve the transient response capability of the converter. At the same time, the heat distribution of the converter is more uniform and reasonable. This method is widely used due to its significant advantages.

[0003] The staggered parallel operation of multiple DC-DC converters can effectively improve the transient response capability of the converter and reduce the current ripple. This working mode is to control the main power tubes of n converters to conduct alternately. The conduction timing of each main power tube is staggered by 360 / n degrees in turn, and the conduction timing of the power tube is required to be high. There are two common control methods. The first is to use centralized control, and a series of control signals with the same frequency but phase staggered by 360 / n degrees are generated by an independent high-performance digital processor to drive the corresponding converter. The closed-loop control and wave generation logic of the converter are all completed by the digital processor. This method has high performance requirements for the digital processor. In places with high radiation such as high altitude, this high-performance digital processor has poor anti-interference performance, which reduces the reliability of the staggered parallel operation of the converter. The second is to use a combinational logic circuit to generate. This method is composed of several discrete components, has strong anti-interference ability and low cost, but requires more discrete components, the circuit is complex, and occupies a large internal space of the converter. It is not suitable for places with high efficiency and high power density. Summary of the invention

[0004] With regard to the above problems existing in the prior art, the object of the present invention is to provide a phase-interleaved wave control circuit using digital and analog circuits to solve the problems raised in the above background technology.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] A phase-interleaved wave control circuit using digital and analog circuits, comprising a waveform generating circuit, a constant current circuit and a power supply circuit;

[0007] The power supply circuit is electrically connected to the waveform generating circuit and the waveform generating circuit, and the power supply circuit is used to supply energy to the waveform generating circuit and the constant current circuit;

[0008] The power supply circuit includes a power supply Vin, a MOS tube Q1, a MOS tube Q2, a current transformer CT1, a current transformer CT2, an inductor Lin, an inductor Lo1, an inductor Lo2, a capacitor Cin, a capacitor Cout, a diode D1, a diode D2, a resistor Rsns and a resistor RL;

[0009] The waveform generating circuit and the constant current circuit are electrically connected;

[0010] The waveform generating circuit includes a PWM controller IC2, a PWM controller IC3 and a digital controller IC1; the digital controller IC1 is used to generate fixed-frequency two-phase pulse signals Pulse1 and Pulse2 staggered by 180°, respectively driving the PWM controller IC2 and the PWM controller IC3 to generate switching frequency and phase signals for controlling the two converters;

[0011] The constant current circuit includes an operational amplifier A1, an operational amplifier A2, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a capacitor C1 and a capacitor C2.

[0012] As a further solution of the present invention: the positive electrode of the power supply Vin in the power supply circuit is connected to one end of the inductor Lin, and the other end of the inductor Lin is simultaneously connected to the drain of the MOS tube Q1 and the drain of the MOS tube Q2; the negative electrode of the power supply Vin is grounded;

[0013] The source of the MOS tube Q1 is connected to one end of the primary winding group of the current transformer CT1, the other end of the primary winding group of the current transformer CT1 is connected to the cathode of the diode D1 and one end of the inductor Lo1, and the other end of the inductor Lo1 is connected to the positive electrode of the capacitor Cout;

[0014] The source of the MOS tube Q2 is connected to one end of the primary winding group of the current transformer CT2, the other end of the primary winding group of the current transformer CT2 is connected to the cathode of the diode D2 and one end of the inductor Lo2, and the other end of the inductor Lo2 is connected to the positive electrode of the capacitor Cout;

[0015] The anode of diode D1 and the anode of diode D2 are both grounded;

[0016] The gate of the MOS tube Q1 is connected to the PWM end of the PWM controller IC2 in the waveform generating circuit; the gate of the MOS tube Q2 is connected to the PWM end of the PWM controller IC3 in the waveform generating circuit;

[0017] The output end of the secondary winding group of the current transformer CT1 is connected to the CS end of the PWM controller IC2 in the waveform generating circuit; the output end of the secondary winding group of the current transformer CT2 is connected to the CS end of the PWM controller IC3 in the waveform generating circuit;

[0018] The cathode of the capacitor Cout is connected to one end of the resistor Rsns, and the other end of the resistor Rsns is connected to the anode of the diode D1;

[0019] The positive electrode of the capacitor Cout is connected to one end of the resistor RL, and the other end of the resistor RL is connected to the negative electrode of the capacitor Cout.

[0020] As a further solution of the present invention: the drain of the MOS tube Q2 is movably connected to the capacitor Cin, and the other end of the capacitor Cin is grounded.

[0021] As a further solution of the present invention: the inductor Lin, the inductor Lo1 and the inductor Lo2 are all inductors with the same end.

[0022] As a further solution of the present invention: the pulse signal Pulse1 terminal of the digital controller IC1 in the waveform generating circuit is connected to the RT terminal of the PWM controller IC2;

[0023] The pulse signal Pulse2 terminal of the digital controller IC1 is connected to the RT terminal of the PWM controller IC3.

[0024] As a further solution of the present invention: the output end of the operational amplifier A2 in the constant current circuit is simultaneously connected to the Comp end of the PWM controller IC2 and the Comp end of the PWM controller IC3 in the waveform generating circuit;

[0025] The positive input terminal of the operational amplifier A2 is connected to one end of the capacitor C2 and one end of the resistor R6 at the same time; the other end of the capacitor C2 is grounded; the other end of the resistor R6 is connected to the reference current terminal Iref;

[0026] The negative input terminal of the operational amplifier A2 is connected to one end of the resistor R5; the other end of the resistor R5 is connected to the output terminal of the operational amplifier A1;

[0027] The positive input terminal of the operational amplifier A2 is connected to one end of the resistor R2 and one end of the resistor R4 at the same time; the other end of the resistor R4 is grounded; the other end of the resistor R2 is connected to the negative electrode of the capacitor Cout in the power supply circuit;

[0028] The negative input terminal of the operational amplifier A2 is connected to one end of the resistor R1; the other end of the resistor R1 is connected to the positive electrode of the diode D1 in the power supply circuit.

[0029] As a further solution of the present invention: the negative input terminal of the operational amplifier A1 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the output terminal of the operational amplifier A1.

[0030] As a further solution of the present invention: the negative input terminal of the operational amplifier A2 is connected to one end of the capacitor C1; the other end of the capacitor C1 is connected to one end of the resistor R7, and the other end of the resistor R7 is connected to the output terminal of the operational amplifier A2.

[0031] As a further solution of the present invention: the two input terminals of the operational amplifier A1 are respectively connected to the two ends of the resistor Rsns through the resistor R1 and the resistor R2.

[0032] Compared with the prior art, the present invention has the following beneficial effects:

[0033] The present invention utilizes a combination circuit of a PWM controller and a single-chip microcomputer to realize the control of multiple converters working in parallel and staggered. Each PWM controller controls the corresponding converter separately to complete closed-loop regulation and peak current limiting functions. The single-chip microcomputer only needs to generate a pulse trigger signal with the same frequency and a phase staggered by 360 / n degrees to drive the clock synchronization pins of n PWM controllers respectively to set the switching frequency and working sequence of the converter to ensure the accuracy of the phase. The method does not require a high-performance digital processor, simplifies the circuit structure, reduces the space occupied inside the power converter, and is conducive to improving the power density and anti-interference ability of the converter. The complex logic circuit is omitted, the control algorithm of the single-chip microcomputer is simplified, and the reliability of the staggered parallel operation of the converter is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 The present invention is a schematic diagram of a structure of a phase-interleaved wave control circuit realized by using digital and analog circuits disclosed in an embodiment.

[0035] Figure 2 The present invention is a flow chart of a single chip microcomputer control method for realizing a phase interleaving wave control circuit by using digital and analog circuits disclosed in an embodiment.

[0036] Figure 3 The following is a phase-interleaved wave waveform diagram of a phase-interleaved wave control circuit implemented by using digital and analog circuits disclosed in an embodiment. DETAILED DESCRIPTION

[0037] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention; it is obvious that the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "provided with", "connected", and "connected" should be understood in a broad sense; for example, it can be a fixed connection, a detachable connection, or an integral connection, a mechanical connection, or an electrical connection, a direct connection, or an indirect connection through an intermediate medium, or the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0039] See also Figure 1-3 , a phase-interleaved wave control circuit using digital and analog circuits, including a waveform generating circuit, a constant current circuit and a power supply circuit;

[0040] The power supply circuit is electrically connected to the waveform generating circuit and the waveform generating circuit, and the power supply circuit is used to supply energy to the waveform generating circuit and the constant current circuit;

[0041] The power supply circuit includes a power supply Vin, a MOS tube Q1, a MOS tube Q2, a current transformer CT1, a current transformer CT2, an inductor Lin, an inductor Lo1, an inductor Lo2, a capacitor Cin, a capacitor Cout, a diode D1, a diode D2, a resistor Rsns and a resistor RL;

[0042] The waveform generating circuit and the constant current circuit are electrically connected;

[0043] The waveform generating circuit includes a PWM controller IC2, a PWM controller IC3 and a digital controller IC1; the digital controller IC1 is used to generate fixed-frequency two-phase pulse signals Pulse1 and Pulse2 staggered by 180°, respectively driving the PWM controller IC2 and the PWM controller IC3 to generate switching frequency and phase signals for controlling the two converters;

[0044] The constant current circuit includes an operational amplifier A1, an operational amplifier A2, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a capacitor C1 and a capacitor C2;

[0045] The positive electrode of the power supply Vin in the power supply circuit is connected to one end of the inductor Lin, and the other end of the inductor Lin is simultaneously connected to the drain of the MOS tube Q1 and the drain of the MOS tube Q2; the negative electrode of the power supply Vin is grounded;

[0046] The drain of the MOS tube Q2 is connected to the movable end of the capacitor Cin, and the other end of the capacitor Cin is grounded;

[0047] The source of the MOS tube Q1 is connected to one end of the primary winding group of the current transformer CT1, the other end of the primary winding group of the current transformer CT1 is connected to the cathode of the diode D1 and one end of the inductor Lo1, and the other end of the inductor Lo1 is connected to the positive electrode of the capacitor Cout;

[0048] The source of the MOS tube Q2 is connected to one end of the primary winding group of the current transformer CT2, the other end of the primary winding group of the current transformer CT2 is connected to the cathode of the diode D2 and one end of the inductor Lo2, and the other end of the inductor Lo2 is connected to the positive electrode of the capacitor Cout;

[0049] The anode of diode D1 and the anode of diode D2 are both grounded;

[0050] The gate of the MOS tube Q1 is connected to the PWM end of the PWM controller IC2 in the waveform generating circuit; the gate of the MOS tube Q2 is connected to the PWM end of the PWM controller IC3 in the waveform generating circuit;

[0051] The output end of the secondary winding group of the current transformer CT1 is connected to the CS end of the PWM controller IC2 in the waveform generating circuit; the output end of the secondary winding group of the current transformer CT2 is connected to the CS end of the PWM controller IC3 in the waveform generating circuit;

[0052] The cathode of the capacitor Cout is connected to one end of the resistor Rsns, and the other end of the resistor Rsns is connected to the anode of the diode D1;

[0053] The positive electrode of the capacitor Cout is connected to one end of the resistor RL, and the other end of the resistor RL is connected to the negative electrode of the capacitor Cout;

[0054] Inductor Lin, inductor Lo1, and inductor Lo2 are all inductors with the same end;

[0055] The pulse signal Pulse1 terminal of the digital controller IC1 in the waveform generating circuit is connected to the RT terminal of the PWM controller IC2;

[0056] The pulse signal Pulse2 terminal of the digital controller IC1 is connected to the RT terminal of the PWM controller IC3;

[0057] The output terminal of the operational amplifier A2 in the constant current circuit is simultaneously connected to the Comp terminal of the PWM controller IC2 and the Comp terminal of the PWM controller IC3 in the waveform generating circuit;

[0058] The positive input terminal of the operational amplifier A2 is connected to one end of the capacitor C2 and one end of the resistor R6 at the same time; the other end of the capacitor C2 is grounded; the other end of the resistor R6 is connected to the reference current terminal Iref;

[0059] The negative input terminal of the operational amplifier A2 is connected to one end of the capacitor C1 and one end of the resistor R5 at the same time; the other end of the capacitor C1 is connected to one end of the resistor R7, and the other end of the resistor R7 is connected to the output terminal of the operational amplifier A2;

[0060] The other end of the resistor R5 is connected to the output end of the operational amplifier A1;

[0061] The negative input terminal of the operational amplifier A1 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the output terminal of the operational amplifier A1;

[0062] The positive input terminal of the operational amplifier A2 is connected to one end of the resistor R2 and one end of the resistor R4 at the same time; the other end of the resistor R4 is grounded; the other end of the resistor R2 is connected to the negative electrode of the capacitor Cout in the power supply circuit;

[0063] The negative input terminal of the operational amplifier A2 is connected to one end of the resistor R1; the other end of the resistor R1 is connected to the positive electrode of the diode D1 in the power supply circuit;

[0064] The two input terminals of the operational amplifier A1 are connected to the two ends of the resistor Rsns through the resistor R1 and the resistor R2 respectively;

[0065] Taking a two-phase parallel interleaved Buck constant current circuit with input voltage Vin=200V and output current Iout=20A as an example, n=2, and switching frequency Fsw=100kHz.

[0066] Figure 1 The present invention is a control circuit that uses digital and analog circuits to realize phase interleaving wave generation. IC1 only needs to generate fixed-frequency two-phase interleaved 180° pulse signals Pulse1 and Pulse2 to drive IC2 and IC3 respectively to generate switching frequency and phase signals for controlling two converters. Output current regulation is completed by operational amplifier A2 and peripheral resistor and capacitor devices. When the load disturbance causes the output current to decrease, the output signal u1 of the closed-loop regulator increases, and u1 is sent to the PWM controller as the inductor current reference of the two converters. The PWM controller increases the conduction time of the power tube and increases the output current after being processed by the internal logic circuit, and the converter resumes steady-state operation; vice versa. Since the inductor peak current reference of the two converters is derived from the same signal u1, the peak current of each inductor is equal, which ensures that the output power of the two converters is equal. This method improves the stability and reliability of the operation of the interleaved parallel converter.

[0067] Figure 2The flow chart of the single-chip control method of the present invention is as follows. Before starting, the single-chip related peripherals are initialized first, and then the PWM peripheral function inside the single-chip is used to generate two pulse signals Pulse1 and Pulse2 with a fixed frequency and a phase difference of 180°. The method of the present invention does not require a high-performance digital processor, but only requires a single-chip equipped with a PWM wave generating function, which is simple to control and has high reliability.

[0068] Figure 3 The phase-interleaved waveform of the present invention includes the total inductor iLo current waveform, the inductor Lo1 current waveform, the inductor Lo2 current waveform, the output pulse signals Pulse1 and Pulse2 of the digital controller, and the drive signals PWM1 and PWM2 output by the PWM controller. It can be seen from the working waveform that the Pulse1 and Pulse signals are two pulse signals with a phase difference of 180° and the same frequency. When the rising edge of the Pulse1 signal is established, the PWM1 signal is generated, and the inductor current Lo1 rises linearly at this time. When the rising edge of the Pulse2 signal is established, the PWM2 signal is generated, and the inductor current Lo2 rises linearly at this time. The total output inductor current Lo2 is the superposition of Lo1 and Lo2. This method ensures that the power of each converter is evenly distributed, and improves the reliability of the staggered parallel operation of the converters.

[0069] The present invention utilizes a combined circuit of a PWM controller and a single-chip microcomputer to realize the control of multiple converters working in parallel and staggered. Each PWM controller controls the corresponding converter separately to complete functions such as closed-loop regulation and peak current limiting. The single-chip microcomputer only needs to generate a pulse trigger signal with the same frequency and a phase staggered by 360 / n degrees to drive the clock synchronization pins of n PWM controllers respectively to set the switching frequency and working sequence of the converter to ensure the accuracy of the phase. The method does not require a high-performance digital processor, simplifies the circuit structure, reduces the space occupied inside the power converter, and is conducive to improving the power density and anti-interference ability of the converter.

[0070] The present invention generates a control signal for the interleaved parallel operation of the DC-DC converters through a combined circuit of a PWM controller and a single-chip microcomputer. The circuit of the present invention eliminates the need for complex logic circuits, simplifies the control algorithm of the single-chip microcomputer, and improves the reliability of the interleaved parallel operation of the converters.

[0071] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential features of the present invention. Therefore, the embodiments should be considered exemplary and non-restrictive from any point of view. The scope of the present invention is defined by the appended claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims be included in the present invention, and any reference numerals in the claims should not be considered as limiting the claims involved.

[0072] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A phase interleaving wave control circuit using digital and analog circuits, characterized in that: It includes a waveform generating circuit, a constant current circuit and a power supply circuit; The power supply circuit is electrically connected to the waveform generating circuit and the waveform generating circuit, and the power supply circuit is used to supply energy to the waveform generating circuit and the constant current circuit; The power supply circuit includes a power supply Vin, a MOS tube Q1, a MOS tube Q2, a current transformer CT1, a current transformer CT2, an inductor Lin, an inductor Lo1, an inductor Lo2, a capacitor Cin, a capacitor Cout, a diode D1, a diode D2, a resistor Rsns and a resistor RL; The waveform generating circuit and the constant current circuit are electrically connected; The waveform generating circuit includes a PWM controller IC2, a PWM controller IC3 and a digital controller IC1; the digital controller IC1 is used to generate fixed-frequency two-phase pulse signals Pulse1 and Pulse2 staggered by 180°, respectively driving the PWM controller IC2 and the PWM controller IC3 to generate switching frequency and phase signals for controlling the two converters; The constant current circuit includes an operational amplifier A1, an operational amplifier A2, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a capacitor C1 and a capacitor C2.

2. The phase-interleaved wave control circuit using digital and analog circuits according to claim 1, characterized in that: The positive electrode of the power supply Vin in the power supply circuit is connected to one end of the inductor Lin, and the other end of the inductor Lin is simultaneously connected to the drain of the MOS tube Q1 and the drain of the MOS tube Q2; the negative electrode of the power supply Vin is grounded; The source of the MOS tube Q1 is connected to one end of the primary winding group of the current transformer CT1, the other end of the primary winding group of the current transformer CT1 is connected to the cathode of the diode D1 and one end of the inductor Lo1, and the other end of the inductor Lo1 is connected to the positive electrode of the capacitor Cout; The source of the MOS tube Q2 is connected to one end of the primary winding group of the current transformer CT2, the other end of the primary winding group of the current transformer CT2 is connected to the cathode of the diode D2 and one end of the inductor Lo2, and the other end of the inductor Lo2 is connected to the positive electrode of the capacitor Cout; The anode of diode D1 and the anode of diode D2 are both grounded; The gate of the MOS tube Q1 is connected to the PWM end of the PWM controller IC2 in the waveform generating circuit; the gate of the MOS tube Q2 is connected to the PWM end of the PWM controller IC3 in the waveform generating circuit; The output end of the secondary winding group of the current transformer CT1 is connected to the CS end of the PWM controller IC2 in the waveform generating circuit; the output end of the secondary winding group of the current transformer CT2 is connected to the CS end of the PWM controller IC3 in the waveform generating circuit; The cathode of the capacitor Cout is connected to one end of the resistor Rsns, and the other end of the resistor Rsns is connected to the anode of the diode D1; The positive electrode of the capacitor Cout is connected to one end of the resistor RL, and the other end of the resistor RL is connected to the negative electrode of the capacitor Cout.

3. The phase-interleaved wave control circuit using digital and analog circuits according to claim 2, characterized in that: The drain of the MOS tube Q2 is connected to the movable end of the capacitor Cin, and the other end of the capacitor Cin is grounded.

4. The phase-interleaved wave control circuit using digital and analog circuits according to claim 3 is characterized in that: The inductor Lin, the inductor Lo1 and the inductor Lo2 are all inductors with the same end.

5. The phase-interleaved wave control circuit using digital and analog circuits according to claim 4, characterized in that: The pulse signal Pulse1 terminal of the digital controller IC1 in the waveform generating circuit is connected to the RT terminal of the PWM controller IC2; The pulse signal Pulse2 terminal of the digital controller IC1 is connected to the RT terminal of the PWM controller IC3.

6. The phase-interleaved wave control circuit using digital and analog circuits according to claim 5, characterized in that: The output terminal of the operational amplifier A2 in the constant current circuit is simultaneously connected to the Comp terminal of the PWM controller IC2 and the Comp terminal of the PWM controller IC3 in the waveform generating circuit; The positive input terminal of the operational amplifier A2 is connected to one end of the resistor R6; the other end of the resistor R6 is connected to the reference current terminal Iref; The negative input terminal of the operational amplifier A2 is connected to one end of the resistor R5; the other end of the resistor R5 is connected to the output terminal of the operational amplifier A1; The positive input terminal of the operational amplifier A2 is connected to one end of the resistor R2 and one end of the resistor R4 at the same time; the other end of the resistor R4 is grounded; the other end of the resistor R2 is connected to the negative electrode of the capacitor Cout in the power supply circuit; The negative input terminal of the operational amplifier A2 is connected to one end of the resistor R1; the other end of the resistor R1 is connected to the positive electrode of the diode D1 in the power supply circuit.

7. The phase-interleaved wave control circuit using digital and analog circuits according to claim 6, characterized in that: The negative input terminal of the operational amplifier A1 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the output terminal of the operational amplifier A1.

8. The phase-interleaved wave control circuit using digital and analog circuits according to claim 7, characterized in that: The negative input terminal of the operational amplifier A2 is connected to one end of the capacitor C1; the other end of the capacitor C1 is connected to one end of the resistor R7, and the other end of the resistor R7 is connected to the output terminal of the operational amplifier A2.

9. The phase-interleaved wave control circuit using digital and analog circuits according to claim 8, characterized in that: The positive input terminal of the operational amplifier A2 is connected to one end of the capacitor C2; the other end of the capacitor C2 is grounded.

10. The phase-interleaved wave control circuit using digital and analog circuits according to claim 9, characterized in that: The two input terminals of the operational amplifier A1 are respectively connected to the two ends of the resistor Rsns through the resistor R1 and the resistor R2.

Images