Input signal reconstruction device and method and electronic equipment using input signal reconstruction device and method

Abstract

An input signal reconstruction device comprises a microcontroller unit. The microcontroller unit comprises a timer, a pulse width modulator, a peripheral equipment direct memory accessor and a processing unit. After the microcontroller unit is initialized, the microcontroller unit receives an input signal, reconstructs the input signal and generates an output signal without intervention of the processing unit. Specifically, after a timer, a pulse width modulator and a peripheral device direct memory accessor are initialized, the timer receives an input signal; when a specific edge of the input signal arrives, the timer updates a count value; when the count value reaches a specific value, the timer triggers the pulse width modulator to output a pulse with a specific pulse width and a first level as an output signal; afterwards, the timer triggers the peripheral device direct memory accessor, and the peripheral device direct memory accessor enables the output signal generated by the pulse width modulator to become a second level, and resets the pulse width modulator.

Description

Technical Field

[0001] The present invention relates to a technology for reconstructing input signals, and more specifically to an input signal reconstruction device, method and electronic equipment using the same. After a microcontroller unit is initialized, the microcontroller unit receives an input signal, reconstructs the input signal and generates an output signal without the intervention of a processing unit of the microcontroller unit. Background Art

[0002] In various electronic devices, the functional circuits in the electronic devices will perform functional operations based on the pulse width of the high-level pulse in the reference clock signal. The pulse width of the high-level pulse in the reference clock signal must be kept fixed. If there is a large change, it will affect the correctness of the functional operation of the electronic device. In other words, in some applications, electronic devices need to quickly shape (reconstruct) multiple pulses with irregular pulse widths into multiple pulses with fixed pulse widths.

[0003] Most existing electronic devices have a microcontroller unit. In order to maintain a fixed pulse width of a high-level pulse in a reference clock signal, the microcontroller unit receives an external clock signal as an input signal, and the microcontroller unit executes software through its processing unit to reconstruct the input signal and generate a fixed output signal with a specific pulse width of a high-level pulse as a reference clock signal for the electronic device.

[0004] However, the technical solution of reconstructing the input signal by executing software through the processing unit of the microcontroller unit has technical problems such as taking more computing time to execute the program, occupying the processing unit and wasting power. In view of this, in order to solve the above technical problems, the technical solution of reconstructing the input signal by executing software through the processing unit of the existing microcontroller unit still has room for further improvement. Summary of the invention

[0005] In view of the above situation, one of the objects of the present invention is to provide a technical solution for reconstructing an input signal, which is still implemented using a microcontroller unit. However, after the microcontroller unit is initialized, the microcontroller unit will receive the input signal, reconstruct the input signal, and generate an output signal without the intervention of the processing unit of the microcontroller unit.

[0006] The present invention provides an input signal reconstruction device, which includes a microcontroller unit. The microcontroller unit includes a timer, a pulse width modulator, a peripheral device direct memory access device and a processing unit, wherein the timer is electrically connected to the pulse width modulator and the peripheral device direct memory access device, the peripheral device direct memory access device is electrically connected to the pulse width modulator, and the processing unit is electrically connected to the timer, the pulse width modulator and the peripheral device direct memory access device. After the timer, the pulse width modulator and the peripheral device direct memory access device are initialized by software executed by the processing unit, the microcontroller unit receives an input signal, reconstructs the input signal, and generates an output signal without the intervention of the processing unit. In detail, after the timer, the pulse width modulator and the peripheral device direct memory access device are initialized, the timer receives an input signal; when a specific edge of the input signal arrives, the timer updates the count value; when the count value reaches a specific value, the timer triggers the pulse width modulator to output a pulse with a specific pulse width and a first level as an output signal; then, the timer triggers the peripheral device direct memory access device, and the peripheral device direct memory access device causes the output signal generated by the pulse width modulator to change to a second level, and resets the pulse width modulator.

[0007] The present invention also provides an electronic device, comprising the input signal reconstruction device and a functional circuit, wherein the functional circuit is electrically connected to the input signal reconstruction device. The functional circuit is used to use the output signal generated by the input signal reconstruction device as a reference clock signal to perform functional operations according to the reference clock signal.

[0008] The present invention also provides an input signal reconstruction method, which is executed in a microcontroller unit. The microcontroller unit includes a timer, a pulse width modulator, a peripheral device direct memory access device and a processing unit, wherein the timer is electrically connected to the pulse width modulator and the peripheral device direct memory access device, the peripheral device direct memory access device is electrically connected to the pulse width modulator, and the processing unit is electrically connected to the timer, the pulse width modulator and the peripheral device direct memory access device. The input signal reconstruction method includes the following steps: the processing unit executes software to initialize a pulse width modulator, a peripheral device direct memory access device and a timer; and after the timer, the pulse width modulator and the peripheral device direct memory access device are initialized, without the intervention of the processing unit, the microcontroller unit receives the input signal, reconstructs the input signal, and generates an output signal, wherein the timer receives the input signal, when the rising edge of the input signal arrives, the timer updates the count value, when the count value reaches a specific value, the timer triggers the pulse width modulator to output a pulse with a specific pulse width and a high level as an output signal, then the timer triggers the peripheral device direct memory access device, and the peripheral device direct memory access device causes the output signal generated by the pulse width modulator to become a low level, and resets the pulse width modulator.

[0009] In summary, the technical solution of the present invention is produced in the process of reconstructing the input signal, which is simply processed by hardware and has a fast calculation time, so the generated reference clock signal has high accuracy. In addition, the technical solution of the present invention can effectively reduce power consumption and free up processing units for other processing.

[0010] These and other objects, features and advantages of the present invention will be more fully reflected in the following detailed description and claims, and may be achieved by the means, devices and combinations thereof particularly pointed out in the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a schematic block diagram of an input signal reconstruction device according to an embodiment of the present invention.

[0012] Figure 2 is a schematic block diagram of a microcontroller unit in an input signal reconstruction device according to an embodiment of the present invention.

[0013] Figure 3 is a schematic flow chart of an input signal reconstruction method according to an embodiment of the present invention.

[0014] Figure 4 It is a schematic waveform diagram of an input signal and an output signal in an input signal reconstruction device according to an embodiment of the present invention.

[0015] Figure 5 It is an enlarged schematic waveform diagram of the input signal and the output signal in the input signal reconstruction device according to an embodiment of the present invention.

[0016] Figure 6 is a schematic block diagram of an electronic device according to an embodiment of the present invention.

[0017] The corresponding relationship between the reference numerals and the components is as follows:

[0018] Input signal reconstruction device 1; microcontroller unit 11; input signal IN_SIG; output signal OUT_SIG; processing unit 110; timer 111; pulse width modulator 112; peripheral device direct memory access device 113; trigger signal TOUT; mask signal MASK; reset signal RST; steps S30~S35; electronic device 5; functional circuit 2; pulse widths DT1, DT2, DT3, DT1', DT2', DT3'. DETAILED DESCRIPTION

[0019] Detailed specific embodiments of the present invention will be disclosed herein. However, it should be understood that the disclosed embodiments are only typical examples of the present invention, and the present invention can be implemented in a variety of alternative forms. Therefore, the specific structural and functional details disclosed herein are not restrictive, but are only based on the claims as a representative principle to illustrate different embodiments to those skilled in the art. To facilitate understanding of the present invention, the following is described in conjunction with the accompanying drawings.

[0020] See also Figure 1 , Figure 1 1 is a schematic block diagram of an input signal reconstruction device according to an embodiment of the present invention. The input signal reconstruction device 1 provided by the present invention is implemented by a microcontroller unit 11, which is mainly used to generate an output signal OUT_SIG after reconstructing the input signal IN_SIG. Different from the prior art, the processing unit 110 will not intervene at all during the input signal reconstruction process. The processing unit 110 will only initialize the microcontroller unit 11 before the input signal is reconstructed. Therefore, during the input signal reconstruction process, the processing unit 110 will not be occupied, but can perform other processing and reduce power consumption.

[0021] See also Figure 1 and Figure 4 , Figure 4 is a schematic waveform diagram of an input signal and an output signal in an input signal reconstruction device according to an embodiment of the present invention. Figure 4 It can be seen that the input signal IN_SIG is composed of a plurality of continuous pulses of high level, and the pulse widths of the plurality of continuous pulses are DT1, DT2, and DT3, respectively, and there is a first specific period between the plurality of continuous pulses. The input signal IN_SIG can be an external clock signal, for example, generated by an oscillating quartz circuit or other types of oscillating circuits. Due to interference from external noise or other factors, the pulse widths DT1, DT2, and DT3 of the plurality of continuous pulses are different from each other, resulting in the input signal IN_SIG having to be further reconstructed. Therefore, the input signal reconstruction device 1 uses the microcontroller 11 included therein to reconstruct the input signal IN_SIG and generate an output signal OUT_SIG.

[0022] The output signal OUT_SIG is also composed of a plurality of continuous pulses of high level, and the pulse widths of the plurality of continuous pulses are DT1', DT2', DT3', respectively, and there is a second specific period between the plurality of continuous pulses. The input signal is reconstructed by the input signal reconstruction device 1, and the pulse widths DT1', DT2', DT3' of the plurality of continuous pulses of the output signal OUT_SIG are the same as each other. Furthermore, in this embodiment, the second specific period of the output signal OUT_SIG is equal to the first specific period of the input signal IN_SIG, but the present invention is not limited to this. In other embodiments, the second specific period of the output signal OUT_SIG may be an integer multiple of the first specific period of the input signal IN_SIG, such as 2 times or 3 times. In other words, the input signal reconstruction device 1 of the present invention can not only adjust the pulse width of the pulse of the input signal IN_SIG to a fixed pulse width (the pulse widths DT1', DT2', DT3' of multiple pulses of the output signal OUT_SIG are the same as each other), but can also adjust the first specific period of the input signal IN_SIG (the second specific period of the output signal OUT_SIG can be an integer multiple of the first specific period of the input signal IN_SIG).

[0023] See also Figure 1 , Figure 4 and Figure 5 , Figure 5 1 is an enlarged schematic waveform diagram of the input signal and the output signal in the input signal reconstruction device of the embodiment of the present invention. Since the input signal reconstruction device 1 directly reconstructs the input signal using the hardware of the microcontroller 11, the operation time is fast and there will not be too much delay DL (the delay DL is about 104 nanoseconds, which is defined as the time between the rising edge of the input signal IN_SIG and the rising edge of the output signal OUT_SIG), so the generated output signal OUT_SIG can be used as a high-precision reference clock signal.

[0024] Please refer to Figure 1 and Figure 2 , Figure 21 is a schematic block diagram of a microcontroller unit in an input signal reconstruction device according to an embodiment of the present invention. The microcontroller unit 11 used in the input signal reconstruction device 1 must include a timer 111 (timer), a pulse width modulator (PWM) 112, a peripheral device direct memory access (PDMA) 113 and a processing unit (CPU) 110, wherein the timer 111 is electrically connected to the pulse width modulator 112 and the peripheral device direct memory access 113, the peripheral device direct memory access 113 is electrically connected to the pulse width modulator 112, and the processing unit 110 is electrically connected to the timer 111, the pulse width modulator 112 and the peripheral device direct memory access 113. Before performing input signal reconstruction, the processing unit 110 executes software to initialize the timer 111, the pulse width modulator 112 and the peripheral device direct memory access 113. The microcontroller unit 11 of the above-mentioned architecture can be a microcontroller unit of models such as M029G, M030G, and M031G manufactured by Nuvoton Technology Co., Ltd., but the present invention is not limited thereto. Additionally, the pulse width modulator 112 may be a basic pulse width modulator (BPWM) or an enhanced pulse width modulator (EPWM).

[0025] After the timer 111, the pulse width modulator 112 and the peripheral device direct memory access device 113 are initialized, the input signal reconstruction will be performed. During the process of input signal reconstruction, the processing unit 110 will not intervene at all, and only the hardware such as the timer 111, the pulse width modulator 112 and the peripheral device direct memory access device 113 will cooperate to reconstruct the input signal IN_SIG and generate the output signal OUT_SIG. In detail, during the process of input signal reconstruction, the timer 111 receives the input signal IN_SIG. When a specific edge of the input signal IN_SIG arrives, the timer 111 updates the count value. When the count value reaches a specific value, the timer generates a trigger signal CNT to trigger the pulse width modulator 112, so that the pulse width modulator 112 outputs a pulse with a specific pulse width and a first level as the output signal OUT_SIG. Afterwards, the trigger signal CNT of the timer 111 triggers the peripheral device direct memory access device 113, and the peripheral device direct memory access device 113 changes the output signal OUT_SIG generated by the pulse width modulator 112 to the second level through the mask signal MASK, and resets the pulse width modulator 112 through the reset signal RST.

[0026] The specific edge may be a rising edge or a falling edge, the first level and the second level may be a high level and a low level, respectively, or the first level and the second level may be a low level and a high level, respectively. For the convenience of explanation, the following content is explained by taking "the specific edge may be a rising edge", "the first level and the second level may be a high level and a low level, respectively", and "the second specific period of the output signal OUT_SIG is equal to the first specific period of the input signal IN_SIG" as examples.

[0027] Please also refer to Figure 2 and Figure 3 , Figure 3 1 is a schematic flow chart of an input signal reconstruction method according to an embodiment of the present invention. The input signal reconstruction method is executed in the microcontroller unit 11 used in the input signal reconstruction device 1. First, in step S30, the pulse width modulator 112 is initialized. Further, the process of initializing the pulse width modulator 112 includes: the specific period between the multiple pulses of the high level output by the pulse width modulator 112 is set to 2 unit cycle time, the comparison value of the pulse width modulator 112 is set to 1 unit intensity, and the output levels of the zero point, comparison point, and cycle point of the pulse width modulator 112 are all set to low level, and the pulse width modulator 112 output is enabled to make the output signal OUT_SIG low level; and the clock source of the pulse width modulator 112 is set to select the timer 111, and the output levels of the zero point, comparison point, and cycle point of the pulse width modulator 112 are all set to high level. Further, the setting of the output levels of the zero point, comparison point, and cycle point of the pulse width modulator 112 is to avoid generating an erroneous output signal OUT_SIG.

[0028] In step S31, the peripheral device direct memory access device 113 is initialized. The process of initializing the peripheral device direct memory access device includes: the peripheral device direct memory access device 113 uses the scatter gather mode, and is set to when the peripheral device direct memory access device 113 is triggered, the peripheral device direct memory access device 113 first shields the pulse width modulator 112, so that the output signal OUT_SIG generated by the pulse width modulator 112 is low, and then the peripheral device direct memory access device 113 resets the pulse width modulator 112 back to the initialized state. It should also be noted that the peripheral device direct memory access device 113 can directly access the memory ( Figure 2 (not shown) and obtain instructions to directly control other hardware.

[0029] In step S32, the timer 111 is initialized. The process of initializing the timer 111 includes: the specific value of the timer 111 is set to 1; the timer 111 is set to update the count value when the rising edge of the input signal IN_SIG arrives, the timer 111 is set to trigger the pulse width modulator 112 first and then trigger the peripheral device direct memory access device 113 when the count value reaches the specific value; and the timer 111 is set to enable and receive the input signal IN_SIG. Please note that the specific value of the timer 111 can be set to 2 or other integers, so that the second specific period of the output signal OUT_SIG can be twice or other integer multiples of the first specific period of the input signal IN_SIG.

[0030] After the initialization is completed, in step S33, the timer 111 receives the input signal IN_SIG, and updates its count value at each rising edge of the input signal IN_SIG, and determines whether its count value reaches a specific value. If the count value reaches the specific value, step S34 is then executed, otherwise, step S33 is executed again.

[0031] In step S34, since the count value reaches a specific value, the timer 111 generates a trigger signal CNT to trigger the pulse width modulator 112. After being triggered, the pulse width modulator 112 outputs a pulse with a specific pulse width and a high level as the output signal OUT_SIG. Then, in step S35, the timer 112 triggers the peripheral device direct memory access device 113. The peripheral device direct memory access device 113 makes the output signal generated by the pulse width modulator 112 become a low level and resets the pulse width modulator 112. After step S35, step S33 is continuously executed again.

[0032] Finally, please refer to Figure 6 is a schematic block diagram of an electronic device according to an embodiment of the present invention. The electronic device 5 includes the above-mentioned input signal reconstruction device 1 and a functional circuit 2, wherein the functional circuit 2 is electrically connected to the input signal reconstruction device 1. The functional circuit 2 is used to use the output signal OUT_SIG generated by the input signal reconstruction device 1 as a reference clock signal to perform functional operations according to the reference clock signal. The functional circuit 2 is related to the type of the electronic device 1, such as but not limited to various digital, analog or mixed circuits, and the electronic device 5 can be a household appliance, a computer device, an audio-visual device, a handheld device, an automated processing equipment, a semiconductor process equipment or a communication device, and the present invention is not limited thereto.

[0033] In summary, in the technical solution of the present invention, after the microcontroller unit is initialized through the execution software of its processing unit, the processing unit will not intervene in the process of reconstructing the input signal, but will directly reconstruct the input signal using the internal hardware of the microcontroller unit. Therefore, the present invention will not have the technical problems of the prior art in which the execution program takes more computing time, occupies the processing unit, and wastes power when reconstructing the input signal. Accordingly, the technical solution of the present invention generates a reference clock signal with high accuracy, and can also effectively reduce power consumption and free up the processing unit for other processing. Furthermore, the technical solution of the present invention is implemented using an existing microcontroller unit, so there is no need to design other additional circuits, which can effectively reduce hardware costs and design costs, and accelerate the time for electronic equipment to be put on the market.

[0034] The present invention is described in detail above in conjunction with the accompanying drawings and embodiments. A person skilled in the art can make various variations of the present invention according to the above description. Therefore, certain details in the embodiments should not constitute a limitation of the present invention, and the scope of protection of the present invention shall be defined by the scope of the attached claims.

Claims

1. An input signal reconstruction device, characterized in that: The input signal reconstruction device comprises: a microcontroller unit, comprising a timer, a pulse width modulator, a peripheral device direct memory access device, and a processing unit, wherein the timer is electrically connected to the pulse width modulator and the peripheral device direct memory access device, the peripheral device direct memory access device is electrically connected to the pulse width modulator, and the processing unit is electrically connected to the timer, the pulse width modulator, and the peripheral device direct memory access device; After the timer, the pulse width modulator and the peripheral device direct memory access device are initialized by software executed by the processing unit, the microcontroller unit receives an input signal, reconstructs the input signal, and generates an output signal without the intervention of the processing unit, wherein the timer receives the input signal, and when a specific edge of the input signal arrives, the timer updates a count value, and when the count value reaches a specific value, the timer triggers the pulse width modulator to output a pulse with a specific pulse width and a first level as the output signal, and then the timer triggers the peripheral device direct memory access device, and the peripheral device direct memory access device changes the output signal generated by the pulse width modulator to a second level and resets the pulse width modulator.

2. The input signal reconstruction device according to claim 1, characterized in that: The input signal is a signal of multiple continuous pulses with a first specific period, and the output signal is a signal of multiple continuous pulses with a second specific period and the specific pulse width, wherein the second specific period is an integer multiple of the first specific period.

3. The input signal reconstruction device according to claim 2, characterized in that: The specific edge is a rising edge or a falling edge; the first level and the second level are respectively a high level and a low level, or the first level and the second level are respectively the low level and the high level; and the second specific period is equal to the first specific period.

4. The input signal reconstruction device according to claim 3, characterized in that: The process of initializing the pulse width modulator includes: A specific period between the plurality of pulses of the high level output by the pulse width modulator is set to 2 unit cycle times, a comparison value of the pulse width modulator is set to 1 unit intensity, and the output levels of a zero point, a comparison point, and a cycle point of the pulse width modulator are all set to the low level, and the output of the pulse width modulator is enabled so that the output signal is the low level; and A clock source of the pulse width modulator is set to select the timer, and the output levels of the zero point, the comparison point, and the period point of the pulse width modulator are all set to the high level.

5. The input signal reconstruction device according to claim 4, characterized in that: The process of initializing the peripheral device direct memory access device includes the following steps: The peripheral device direct memory access device uses a gather-and-scatter mode and is configured such that when the peripheral device direct memory access device is triggered, the peripheral device direct memory access device first shields the pulse width modulator so that the output signal generated by the pulse width modulator is at the low level, and then the peripheral device direct memory access device resets the pulse width modulator back to an initialized state.

6. The input signal reconstruction device according to claim 5, characterized in that: The process of initializing the timer includes: The specific value of the timer is set to 1; The timer is configured to update the count value when the rising edge of the input signal arrives, and the timer is configured to first trigger the pulse width modulator and then trigger the peripheral direct memory access device when the count value reaches the specific value; and The timer is configured to be enabled and used to receive the input signal.

7. The input signal reconstruction device according to claim 1, wherein: The pulse width modulator is a basic pulse width modulator or an enhanced pulse width modulator.

8. An electronic device, characterized in that: The electronic device comprises: An input signal reconstruction device as claimed in any one of claims 1 to 7; and A functional circuit is electrically connected to the input signal reconstruction device and is used to use the output signal generated by the input signal reconstruction device as a reference clock signal to perform functional operations according to the reference clock signal.

9. The electronic device according to claim 8, characterized in that: The electronic device is a household electrical appliance, a computer device, an audio-visual device, a handheld device, an automated processing device, a semiconductor process device or a communication device.

10. A method for reconstructing an input signal, characterized in that: The input signal reconstruction method is executed in a microcontroller unit, the microcontroller unit includes a timer, a pulse width modulator, a peripheral device direct memory access device and a processing unit, wherein the timer is electrically connected to the pulse width modulator and the peripheral device direct memory access device, the peripheral device direct memory access device is electrically connected to the pulse width modulator, the processing unit is electrically connected to the timer, the pulse width modulator and the peripheral device direct memory access device, and the input signal reconstruction method includes: The processing unit executes a software to initialize the pulse width modulator, the peripheral direct memory access device and the timer; and After the pulse width modulator, the peripheral device direct memory access device and the timer are initialized, the microcontroller unit receives an input signal, reconstructs the input signal and generates an output signal without the intervention of the processing unit, wherein the timer receives the input signal, and when a rising edge of the input signal arrives, the timer updates a count value, and when the count value reaches a specific value, the timer triggers the pulse width modulator to output a pulse with a specific pulse width and a high level as the output signal, and then the timer triggers the peripheral device direct memory access device, and the peripheral device direct memory access device causes the output signal generated by the pulse width modulator to become a low level and resets the pulse width modulator.

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