Transistor switching circuit, battery acquisition system and electronic equipment

Abstract

The invention provides a transistor switching circuit and electronic equipment. An on-off module of the circuit comprises back-to-back MOS (Metal Oxide Semiconductor) tubes; the bias module is coupled between the grid electrode and the source electrode of the back-to-back MOS tube and is used for controlling the turn-on voltage of the on-off module; the first end of the high-voltage MOS tube is coupled to the bias module, and the second end and the grid electrode of the high-voltage MOS tube are coupled to the corresponding working voltage ports through the corresponding current sources; the pull-up current source is used for providing working current of the bias module; and the pull-down current source is used for controlling the on-off of the back-to-back MOS tube and the high-voltage MOS tube, so that a body diode of the high-voltage MOS tube plays a reverse current limiting role, the safety of the circuit is ensured when voltage and current impact occurs at the first port or high voltage occurs at the low-working-voltage port, and when the on-off module needs to be switched on, the on-off of the on-off module is not influenced. The high-voltage PMOS tube and the back-to-back MOS tube are started at the same time, starting of the circuit is not affected, and no extra current flows into a pin to generate errors.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and in particular to a transistor switch circuit, a battery collection system and electronic equipment. Background Art

[0002] Hot plugging and unplugging will cause voltage and current shocks to capacitive components such as capacitors in chips or circuits, causing abnormal operation of the chips or circuits and affecting the normal operation of the system.

[0003] To avoid this problem, chips or circuits with hot-swap functions will add TVS tubes to the hot-swap-related power input pins to absorb the impact, and add protection circuits to the internal pin circuits of the chip. The main purpose of the external and internal protection circuits is to limit the voltage of the input pins. However, the limited voltage still has a large voltage difference for the switches inside the chip, which can still easily cause damage to the switches.

[0004] Therefore, how to improve the heat-resistant plugging capability of the switch while ensuring the safety of the switch during operation has become a technical problem that urgently needs to be solved in the industry. Summary of the invention

[0005] The present invention provides a transistor switch circuit, a battery collection system and an electronic device, which solve the technical problem of how to improve the heat-resistant plugging capability of the switch while ensuring the safety of the switch during operation.

[0006] According to a first aspect of the present invention, an embodiment of the present invention provides a transistor switch circuit connected between a first port and a second port in a target circuit system, wherein the circuit system at least provides a high operating voltage port and a low operating voltage port, and the circuit comprises:

[0007] A switch module, comprising back-to-back MOS tubes, wherein a first end of the switch module is coupled to a first port, and a second end of the switch module is coupled to a second port;

[0008] A bias module, coupled between the gate and source of the back-to-back MOS tube, the bias module is used to control the start voltage of the on-off module;

[0009] A high-voltage MOS tube, wherein a first end is coupled to the bias module, a second end is coupled to a high working voltage port through a pull-up current source, or is coupled to a low working voltage port through a pull-down current source, and a gate is coupled to a low working voltage port through the pull-down current source, or is coupled to a high working voltage port through the pull-up current source; a high-voltage body diode of the high-voltage MOS tube is used to reverse bias when the voltage of the first port is higher than the voltage of the high working voltage port, or when the voltage of the low working voltage port is higher than the voltage of the first port;

[0010] The pull-up current source is used to provide the working current of the bias module;

[0011] The pull-down current source has a control end receiving a control signal for controlling the on-off of the back-to-back MOS tube and the high-voltage MOS tube, so as to control the on-off of the path between the first port and the second port.

[0012] Optionally, the back-to-back MOS tube includes a first MOS tube and a second MOS tube;

[0013] The drain of the first MOS tube is coupled to the first port, the drain of the second MOS tube is coupled to the second port, the source of the first MOS tube and the source of the second MOS tube are connected in series through a first node, and the gate of the first MOS tube and the gate of the second MOS tube are connected in series through a second node.

[0014] In the transistor switch circuit as described in claim 2, the first MOS tube, the second MOS tube and the high-voltage MOS tube are all PMOS tubes, then the second node is coupled to the low operating voltage port through the pull-down current source, the source of the high-voltage MOS tube is coupled to the bias module, the drain is coupled to the high operating voltage port through the pull-up current source, and the gate is coupled to the low operating voltage port through the pull-down current source.

[0015] Optionally, the bias module includes a first resistive device;

[0016] The first end of the first resistive device is coupled to the first node, the first end of the first resistive device is also coupled to the source of the high-voltage MOS tube, and the second end of the first resistive device is coupled to the second node.

[0017] Optionally, the current provided by the pull-up current source is equal to the current provided by the pull-down current source.

[0018] Optionally, the bias module includes a second resistive device, a third MOS tube and a clamping unit;

[0019] The source of the third MOS tube and the first end of the second resistive device are both coupled to the source of the high-voltage MOS tube, the drain of the third MOS tube is coupled to the second low operating voltage port, the gate of the third MOS tube is coupled to the first node, the gate of the third MOS tube is also coupled to the source of the third MOS tube through the clamping unit, and the second end of the second resistive device is coupled to the second node.

[0020] Optionally, the clamping unit includes a Zener diode, an anode of the Zener diode is coupled to the gate of the third MOS tube, and a cathode of the Zener diode is coupled to the source of the third MOS tube.

[0021] Optionally, the third MOS tube is a PMOS tube.

[0022] Optionally, the current provided by the pull-up current source is greater than the current provided by the pull-down current source.

[0023] Optionally, the first MOS tube, the second MOS tube and the high-voltage MOS tube are all NMOS tubes, then the second node is coupled to the high operating voltage port through the pull-up current source, the source of the high-voltage MOS tube is coupled to the bias module, the drain is coupled to the low operating voltage port through the pull-down current source, and the gate is coupled to the high operating voltage port through the pull-up current source.

[0024] Optionally, the bias module includes a third resistive device;

[0025] The first end of the third resistive device is coupled to the first node, the first end of the third resistive device is also coupled to the source of the high-voltage MOS tube, and the second end of the third resistive device is coupled to the second node.

[0026] Optionally, the current provided by the pull-up current source is equal to the current provided by the pull-down current source.

[0027] According to a second aspect of the present invention, an embodiment of the present invention provides a battery collection system, including:

[0028] A battery module, comprising N batteries connected in series, wherein a first end of each battery module is coupled to a collection pin of a battery collection chip through a resistor, wherein N is an integer and is greater than or equal to 1;

[0029] The battery collection chip comprises:

[0030] N battery detection input terminals, each of which is coupled to the corresponding acquisition pin via a high-voltage switch, and the high-voltage switch adopts the transistor switch circuit as described in any one of the first aspects of the present invention;

[0031] A power supply input terminal, wherein the power supply input terminal is coupled to the battery module via a resistor, and the power supply input terminal is also grounded via a capacitor.

[0032] According to a third aspect of the present invention, an embodiment of the present invention provides an electronic device, comprising a transistor switch circuit as described in any one of the first aspects of the present invention.

[0033] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0034] In the transistor switch circuit and electronic device of the technical solution of the present invention, the on-off module of the circuit includes a back-to-back MOS tube; the bias module is coupled between the gate and the source of the back-to-back MOS tube, and is used to control the start-up voltage of the on-off module; the first end of the high-voltage MOS tube is coupled to the bias module, and the second end and the gate are coupled to the corresponding working voltage port through the corresponding current source; the pull-up current source is used to provide the working current of the bias module; the pull-down current source is used to control the on-off of the back-to-back MOS tube and the high-voltage MOS tube, so that the present invention uses the body diode of the high-voltage MOS tube to play a role of reverse current limiting, and ensures the safety of the circuit when a voltage and current impact occurs at the first port, or a high voltage occurs at the low working voltage port, and when the on-off module needs to be turned on, the high-voltage PMOS tube and the back-to-back MOS tube are turned on at the same time, which does not affect the circuit opening, and no additional current flows into the pin to generate errors.

[0035] The battery collection system of the technical solution of the present invention includes: a battery module, including N batteries connected in series, the first end of the battery module is coupled to a collection pin of the battery collection chip through a resistor, wherein N is an integer, and N is greater than or equal to 1; a battery collection chip, including: N battery detection input terminals, each battery detection input terminal is coupled to the corresponding collection pin through a high-voltage switch, and the high-voltage switch adopts a transistor switch circuit such as any one of the technical solutions of the present invention; a power supply input terminal, the power supply input terminal is coupled to the first port, the power supply input terminal is also coupled to the battery module through a resistor, and the power supply input terminal is also grounded through a capacitor. Therefore, when a voltage and current impact occurs at the collection pin, or electrostatic discharge occurs at the low working voltage port, the high-voltage switch ensures safety by using a high-voltage MOS tube, and when the circuit is working normally, the voltage drop of the high-voltage switch is small, thereby ensuring the safety and accuracy of the circuit operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0037] Figure 1 is a block diagram of a battery collection system of the prior art;

[0038] Figure 2 The circuit structure of the high voltage switch of the prior art Figure 1 ;

[0039] Figure 3 The circuit structure of the high voltage switch of the prior art Figure 2 ;

[0040] Figure 4 The circuit structure of the high voltage switch of the prior art Figure 3 ;

[0041] Figure 5 A circuit structure of a transistor switch circuit provided by an embodiment of the present invention Figure 1 ;

[0042] Figure 6 A circuit structure of a transistor switch circuit provided by an embodiment of the present invention Figure 2 ;

[0043] Figure 7 A circuit structure of a transistor switch circuit provided by an embodiment of the present invention Figure 3 ;

[0044] Figure 8 A circuit structure of a transistor switch circuit provided by an embodiment of the present invention Figure 4 ;

[0045] Fig. 9 The invention provides a block diagram of a battery collection system.

[0046] Reference numerals:

[0047] M1-first MOS tube;

[0048] M2-second MOS tube;

[0049] I1-first current source;

[0050] I2-second current source;

[0051] I3 - pull-down current source;

[0052] I4 - pull-up current source;

[0053] R1-first resistive device;

[0054] R2-second resistive device;

[0055] R3-the third resistive device;

[0056] M3-the third MOS tube;

[0057] 201- clamping unit;

[0058] A-first port;

[0059] B-second port;

[0060] VP-high working voltage port;

[0061] VS1- low operating voltage port;

[0062] VS2-The second lowest operating voltage port. DETAILED DESCRIPTION

[0063] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0064] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0065] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0066] As described in the background art, it is currently difficult to improve the heat-resistant pluggable capability of a switch while ensuring the safety of the switch during operation.

[0067] Please refer to Figure 1 , Figure 1 A block diagram of a battery collection system is shown, including:

[0068] The battery module 11 includes N batteries connected in series, and the first end of each battery module is coupled to a collection pin of a battery collection chip through a resistor Rcin, wherein N is an integer and N is greater than or equal to 1;

[0069] The off-chip protection module 12 includes N first TVS tubes, and the first end of each first TVS tube is coupled to a collection pin corresponding to the battery collection chip;

[0070] The battery collection chip 13 includes:

[0071] N battery detection input terminals 131, each of which is coupled to the corresponding acquisition pin via a high voltage switch 132;

[0072] A power supply input terminal, which is coupled to the battery module 11 through a resistor Rpower, and is also grounded through a capacitor C1, and is used to supply power to the battery collection chip;

[0073] The on-chip protection module 133 includes N second TVS tubes, and the first end of each second TVS tube is coupled to a corresponding collection pin.

[0074] It can be seen that the main purpose of the off-chip and on-chip protection circuits is to limit the voltage of the input pin. The battery collection system in the prior art still lacks protection for the high-voltage switch. During hot plugging, the voltage of the collection pin will still cause damage to the high-voltage switch and the power supply input terminal.

[0075] Therefore, please refer to Figure 2 , Figure 2 The structure diagram of a high voltage switch in the prior art is shown, comprising:

[0076] A first MOS transistor M1, a second MOS transistor M2, a first current source I1, a second current source I2 and a bias module; the bias module includes a second resistive device R2, a third MOS transistor M3 and a clamping unit 201;

[0077] The first end of the first MOS transistor M1 is coupled to the first port A, the second end of the first MOS transistor M1 and the first end of the second MOS transistor M2 are coupled to the first node, the second end of the second MOS transistor M2 is coupled to the second port B, and the gate of the first MOS transistor M1 and the gate of the second MOS transistor M2 are both coupled to the second node;

[0078] A first end of the first current source I1 is coupled to a low operating voltage port VS1, a second end of the first current source I1 is coupled to the second node, a first end of the clamping unit 201 and a gate of the third MOS tube M3 are both coupled to the first node, a second end of the third MOS tube is coupled to a second low operating voltage port VS2, a second end of the clamping unit 201 is coupled to a second end of the third MOS tube, a second end of the third MOS tube M3 is also coupled to a high operating voltage port VP through the second current source I2, a first end of the second resistive device R2 is coupled to a second end of the third MOS tube M3, and a second end of the second resistive device R2 is coupled to the second node.

[0079] In this embodiment, since the first MOS transistor M1 has a body diode, if only the first port A is powered on, the voltage of the low working voltage port VS1 is close to the ground level, so that there will be a current path from the first port A to the low working voltage port VS1, and the path will bring about current shock and voltage shock at the same time. When the voltage exceeds the capacity of the clamping unit 201, the third MOS transistor M3 will have an overvoltage problem. When the current is too large, the current flowing to the low working voltage port VS1 will exceed the maximum current density that can be tolerated in the current path, causing problems such as the circuit being burned.

[0080] To solve this problem, in one implementation, a resistor can be connected in series in the current path to reduce the current. Please refer to Figure 3 It can be seen that the above-mentioned high-voltage switch further includes a first resistor R1', and the first resistor R1' is connected in series between the second current source I2 and the first end of the third MOS tube M3.

[0081] However, the first resistor R1' will compress the margin of the pull-up current, resulting in a reduction in the pull-up current during normal operation. This reduced pull-up current will affect the current flow direction of the circuit, causing the current to flow from the first port A into the above current path when turned on, which will increase the measurement error of the battery collection.

[0082] In another embodiment, please refer to Figure 4 It can be seen that the above-mentioned high-voltage switch further includes a second resistor R2 ′, and the second resistor R2 ′ is connected in series between the second end of the second current source I2 and the first end of the clamping unit 201 .

[0083] However, the second resistor R2 ′ will increase the gate-source voltage (Vgs) of the third MOS transistor M3 , thereby increasing the risk of the third MOS transistor M3 being broken down.

[0084] In summary, it is difficult for the existing technology to simultaneously improve the heat-resistant pluggable capability of the switch and ensure that the switch has good accuracy and safety during normal operation.

[0085] In order to solve the above problems, an embodiment of the present invention provides a transistor switch circuit, wherein the on-off module of the circuit includes a back-to-back MOS tube; a bias module is coupled between the gate and the source of the back-to-back MOS tube, and is used to control the start-up voltage of the on-off module; the first end of the high-voltage MOS tube is coupled to the bias module, and the second end and the gate are coupled to the corresponding working voltage port through the corresponding current source; the pull-up current source is used to provide the working current of the bias module; the pull-down current source is used to control the on-off of the back-to-back MOS tube and the high-voltage MOS tube, so that the present invention uses the body diode of the high-voltage MOS tube to play a role of reverse current limiting, and ensures the safety of the circuit when a voltage and current impact occurs at the first port or electrostatic discharge occurs at the low working voltage port, and when the on-off module needs to be turned on, the high-voltage PMOS tube and the back-to-back MOS tube are turned on at the same time, which does not affect the circuit startup, and no additional current flows into the pin to generate errors.

[0086] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0087] In one implementation, a transistor switch circuit provided by an embodiment of the present invention is connected between a first port A and a second port B in a target circuit system, wherein the circuit system at least provides a high working voltage port VP and a low working voltage port VS1, and the circuit includes:

[0088] A switch module, comprising back-to-back MOS tubes, wherein a first end of the switch module is coupled to a first port A, and a second end of the switch module is coupled to a second port B;

[0089] A bias module, coupled between the gate and source of the back-to-back MOS tube, the bias module is used to control the start voltage of the on-off module;

[0090] A high-voltage MOS tube M4, a first end coupled to the bias module, a second end coupled to the high working voltage port VP through a pull-up current source I4, or coupled to the low working voltage port VS1 through a pull-down current source I3, a gate coupled to the low working voltage port VS1 through the pull-down current source I3, or coupled to the high working voltage port VP through the pull-up current source I4; a high-voltage body diode of the high-voltage MOS tube M4 is used to reverse bias when the voltage of the first port is higher than the voltage of the high working voltage port VP, or when the low working voltage port VS1 is higher than the voltage of the first port;

[0091] The pull-up current source I4 is used to provide the working current of the bias module;

[0092] The pull-down current source I3 has a control terminal receiving a control signal for controlling the on / off of the back-to-back MOS transistors and the high-voltage MOS transistor M4 to control the on / off of the path between the first port and the second port.

[0093] In a specific implementation, please continue to refer to Figure 5 , the back-to-back MOS tubes include a first MOS tube M1 and a second MOS tube M2;

[0094] The drain of the first MOS tube M1 is coupled to the first port A, the drain of the second MOS tube M2 is coupled to the second port B, the source of the first MOS tube M1 and the source of the second MOS tube M2 are connected in series through a first node, and the gate of the first MOS tube M1 and the gate of the second MOS tube M2 are connected in series through a second node.

[0095] exist Figure 5 In the example, the first MOS tube, the second MOS tube and the high-voltage MOS tube are all PMOS tubes, then the second node is coupled to the low operating voltage port VS1 through the pull-down current source I3, the source of the high-voltage MOS tube is coupled to the bias module, the drain is coupled to the high operating voltage port VP through the pull-up current source I4, and the gate is coupled to the low operating voltage port VS1 through the pull-down current source I3.

[0096] It can be seen that in Figure 5 In the example, the high-voltage body diode of the high-voltage PMOS tube is used to reverse bias when the voltage of the first port is higher than the voltage of the high operating voltage port VP, withstand the voltage difference between the first port and the high operating voltage port VP, and the reverse bias current is less than the safety threshold current.

[0097] The reverse bias current can be understood as the reverse leakage current of the body diode. Furthermore, the high-voltage body diode of the high-voltage MOS tube M4 is subjected to the voltage difference between the first port and the high working voltage port VP when reverse biased, and the leakage current generated is also within the circuit safety range.

[0098] It can be seen that when the voltage of the first port A is higher than the voltage of the high working voltage port VP, the present invention utilizes the body diode of the high-voltage MOS tube M4 to play a role of reverse current limiting. When the path between the first port A and the second port B needs to be turned on, the high-voltage MOS tube M4 and the back-to-back MOS tubes are turned on at the same time, and the voltage drop is small, which does not affect the normal opening of the circuit, and does not generate additional current flowing into the pin to generate errors when the path is turned on, thereby ensuring the safety of the circuit operation.

[0099] In the back-to-back MOS tube, the body diode of the switch tube forms a PN-NP structure, so that when the transistor switch circuit is turned off, no leakage occurs through the body diode.

[0100] Now, in the case where the first MOS transistor M1 , the second MOS transistor M2 , and the high-voltage MOS transistor M4 are all PMOS transistors, the bias module of the present invention is further described.

[0101] In a specific implementation, please refer to Figure 5 , the bias module includes a first resistive device R1;

[0102] The first end of the first resistive device R1 is coupled to the first node, the first end of the first resistive device R1 is also coupled to the source of the high-voltage MOS transistor M4, and the second end of the first resistive device R1 is coupled to the second node.

[0103] Thus, when the pull-down current source I3 controls the conduction of the common-gate and common-source MOS tube and the high-voltage MOS tube M4, the first resistive device R1 can use the voltage of the first port A to bias the voltage of the third end of the on-off module, so that the voltage of the second node follows the voltage of the first port A.

[0104] exist Figure 5 In the example, the resistive device is a resistor, however, it should be understood that in actual applications, the type and quantity of the resistive device can be adjusted according to the actual circuit. For example, the resistive device may include one or more resistors R, or may also include one or more transistors, or may also include resistors and transistors at the same time.

[0105] In order to prevent leakage from the first port A to the high working voltage port VP, Figure 5 In the example, the current provided by the pull-up current source I4 is equal to the current provided by the pull-down current source I3.

[0106] Therefore, the present invention utilizes the pull-up current source I4 and the pull-down current source I3 to eliminate the possible leakage problem in a differential manner.

[0107] It can be seen that in Figure 5 In the example, when the first port A is powered on before the high working voltage port VP, since the body diode of the high-voltage MOS tube M4 can withstand a large voltage, the body diode of the PMOS tube will limit the large current from flowing from the first port A to the high working voltage port VP;

[0108] When the path between the first port A and the second port B needs to be turned on (i.e., during normal operation), the gate of the high-voltage MOS tube M4 is pulled down together with the back-to-back MOS tubes, the high-voltage MOS tube M4 is turned on, and the bias current flows through the first resistive device R1, thereby biasing the first MOS tube M1 and the second MOS tube M2, so that the high-voltage MOS tube and the back-to-back MOS tube are turned on at the same time, the voltage drop is small, and the normal opening of the circuit is not affected, and no additional current flows into the pin to cause an error when the path is turned on.

[0109] In another specific embodiment, please refer to Figure 6 , the bias module includes a second resistive device R2, a third MOS tube M3 and a clamping unit 201;

[0110] The source of the third MOS tube M3 and the first end of the second resistive device R2 are both coupled to the source of the high-voltage MOS tube M4, the drain of the third MOS tube M3 is coupled to the second low operating voltage port VS2, the gate of the third MOS tube M3 is coupled to the first node, the gate of the third MOS tube M3 is also coupled to the source of the third MOS tube M3 through the clamping unit 201, and the second end of the second resistive device R2 is coupled to the second node.

[0111] exist Figure 6 In the example, the third MOS tube is a PMOS tube.

[0112] In practical applications, the source and substrate of the high-voltage MOS tube M4 are both connected to the third MOS tube M3 .

[0113] It should be understood that, in actual operation, the voltages provided by the low operating voltage port VS1 and the second low operating voltage port VS2 may be the same or different.

[0114] exist Figure 6 In the example of , the third MOS tube M3 and the pull-up current source I4 together form a source follower. Figure 6 In the example, the current provided by the pull-up current source I4 is greater than the current provided by the pull-down current source I3.

[0115] It can be seen that in Figure 6 In the example, when the first port A is powered on before the high working voltage port VP, since the body diode of the high-voltage MOS tube M4 can withstand a large voltage, the body diode of the PMOS tube will limit the large current from flowing from the first port A to the high working voltage port VP;

[0116] During normal operation, the gate of the high-voltage MOS tube M4 is pulled down together with the back-to-back MOS tubes, the high-voltage MOS tube M4 is turned on, and the bias current flows through the second resistive device R2, thereby biasing the first MOS tube M1 and the second MOS tube M2, so that the high-voltage MOS tube and the back-to-back MOS tubes are turned on at the same time, the voltage drop is small and does not affect the normal opening of the circuit, and no additional current will flow into the pin to cause errors when the path is turned on, thereby ensuring the safety of the circuit operation.

[0117] As an example, see Figure 7 The clamping unit 201 includes a Zener diode, an anode of the Zener diode is coupled to the gate of the third MOS transistor M3, and a cathode of the Zener diode is coupled to the source of the third MOS transistor M3.

[0118] It should be understood that the present invention does not limit the specific structure of the clamping unit 201. As long as the circuit or device can achieve the clamping function, it is within the protection scope of the present invention.

[0119] The present invention does not limit the types of back-to-back MOS tubes. In another embodiment, please refer to Figure 8 , the first MOS tube M1, the second MOS tube M2 and the high-voltage MOS tube M4 are all NMOS tubes, then the second node is coupled to the high working voltage port VP through the pull-up current source I4, the source of the high-voltage MOS tube M4 is coupled to the bias module, the drain is coupled to the low working voltage port VS1 through the pull-down current source I3, and the gate is coupled to the high working voltage port VP through the pull-up current source I4.

[0120] exist Figure 8 In the example, if the high-voltage MOS tube M4 does not exist, the voltage of the low operating voltage port VS1 is higher than that of the first port A. For example, when electrostatic discharge (ESD discharge) occurs at the low operating voltage port VS1, the voltage of the low operating voltage port VS1 will be higher than that of the first port A, which will cause the low operating voltage port VS1, the body diode of the pull-down current source I3, the bias module, and the body diode of the first MOS tube M1 to form a current path, resulting in conduction between the low operating voltage port VS1 and the first port A, affecting the safety of the circuit.

[0121] By setting the high-voltage MOS tube M4 of the present invention, it can be seen that the body diode of the high-voltage MOS tube M4 will be reverse biased when the voltage of the low operating voltage port VS1 is higher than the voltage of the first port A, thereby avoiding conduction between the low operating voltage port VS1 and the first port A. Its working principle is similar to that of the above-mentioned back-to-back MOS tubes and the case where the high-voltage MOS tube M4 is a PMOS tube, and the present invention will not be repeated here.

[0122] exist Figure 8 In the example, the bias module includes a third resistive device R3;

[0123] The first end of the third resistive device R3 is coupled to the first node, the first end of the third resistive device R3 is also coupled to the source of the high-voltage MOS tube M4, and the second end of the third resistive device R3 is coupled to the second node.

[0124] In this case, the current provided by the pull-up current source I4 is equal to the current provided by the pull-down current source I3.

[0125] Of course, the present invention does not limit the composition of the bias module. The bias module of the present invention is used to control the turn-on voltage of the second node in the on-off module. As long as the circuit can achieve this function, it is within the protection scope of the present invention. Correspondingly, the size of the pull-up current source and the pull-down current source can also be set based on needs.

[0126] In summary, the present invention designs a circuit whose on-off module includes a back-to-back MOS tube; a bias module is coupled between the gate and the source of the back-to-back MOS tube, and is used to control the start-up voltage of the on-off module; the first end of the high-voltage MOS tube is coupled to the bias module, and the second end and the gate are coupled to the corresponding working voltage port through the corresponding current source; the pull-up current source I4 is used to provide the working current of the bias module; the pull-down current source I3 is used to control the on-off of the back-to-back MOS tube and the high-voltage MOS tube, so that the present invention uses the body diode of the high-voltage MOS tube to play a role of reverse current limiting, and ensures the safety of the circuit when a voltage and current impact occurs at the first port, or a high voltage occurs at the low working voltage port VS1, and when the on-off module needs to be turned on, the high-voltage PMOS tube and the back-to-back MOS tube are turned on at the same time, which does not affect the circuit opening, and no additional current flows into the pin to generate errors.

[0127] In addition, please refer to Fig. 9 The present invention also provides a battery collection system, comprising:

[0128] The battery module 31 includes N batteries (Cell1 to CellN) connected in series, and the first end of each battery module 31 is coupled to a collection pin of a battery collection chip through a resistor Rcin, wherein N is an integer and N is greater than or equal to 1;

[0129] The battery collection chip 32 includes:

[0130] N battery detection input terminals, each of which is coupled to the corresponding acquisition pin through a high-voltage switch 321, and the high-voltage switch 321 adopts a transistor switch circuit as described in any one of the above items;

[0131] A power supply input terminal VP is coupled to the battery module 31 via a resistor Rpower, and is also grounded via a capacitor C1.

[0132] It can be seen that, since the battery collection system adopts the transistor switch circuit provided by the present invention, when a voltage or current shock occurs at the collection pin (equivalent to the first port A) or electrostatic discharge occurs at the low working voltage port VS1, the high-voltage switch can use the body diode of the high-voltage MOS tube to withstand the high voltage difference and perform reverse current limiting, thereby ensuring the safety of the high-voltage switch. When the circuit works normally, the voltage drop of the high-voltage switch is small, thereby ensuring the safety and accuracy of the circuit operation.

[0133] In addition, an embodiment of the present invention further provides an electronic device, comprising any of the transistor switch circuits described above. For example, the electronic device may be a hot-swappable hard disk, a power device, etc. The present invention is not limited to this.

[0134] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A transistor switch circuit, characterized in that: connected between a first port and a second port in a target circuit system, the circuit system providing at least a high operating voltage port and a low operating voltage port, the circuit comprising: A switch module, comprising back-to-back MOS tubes, wherein a first end of the switch module is coupled to a first port, and a second end of the switch module is coupled to a second port; A bias module, coupled between the gate and source of the back-to-back MOS tube, the bias module is used to control the start voltage of the on-off module; A high-voltage MOS tube, wherein a first end is coupled to the bias module, a second end is coupled to a high working voltage port through a pull-up current source, or is coupled to a low working voltage port through a pull-down current source, and a gate is coupled to a low working voltage port through the pull-down current source, or is coupled to a high working voltage port through the pull-up current source; a high-voltage body diode of the high-voltage MOS tube is used to reverse bias when the voltage of the first port is higher than the voltage of the high working voltage port, or when the voltage of the low working voltage port is higher than the voltage of the first port; The pull-up current source is used to provide the working current of the bias module; The pull-down current source has a control end receiving a control signal for controlling the on-off of the back-to-back MOS tube and the high-voltage MOS tube, so as to control the on-off of the path between the first port and the second port.

2. The transistor switch circuit according to claim 1, characterized in that: The back-to-back MOS tube includes a first MOS tube and a second MOS tube; The drain of the first MOS tube is coupled to the first port, the drain of the second MOS tube is coupled to the second port, the source of the first MOS tube and the source of the second MOS tube are connected in series through a first node, and the gate of the first MOS tube and the gate of the second MOS tube are connected in series through a second node.

3. The transistor switch circuit according to claim 2, characterized in that: The first MOS tube, the second MOS tube and the high-voltage MOS tube are all PMOS tubes, then the second node is coupled to the low operating voltage port through the pull-down current source, the source of the high-voltage MOS tube is coupled to the bias module, the drain is coupled to the high operating voltage port through the pull-up current source, and the gate is coupled to the low operating voltage port through the pull-down current source.

4. The transistor switch circuit according to claim 3, characterized in that: The bias module includes a first resistive device; The first end of the first resistive device is coupled to the first node, the first end of the first resistive device is also coupled to the source of the high-voltage MOS tube, and the second end of the first resistive device is coupled to the second node.

5. The transistor switch circuit according to claim 4, characterized in that: The current provided by the pull-up current source is equal to the current provided by the pull-down current source.

6. The transistor switch circuit according to claim 3, characterized in that: The bias module includes a second resistive device, a third MOS tube and a clamping unit; The source of the third MOS tube and the first end of the second resistive device are both coupled to the source of the high-voltage MOS tube, the drain of the third MOS tube is coupled to the second low operating voltage port, the gate of the third MOS tube is coupled to the first node, the gate of the third MOS tube is also coupled to the source of the third MOS tube through the clamping unit, and the second end of the second resistive device is coupled to the second node.

7. The transistor switch circuit according to claim 6, characterized in that: The clamping unit includes a Zener diode, an anode of the Zener diode is coupled to the gate of the third MOS tube, and a cathode of the Zener diode is coupled to the source of the third MOS tube.

8. The transistor switch circuit according to claim 6, characterized in that: The third MOS tube is a PMOS tube.

9. The transistor switch circuit according to claim 6, characterized in that: The current provided by the pull-up current source is greater than the current provided by the pull-down current source.

10. The transistor switch circuit according to claim 2, characterized in that: The first MOS tube, the second MOS tube and the high-voltage MOS tube are all NMOS tubes, then the second node is coupled to the high operating voltage port through the pull-up current source, the source of the high-voltage MOS tube is coupled to the bias module, the drain is coupled to the low operating voltage port through the pull-down current source, and the gate is coupled to the high operating voltage port through the pull-up current source.

11. The transistor switch circuit according to claim 10, characterized in that: The bias module includes a third resistive device; The first end of the third resistive device is coupled to the first node, the first end of the third resistive device is also coupled to the source of the high-voltage MOS tube, and the second end of the third resistive device is coupled to the second node.

12. The transistor switch circuit according to claim 11, wherein: The current provided by the pull-up current source is equal to the current provided by the pull-down current source.

13. A battery collection system, characterized in that: include: A battery module, comprising N batteries connected in series, wherein a first end of each battery module is coupled to a collection pin of a battery collection chip through a resistor, wherein N is an integer and is greater than or equal to 1; The battery collection chip comprises: N battery detection input terminals, each battery detection input terminal is coupled to the corresponding acquisition pin through a high-voltage switch, and the high-voltage switch adopts the transistor switch circuit according to any one of claims 1 to 12; A power supply input terminal, wherein the power supply input terminal is coupled to the battery module via a resistor, and the power supply input terminal is also grounded via a capacitor.

14. An electronic device, characterized in that: The invention comprises a transistor switch circuit as claimed in any one of claims 1 to 12.

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