Assembly line management method, processor, computer equipment, medium and chip

Abstract

The invention provides an assembly line management method, a processor, computer equipment, a medium and a chip, and belongs to the technical field of chips and semiconductors. The method comprises the steps of determining a first assembly line based on a plurality of instructions of the same category; in the process of executing a first instruction based on the first assembly line, for any stage in the multiple stages, when the first instruction is in the stage, detecting whether the first instruction is abnormal or not in the stage; under the condition that the first instruction is abnormal, carrying out retransmission operation on the first instruction; according to the execution process of a second instruction in the first assembly line, the second instruction continues to be executed on the basis of the first assembly line, and the second instruction is an instruction which is executed after the first instruction in the multiple instructions and is not abnormal currently. According to the technical scheme, the execution efficiency of multiple instructions and the utilization rate of an assembly line are improved.

Description

Technical Field

[0001] The present application relates to the field of chips and semiconductor technology, and in particular to a pipeline management method, processor, computer equipment, medium and chip. Background Art

[0002] With the development of computer technology, it is becoming more and more common to use processors to execute instructions to achieve various tasks. For any instruction, the processor executes the instruction according to the pipeline corresponding to the category to which the instruction belongs. In the process of executing instructions, many abnormal scenarios may be encountered, such as virtual-to-real address conversion cache miss, insufficient access address permission, and other abnormalities, which hinder the implementation of tasks. How to handle the exceptions encountered in the pipeline to improve the performance of the processor is the focus of research in this field.

[0003] At present, a back pressure-based approach is usually used to handle exceptions in the pipeline. For any pipeline, the pipeline can include multiple stages. For example, the pipeline includes four stages, s0 to s3. If an exception occurs in the s2 stage of instruction 1, such as a data cache miss exception, the processor stalls the pipeline process, and the instruction 1 will stay in the s2 stage until the data cache miss is resolved, and then the flow of the pipeline is restored.

[0004] However, in the above technical solution, due to the stagnation of the pipeline, the subsequent instructions of instruction 1 cannot flow through the s2 stage, and are back-pressed by the s2 stage and stay in their respective stages. For example, when instruction 1 stays in the s2 stage, the subsequent instruction 2 stays in the s1 stage, and instruction 3 stays in the s0 stage. Therefore, the execution of the instructions is hindered, resulting in low performance of the processor in achieving the task. Especially when encountering a situation where the abnormality resolution time is long, the performance impact on the processor processing pipeline is particularly obvious. Summary of the invention

[0005] The embodiment of the present application provides a pipeline management method, processor, computer device, medium and chip, which resends the first instruction with an exception so that the first instruction will not block the operation of the pipeline due to the exception, and subsequent instructions can continue to be executed based on the pipeline, thereby improving the execution efficiency of multiple instructions and the utilization rate of the pipeline. The technical solution is as follows:

[0006] In one aspect, a method for managing an assembly line is provided, the method comprising:

[0007] Based on a plurality of instructions of the same category, determining a first pipeline, the first pipeline comprising a plurality of stages in the execution of the instructions of the category;

[0008] In a process of executing a first instruction based on the first pipeline, for any stage of the multiple stages, when the first instruction is in the stage, detecting whether the first instruction is abnormal in the stage, the first instruction being any instruction of the multiple instructions;

[0009] In the case where the first instruction is abnormal, a resending operation is performed on the first instruction, wherein the resending operation is used to instruct to re-execute the first instruction;

[0010] According to the execution process of the second instruction in the first pipeline, the second instruction continues to be executed based on the first pipeline, where the second instruction is an instruction in the execution order after the first instruction among the multiple instructions, is being executed and has no exception at present.

[0011] In another aspect, a processor is provided, the processor comprising: a pipeline determination unit, an anomaly detection unit, a retransmission unit, and an instruction execution unit;

[0012] The pipeline determination unit is used to determine a first pipeline based on a plurality of instructions of the same category, wherein the first pipeline includes a plurality of stages in the execution process of the instructions of the category;

[0013] The exception detection unit is configured to detect whether there is an exception in any stage of the multiple stages when the first instruction is in the stage during execution of the first instruction based on the first pipeline, wherein the first instruction is any instruction of the multiple instructions;

[0014] The resending unit is configured to resend the first instruction when an exception occurs in the first instruction, wherein the resending operation is used to instruct to re-execute the first instruction;

[0015] The instruction execution unit is used to continue to execute the second instruction based on the first pipeline according to the execution process of the second instruction in the first pipeline, where the second instruction is an instruction among the multiple instructions that is executed after the first instruction in the execution order, is being executed and has no exceptions at present.

[0016] In some embodiments, the retransmission unit includes: an online retransmission interface, a retransmission queue interface, an instruction scheduler, and a retransmission queue;

[0017] The online resending interface is used for sending an online resending request of the first instruction to the instruction scheduler when there is an exception in the first instruction and if the exception of the first instruction meets a preset condition, the preset condition is used to indicate an index of the degree of influence of the exception of the instruction on the execution of the multiple instructions, and the online resending request is used to instruct to re-execute the first instruction at the current moment;

[0018] The instruction scheduler is used to resend the first instruction based on the online resend request;

[0019] The resend queue interface is used to send the first instruction to the resend queue if the exception of the first instruction does not meet the preset condition;

[0020] The resend queue is used to temporarily store instructions that have abnormalities during execution;

[0021] The instruction scheduler is further configured to resend the first instruction based on the resend queue.

[0022] In some embodiments, the retransmission unit further comprises: a reservation station interface and a reservation station;

[0023] The reservation station interface is used to send the first instruction to the reservation station when the retransmission queue is full;

[0024] The reservation station is used to temporarily store instructions that have abnormalities during execution;

[0025] The instruction scheduler is further configured to reissue the first instruction based on the reservation station.

[0026] In some embodiments, the instruction scheduler is used to reschedule the first instruction for execution at the current moment if the retransmission source of the first instruction is the online retransmission request, and the retransmission source is used to indicate the source of the first instruction when the first instruction is retransmitted; if the retransmission source of the first instruction is the retransmission queue, then when the third instruction has been restarted, the first instruction is rescheduled for execution, and the third instruction is the instruction that needs to be reexecuted as indicated by the online retransmission request; if the retransmission source of the first instruction is the reservation station, then when the fourth instruction has been restarted, the first instruction is rescheduled for execution, and the fourth instruction is the instruction in the retransmission queue.

[0027] In some embodiments, the processor further comprises: a termination execution unit;

[0028] The termination execution unit is used to close other stages in the first pipeline that are located after the stage if the stage currently located by the first instruction is not the last stage in the first pipeline.

[0029] In some embodiments, the retransmission unit further comprises: a pipeline equalization unit;

[0030] The pipeline balancing unit is used to transfer the first instruction from the first pipeline to the second pipeline if the exception of the first instruction is that the required resources are occupied by instructions in the second pipeline, the second pipeline and the first pipeline are used to execute instructions of the same category, and the priority of the second pipeline is higher than that of the first pipeline;

[0031] The instruction execution unit is further configured to execute the first instruction based on the second pipeline.

[0032] In some embodiments, the processor further comprises: a forward matching unit;

[0033] The forward matching unit is used to determine a fifth instruction based on data corresponding to the first instruction, where the fifth instruction is an instruction that belongs to the same category as the first instruction and has a data dependency relationship, and the first instruction depends on the fifth instruction; if the fifth instruction has been executed, the first instruction is executed based on the pipeline where the fifth instruction is located.

[0034] In another aspect, a pipeline management device is provided, the device comprising:

[0035] A first determination module, configured to determine a first pipeline based on a plurality of instructions of the same category, wherein the first pipeline includes a plurality of stages in an execution process of the instructions of the category;

[0036] a detection module, configured to detect whether there is an abnormality in any stage of the multiple stages when the first instruction is in the stage during execution of the first instruction based on the first pipeline, wherein the first instruction is any instruction of the multiple instructions;

[0037] a resending module, configured to resend the first instruction when an exception occurs in the first instruction, wherein the resending operation is used to instruct to re-execute the first instruction;

[0038] An execution module is used to continue to execute the second instruction based on the first pipeline according to the execution process of the second instruction in the first pipeline, where the second instruction is an instruction in the execution order after the first instruction among the multiple instructions, is being executed and has no exceptions.

[0039] In some embodiments, the retransmission module includes:

[0040] a generating unit, configured to generate an online retransmission request for the first instruction when an exception exists in the first instruction and if the exception of the first instruction satisfies a preset condition, wherein the preset condition is used to indicate an index of the degree of influence of the exception of the instruction on the execution of the plurality of instructions, and the online retransmission request is used to instruct to re-execute the first instruction at a current moment;

[0041] A resending unit, configured to resend the first instruction based on the online resending request;

[0042] a storage unit, configured to store the first instruction in a retransmission queue if the exception of the first instruction does not satisfy the preset condition, wherein the retransmission queue is configured to temporarily store instructions in which the exception occurs during execution;

[0043] The retransmission unit is further configured to retransmit the first instruction based on the retransmission queue.

[0044] In some embodiments, the storage unit is further used to store the first instruction in a reservation station when the retransmission queue is full, and the reservation station is used to temporarily store instructions that have abnormalities during execution;

[0045] The resending unit is further configured to resend the first instruction based on the reservation station.

[0046] In some embodiments, the retransmission unit is used to re-execute the first instruction at the current moment if the retransmission source of the first instruction is the online retransmission request, and the retransmission source is used to indicate the source of the first instruction when the first instruction is retransmitted; if the retransmission source of the first instruction is the retransmission queue, then when the third instruction has been restarted, the first instruction is re-executed, and the third instruction is the instruction that needs to be re-executed as indicated by the online retransmission request; if the retransmission source of the first instruction is the reservation station, then when the fourth instruction has been restarted, the first instruction is re-executed, and the fourth instruction is the instruction in the retransmission queue.

[0047] In some embodiments, the apparatus further comprises:

[0048] The processing module is used for closing other stages in the first pipeline that are located after the stage if the stage currently located in the first instruction is not the last stage in the first pipeline.

[0049] In some embodiments, the retransmission module is used to transfer the first instruction from the first pipeline to the second pipeline if the exception of the first instruction is that the required resources are occupied by instructions in the second pipeline, and the second pipeline and the first pipeline are used to execute instructions of the same category, and the priority of the second pipeline is higher than that of the first pipeline; based on the second pipeline, the first instruction is executed.

[0050] In some embodiments, the apparatus further comprises:

[0051] The second determination module is used to determine a fifth instruction based on data corresponding to the first instruction, where the fifth instruction is an instruction that belongs to the same category as the first instruction and has a data dependency relationship, and the first instruction depends on the fifth instruction; if the fifth instruction has been executed, the first instruction is executed based on the pipeline where the fifth instruction is located.

[0052] On the other hand, a computer device is provided, which includes a processor and a memory, wherein the memory is used to store at least one computer program, and the at least one computer program is loaded and executed by the processor to implement the pipeline management method in the embodiment of the present application.

[0053] On the other hand, a computer-readable storage medium is provided, in which at least one computer program is stored. The at least one computer program is loaded and executed by a processor to implement a pipeline management method as in an embodiment of the present application.

[0054] On the other hand, a chip is provided, which includes a programmable logic circuit and / or program instructions. When the chip runs on a computer device, it is used to implement the pipeline management method in the embodiment of the present application.

[0055] On the other hand, a computer program product is provided, including a computer program, which is stored in a computer-readable storage medium. A processor of a computer device reads the computer program from the computer-readable storage medium, and the processor executes the computer program, so that the computer device executes the pipeline management method provided in the above-mentioned various aspects or various optional implementations of various aspects.

[0056] The embodiment of the present application provides a pipeline management method. Since the execution principles and processes of instructions of the same category are the same, for multiple instructions of the same category, a pipeline that can reflect the execution process of the instructions of the category can be used to execute the multiple instructions; since in the process of the first instruction being executed forward stage by stage according to the multiple stages of the pipeline, the second instruction whose execution order is after the first instruction also follows closely and is executed forward stage by stage, and the execution progress is in the stage after the execution progress of the first instruction, when the first instruction has an exception during the execution process, the first instruction is reissued, the current execution process of the first instruction is stopped, and a new execution process is started , restart the execution of the first instruction; and for the second instruction whose execution order is after the first instruction, if there is no exception in the second instruction, since the first instruction has triggered the reissue operation, it will not occupy the next stage required by the second instruction in the pipeline, and the second instruction can continue to be executed according to the stages in the pipeline. That is, by reissuing the first instruction that has an exception, the first instruction will not block the operation of the pipeline due to the exception, and subsequent instructions can continue to be executed based on the pipeline. This is a non-blocking pipeline management method, which improves the execution efficiency of multiple instructions and the utilization rate of the pipeline, that is, improves the performance of executing instructions based on the pipeline. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0058] Figure 1 It is a schematic diagram of an implementation environment of a pipeline management method provided according to an embodiment of the present application;

[0059] Figure 2 is a flow chart of a method for managing an assembly line provided according to an embodiment of the present application;

[0060] Figure 3 is a schematic diagram of an execution instruction provided according to an embodiment of the present application;

[0061] Figure 4 is a flow chart of another assembly line management method provided according to an embodiment of the present application;

[0062] Figure 5 is a schematic diagram of an exception handling circuit provided according to an embodiment of the present application;

[0063] Figure 6is a schematic diagram of instruction reallocation provided according to an embodiment of the present application;

[0064] Figure 7 is a schematic diagram of a management pipeline provided according to an embodiment of the present application;

[0065] Figure 8 is a block diagram of a pipeline management device provided according to an embodiment of the present application;

[0066] Fig. 9 is a block diagram of another pipeline management device provided according to an embodiment of the present application;

[0067] Fig.10 is a structural block diagram of a terminal provided according to an embodiment of the present application;

[0068] Fig.11 It is a structural diagram of a server provided according to an embodiment of the present application. DETAILED DESCRIPTION

[0069] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0070] In this application, the terms "first", "second", etc. are used to distinguish identical or similar items with substantially the same effects and functions. It should be understood that there is no logical or temporal dependency between "first", "second", and "nth", nor are there any limitations on quantity and execution order.

[0071] In the present application, the term "at least one" means one or more, and the term "plurality" means two or more.

[0072] It should be noted that the information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data used for analysis, stored data, displayed data, etc.) and signals involved in this application are all authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of relevant countries and regions. For example, the instructions involved in this application are all obtained with full authorization.

[0073] For ease of understanding, the terms involved in this application are explained below.

[0074] Artificial Intelligence (AI) is the theory, method, technology and application system that uses digital computers or machines controlled by digital computers to simulate, extend and expand human intelligence, perceive the environment, acquire knowledge and use knowledge to obtain the best results. In other words, artificial intelligence is a comprehensive technology in computer science that attempts to understand the essence of intelligence and produce a new intelligent machine that can respond in a similar way to human intelligence. Artificial intelligence is to study the design principles and implementation methods of various intelligent machines so that machines have the functions of perception, reasoning and decision-making.

[0075] Artificial intelligence technology is a comprehensive discipline that covers a wide range of fields, including both hardware-level and software-level technologies. Basic artificial intelligence technologies generally include sensors, dedicated artificial intelligence chips, cloud computing, distributed storage, big data processing technology, pre-trained model technology, operation / interaction systems, mechatronics, etc. Among them, the pre-trained model is also called a large model or a basic model. After fine-tuning, it can be widely used in downstream tasks in various major directions of artificial intelligence. Artificial intelligence software technology mainly includes computer vision technology, speech processing technology, natural language processing technology, and machine learning / deep learning. The pipeline management method provided in the embodiment of the present application can be applied to the processor of an artificial intelligence chip.

[0076] The pipeline management method provided in the embodiment of the present application can be executed by a computer device. In some embodiments, the computer device is a terminal or a server. The following first takes the computer device as an example to introduce the implementation environment of the pipeline management method provided in the embodiment of the present application. Figure 1 Schematic diagram of an implementation environment of a pipeline management method provided according to an embodiment of the present application. Figure 1 The implementation environment includes a terminal 101 and a server 102. The terminal 101 and the server 102 can be directly or indirectly connected via wired or wireless communication, which is not limited in this application.

[0077] In some embodiments, the terminal 101 is a smart phone, a tablet computer, a laptop computer, a desktop computer, a smart speaker, a smart watch, an intelligent voice interaction device, a smart home appliance, a vehicle-mounted terminal, etc., but is not limited thereto. The terminal 101 is equipped with a processor. Schematically, the terminal 101 is a terminal used by a user. The terminal 101 can obtain multiple instructions from the server 102. Then, the terminal 101 executes the management method of the pipeline provided in the present application through the processor to execute the multiple instructions obtained from the server 102 to complete the operation of the multiple instructions. The multiple instructions can be obtained by compiling the language of the machine learning model, and the embodiments of the present application are not limited to this.

[0078] Those skilled in the art will appreciate that the number of the above terminals may be more or less. For example, the above terminal may be only one, or the above terminals may be dozens or hundreds, or more. The embodiment of the present application does not limit the number of terminals and device types.

[0079] In some embodiments, server 102 is an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, CDN (Content Delivery Network), big data and artificial intelligence platforms. Server 102 can provide multiple instructions to terminal 101. Alternatively, server 102 executes the instruction scheduling method provided in the embodiment of the present application, which is not limited by the embodiment of the present application. In some embodiments, server 102 undertakes the main computing work and terminal 101 undertakes the secondary computing work; or, server 102 undertakes the secondary computing work and terminal 101 undertakes the main computing work; or, a distributed computing architecture is used between server 102 and terminal 101 for collaborative computing.

[0080] Figure 2 is a flow chart of a pipeline management method provided according to an embodiment of the present application, see Figure 2 In the embodiment of the present application, the execution by the terminal is taken as an example for explanation. The pipeline management method comprises the following steps:

[0081] 201. A terminal determines a first pipeline based on multiple instructions of the same category, where the first pipeline includes multiple stages in a process of executing instructions of the same category.

[0082] In an embodiment of the present application, multiple instructions may be arithmetic instructions, data transfer instructions, logic instructions, conditional branch instructions or jump instructions, etc., and the embodiment of the present application does not limit the categories of multiple instructions. For multiple instructions of the same category, only the data used in the execution process is different between the multiple instructions, and the execution principle is the same. Accordingly, the terminal can execute multiple instructions of the same type based on the same execution principle (process). That is, for multiple instructions of the same category, the terminal obtains a pipeline that can reflect the execution process of the instructions of the category, i.e., the first pipeline. The first pipeline contains multiple stages for executing the instructions of this type. The embodiment of the present application does not limit the number of steps executed in each stage.

[0083] 202. In a process of executing a first instruction based on a first pipeline, for any stage of multiple stages, when the first instruction is in the stage, the terminal detects whether there is an abnormality in the first instruction at the stage, and the first instruction is any instruction of the multiple instructions.

[0084] In an embodiment of the present application, for any instruction among the multiple instructions, the terminal executes forward stage by stage according to the multiple stages in the first pipeline to implement the execution of the instruction. Taking the first instruction as an example, during the execution of the first instruction, the terminal executes forward the first instruction stage by stage according to the multiple stages in the first pipeline. For any stage in the first pipeline, when the first instruction is executed to the stage, the terminal detects whether there is an abnormality in the first instruction at the stage. The embodiment of the present application does not limit the abnormality of the first instruction.

[0085] 203. When an exception occurs in the first instruction, the terminal resends the first instruction, where the resending operation is used to instruct to re-execute the first instruction.

[0086] In an embodiment of the present application, when it is determined that there is an abnormality in the first instruction, the terminal resends the first instruction. The resending operation refers to re-executing the first instruction based on a pipeline that can reflect the execution process of the first instruction. Among them, the pipeline that can reflect the execution process of the first instruction can be the first pipeline. That is, the terminal re-executes the first instruction based on the pipeline where the first instruction is currently located. Alternatively, the pipeline that can reflect the execution process of the first instruction can be the second pipeline. That is, the terminal re-executes the first instruction based on the new pipeline. The embodiment of the present application does not limit this.

[0087] 204. The terminal continues to execute the second instruction based on the first pipeline according to the execution process of the second instruction in the first pipeline, where the second instruction is an instruction that is executed after the first instruction in the execution order among the multiple instructions and is currently executed without any exception.

[0088] In an embodiment of the present application, during the process of the first instruction being executed step by step according to the multiple stages of the pipeline, the terminal can execute the second instruction located after the first instruction based on the first pipeline. And the execution progress of the second instruction is in the stage after the execution progress of the first instruction. That is, the terminal can execute multiple instructions in parallel based on the first pipeline. The execution progress of the multiple instructions being executed is staggered and positively correlated with the execution order of the multiple instructions. In the case where the first instruction has triggered a resend operation, the terminal stops the current execution process of the first instruction, so it will not occupy the subsequent stage required by the second instruction in the pipeline. If there is no abnormality in the second instruction, the terminal can continue to execute the second instruction forward.

[0089] For example, Figure 3is a schematic diagram of an execution instruction provided according to an embodiment of the present application. Figure 3 , the first pipeline includes the first stage s0, the second stage s1, the third stage s2 and the fourth stage s3. The terminal executes the first instruction forward stage by stage according to the four stages in the first pipeline. When the first instruction is executed to the second stage s1, the terminal can start to execute the second instruction after the first instruction. When the first instruction is executed to the third stage s2, the second instruction is executed to the second stage s1. In this case, the terminal can start to execute the third instruction after the second instruction. The third instruction is in the first stage s0. That is, at the current moment, the instructions being executed in the first pipeline include the first instruction, the second instruction and the third instruction. When the first instruction is abnormal in the third stage s2, the terminal reissues the first instruction. Correspondingly, the terminal can re-execute the first instruction based on the first pipeline. That is, the first instruction is executed forward again from the first stage s0. For any instruction in the second instruction and the third instruction, if there is no abnormality in the instruction, the terminal continues to execute the instruction forward. In the case where there is no data dependency between instructions, the execution of the instructions does not interfere with each other. For example, at the next moment, the second instruction is executed to the third stage s2, the third instruction is executed to the second stage s1, and the first instruction is re-executed and is in the first stage s0.

[0090] The embodiment of the present application provides a pipeline management method. Since the execution principle and process of instructions of the same category are the same, for multiple instructions of the same category, a pipeline that can reflect the execution process of the instructions of the category can be used to execute the multiple instructions; since in the process of the first instruction being executed stage by stage according to the multiple stages of the pipeline, the second instruction whose execution order is after the first instruction also follows closely and is executed stage by stage, and the execution progress is in the stage after the execution progress of the first instruction, when the first instruction has an exception during the execution process, the first instruction is reissued, the current execution process of the first instruction is stopped, and a new execution process is started. Restart execution of the first instruction; and for the second instruction whose execution order is after the first instruction, if there is no exception in the second instruction, since the first instruction has triggered the reissue operation, it will not occupy the next stage required by the second instruction in the pipeline, and the second instruction can continue to be executed forward according to the stages in the pipeline, that is, by reissuing the first instruction with an exception, the first instruction will not block the operation of the pipeline due to the exception, and subsequent instructions can continue to be executed based on the pipeline. This is a non-blocking pipeline management method, which improves the execution efficiency of multiple instructions and the utilization rate of the pipeline, that is, improves the performance of the processor in executing instructions based on the pipeline.

[0091] Figure 4is a flowchart of another pipeline management method provided according to an embodiment of the present application, see Figure 4 In the embodiment of the present application, the execution by the terminal is taken as an example for explanation. The pipeline management method comprises the following steps:

[0092] 401. A terminal determines a first pipeline based on multiple instructions of the same category, where the first pipeline includes multiple stages in a process of executing instructions of the same category.

[0093] In an embodiment of the present application, the execution principle and process of instructions of the same category are the same. The execution principle and process of instructions of different categories are different. The execution principle and process of instructions can be represented by a pipeline. For multiple instructions of the same type, the terminal can use a pipeline that can reflect the execution process of the instructions of the category to execute the multiple instructions. Accordingly, the terminal determines the first pipeline according to the category to which the multiple instructions belong. The first pipeline contains multiple stages experienced during the execution of the instructions of the category. The embodiment of the present application does not limit the number of stages in the first pipeline. Then, for any instruction of the multiple instructions, the terminal can execute the instruction stage by stage based on the multiple stages in the first pipeline. After the instruction executes the last stage in the first pipeline, the instruction is executed, so that the execution result of the instruction can be obtained.

[0094] For example, multiple instructions are data loading instructions (load) in data transmission class instructions. The pipeline of data loading instructions generally includes the following steps: conversion of virtual and real addresses, identification of access address permissions, data cache access, post-processing of read data, and the main pipeline of writing back to the processor. Among them, the "main pipeline" refers to the process of implementing a certain function (or task) and executing the instruction sequence in the program corresponding to the function (or task). The above-mentioned multiple instructions of the same category can come from the same instruction sequence or from different instruction sequences, and the embodiments of the present application are not limited to this.

[0095] In some embodiments, before executing the above-mentioned multiple instructions of the same category based on the first pipeline, the terminal can calculate the priorities of the multiple instructions. Then, the terminal starts to execute the multiple instructions in sequence based on the first pipeline according to the priorities of the multiple instructions. The priority of the instruction is used to reflect the contribution of the execution of the instruction to the entire execution process of the multiple instructions. The embodiment of the present application does not limit the calculation method of the priority of the instruction.

[0096] Optionally, the terminal can predict the confidence of the instruction. Then, the terminal determines the priority of the instruction according to the confidence of the instruction. The confidence is used to indicate the probability that the instruction can be successfully executed during the execution process. The higher the confidence of the instruction, the higher the priority of the instruction; the lower the confidence of the instruction, the lower the priority of the instruction. In the process of predicting the confidence, the terminal can predict the data address to be used by the subsequent instruction to be executed according to the execution of the current instruction through the hardware prefetch unit. Then, the terminal loads the predicted address into the data cache. As a result, the subsequent instructions can directly get the data from the data cache during execution, reducing the probability of data cache miss. That is, for any instruction, the terminal can calculate the confidence of the instruction through the hardware prefetch unit. Then, the terminal sends the instruction to the instruction scheduler. Then, the terminal schedules the instruction according to the priority of the instruction through the instruction scheduler. Then, the terminal executes the scheduled instruction based on the first pipeline. The instruction scheduler can be an SP (Strict Priority) scheduler, which is not limited in the embodiment of the present application.

[0097] 402. In a process of executing a first instruction based on a first pipeline, for any stage of multiple stages, when the first instruction is in the stage, the terminal detects whether there is an abnormality in the stage of the first instruction, and the first instruction is any instruction of the multiple instructions.

[0098] In an embodiment of the present application, during the execution of any instruction, the terminal executes the instruction stage by stage in the order of multiple stages in the first pipeline. Taking the first instruction among multiple instructions as an example, during the execution of the first instruction, when the first instruction is executed to any stage, the terminal detects whether the first instruction has an exception at this stage. Among them, for any stage in the first pipeline, the terminal determines the exception detection circuit corresponding to each of the at least one exception type according to at least one exception type that may appear in this stage. Then, for any exception type, the terminal detects the first instruction according to the exception detection circuit corresponding to the exception type. In the case that the first instruction has an exception, the terminal can mark the instruction based on the exception. The embodiment of the present application does not limit the exception detection method. The exception of the first instruction can be a virtual-real address conversion cache miss, insufficient access address authority, data cache miss or data cache conflict, etc., and the embodiment of the present application does not limit this.

[0099] 403. When there is an exception in the first instruction, if the exception of the first instruction meets a preset condition, the terminal generates an online retransmission request for the first instruction. The preset condition is used to indicate an indicator of the degree of influence of the exception of the instruction on the execution of multiple instructions. The online retransmission request is used to indicate to re-execute the first instruction at the current moment.

[0100] In an embodiment of the present application, the preset condition can be determined based on at least one of the priority of the instruction and the difficulty of the exception, and the embodiment of the present application does not limit this. Among them, the priority of the instruction is used to reflect the contribution of the execution of the instruction to the entire execution process of multiple instructions. For any instruction, the more conducive the execution of the instruction is to the faster execution of multiple instructions, the greater the contribution of the instruction to the entire execution process of multiple instructions, so that the priority of the instruction is higher. The smaller the impact of the execution of the instruction on the faster execution of multiple instructions, the smaller the contribution of the instruction to the entire execution process of multiple instructions, so that the priority of the instruction is lower. The difficulty of the exception refers to the difficulty of resolving the exception. For any instruction, the easier the exception of the instruction is to be resolved, the lower the difficulty of the exception. That is, the least time is consumed to resolve the exception. The more difficult the exception of the instruction is to be resolved, the higher the difficulty of the exception. That is, the most time is consumed to resolve the exception. In other words, the easier it is to avoid a certain exception by reissuing the instruction, the easier it is to resolve the exception.

[0101] The preset conditions can be customized by the technician. That is, the terminal can determine the preset conditions according to the task requirements corresponding to the instruction, and the embodiments of the present application are not limited to this. Among them, "task requirements" refers to the importance of the exception to the task implementation in the process of implementing a task based on the instruction. For example, the basis for implementing a data loading task needs to ensure that data can be accurately obtained, then the preset condition can be a data cache miss. In the case where the exception in the instruction is a data cache miss, the terminal generates an online retransmission request (In_pipe_replay) for the instruction.

[0102] The online resend request is used to instruct the re-execution of the first instruction at the current moment. In other words, once the online resend request is triggered, the terminal can quickly re-execute the first instruction. In this case, the first instruction whose exception meets the preset conditions has the highest priority. The online resend request can also be called a fast resend instruction. In the case where there is an exception in the first instruction, if the exception of the first instruction meets the preset conditions, the terminal can send the online resend request of the first instruction to the instruction scheduler through the online resend interface in the processor, so that the subsequent instruction scheduler can reschedule the first instruction for execution based on the online resend request, thereby realizing the resend operation of the first instruction.

[0103] 404. If the exception of the first instruction does not meet the preset condition, the terminal stores the first instruction in a retransmission queue, where the retransmission queue is used to temporarily store instructions that have exceptions during execution.

[0104] In an embodiment of the present application, when the exception of the first instruction does not meet the preset conditions, the terminal can temporarily store the first instruction in a replay queue. That is, for an instruction with a low priority, if the instruction has an exception, the terminal stores the first instruction in the replay queue. Afterwards, the terminal can re-execute the first instruction according to the replay queue. The number of instructions that can be stored in the replay queue of the embodiment of the present application is not limited. Among them, when the exception of the first instruction does not meet the preset conditions, the terminal can send the first instruction to the replay queue through the replay queue interface in the processor, so that the subsequent instruction scheduler can reschedule the first instruction to be executed based on the replay queue, thereby realizing the retransmission operation of the first instruction.

[0105] 405. When the retransmission queue is full, the terminal stores the first instruction in a reservation station, where the reservation station is used to temporarily store instructions that have abnormalities during execution.

[0106] In an embodiment of the present application, when the retransmission queue is full, the retransmission queue can no longer continue to store abnormal instructions. In this case, when there is an exception in the first instruction and the exception of the first instruction does not meet the preset conditions, the terminal can store the first instruction in the reservation station. The reservation station refers to a temporary register set at the input end of the functional component in order to solve the correlation between data or resources between instructions that enter the pipeline successively. The abnormal instruction can be temporarily stored in the reservation station so that the instruction can be obtained from the reservation station later and re-executed. Among them, when the retransmission queue is full, the terminal can send the first instruction to the reservation station through the reservation station interface in the processor, so that the subsequent instruction scheduler can reschedule the first instruction for execution based on the reservation station, thereby realizing the retransmission operation of the first instruction.

[0107] For example, Figure 5 is a schematic diagram of an exception handling circuit provided according to an embodiment of the present application. Figure 5 , Figure 5 The various exception detection circuits in the first pipeline are exemplarily shown to detect exceptions that may exist in the instruction execution process. Exceptions are generally generated in the second stage s1 and the third stage s2 of the first pipeline. For example, the first exception (replay source 0) and the third exception (replay source 2) will be generated in the second stage s1. Taking the first exception as an example, the terminal detects whether the first instruction has the first exception through the exception detection circuit of the first exception. There are also some exceptions that may be generated in the second stage s1 or in the third stage s2. For example Figure 5The second exception (replay source1) in the process. The terminal adds one beat to the detection result generated in the second stage s1 and performs an OR operation with the detection result generated in the third stage s2 to determine in which stage the second exception exists. Some other exceptions are generated in the third stage s2. For example, the fourth exception (replaysource3) to the eighth exception (replay source7). In the third stage s2, the terminal will perform an OR operation on the detection results of all the above exceptions to determine whether there is an exception in the first instruction and what the exception is. The terminal can also determine whether the replay queue is full. If the replay queue is full, the terminal directly writes it to the reservation station (RS) through the rs_replay_s2 interface. The terminal can also invalidate the subsequent pipeline. That is, when there are many instructions that need to be reissued, the terminal can close the subsequent stages in the pipeline to reduce operating consumption. If the replay queue is not full, the terminal can pass the instruction to the fourth stage s3 (the last stage). In the fourth stage s3, the terminal will select the exceptions with higher priority and send the first instruction to the entrance of the pipeline by triggering an online resend request (in_pipe_replay) so that the first instruction can be re-executed. If the online resend request cannot be responded to at present (i.e. in_pipe_replay.ready is 0), the terminal will send the first instruction to the resend queue. If the resend queue is full at this time, the terminal will write the first instruction to the reservation station through the rs_replay_s3 interface.

[0108] 406. The terminal resends the first instruction based on the online resend request, the resend queue, and the reserved station.

[0109] In the embodiment of the present application, the terminal retransmits the first instruction according to the priorities among the online retransmission request, the retransmission queue and the reservation station. The embodiment of the present application does not limit the priorities among the online retransmission request, the retransmission queue and the reservation station.

[0110] In some embodiments, the priority of the online retransmission request is higher than the priority of the retransmission queue; the priority of the retransmission queue is higher than the priority of the reservation station. Accordingly, the process of the terminal retransmitting the first instruction includes: if the retransmission source of the first instruction is the online retransmission request, the terminal re-executes the first instruction at the current moment. The retransmission source is used to indicate the source of the first instruction when the first instruction is retransmitted. If the retransmission source of the first instruction is the retransmission queue, the terminal re-executes the first instruction when the third instruction has been restarted. The third instruction is the instruction that needs to be re-executed as indicated by the online retransmission request. If the retransmission source of the first instruction is the reservation station, the first instruction is re-executed when the fourth instruction has been restarted. The fourth instruction is the instruction in the retransmission queue. The solution provided by the embodiment of the present application, for instructions from different situations, according to the priority of the retransmission source of the instruction, multiple instructions that need to be re-executed are re-executed in sequence; for instructions that can quickly resolve the exception, the instruction can be quickly re-executed according to the online retransmission request, thereby improving the execution efficiency of the instruction and the utilization rate of the pipeline, that is, improving the performance of the processor based on the pipeline to execute instructions.

[0111] An instruction scheduler is configured at the entrance of each pipeline. The terminal can use the instruction scheduler to schedule multiple instructions based on the priority between instructions. The terminal executes the scheduled instructions. Among them, the instructions scheduled by the instruction scheduler can schedule instructions that have not been executed in addition to the above-mentioned instructions that need to be reissued. That is, the terminal uses the instruction scheduler to schedule the instructions that need to be reissued and the instructions that have not been executed according to the priority of the instructions that need to be reissued and the priority of the instructions that have not been executed, so that they can be executed in sequence according to the scheduling order later. The embodiment of the present application does not limit the priority of the instructions that need to be reissued and the priority of the instructions that have not been executed. The following exemplifies a priority sorting between instructions, but is by no means limited to this. The priorities of the instructions that need to be reissued and the instructions that have not been executed are from high to low:

[0112] 1) Instructions that need to be resent based on the online resend request (In_pipe_replay);

[0113] 2) Resend the instructions in the queue;

[0114] 3) Instructions that have not been executed with high confidence;

[0115] 4) instructions in the reservation station;

[0116] 5) Instructions triggered by forward instructions (Load2load), the forward instructions are used to indicate that if the address of a subsequent instruction is the data loaded by the previous instruction, the subsequent instruction should be processed first.

[0117] 6) Unexecuted instructions with low confidence. The confidence of the instruction can be calculated based on the hardware prefetch unit in the processor, which is not limited in the embodiment of the present application.

[0118] In the embodiment of the present application, when there is an exception in the first instruction, the terminal re-executes the first instruction based on the first pipeline where the first instruction is currently located. Alternatively, the terminal can also re-execute the first instruction based on other pipelines. The embodiment of the present application is not limited to this.

[0119] In some embodiments, the terminal can re-execute the first instruction based on other pipelines. Accordingly, in the case of an exception in the first instruction, the process of the terminal reissuing the first instruction includes: if the exception of the first instruction is that the required resources are occupied by the instructions in the second pipeline, the terminal transfers the first instruction from the first pipeline to the second pipeline. The second pipeline and the first pipeline are used to execute instructions of the same category. The priority of the second pipeline is higher than that of the first pipeline. Then, the terminal executes the first instruction based on the second pipeline. The resource can be a hardware resource such as a register, an adder, or a software resource such as data and a document, and the process can be a process of reallocating instructions. The terminal can reallocate the first instruction to the second pipeline through a pipeline balancing unit (Pipe balance). The embodiment of the present application does not limit this. The solution provided in the embodiment of the present application is to transfer the first instruction from the first pipeline to the second pipeline for re-execution when the resources required by the instruction are occupied by instructions in a pipeline with a higher priority, thereby ensuring that the resources required by the first instruction will not be occupied again and increasing the possibility of successful execution of the first instruction, thereby facilitating improving the execution efficiency of multiple instructions and the utilization rate of the pipeline, that is, improving the performance of the processor in executing instructions based on the pipeline.

[0120] For example, Figure 6 is a schematic diagram of instruction reallocation provided according to an embodiment of the present application. Figure 6, for some exceptions, there will be coupling between the pipelines. For example, multiple pipelines will seize a certain resource, and the instructions in the pipelines that have not seized the resource will be reissued. Usually when seizing resources, the second pipeline (loadpipe0) has the highest priority, followed by the first pipeline (loadpipe1). If the first instruction in the first pipeline is reissued due to a failure to seize resources, if this first instruction still enters the first pipeline, there is still a probability that the first instruction will be reissued again during the execution process due to failure to seize resources, which will affect the execution efficiency of the pipeline. This problem can be solved by the pipeline balancing unit in the embodiment of the present application. That is, when the pipeline balancing unit determines that the first pipeline is reissued due to a failure to seize resources, the reissued instruction (first instruction) sent by the first pipeline will be adjusted to the second pipeline for execution. In this case, the first instruction will not be abnormal again due to resource seizure when it is executed again. This method can achieve balanced scheduling between multiple pipelines, greatly improving the performance of the pipeline.

[0121] In some embodiments, the terminal may select a pipeline to execute based on the instruction on which the first instruction depends. Accordingly, the terminal determines the fifth instruction based on the data corresponding to the first instruction. The fifth instruction is an instruction that belongs to the same category as the first instruction and has a data dependency relationship. The first instruction depends on the fifth instruction. Then, if the fifth instruction has been executed, the terminal executes the first instruction based on the pipeline where the fifth instruction is located. Among them, the terminal may calculate the match vector between the data through the forward matching unit in the processor to determine the fifth instruction on which the first instruction depends, and the embodiment of the present application does not limit this. The scheme provided in the embodiment of the present application provides data support for the execution of the first instruction when the previous instruction on which the first instruction depends is successfully executed. In this case, the first instruction can be executed quickly and preferentially, thereby facilitating the improvement of the execution efficiency of multiple instructions and the utilization rate of the pipeline, that is, improving the performance of the processor in executing instructions based on the pipeline.

[0122] In some embodiments, when the retransmission queue is full, if the stage in which the first instruction is currently located is not the last stage in the first pipeline, the terminal closes other stages in the first pipeline that are located after the stage. In an embodiment of the present application, a solution is provided. When the retransmission queue is full, it means that there are currently more instructions that need to be retransmitted. In this case, the terminal can disable the subsequent pipeline and no longer pass the first instruction to the subsequent stage, which can reduce operating consumption. Among them, the terminal can close other stages in the first pipeline that are located after the stage in which the first instruction is currently located through the termination execution unit in the processor.

[0123] 407. The terminal continues to execute the second instruction based on the first pipeline according to the execution process of the second instruction in the first pipeline. The second instruction is an instruction that is executed after the first instruction in the execution order among the multiple instructions and is currently executed without any exception.

[0124] In an embodiment of the present application, the terminal can execute multiple instructions in parallel based on the first pipeline. That is, in the process of the first instruction being executed step by step according to the multiple stages of the pipeline, the terminal can execute the second instruction located after the first instruction based on the first pipeline. And the execution progress of the second instruction is in a stage after the execution progress of the first instruction. Among them, the execution progresses of the multiple instructions being executed are staggered with each other and are positively correlated with the execution order of the multiple instructions. In the case where the first instruction has triggered a resend operation, the terminal stops the current execution process of the first instruction, so it will not occupy the subsequent stage required by the second instruction in the pipeline. If there is no abnormality in the second instruction, the terminal can continue to execute the second instruction forward.

[0125] In order to more clearly describe the process of managing the pipeline by the processor, the functions of each unit in the processor are introduced below. The processor includes: a pipeline determination unit, an exception detection unit, a reissue unit and an instruction execution unit. Among them, the pipeline determination unit is used to determine the first pipeline based on multiple instructions of the same category. The first pipeline includes multiple stages in the execution process of the instructions of the category. The exception detection unit is used to detect whether the first instruction is abnormal in the stage for any stage of multiple stages when the first instruction is in the stage during the execution of the first instruction based on the first pipeline. The first instruction is any instruction among multiple instructions. The reissue unit is used to reissue the first instruction when the first instruction is abnormal. The reissue operation is used to indicate the re-execution of the first instruction. The instruction execution unit is used to continue to execute the second instruction based on the first pipeline according to the execution process of the second instruction in the first pipeline. The second instruction is an instruction in the execution order of multiple instructions that is after the first instruction, is being executed and is currently free of exceptions. The terminal mainly reissues the instructions with exceptions through the reissue unit in the processor, thereby realizing the management of the pipeline. The function of the retransmission unit is further introduced below in conjunction with the accompanying drawings. Figure 7 is a schematic diagram of a management pipeline provided according to an embodiment of the present application. Figure 7 The second pipeline (loadpipe0) includes the first stage s0, the second stage s1, the third stage s2 and the fourth stage s3. Figure 7 The functions of each unit in the processor.

[0126] See also Figure 7 ,The retransmission unit in the processor includes: an online retransmission interface, a retransmission queue interface, an instruction scheduler and a retransmission queue.

[0127] Online replay interface (in_pipe_replay): When there is an exception in the first instruction, if the exception of the first instruction meets the preset conditions, the online replay request of the first instruction is sent to the instruction scheduler. Among them, the online replay interface is mainly used for those replay instructions with higher priority, which will be directly sent to the entrance of the second pipeline for re-execution, and has the highest priority in the instruction scheduler.

[0128] Resend queue interface: used to send the first instruction to the resend queue if the exception of the first instruction does not meet the preset condition. If the resend queue is not full, the instruction to be resent is directly stored in the resend queue, and the resend queue is then sent to the pipeline entrance for resend;

[0129] Replay Queue: It is used to temporarily store abnormal instructions during execution. It will be emitted when the instruction meets the emission conditions.

[0130] Continue to see Figure 7 , the retransmission unit may also include: a reservation station interface and a reservation station.

[0131] The reservation station interface is used to send the first instruction to the reservation station when the resend queue is full.

[0132] Figure 7 The following two reserved station interfaces are included:

[0133] The reservation station interface of the third stage (rs_replay_s2): When the retransmission queue is full, it means that there are still many instructions that need to be retransmitted. Then the instructions are directly sent to the reservation station through the reservation station interface of the third stage for retransmission.

[0134] The fourth stage reservation station interface (rs_replay_s3): When the retransmission queue is full, it means that there are still many instructions that need to be retransmitted that have not been executed. Then the instructions are directly sent to the reservation station through the fourth stage reservation station interface for retransmission. Through multiple retransmission mechanisms, it can be ensured that instructions with higher priority or instructions whose exceptions can be resolved quickly are re-executed through the fast retransmission channel. For other instructions, they can be retransmitted through the retransmission queue or reservation station, improving the utilization of the pipeline.

[0135] The reservation station is used to temporarily store instructions that have abnormalities during execution.

[0136] Continue to see Figure 7, an instruction scheduler is configured at the entrance of the second pipeline. The terminal can use the instruction scheduler to schedule multiple instructions based on the priority between instructions. The terminal executes the scheduled instructions. The instruction scheduler is used to resend the first instruction based on the online resend request, the resend queue and the reservation station. Among them, the instruction scheduler is used to reschedule the first instruction for execution at the current moment if the resend source of the first instruction is the online resend request, and the resend source is used to indicate the source of the first instruction when resending the first instruction; if the resend source of the first instruction is the resend queue, then if the third instruction has been restarted, the first instruction is rescheduled for execution, and the third instruction is the instruction that needs to be re-executed as indicated by the online resend request; if the resend source of the first instruction is the reservation station, then if the fourth instruction has been restarted, the first instruction is rescheduled for execution, and the fourth instruction is the instruction in the resend queue.

[0137] Continue to see Figure 7 The processor may also include a hardware prefetch unit. The hardware prefetch unit is used to predict the data address to be used by the subsequent instructions to be executed according to the execution status of the current instruction. Then, the terminal loads the predicted address into the data cache. As a result, the subsequent instructions can directly get data from the data cache during execution, reducing the probability of data cache miss.

[0138] The processor may also include a forward matching unit (ld2ld match): used to indicate that if the address of a subsequent instruction is data loaded by a previous instruction, the subsequent instruction should be processed first. The forward matching unit is used to determine a fifth instruction based on the data corresponding to the first instruction, the fifth instruction is an instruction of the same category as the first instruction and has a data dependency relationship, and the first instruction depends on the fifth instruction; if the fifth instruction has been executed, the first instruction is executed based on the pipeline where the fifth instruction is located.

[0139] In addition to the instructions that need to be reissued, the instructions scheduled by the instruction scheduler can also schedule instructions that have not been executed. The confidence of the instructions that have not been executed can be calculated by the hardware prefetch unit or triggered by the forward matching unit to determine the priority.

[0140] Continue to see Figure 7The retransmission unit also includes: a pipeline balancing unit (Pipe balance). The pipeline balancing unit can reallocate instructions according to the exception of the instructions. Optionally, the pipeline balancing unit is used to transfer the first instruction from the first pipeline to the second pipeline if the exception of the first instruction is that the required resources are occupied by the instructions in the second pipeline. The second pipeline and the first pipeline are used to execute instructions of the same category, and the priority of the second pipeline is higher than that of the first pipeline. The instruction execution unit is used to execute the first instruction based on the second pipeline.

[0141] The processor may further include: a termination execution unit. The termination execution unit is configured to close other stages in the first pipeline that are located after the stage in which the first instruction is currently located if the stage in which the first instruction is currently located is not the last stage in the first pipeline.

[0142] The embodiment of the present application provides a pipeline management method. Since the execution principles and processes of instructions of the same category are the same, for multiple instructions of the same category, a pipeline that can reflect the execution process of the instructions of the category can be used to execute the multiple instructions; since in the process of the first instruction being executed forward stage by stage according to the multiple stages of the pipeline, the second instruction whose execution order is after the first instruction also follows closely and is executed forward stage by stage, and the execution progress is in the stage after the execution progress of the first instruction, when the first instruction has an exception during the execution process, the first instruction is reissued, the current execution process of the first instruction is stopped, and a new execution process is started , restart the execution of the first instruction; and for the second instruction whose execution order is after the first instruction, if there is no exception in the second instruction, since the first instruction has triggered the reissue operation, it will not occupy the next stage required by the second instruction in the pipeline, and the second instruction can continue to be executed according to the stages in the pipeline. That is, by reissuing the first instruction that has an exception, the first instruction will not block the operation of the pipeline due to the exception, and subsequent instructions can continue to be executed based on the pipeline. This is a non-blocking pipeline management method, which improves the execution efficiency of multiple instructions and the utilization rate of the pipeline, that is, improves the performance of executing instructions based on the pipeline.

[0143] For the case where the exception in the pipeline is handled by back pressure in the prior art, each exception pair will generate a corresponding back pressure signal, and the back pressure signal will enter each register in the pipeline. The terminal can determine the time when the corresponding exception is generated based on the back pressure signal. If the instruction is to continue to be executed, it is necessary to clarify the relationship between the exceptions according to the time when the exception is generated, so as to handle the exceptions one by one. Since the timing of some exceptions is relatively complex, it will cause the timing of the entire pipeline to be difficult to converge, thereby affecting the execution efficiency of the instructions. The solution provided in the embodiment of the present application, by reissuing the first instruction with an exception, the first instruction will not block the operation of the pipeline due to the exception, and subsequent instructions can continue to be executed based on the pipeline. There is no back pressure signal between the pipelines, and the difficulty of timing convergence is greatly reduced, thereby improving the execution efficiency of multiple instructions and the utilization rate of the pipeline.

[0144] Figure 8 is a block diagram of a pipeline management device provided according to an embodiment of the present application. The device is used to execute the steps of the above pipeline management method, see Figure 8 The pipeline management device includes: a first determination module 801, a detection module 802, a retransmission module 803 and an execution module 804.

[0145] A first determination module 801 is used to determine a first pipeline based on multiple instructions of the same category, where the first pipeline includes multiple stages in the execution process of the instructions of the category;

[0146] A detection module 802 is used for, during the process of executing the first instruction based on the first pipeline, for any stage of the multiple stages, when the first instruction is in the stage, detecting whether the first instruction is abnormal in the stage, the first instruction being any instruction of the multiple instructions;

[0147] A resending module 803, configured to resend the first instruction when an exception occurs in the first instruction, wherein the resending operation is used to instruct to re-execute the first instruction;

[0148] The execution module 804 is used to continue to execute the second instruction based on the first pipeline according to the execution process of the second instruction in the first pipeline, where the second instruction is an instruction that is executed after the first instruction in the execution order among multiple instructions and is currently executed without any exception.

[0149] In some embodiments, Fig. 9 803 is a block diagram of another pipeline management device provided according to an embodiment of the present application. The retransmission module 803 includes:

[0150] A generating unit 8031 ​​is configured to generate an online retransmission request for the first instruction when an exception exists in the first instruction and if the exception of the first instruction satisfies a preset condition, wherein the preset condition is used to indicate an index of the degree of influence of the exception of the instruction on the execution of multiple instructions, and the online retransmission request is used to instruct to re-execute the first instruction at a current moment;

[0151] A retransmission unit 8032, configured to retransmit the first instruction based on an online retransmission request;

[0152] The storage unit 8033 is used to store the first instruction in a retransmission queue if the exception of the first instruction does not meet the preset condition, and the retransmission queue is used to temporarily store the instruction with the exception during the execution process;

[0153] The retransmission unit 8032 is further configured to retransmit the first instruction based on the retransmission queue.

[0154] In some embodiments, see Fig. 9 , the storage unit 8033 is further used to store the first instruction in a reservation station when the retransmission queue is full, and the reservation station is used to temporarily store instructions that have abnormalities during execution;

[0155] The resending unit 8032 is further configured to resend the first instruction based on the reservation station.

[0156] In some embodiments, see Fig. 9 The retransmission unit 8032 is used to re-execute the first instruction at the current moment if the retransmission source of the first instruction is an online retransmission request, and the retransmission source is used to indicate the source of the first instruction when the first instruction is retransmitted; if the retransmission source of the first instruction is a retransmission queue, then the first instruction is re-executed when the third instruction has been restarted, and the third instruction is the instruction that needs to be re-executed as indicated by the online retransmission request; if the retransmission source of the first instruction is a reservation station, then the first instruction is re-executed when the fourth instruction has been restarted, and the fourth instruction is the instruction in the retransmission queue.

[0157] In some embodiments, see Fig. 9 , the device further comprises:

[0158] The processing module 805 is configured to close other stages in the first pipeline that are located after the first instruction if the stage currently in which the first instruction is located is not the last stage in the first pipeline.

[0159] In some embodiments, see Fig. 9The retransmission module 803 is used to transfer the first instruction from the first pipeline to the second pipeline if the exception of the first instruction is that the required resources are occupied by the instructions in the second pipeline. The second pipeline and the first pipeline are used to execute instructions of the same category, and the priority of the second pipeline is higher than that of the first pipeline. Based on the second pipeline, the first instruction is executed.

[0160] In some embodiments, see Fig. 9 , the device further comprises:

[0161] The second determination module 806 is used to determine the fifth instruction based on the data corresponding to the first instruction, where the fifth instruction is an instruction that belongs to the same category as the first instruction and has a data dependency relationship, and the first instruction depends on the fifth instruction; if the fifth instruction has been executed, the first instruction is executed based on the pipeline where the fifth instruction is located.

[0162] The embodiment of the present application provides a pipeline management device. Since the execution principles and processes of instructions of the same category are the same, for multiple instructions of the same category, a pipeline that can reflect the execution process of the instructions of the category can be used to execute the multiple instructions; since in the process of the first instruction being executed forward stage by stage according to the multiple stages of the pipeline, the second instruction whose execution order is after the first instruction also follows closely and is executed forward stage by stage, and the execution progress is in the stage after the execution progress of the first instruction, when the first instruction has an exception during the execution process, the first instruction is reissued, the current execution process of the first instruction is stopped, and a new execution process is started , restart the execution of the first instruction; and for the second instruction whose execution order is after the first instruction, if there is no exception in the second instruction, since the first instruction has triggered the reissue operation, it will not occupy the next stage required by the second instruction in the pipeline, and the second instruction can continue to be executed according to the stages in the pipeline. That is, by reissuing the first instruction that has an exception, the first instruction will not block the operation of the pipeline due to the exception, and subsequent instructions can continue to be executed based on the pipeline. It is a non-blocking pipeline management device, which improves the execution efficiency of multiple instructions and the utilization rate of the pipeline, that is, improves the performance of executing instructions based on the pipeline.

[0163] It should be noted that: the pipeline management device provided in the above embodiment only uses the division of the above functional modules as an example when running an application program. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. In addition, the pipeline management device provided in the above embodiment and the pipeline management method embodiment belong to the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.

[0164] In the embodiments of the present application, the computer device can be configured as a terminal or a server. When the computer device is configured as a terminal, the terminal can be used as the execution subject to implement the technical solution provided in the embodiments of the present application. When the computer device is configured as a server, the server can be used as the execution subject to implement the technical solution provided in the embodiments of the present application. The technical solution provided in the present application can also be implemented through interaction between the terminal and the server. The embodiments of the present application are not limited to this.

[0165] Fig.10 This is a block diagram of a terminal 1000 according to an embodiment of the present application. The terminal 1000 may be a portable mobile terminal, such as a smart phone, a tablet computer, an MP3 player (Moving Picture Experts Group Audio Layer III), an MP4 player (Moving Picture Experts Group Audio Layer IV), a laptop computer or a desktop computer. The terminal 1000 may also be referred to as a user device, a portable terminal, a laptop terminal, a desktop terminal or other names.

[0166] Typically, the terminal 1000 includes a processor 1001 and a memory 1002 .

[0167] The processor 1001 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 1001 may be implemented in at least one hardware form of DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 1001 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a CPU (Central Processing Unit); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 1001 may be integrated with a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 1001 may also include an AI (Artificial Intelligence) processor, which is used to process computing operations related to machine learning.

[0168] The memory 1002 may include one or more computer-readable storage media, which may be non-transitory. The memory 1002 may also include a high-speed random access memory and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In some embodiments, the non-transitory computer-readable storage medium in the memory 1002 is used to store at least one computer program, which is used to be executed by the processor 1001 to implement the pipeline management method provided in the method embodiment of the present application.

[0169] In some embodiments, the terminal 1000 may further optionally include: a peripheral device interface 1003 and at least one peripheral device. The processor 1001, the memory 1002 and the peripheral device interface 1003 may be connected via a bus or a signal line. Each peripheral device may be connected to the peripheral device interface 1003 via a bus, a signal line or a circuit board. Specifically, the peripheral device includes: at least one of a radio frequency circuit 1004, a display screen 1005, a camera assembly 1006, an audio circuit 1007 and a power supply 1008.

[0170] The peripheral device interface 1003 may be used to connect at least one peripheral device related to I / O (Input / Output) to the processor 1001 and the memory 1002. In some embodiments, the processor 1001, the memory 1002, and the peripheral device interface 1003 are integrated on the same chip or circuit board; in some other embodiments, any one or two of the processor 1001, the memory 1002, and the peripheral device interface 1003 may be implemented on a separate chip or circuit board, which is not limited in this embodiment.

[0171] The radio frequency circuit 1004 is used to receive and transmit RF (Radio Frequency) signals, also known as electromagnetic signals. The radio frequency circuit 1004 communicates with the communication network and other communication devices through electromagnetic signals. The radio frequency circuit 1004 converts electrical signals into electromagnetic signals for transmission, or converts received electromagnetic signals into electrical signals. In some embodiments, the radio frequency circuit 1004 includes: an antenna system, an RF transceiver, one or more amplifiers, a tuner, an oscillator, a digital signal processor, a codec chipset, a user identity module card, and the like. The radio frequency circuit 1004 can communicate with other terminals through at least one wireless communication protocol. The wireless communication protocol includes, but is not limited to: the World Wide Web, a metropolitan area network, an intranet, various generations of mobile communication networks (2G, 3G, 4G and 5G), a wireless local area network and / or a WiFi (Wireless Fidelity) network. In some embodiments, the radio frequency circuit 1004 may also include circuits related to NFC (Near Field Communication), which is not limited in this application.

[0172] The display screen 1005 is used to display a UI (User Interface). The UI may include graphics, text, icons, videos, and any combination thereof. When the display screen 1005 is a touch display screen, the display screen 1005 also has the ability to collect touch signals on the surface or above the surface of the display screen 1005. The touch signal can be input to the processor 1001 as a control signal for processing. At this time, the display screen 1005 can also be used to provide virtual buttons and / or virtual keyboards, also known as soft buttons and / or soft keyboards. In some embodiments, the display screen 1005 can be one, arranged on the front panel of the terminal 1000; in other embodiments, the display screen 1005 can be at least two, respectively arranged on different surfaces of the terminal 1000 or in a folding design; in other embodiments, the display screen 1005 can be a flexible display screen, arranged on a curved surface or a folding surface of the terminal 1000. Even, the display screen 1005 can also be arranged as a non-rectangular irregular figure, that is, a special-shaped screen. The display screen 1005 can be made of materials such as LCD (Liquid Crystal Display) and OLED (Organic Light-Emitting Diode).

[0173] The camera assembly 1006 is used to capture images or videos. In some embodiments, the camera assembly 1006 includes a front camera and a rear camera. Typically, the front camera is disposed on the front panel of the terminal, and the rear camera is disposed on the back of the terminal. In some embodiments, there are at least two rear cameras, which are any one of a main camera, a depth of field camera, a wide-angle camera, and a telephoto camera, so as to realize the fusion of the main camera and the depth of field camera to realize the background blur function, the fusion of the main camera and the wide-angle camera to realize the panoramic shooting and VR (Virtual Reality) shooting function or other fusion shooting functions. In some embodiments, the camera assembly 1006 may also include a flash. The flash may be a monochrome temperature flash or a dual-color temperature flash. A dual-color temperature flash refers to a combination of a warm light flash and a cold light flash, which can be used for light compensation at different color temperatures.

[0174] The audio circuit 1007 may include a microphone and a speaker. The microphone is used to collect sound waves from the user and the environment, and convert the sound waves into electrical signals and input them into the processor 1001 for processing, or input them into the radio frequency circuit 1004 to achieve voice communication. For the purpose of stereo acquisition or noise reduction, there may be multiple microphones, which are respectively arranged at different parts of the terminal 1000. The microphone may also be an array microphone or an omnidirectional acquisition microphone. The speaker is used to convert the electrical signal from the processor 1001 or the radio frequency circuit 1004 into sound waves. The speaker may be a traditional film speaker or a piezoelectric ceramic speaker. When the speaker is a piezoelectric ceramic speaker, it can not only convert the electrical signal into sound waves audible to humans, but also convert the electrical signal into sound waves inaudible to humans for purposes such as ranging. In some embodiments, the audio circuit 1007 may also include a headphone jack.

[0175] The power supply 1008 is used to power various components in the terminal 1000. The power supply 1008 can be an alternating current, a direct current, a disposable battery, or a rechargeable battery. When the power supply 1008 includes a rechargeable battery, the rechargeable battery can be a wired rechargeable battery or a wireless rechargeable battery. A wired rechargeable battery is a battery charged through a wired line, and a wireless rechargeable battery is a battery charged through a wireless coil. The rechargeable battery can also be used to support fast charging technology.

[0176] In some embodiments, the terminal 1000 further includes one or more sensors 1009 . The one or more sensors 1009 include, but are not limited to: an acceleration sensor 1010 , a gyroscope sensor 1011 , a pressure sensor 1012 , an optical sensor 1013 , and a proximity sensor 1014 .

[0177] The acceleration sensor 1010 can detect the magnitude of acceleration on the three coordinate axes of the coordinate system established by the terminal 1000. For example, the acceleration sensor 1010 can be used to detect the components of gravity acceleration on the three coordinate axes. The processor 1001 can control the display screen 1005 to display the user interface in a horizontal view or a vertical view according to the gravity acceleration signal collected by the acceleration sensor 1010. The acceleration sensor 1010 can also be used for collecting game or user motion data.

[0178] The gyro sensor 1011 can detect the body direction and rotation angle of the terminal 1000, and the gyro sensor 1011 can cooperate with the acceleration sensor 1010 to collect the user's 3D actions on the terminal 1000. The processor 1001 can implement the following functions based on the data collected by the gyro sensor 1011: motion sensing (such as changing the UI according to the user's tilt operation), image stabilization during shooting, game control, and inertial navigation.

[0179] The pressure sensor 1012 can be set in the side frame of the terminal 1000 and / or the lower layer of the display screen 1005. When the pressure sensor 1012 is set in the side frame of the terminal 1000, it can detect the user's holding signal of the terminal 1000, and the processor 1001 performs left and right hand recognition or shortcut operation according to the holding signal collected by the pressure sensor 1012. When the pressure sensor 1012 is set in the lower layer of the display screen 1005, the processor 1001 controls the operability controls on the UI interface according to the user's pressure operation on the display screen 1005. The operability controls include at least one of a button control, a scroll bar control, an icon control, and a menu control.

[0180] The optical sensor 1013 is used to collect the ambient light intensity. In one embodiment, the processor 1001 can control the display brightness of the display screen 1005 according to the ambient light intensity collected by the optical sensor 1013. Specifically, when the ambient light intensity is high, the display brightness of the display screen 1005 is increased; when the ambient light intensity is low, the display brightness of the display screen 1005 is reduced. In another embodiment, the processor 1001 can also dynamically adjust the shooting parameters of the camera assembly 1006 according to the ambient light intensity collected by the optical sensor 1013.

[0181] The proximity sensor 1014, also called a distance sensor, is usually arranged on the front panel of the terminal 1000. The proximity sensor 1014 is used to collect the distance between the user and the front of the terminal 1000. In one embodiment, when the proximity sensor 1014 detects that the distance between the user and the front of the terminal 1000 is gradually decreasing, the processor 1001 controls the display screen 1005 to switch from the screen-on state to the screen-off state; when the proximity sensor 1014 detects that the distance between the user and the front of the terminal 1000 is gradually increasing, the processor 1001 controls the display screen 1005 to switch from the screen-off state to the screen-on state.

[0182] Those skilled in the art will understand that Fig.10 The structure shown in the figure does not constitute a limitation on the terminal 1000, and the terminal 1000 may include more or less components than those shown in the figure, or combine some components, or adopt a different component arrangement.

[0183] Fig.11 It is a structural diagram of a server provided according to an embodiment of the present application. The server 1100 may have relatively large differences due to different configurations or performances, and may include one or more processors (Central Processing Units, CPU) 1101 and one or more memories 1102, wherein the memory 1102 stores at least one computer program, and the at least one computer program is loaded and executed by the processor 1101 to implement the pipeline management method provided by the above-mentioned various method embodiments. Of course, the server 1100 may also have components such as a wired or wireless network interface, a keyboard, and an input and output interface for input and output. The server 1100 may also include other components for implementing device functions, which will not be repeated here.

[0184] The embodiment of the present application also provides a computer-readable storage medium, in which at least one computer program is stored, and the at least one computer program is loaded and executed by a processor of a computer device to implement the operation performed by the computer device in the pipeline management method of the above embodiment. For example, the computer-readable storage medium can be a read-only memory (ROM), a random access memory (RAM), a compact disc read-only memory (CD-ROM), a magnetic tape, a floppy disk, and an optical data storage device.

[0185] An embodiment of the present application also provides a chip, including a programmable logic circuit and / or program instructions (computer program). When the chip runs on a computer device, the processor of the chip reads the computer program from a computer-readable storage medium, and the processor executes the computer program, so that the computer device executes the pipeline management method provided in the above-mentioned various optional implementations.

[0186] The embodiment of the present application also provides a computer program product, including a computer program, which is stored in a computer-readable storage medium. The processor of the computer device reads the computer program from the computer-readable storage medium, and the processor executes the computer program, so that the computer device executes the pipeline management method provided in the above various optional implementations.

[0187] A person skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.

[0188] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for managing an assembly line, characterized in that: The method comprises: Based on a plurality of instructions of the same category, determining a first pipeline, the first pipeline comprising a plurality of stages in the execution of the instructions of the category; In a process of executing a first instruction based on the first pipeline, for any stage of the multiple stages, when the first instruction is in the stage, detecting whether the first instruction is abnormal in the stage, the first instruction being any instruction of the multiple instructions; In the case where the first instruction is abnormal, a resending operation is performed on the first instruction, wherein the resending operation is used to instruct to re-execute the first instruction; According to the execution process of the second instruction in the first pipeline, the second instruction continues to be executed based on the first pipeline, where the second instruction is an instruction in the execution order after the first instruction among the multiple instructions, is being executed and has no exception at present.

2. The method according to claim 1, characterized in that The reissuing operation on the first instruction when the first instruction is abnormal includes: In the case where the first instruction is abnormal, if the abnormality of the first instruction meets a preset condition, an online retransmission request of the first instruction is generated, the preset condition is used to indicate an index of the degree of influence of the abnormality of the instruction on the execution of the multiple instructions, and the online retransmission request is used to instruct to re-execute the first instruction at the current moment; based on the online retransmission request, a retransmission operation is performed on the first instruction; If the exception of the first instruction does not meet the preset condition, the first instruction is stored in a retransmission queue, and the retransmission queue is used to temporarily store instructions with exceptions during execution; based on the retransmission queue, the first instruction is retransmitted.

3. The method according to claim 2, characterized in that The method further comprises: When the resend queue is full, the first instruction is stored in a reservation station, where the reservation station is used to temporarily store instructions that have abnormalities during execution; and based on the reservation station, a resend operation is performed on the first instruction.

4. The method according to claim 3, characterized in that The resending operation on the first instruction includes: If the retransmission source of the first instruction is the online retransmission request, then re-execute the first instruction at the current moment, and the retransmission source is used to indicate the source of the first instruction when the first instruction is retransmitted; If the retransmission source of the first instruction is the retransmission queue, then re-executing the first instruction when the third instruction has been restarted, the third instruction being the instruction that needs to be re-executed as indicated by the online retransmission request; If the reissue source of the first instruction is the reservation station, the first instruction is re-executed when the fourth instruction has been restarted, and the fourth instruction is the instruction in the reissue queue.

5. The method according to claim 1, characterized in that The method further comprises: If the stage currently located by the first instruction is not the last stage in the first pipeline, other stages in the first pipeline located after the stage are closed.

6. The method according to claim 1, characterized in that The reissuing operation on the first instruction when the first instruction is abnormal includes: If the exception of the first instruction is that the required resources are occupied by instructions in the second pipeline, the first instruction is transferred from the first pipeline to the second pipeline, and the second pipeline and the first pipeline are used to execute instructions of the same category, and the priority of the second pipeline is higher than that of the first pipeline; Based on the second pipeline, the first instruction is executed.

7. The method according to claim 1, characterized in that The method further comprises: Determine a fifth instruction based on the data corresponding to the first instruction, wherein the fifth instruction is an instruction that belongs to the same category as the first instruction and has a data dependency relationship with the first instruction, and the first instruction depends on the fifth instruction; If the fifth instruction has been executed, the first instruction is executed based on the pipeline where the fifth instruction is located.

8. A processor, characterized in that: The processor comprises: a pipeline determination unit, an anomaly detection unit, a retransmission unit and an instruction execution unit; The pipeline determination unit is used to determine a first pipeline based on a plurality of instructions of the same category, wherein the first pipeline includes a plurality of stages in the execution process of the instructions of the category; The exception detection unit is configured to detect whether there is an exception in any stage of the multiple stages when the first instruction is in the stage during execution of the first instruction based on the first pipeline, wherein the first instruction is any instruction of the multiple instructions; The resending unit is configured to resend the first instruction when an exception occurs in the first instruction, wherein the resending operation is used to instruct to re-execute the first instruction; The instruction execution unit is used to continue to execute the second instruction based on the first pipeline according to the execution process of the second instruction in the first pipeline, where the second instruction is an instruction among the multiple instructions that is executed after the first instruction in the execution order, is being executed and has no exceptions at present.

9. The processor according to claim 8, characterized in that The retransmission unit includes: an online retransmission interface, a retransmission queue interface, an instruction scheduler and a retransmission queue; The online resending interface is used for sending an online resending request of the first instruction to the instruction scheduler when there is an exception in the first instruction and if the exception of the first instruction meets a preset condition, the preset condition is used to indicate an index of the degree of influence of the exception of the instruction on the execution of the multiple instructions, and the online resending request is used to instruct to re-execute the first instruction at a current moment; The instruction scheduler is used to resend the first instruction based on the online resend request; The resend queue interface is used to send the first instruction to the resend queue if the exception of the first instruction does not meet the preset condition; The resend queue is used to temporarily store instructions that have abnormalities during execution; The instruction scheduler is further configured to resend the first instruction based on the resend queue.

10. The processor according to claim 9, characterized in that The retransmission unit also includes: a reservation station interface and a reservation station; The reservation station interface is used to send the first instruction to the reservation station when the retransmission queue is full; The reservation station is used to temporarily store instructions that have abnormalities during execution; The instruction scheduler is further configured to reissue the first instruction based on the reservation station.

11. The processor according to claim 10, characterized in that The instruction scheduler is used to reschedule the first instruction for execution at the current moment if the resending source of the first instruction is the online resending request, and the resending source is used to indicate the source of the first instruction when the first instruction is resent; if the resending source of the first instruction is the resending queue, then when the third instruction has been restarted, the first instruction is rescheduled for execution, and the third instruction is the instruction that needs to be re-executed as indicated by the online resending request; if the resending source of the first instruction is the reservation station, then when the fourth instruction has been restarted, the first instruction is rescheduled for execution, and the fourth instruction is the instruction in the resending queue.

12. The processor according to claim 8, characterized in that The processor further comprises: a termination execution unit; The termination execution unit is used to close other stages in the first pipeline that are located after the stage if the stage currently located by the first instruction is not the last stage in the first pipeline.

13. The processor according to claim 8, characterized in that The retransmission unit further comprises: a pipeline equalization unit; The pipeline balancing unit is used to transfer the first instruction from the first pipeline to the second pipeline if the exception of the first instruction is that the required resources are occupied by instructions in the second pipeline, the second pipeline and the first pipeline are used to execute instructions of the same category, and the priority of the second pipeline is higher than that of the first pipeline; The instruction execution unit is further configured to execute the first instruction based on the second pipeline.

14. The processor according to claim 8, characterized in that The processor further includes: a forward matching unit; The forward matching unit is used to determine a fifth instruction based on data corresponding to the first instruction, where the fifth instruction is an instruction that belongs to the same category as the first instruction and has a data dependency relationship, and the first instruction depends on the fifth instruction; if the fifth instruction has been executed, the first instruction is executed based on the pipeline where the fifth instruction is located.

15. A computer device, characterized in that: The computer device includes a processor and a memory, the memory is used to store at least one computer program, the at least one computer program is loaded by the processor and executes the pipeline management method described in any one of claims 1 to 7, and the processor is the processor described in any one of claims 8 to 14.

16. A computer-readable storage medium, characterized in that: The computer-readable storage medium is used to store at least one computer program, and the at least one computer program is used to execute the pipeline management method described in any one of claims 1 to 7.

17. A chip, characterized in that: The chip includes a programmable logic circuit and / or program instructions, and when the chip is run on a computer device, it is used to implement the pipeline management method according to any one of claims 1 to 7.

18. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the pipeline management method according to any one of claims 1 to 7 is implemented.

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