Coordinate determination methods, devices, electronic equipment, chips and storage media

Abstract

This disclosure provides a coordinate determination method and apparatus, electronic device, chip, and storage medium. The method includes: determining the coordinate increment of a second thread based on the coordinates of a first thread, wherein the first thread and the second thread belong to a first thread block, and the sequence number of the first thread is less than the sequence number of the second thread; and determining the coordinates of the second thread based on the coordinates of the first thread and the coordinate increment of the second thread. This method can determine the coordinates of the second thread based on the coordinate increment, reducing computational complexity, improving computational efficiency, and saving computational resources.

Description

Technical Field

[0001] This disclosure relates to the field of data processing, and more particularly to a coordinate determination method, apparatus, electronic device, chip, and storage medium. Background Technology

[0002] Task scheduling in artificial intelligence (AI) chips is mainly divided into several layers: stream, kernel, block, warp, and thread. The scheduling unit is primarily responsible for scheduling and information generation at the stream, kernel, and block layers. It splits blocks into warps and sends them to the instruction fetch unit for execution. During the block-to-warp splitting process, the coordinates of the first thread in each warp need to be quickly calculated and sent to the execution unit to achieve the required throughput. Summary of the Invention

[0003] This disclosure provides a coordinate determination method, apparatus, electronic device, chip, and storage medium to solve problems in related technologies.

[0004] A first aspect of this disclosure provides a coordinate determination method, the method comprising: determining the coordinate increment of a second thread based on the coordinates of a first thread, wherein the first thread and the second thread belong to a first thread block and the sequence number of the first thread is less than the sequence number of the second thread; and determining the coordinates of the second thread based on the coordinates of the first thread and the coordinate increment of the second thread.

[0005] In some embodiments of this disclosure, determining the coordinate increment of the second thread based on the coordinates of the first thread includes: determining the maximum dimension of the first thread block; determining the coordinate increment of the second thread based on the maximum dimension of the first thread block and the coordinates of the first thread, wherein the coordinate increment includes a first coordinate increment, a second coordinate increment, and a third coordinate increment, and the coordinates of the first thread include a first coordinate value, a second coordinate value, and a third coordinate value.

[0006] In some embodiments of this disclosure, determining the first coordinate increment, second coordinate increment, and third coordinate increment of the second thread based on the maximum dimension of the first thread block and the coordinates of the first thread includes: determining the sequence number of the thread bundle to which the first thread belongs; determining a first remainder based on the sequence number of the thread bundle and the maximum dimension of the first thread block; determining a second remainder and a third remainder based on the maximum dimension of the first thread block and the number of at least one thread contained in the thread bundle; determining the value of the first coordinate increment and the value of the second coordinate increment based on at least one of the first remainder, the second remainder, the third remainder, and the first coordinate value; and determining the value of the third coordinate increment based on the maximum dimension of the first thread block, the number of at least one thread contained in the thread bundle, and the second coordinate increment.

[0007] In some embodiments of this disclosure, determining the value of the first coordinate increment and the value of the second coordinate increment based on at least one of the first remainder, the second remainder, the third remainder, and the first coordinate value includes: determining the value of the first coordinate increment as a first value if the sum of the first remainder and the second remainder satisfies a first preset condition; determining the value of the first coordinate increment as a second value if the sum of the first remainder and the second remainder does not satisfy the first preset condition; determining the value of the second coordinate increment as a first value if the sum of the third remainder and the first coordinate value satisfies a second preset condition; and determining the value of the second coordinate increment as a second value if the sum of the third remainder and the first coordinate value does not satisfy the second preset condition.

[0008] In some embodiments of this disclosure, the coordinates of the second thread include a fourth coordinate value, a fifth coordinate value, and a sixth coordinate value. Determining the coordinates of the second thread based on the coordinates of the first thread and the coordinate increment of the second thread includes: determining a fixed increment value based on the maximum dimension of the first thread block and the number of at least one thread contained in the thread bundle; determining the fourth coordinate value by summing the fixed increment value, the first coordinate value, and the first coordinate increment; determining the fifth coordinate value based on the second coordinate increment and the second coordinate value; and determining the sixth coordinate value based on the third coordinate value, the third coordinate increment, the first coordinate increment, the maximum dimension of the first thread block, and the number of at least one thread contained in the thread bundle.

[0009] In some embodiments of this disclosure, determining the fifth coordinate value based on the second coordinate increment and the second coordinate value includes: when the value of the second coordinate increment is a first value, determining the fifth coordinate value based on the third remainder, the first coordinate value, and the maximum dimension of the first thread block; when the value of the second coordinate increment is a second value, determining the fifth coordinate value by the sum of the third remainder and the first coordinate value.

[0010] In some embodiments of this disclosure, determining the sixth coordinate value based on the third coordinate value, the third coordinate increment, the first coordinate increment, the maximum dimension of the first thread block, and the number of at least one thread contained in the thread bundle includes: determining the carry-in number based on the maximum dimension of the first thread block, the number of at least one thread contained in the thread bundle, and the first coordinate increment; and determining the sixth coordinate value based on the third coordinate value, the third coordinate increment, and the carry-in number.

[0011] In some embodiments of this disclosure, the method further includes: when the value of the first coordinate increment is a first value, determining the fourth remainder corresponding to the fourth coordinate value based on the maximum dimension of the first thread block, the first remainder, and the second remainder; when the value of the first coordinate increment is a second value, determining the sum of the first remainder and the second remainder as the fourth remainder corresponding to the fourth coordinate value.

[0012] A second aspect of this disclosure provides a coordinate determination device, comprising: a first processing unit configured to determine the coordinate increment of a second thread based on the coordinates of a first thread, wherein the first thread and the second thread belong to a first thread block, the sequence number of the first thread is less than the sequence number of the second thread, and the coordinates of the first thread include a first coordinate value, a second coordinate value, and a third coordinate value; and a second processing unit configured to determine the coordinates of the second thread based on the coordinates of the first thread and the coordinate increment of the second thread, wherein the coordinates of the second thread include a fourth coordinate value, a fifth coordinate value, and a sixth coordinate value.

[0013] A third aspect of this disclosure provides an electronic device comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the methods described in the first aspect of this disclosure.

[0014] A fourth aspect of this disclosure provides a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to cause a computer to perform the methods described in the first aspect of this disclosure.

[0015] A fifth aspect of this disclosure provides a chip characterized by including at least one processor and a communication interface; the communication interface is used to receive signals input to the chip or signals output from the chip, and the processor communicates with the communication interface and implements the method described in the first aspect of this disclosure through logic circuits or executing code instructions.

[0016] In summary, the coordinate determination method proposed in this disclosure can determine the coordinate increment of the second thread based on the coordinates of the first thread determined in the previous step, and determine the coordinates of the second thread based on the coordinate increment. This avoids multiple division and multiplication operations, reduces computational complexity, improves the efficiency of coordinate determination, and saves computational resources.

[0017] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0018] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure, and are not intended to unduly limit this disclosure.

[0019] Figure 1 A flowchart illustrating a coordinate determination method provided in this embodiment of the present disclosure. Figure 1 ;

[0020] Figure 2A flowchart illustrating a coordinate determination method provided in this embodiment of the present disclosure. Figure 2 ;

[0021] Figure 3 A flowchart illustrating a coordinate determination method provided in this embodiment of the present disclosure. Figure 3 ;

[0022] Figure 4 A flowchart illustrating a coordinate calculation method in a SIMT architecture provided in this embodiment of the disclosure. Figure 1 ;

[0023] Figure 5 A flowchart illustrating a coordinate calculation method in a SIMT architecture provided in this embodiment of the disclosure. Figure 2 ;

[0024] Figure 6 A flowchart illustrating a coordinate calculation method in a SIMT architecture provided in this embodiment of the disclosure. Figure 3 ;

[0025] Figure 7 This is a schematic diagram of the structure of a coordinate determination device provided in an embodiment of the present disclosure;

[0026] Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this disclosure;

[0027] Figure 9 This is a schematic diagram of the chip structure provided in an embodiment of this disclosure. Detailed Implementation

[0028] Embodiments of this disclosure are described in detail below. Examples of these embodiments are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this disclosure, and should not be construed as limiting this disclosure.

[0029] AI chips with a Single Instruction Multiple Thread (SIMT) architecture mainly consist of several units, including scheduling, instruction fetching, computation, and memory access. The scheduling unit is the entry point and starting point of SIMT, responsible for the initiation and scheduling of tasks throughout the entire AI chip.

[0030] AI chip task scheduling is mainly divided into several layers: stream, kernel, block, warp, and thread. The scheduling unit is mainly responsible for scheduling and information generation at the stream, kernel, and block layers. It can split a block into warps and send them to the instruction fetch unit for execution. One key point in the block-to-warp splitting process is to quickly calculate the coordinates of the first thread in each warp and send them to the execution unit to achieve a certain throughput requirement.

[0031] The specific process for calculating the coordinates of the first thread (thread0) in each warp can include:

[0032] 1. In order to obtain the three-dimensional coordinates of thread0 in the block space, let the maximum value of the three dimensions of the block be a, b, c, and the block contains a×b×c threads.

[0033] 2. Each warp occupies 32 threads. For example, the coordinates of thread0 in the first warp (warp0) are (x,y,z)=(0,0,0). The coordinates of thread0 in warp1 need to be increased by 32 threads. The resulting coordinate values ​​may exceed a or a×b. Therefore, some calculations are needed to correct the coordinate values.

[0034] 3. Assuming the number of threads in the block's three-dimensional space is expanded in one dimension, the coordinates of thread0 in the Nth warp (warpN) are 32×N.

[0035] 4. The coordinates of warpN's head0 are (x, y, z), where z = [32 × N / (a ​​× b)]; the remainder is denoted as z_res; to avoid using division, the value of z is determined by comparison. Calculate 1*a*b and 2*a*b...1024×a×b and compare them with 32×N to determine the integer divisibility value, which is the value of the z coordinate. The maximum value of z is 1024.

[0036] 5. Furthermore, y = [z_res / a], where the remainder is the value of the x-coordinate. Again, the comparison method is used to avoid division.

[0037] 6. After obtaining y, determine x using the formula x = z_res - y × a.

[0038] Although this method can avoid division operations, it requires generating many comparison terms, consumes a lot of multiplier resources, and has poor timing, with a long critical path for computation, involving z before y before x, with layer-by-layer logical dependencies and a large depth of combinational logic.

[0039] Therefore, in order to solve the above problems, this disclosure proposes a coordinate determination method that can better improve the performance, power consumption and area of ​​chip microarchitecture.

[0040] The specific details of this method are as follows.

[0041] Figure 1 A flowchart illustrating a coordinate determination method provided in this embodiment of the present disclosure. Figure 1 .like Figure 1 As shown, the method may include the following steps.

[0042] Step 101: Determine the coordinate increment of the second thread based on the coordinates of the first thread.

[0043] In some embodiments, the first thread and the second thread belong to a first thread block, and the sequence number of the first thread is less than the sequence number of the second thread, meaning the first thread and the second thread belong to the same thread block. The first thread block may include multiple thread bundles, and a thread bundle may contain multiple threads. Optionally, the first thread and the second thread belong to different thread bundles.

[0044] Optionally, both the first thread and the second thread are the first threads in a thread bundle, and the sequence number of the first thread is less than the sequence number of the second thread, and the sequence number of the thread bundle to which the first thread belongs is also less than the sequence number of the thread bundle to which the second thread belongs.

[0045] Optionally, when determining the coordinates of the first thread in a thread bundle, the coordinates can be determined sequentially according to the thread bundle number. That is, the first thread in the thread bundle with the smaller number can be determined first, and the coordinates of the first thread can be determined before the coordinates of the second thread.

[0046] In some embodiments, the coordinate increment of the second thread can be determined based on the coordinates of the first thread. The coordinate increment of the second thread is used to determine the coordinates of the second thread. The coordinates of the first thread can be represented as (x1, y1, z1), and the coordinates of the second thread can be represented as (x2, y2, z2). The coordinates of the first thread include a first coordinate value, a second coordinate value, and a third coordinate value, wherein the first coordinate value is z1, the second coordinate value is x1, and the third coordinate value is y1. The coordinates of the second thread include a fourth coordinate value, a fifth coordinate value, and a sixth coordinate value, wherein the fourth coordinate value is z2, the fifth coordinate value is x2, and the sixth coordinate value is y2.

[0047] In some embodiments, the coordinate increment of the second thread includes a first coordinate increment, a second coordinate increment, and a third coordinate increment, wherein the first coordinate increment is the increment corresponding to the fourth coordinate value, the second coordinate increment is the increment corresponding to the fifth coordinate value, and the third coordinate increment is the increment corresponding to the sixth coordinate value.

[0048] In some embodiments, the coordinates of the first thread in a thread bundle can be stored for calculating the coordinate increment of the first thread in the next thread bundle. Determining the coordinate increment of the second thread based on the coordinates of the first thread includes: determining the maximum dimension of the first thread block; determining the coordinate increment of the second thread based on the maximum dimension of the first thread block and the coordinates of the first thread, wherein the coordinate increment includes a first coordinate increment, a second coordinate increment, and a third coordinate increment, and the coordinates of the first thread include a first coordinate value, a second coordinate value, and a third coordinate value.

[0049] In some embodiments, the occupied positions in the first thread block and the distribution of at least one thread can be determined based on the maximum dimension of the first thread block. For example, the arrangement of at least one thread in the first thread block can be determined. For example, there can be at most 3 threads in the x-axis direction, at most 5 threads in the y-axis direction, and at most 6 threads in the z-axis direction in the first thread block. Then, the maximum number of at least one thread contained in the first thread block is 90.

[0050] Step 102: Determine the coordinates of the second thread based on the coordinates of the first thread and the coordinate increment of the second thread.

[0051] In some embodiments, determining the coordinates of the second thread based on the coordinates of the first thread and the coordinate increment of the second thread includes: determining a fixed increment value based on the maximum dimension of the first thread block and the number of at least one thread contained in the thread bundle; determining a fourth coordinate value by summing the fixed increment value, the first coordinate value, and the first coordinate increment; determining a fifth coordinate value based on the second coordinate increment and the second coordinate value; and determining a sixth coordinate value based on the third coordinate value, the third coordinate increment, the first coordinate increment, the maximum dimension of the first thread block, and the number of at least one thread contained in the thread bundle.

[0052] The maximum dimension of the first thread block may include at least one of the following: the maximum index of the first thread block in the x-axis dimension, the maximum index of the first thread block in the y-axis dimension, and the maximum index of the first thread block in the z-axis dimension. In other words, the maximum number of threads that can be arranged in the x-axis, y-axis, and z-axis directions of the first thread block can be determined based on the maximum dimension of the first thread block.

[0053] In some embodiments, optionally, the fourth and fifth coordinate values ​​can be determined simultaneously. After determining the fourth and fifth coordinate values, the sixth coordinate value is determined based on the third coordinate value, the third coordinate increment, the first coordinate increment, the maximum dimension of the first thread block, and the number of at least one thread contained in the thread bundle. This can improve the efficiency of coordinate determination, achieve better timing, and reduce the combinational logic depth.

[0054] In summary, the above embodiments of this disclosure can determine the coordinate increment of the second thread based on the coordinates of the first thread, and determine the coordinates of the second thread based on the coordinate increment. This avoids multiple division and multiplication operations, reduces computational complexity, improves the efficiency of coordinate determination, and saves computational resources.

[0055] Figure 2 A flowchart illustrating a coordinate determination method provided in this embodiment of the present disclosure. Figure 2 .like Figure 2 As shown, based on Figure 1 The illustrated embodiment shows that the method includes the following steps.

[0056] Step 201: Determine the maximum dimension of the first thread block.

[0057] In some embodiments, the distribution of at least one thread in the first thread block can be determined, for example, the maximum number of threads in the x-axis direction, the maximum number of threads in the y-axis direction, and the maximum number of threads in the z-axis direction can be determined. In some embodiments, the number of at least one thread bundle in the first thread block and the number of threads in each thread bundle can be determined, for example, a thread bundle can contain 32 threads.

[0058] Step 202: Determine the coordinate increment of the second thread based on the maximum dimension of the first thread block and the coordinates of the first thread.

[0059] In some embodiments, determining the first coordinate increment, second coordinate increment, and third coordinate increment of the second thread based on the maximum dimension of the first thread block and the coordinates of the first thread includes: determining the sequence number of the thread bundle to which the first thread belongs; determining a first remainder based on the sequence number of the thread bundle and the maximum dimension of the first thread block; determining a second remainder and a third remainder based on the maximum dimension of the first thread block and the number of at least one thread contained in the thread bundle; determining the value of the first coordinate increment and the value of the second coordinate increment based on at least one of the first remainder, the second remainder, the third remainder, and the first coordinate value; and determining the value of the third coordinate increment based on the maximum dimension of the first thread block, the number of at least one thread contained in the thread bundle, and the second coordinate increment.

[0060] In some embodiments, the first remainder is the remainder in the z-direction when calculating the coordinates of the first thread. That is, the first remainder is the remainder determined in the previous coordinate calculation, i.e., the number of remaining threads after the number of threads in the x and y directions reaches its maximum value. It can be represented as z_res_d. The first remainder can be determined based on the sequence number N of the thread bundle to which the first thread belongs and the maximum dimension of the first thread block. For example, if the number of threads in the x-direction of the first thread block is a, the number of threads in the y-direction is b, and the number of threads in the thread bundle to which the first thread belongs is 32, the remainder of the formula 32×N / (a×b) plus the previous remainder can be determined as the first remainder. For example, when N=1, the corresponding remainder is 2; when N=2, the corresponding remainder is 2 plus 2, which is 4; when N=3, the corresponding remainder is 6, and so on. Since different thread bundles are arranged in a certain order in the thread block, and multiple threads in a thread bundle are also arranged according to certain rules, the coordinates of the second thread can be determined based on the arrangement rules of the threads in the first thread block. For example, if the first thread is split along the z-axis, and the number of threads in each layer is a×b, the coordinates of the first thread in the first thread bundle in the first thread block can be (0,0,0). When the number of threads in a thread bundle is 32, the coordinates of the first thread in the second thread bundle need to be determined according to the arrangement of the 32 threads in the first thread block.

[0061] For example, in the first thread block, threads need to be filled along the x-axis from the origin. The first thread's coordinates are (0,0,0), the second thread's coordinates are (1,0,0), the third thread's coordinates are (2,0,0), and so on. When the number of threads in the x-axis direction equals *a*, i.e., when the coordinates reach (a, 0,0), the first column and first layer in the x-axis direction are filled. Then, a carry-over of 1 occurs in the y-axis direction, and the second column of the first layer begins filling, represented by coordinates (0,1,0), (1,1,0), and so on, until the number of threads in the y-axis direction is greater than *b*. At this point, the first layer is filled, totaling *a* × *b* threads. Then, a carry-over of 1 occurs in the z-axis direction, and the second layer begins filling. The first remainder is the number of threads remaining in the z-axis direction after filling the 32 threads in the first thread block. For example, if the 32 threads of the first thread block are filled into the first layer, and the first layer is full but there are not enough remaining threads to fill the second layer, the number of remaining threads in the second layer is the aforementioned first remainder. In some embodiments, other methods or formulas may be used to determine the first remainder, which are not limited in this disclosure.

[0062] In some embodiments, the second remainder is used to indicate the number of remaining threads when the second thread fills the x-axis and y-axis. The second remainder can be determined based on the maximum dimension of the first thread block and the number of at least one thread contained in the thread bundle. For example, if the number of threads in the x-direction of the first thread block is 'a', the number of threads in the y-direction is 'b', and the number of threads in the thread bundle is 32, the second remainder can be expressed as res_of_32_ab, that is, the remainder of (32 / ab) is the second remainder. The first remainder is the total number (cumulative number) of remaining threads when filling the x-axis and y-axis obtained when calculating the coordinates of the first thread, and the second remainder is the newly generated remainder when calculating the coordinates of the second thread, that is, the newly added number of remaining threads. The sum of the first remainder and the second remainder can be obtained as the total remainder when calculating the coordinates of the second thread.

[0063] In some embodiments, the third remainder is the number of threads remaining in the x direction after multiple carry-overs in the y direction. The third remainder can be determined based on the maximum dimension of the first thread block and the number of at least one thread contained in the thread bundle. For example, if the number of threads in the x direction of the first thread block is 'a' and the number of threads in the thread bundle is 32, the second remainder can be represented as res_of_32_a, meaning the remainder of (32 / a) is the third remainder. For instance, when a = 5, 6 carry-overs are needed in the y direction. After the last carry-over, the number of threads remaining in the x direction is 2, and the third remainder is 2. In other words, when the carry-over condition is not met in the x direction, the remaining number of threads is 0. For example, when the number of threads in the x direction is 0, the remainder is 0. When the number of threads in the x direction is 5, a carry-over occurs in the y direction, and the number of threads in the x direction in the next column needs to be determined as the third remainder.

[0064] In some embodiments, determining the value of the first coordinate increment and the value of the second coordinate increment based on at least one of the first remainder, the second remainder, the third remainder, and the first coordinate value includes: determining the value of the first coordinate increment as a first value if the sum of the first remainder and the second remainder satisfies a first preset condition; determining the value of the first coordinate increment as a second value if the sum of the first remainder and the second remainder does not satisfy the first preset condition; determining the value of the second coordinate increment as a first value if the sum of the third remainder and the first coordinate value satisfies a second preset condition; and determining the value of the second coordinate increment as a second value if the sum of the third remainder and the first coordinate value does not satisfy the second preset condition. Wherein, the first coordinate increment is the increment corresponding to the fourth coordinate value, the second coordinate increment is the increment corresponding to the fifth coordinate value, and the third coordinate increment is the increment corresponding to the sixth coordinate value.

[0065] In some embodiments, the first coordinate increment can be used to indicate whether the fourth coordinate value still needs to be carried over compared to the first coordinate value after a fixed number of carry-overs. Optionally, the first coordinate increment is the increment of the change in the z-axis direction. The first coordinate increment can be represented as z_res_incr_flag. The first coordinate increment can be used to indicate whether the sum of the cumulative remainders meets the carry condition. For example, if the number of threads in the x-direction of the first thread block is a, the number of threads in the y-direction is b, and the number of threads in the thread bundle is 32, when N=5, the sum of the first remainder and the second remainder is 10, which is exactly equal to the number of threads in one layer, a×b. A carry-over is required in the z-direction. The value of the first coordinate increment is the first value, which can be 1, indicating that a carry-over is required. The second value can indicate that a carry-over is not required, for example, the second value can be 0. The first preset condition can be expressed as follows:

[0066] z_res_incr_flag=z_res_d+res_of_32_ab>=ab? 1:0

[0067] That is, when the sum of the first remainder z_res_d and the second remainder res_of_32_ab satisfies the z-axis carry condition, that is, when it is greater than or equal to the maximum number of threads in one layer a×b, the value of the first coordinate increment z_res_incr_flag is 1, otherwise it is 0.

[0068] In some embodiments, the second coordinate increment can be used to indicate whether the fifth coordinate value needs to be carried over in the y-direction relative to the second coordinate value when calculating the coordinates of the second thread. For example, if the sum of the third remainder and the first coordinate value satisfies a second preset condition, the value of the second coordinate increment is determined to be a first value. For example, if the number of threads in the x-direction of the first thread block is 'a', the number of threads in the y-direction is 'b', and the number of threads in the thread bundle is 32, the second preset condition can be expressed as follows:

[0069] x_incr_flag=x_d+res_of_32_a>=a? 1:0

[0070] That is, the third remainder res_of_32_a represents the number of threads remaining in the x-direction after the thread bundle to which the first thread belongs has been filled. Based on the coordinates of the first thread and the number of remaining threads, it can be determined whether a carry-over is needed in the y-direction when calculating the x-axis coordinate of the second thread.

[0071] In some embodiments, the third coordinate increment is used to indicate the number of carry-overs in the y-axis direction between the sixth coordinate and the third coordinate when calculating the coordinates of the second thread. The value of the third coordinate increment is determined based on the maximum dimension of the first thread block, the number of at least one thread contained in the thread bundle, and the second coordinate increment. For example, if the number of threads in the x-direction of the first thread block is 'a', the number of threads in the y-direction is 'b', and the number of threads in the thread bundle is 32, the formula for calculating the third coordinate increment is as follows:

[0072]

[0073] That is, for Rounding down gives the fixed number of carry-overs on the y-axis when calculating the coordinates of the second thread. For example, if the coordinates of the first thread are (0,0,0,), the number of threads in the x-direction of the first thread block is a = 5, and the number of threads in the thread bundle is 32, then after filling the thread bundle to which the first thread belongs, the x-axis can be filled 6 times. At this point, 6 carry-overs are needed in the y-direction, which is the fixed number of carry-overs on the y-axis. The second coordinate increment x_incr_flag actually indicates whether the number of threads in the x-axis direction meets the y-axis carry-over condition. That is, the second coordinate increment can be used as the incremental part of the third coordinate increment. In other words, in addition to the fixed number of carry-overs, when the accumulated remaining number of threads is greater than the maximum number of threads a in the x-axis, an additional carry-over is needed in the y-axis direction.

[0074] In some embodiments, the method further includes: when the value of the first coordinate increment is a first value, determining the fourth remainder corresponding to the fourth coordinate value based on the maximum dimension of the first thread block, the first remainder, and the second remainder; when the value of the first coordinate increment is a second value, determining the sum of the first remainder and the second remainder as the fourth remainder corresponding to the fourth coordinate value.

[0075] In some embodiments, optionally, the fourth remainder is the cumulative remainder in the z-axis direction determined when calculating the coordinates of the second thread, and both the fourth and first remainders are cumulative remainders in the z-axis direction. In the first thread block, the number of threads in the x-direction is a, and the number of threads in the y-direction is b. When the value of the remainder is greater than or equal to a×b, a carry is required in the z-axis direction. The first remainder is the cumulative remainder determined when calculating the coordinates of the first thread, and the second remainder is the cumulative remainder when calculating the coordinates of the second thread.

[0076] In some embodiments, for example, when the number of threads in the x-direction of the first thread block is 'a', the number of threads in the y-direction is 'b', and the number of threads in the thread bundle is 32, the fourth remainder can be determined according to the following formula:

[0077] z_res=z_res_incr_dlag? (res_add-ab):(res_add)

[0078] In other words, when the value of the first coordinate increment is the first value, a carry needs to be made in the z-axis direction. The above res_add is the sum of the first remainder and the second remainder, which is the remainder in the z-axis direction determined when determining the coordinates of the second thread. When a carry is needed, the remainder needs to be subtracted from the number of threads contained in one layer, i.e., ab, to obtain a new remainder, which is the fourth remainder. When the value of the first coordinate increment is the second value, the remainder has not yet met the requirements for z-axis carry. At this time, the sum of the first remainder and the second remainder can be directly determined as the fourth remainder, thereby updating the cumulative remainder in the z-axis direction.

[0079] In summary, the above embodiments of this application can determine the coordinate increment of the second thread based on the coordinates of the first thread and the distribution pattern of threads in the thread block. This facilitates determining the coordinates of the second thread based on the coordinate increment and avoids the problems of computational complexity and low computational efficiency caused by traversing to determine the coordinates of the second thread, which affect the efficiency of business execution.

[0080] Figure 3 A flowchart illustrating a coordinate determination method provided in this embodiment of the present disclosure. Figure 3 .like Figure 3 As shown, based on Figure 1 The illustrated embodiment shows that the method includes the following steps.

[0081] Step 301: Determine a fixed increment value based on the maximum dimension of the first thread block and the number of at least one thread contained in the thread bundle.

[0082] In some embodiments, optionally, the fixed increment value is the fixed increment value corresponding to the fourth coordinate, that is, the fixed number of carry-overs of the fourth coordinate relative to the first coordinate, i.e., the number of carry-overs in the z-axis direction. Optionally, the fixed increment value can be determined according to the maximum dimension of the first thread block and the number of at least one thread contained in the thread bundle. For example, if the number of threads contained in the x-direction of the first thread block is 'a', the number of threads contained in the y-direction is 'b', and the number of threads contained in the thread bundle is 32, the fixed increment value can be expressed as [32 / ab], that is, rounding down 32 / ab. For example, when a=2 and b=5, when filling the 32 threads in the thread bundle to which the first thread belongs, it can fill 3 layers of a×b, that is, it needs to carry 3 times in the z-axis direction, and the fixed increment value is 3.

[0083] Step 302: The sum of the fixed increment value, the first coordinate value, and the first coordinate increment is determined as the fourth coordinate value.

[0084] In some embodiments, the fourth coordinate value is the coordinate value z2 of the second thread in the z-axis direction. Optionally, the fourth coordinate value can be determined by the sum of the fixed increment value, the first coordinate value, and the first coordinate increment. When the number of threads in the thread bundle is 32, the fourth coordinate value can be determined by the following formula:

[0085] z=z_d+[32 / ab]+z_res_incr_flag

[0086] That is, the coordinates of the second thread can be obtained by adding a fixed increment [32 / ab] and a variable increment z_res_incr_dlag to the z-axis coordinate z_d of the first thread.

[0087] Step 303: Determine the fifth coordinate value based on the second coordinate increment and the second coordinate value.

[0088] In some embodiments, determining the fifth coordinate value based on the second coordinate increment and the second coordinate value includes: when the value of the second coordinate increment is a first value, determining the fifth coordinate value based on the third remainder, the first coordinate value, and the maximum dimension of the first thread block; and when the value of the second coordinate increment is a second value, determining the fifth coordinate value by the sum of the third remainder and the first coordinate value.

[0089] In some embodiments, when the value of the second coordinate increment is the first value, it indicates that the number of threads in the x-axis has reached its maximum value, and a carry-over is needed in the y-axis. When the number of threads in the x-direction of the first thread block is 'a', the number of threads in the y-direction is 'b', and the number of threads in the thread bundle is 32, the fifth coordinate value can be determined according to the following formula:

[0090] x=x_incr_dlag? res_of_32_a+x_d-a: res_of_32_a+x_d

[0091] That is, when calculating the x-axis coordinate of the second thread, the x-axis coordinate x_d of the first thread is added to the number of threads remaining on the x-axis after filling all the threads in the thread bundle containing the first thread, res_of_32_a. This gives a new x-axis coordinate value. If this coordinate value exceeds the maximum number a of x-axis threads in the first thread block, a carry needs to be made in the y-axis direction, i.e., a needs to be subtracted. This gives the carried x-axis coordinate of the second thread. If no carry is needed, the above sum can be directly used as the x-axis coordinate of the second thread.

[0092] Step 304: Determine the sixth coordinate value based on the third coordinate value, the third coordinate increment, the first coordinate increment, the maximum dimension of the first thread block, and the number of at least one thread contained in the thread bundle.

[0093] In some embodiments, determining the sixth coordinate value based on the third coordinate value, the third coordinate increment, the first coordinate increment, the maximum dimension of the first thread block, and the number of at least one thread contained in the thread bundle includes: determining the carry quantity based on the maximum dimension of the first thread block, the number of at least one thread contained in the thread bundle, and the first coordinate increment; and determining the sixth coordinate value based on the third coordinate value, the third coordinate increment, and the carry quantity.

[0094] In some embodiments, the carry number is the amount of y-axis coordinate offset caused by carrying over the z-axis when calculating the y-axis coordinate of the second thread. Since the above method only considers the number of carry-overs along the y-axis and not the carry-overs along the z-axis when determining the third coordinate increment, the actual number of carry-overs along the y-axis is less than the number of carry-overs determined by the third coordinate increment. Therefore, when determining the y-axis coordinate of the second thread based on the number of carry-overs determined by the third coordinate increment, the y-axis coordinate will be inaccurate. Thus, it is necessary to consider the number of carry-overs along the z-axis when determining the carry number. When the number of threads in the x-direction of the first thread block is 'a', the number of threads in the y-direction is 'b', and the number of threads in the thread bundle is 32, the carry number can be expressed as follows:

[0095]

[0096] in, This represents the actual number of carry-overs along the z-axis, where... The z-axis increment is fixed, and z_res_incr_flag is the first coordinate increment mentioned above. Since each carry-over to the z-axis means that the y-axis coordinate value needs to be reduced by b, that is, after each carry-over, the y-axis coordinate value can change from b to 0, and the coordinate value is reduced by b. Therefore, the carry-over amount is the amount of erroneous increase in coordinate value caused by not considering the carry-over to the z-axis, which is the offset of the y-axis coordinate of the second thread.

[0097] In some embodiments, the sixth coordinate value can be determined by the third coordinate value, the third coordinate increment, and the carry-in quantity, as shown in the following formula:

[0098]

[0099] In other words, the actual y-axis coordinate value of the second thread can be obtained by adding the carry amount to the y-axis coordinate y_d of the first thread and then subtracting the aforementioned offset. The carry amount is the aforementioned third coordinate increment y_incr.

[0100] In summary, the embodiments disclosed above can determine the coordinates of the second thread based on the first coordinate increment, the second coordinate increment, and the third coordinate increment. This allows for the determination of the coordinate increments of the second thread based on the previously determined coordinates of the first thread, and then the determination of the second thread's coordinates based on these increments. This avoids multiple division and multiplication operations, reducing computational complexity, improving the efficiency of coordinate determination, and saving computational resources. Furthermore, in terms of circuit structure, it reduces the need for numerous dividers, multipliers, and comparators, resulting in better space utilization and saving hardware resources.

[0101] The technical solutions of this disclosure will be further described in detail below with reference to specific application embodiments.

[0102] The following is a method for coordinate calculation in a SIMT architecture provided by an embodiment of this disclosure. This method can determine the coordinates (x, y, z) of the first thread in the current warp by using the coordinates (x_d, y_d, z_d) of the first thread in the previous warp. The specific content of this method is as follows.

[0103] like Figure 4 As shown, this describes the specific process for determining the z-value of the first thread in the current warp. x_d, y_d, and z_d are the coordinates of thread0 from the previous warp in the block's 3D space. The circuit registers these coordinates as the starting point for the next warp's calculation. z_res_d is the remainder with respect to z determined when calculating the coordinates of thread0 from the previous warp. z = [32 × N / (a ​​× b)], where z is an integer divisor, z_res is the remainder, and N is the warp number.

[0104] To avoid using division, incremental calculation can be used. When a warp contains 32 threads, calculating thread0 in the new warp requires adding 32 threads. Considering the number of carry-overs for z each time, the new z can be obtained.

[0105] Each time z is added to 32, the carry-over count consists of two parts: the quotient of 32 divided by ab, and the remainder of 32 divided by a×b. These are then added to the previous z_res_d to obtain a new result. If a carry-over occurs, the result is incremented by 1. The specific formula for calculating z is as follows:

[0106] z=z_d+[32 / ab]+z_res_incr_flag

[0107] z_res_incr_flag=z_res_d+res_of_32_ab>=ab? 1:0

[0108] z_res=z_res_incr_flag? (res_add-ab):(res_add)

[0109] Among them, z_res_incr_flag is used to indicate the carry amount of the change, that is, to indicate whether there is a carry over z, and res_of_32_ab represents the remainder of 32 / ab.

[0110] like Figure 5 As shown, the specific process for determining the x value in the coordinates of the first thread in the current warp is to calculate x by considering incremental calculation: x_d plus the remainder of 32 divided by a. Optionally, the quotient of 32 divided by a is the number of carry-overs to y.

[0111] We also need to consider whether the remainder of 32 divided by a plus x_d carries over. If there is a carry, then the new x must be subtracted from a. The calculation formula is as follows:

[0112] x_incr_flag=x_d+res_of_32_a>=a? 1:0

[0113] x=x_incr_flag? res_of_32_a+x_d-a: res_of_32_a+x_d

[0114] like Figure 6 As shown, the specific process for determining the y-value of the first thread in the current warp is as follows: y is calculated after z and x are calculated. First, y_d needs to be added to the carry-in of x plus 32, and then the carry-in of z is subtracted.

[0115] `y_incr` is the carry-over from `x` plus 32, which can be obtained when calculating `x`. However, the carry-over might occur in `z`, causing the `y` coordinate to be subtracted by multiple `b`s. The specific number of carry-overs consists of two parts, which can be obtained during the calculation of `z`: the quotient of 32 / ab, and `z_res - incr_flag`. These two parts represent the number of carry-overs from `z` to `y`. In other words, by obtaining the variables needed to calculate `y` during the calculation of `x` and `z`, and then calculating `y`, the depth of combinational logic can be better controlled. The specific formula is as follows:

[0116]

[0117] In summary, the examples disclosed above have a smaller combinational logic depth, better timing, and reduce the number of calculations such as division, multiplication, and comparison. Adopting this method can have certain advantages for chip architecture, such as better area utilization and reduced use of dividers, multipliers, comparators, etc.

[0118] Figure 7This is a schematic diagram of the structure of a coordinate determining device 700 provided in an embodiment of this disclosure. Figure 7 As shown, the device includes: a first processing unit 710, used to determine the coordinate increment of a second thread based on the coordinates of a first thread, wherein the first thread and the second thread belong to a first thread block, the sequence number of the first thread is less than the sequence number of the second thread, and the coordinates of the first thread include a first coordinate value, a second coordinate value, and a third coordinate value; and a second processing unit 720, used to determine the coordinates of the second thread based on the coordinates of the first thread and the coordinate increment of the second thread, wherein the coordinates of the second thread include a fourth coordinate value, a fifth coordinate value, and a sixth coordinate value.

[0119] In some embodiments, the first processing unit is further configured to determine the maximum dimension of the first thread block; and to determine the coordinate increment of the second thread based on the maximum dimension of the first thread block and the coordinates of the first thread, wherein the coordinate increment includes a first coordinate increment, a second coordinate increment and a third coordinate increment, and the coordinates of the first thread include a first coordinate value, a second coordinate value and a third coordinate value.

[0120] In some embodiments, the first processing unit is further configured to determine the sequence number of the thread bundle to which the first thread belongs, determine a first remainder based on the thread bundle sequence number and the maximum dimension of the first thread block, determine a second remainder and a third remainder based on the maximum dimension of the first thread block and the number of at least one thread contained in the thread bundle, determine the value of the first coordinate increment and the value of the second coordinate increment based on at least one of the first remainder, the second remainder, the third remainder and the first coordinate value, and determine the value of the third coordinate increment based on the maximum dimension of the first thread block, the number of at least one thread contained in the thread bundle and the second coordinate increment.

[0121] In some embodiments, the first processing unit is further configured to: determine the value of the first coordinate increment as a first value if the sum of the first remainder and the second remainder satisfies a first preset condition; determine the value of the first coordinate increment as a second value if the sum of the first remainder and the second remainder does not satisfy the first preset condition; determine the value of the second coordinate increment as a first value if the sum of the third remainder and the first coordinate value satisfies a second preset condition; and determine the value of the second coordinate increment as a second value if the sum of the third remainder and the first coordinate value does not satisfy the second preset condition.

[0122] In some embodiments, the second processing unit is further configured to determine the coordinates of the second thread, which include a fourth coordinate value, a fifth coordinate value, and a sixth coordinate value, based on the coordinates of the first thread and the coordinate increment of the second thread. This includes: determining a fixed increment value based on the maximum dimension of the first thread block and the number of at least one thread contained in the thread bundle; determining the fourth coordinate value by summing the fixed increment value, the first coordinate value, and the first coordinate increment; determining the fifth coordinate value based on the second coordinate increment and the second coordinate value; and determining the sixth coordinate value based on the third coordinate value, the third coordinate increment, the first coordinate increment, the maximum dimension of the first thread block, and the number of at least one thread contained in the thread bundle.

[0123] In some embodiments, the second processing unit is further configured to determine a fifth coordinate value based on a third remainder, a first coordinate value, and the maximum dimension of a first thread block when the value of the second coordinate increment is a first value; and to determine the fifth coordinate value by the sum of the third remainder and the first coordinate value when the value of the second coordinate increment is a second value.

[0124] In some embodiments, the second processing unit is further configured to determine the carry quantity based on the maximum dimension of the first thread block, the number of at least one thread contained in the thread bundle, and the first coordinate increment; and to determine the sixth coordinate value based on the third coordinate value, the third coordinate increment, and the carry quantity.

[0125] In some embodiments, the coordinate determination device further includes a third processing unit, configured to determine the fourth remainder corresponding to the fourth coordinate value based on the maximum dimension of the first thread block, the first remainder, and the second remainder when the value of the first coordinate increment is a first value; and to determine the sum of the first remainder and the second remainder as the fourth remainder corresponding to the fourth coordinate value when the value of the first coordinate increment is a second value.

[0126] In summary, the coordinate determination device 700 can determine the coordinate increment of the second thread based on the coordinates of the first thread determined in the previous step, and determine the coordinates of the second thread based on the coordinate increment. This avoids multiple division and multiplication operations, reduces computational complexity, improves the efficiency of coordinate determination, and saves computational resources.

[0127] The methods and apparatus provided in the embodiments of this application have been described above. To implement the functions of the methods provided in the embodiments of this application, the electronic device may include a hardware structure and software modules, and may implement the above functions in the form of a hardware structure, software modules, or a hardware structure plus software modules. One of the above functions may be executed in the form of a hardware structure, software modules, or a hardware structure plus software modules.

[0128] Figure 8This is a block diagram illustrating an electronic device 800 for implementing the above-described method according to an exemplary embodiment. For example, the electronic device 800 may be a mobile phone, computer, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.

[0129] Reference Figure 8 The electronic device 800 may include one or more of the following components: a processing component 802, a memory 804, a power supply component 806, a multimedia component 808, an audio component 810, an input / output (I / O) interface 812, a sensor component 814, and a communication component 816.

[0130] Processing component 802 typically controls the overall operation of electronic device 800, such as operations associated with display, telephone calls, data communication, camera operation, and recording operations. Processing component 802 may include one or more processors 820 to execute instructions to complete all or part of the steps of the methods described above. Furthermore, processing component 802 may include one or more modules to facilitate interaction between processing component 802 and other components. For example, processing component 802 may include a multimedia module to facilitate interaction between multimedia component 808 and processing component 802.

[0131] Memory 804 is configured to store various types of data to support the operation of electronic device 800. Examples of such data include instructions for any application or method operating on electronic device 800, contact data, phonebook data, messages, pictures, videos, etc. Memory 804 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0132] Power supply component 806 provides power to various components of electronic device 800. Power supply component 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 800.

[0133] Multimedia component 808 includes a screen that provides an output interface between electronic device 800 and user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of touch or swipe actions but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 808 includes a front-facing camera and / or a rear-facing camera. When electronic device 800 is in an operating mode, such as a shooting mode or video mode, the front-facing camera and / or rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0134] Audio component 810 is configured to output and / or input audio signals. For example, audio component 810 includes a microphone (MIC) configured to receive external audio signals when electronic device 800 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 804 or transmitted via communication component 816. In some embodiments, audio component 810 also includes a speaker for outputting audio signals.

[0135] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0136] Sensor assembly 814 includes one or more sensors for providing state assessments of various aspects of electronic device 800. For example, sensor assembly 814 can detect the on / off state of electronic device 800, the relative positioning of components such as the display and keypad of electronic device 800, changes in position of electronic device 800 or a component of electronic device 800, the presence or absence of user contact with electronic device 800, orientation or acceleration / deceleration of electronic device 800, and temperature changes of electronic device 800. Sensor assembly 814 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 814 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 814 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.

[0137] Communication component 816 is configured to facilitate wired or wireless communication between electronic device 800 and other devices. Electronic device 800 can access wireless networks based on communication standards, such as WiFi, 2G or 3G, 4G LTE, 5G NR (NewRadio), or combinations thereof. In one exemplary embodiment, communication component 816 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 816 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0138] In an exemplary embodiment, the electronic device 800 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the methods described above.

[0139] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 804 including instructions, which can be executed by a processor 820 of an electronic device 800 to perform the above-described method. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0140] Embodiments of this disclosure also provide a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to cause a computer to perform the methods described in the above embodiments of this disclosure.

[0141] The embodiments of this disclosure also propose a communication system including a terminal and a network device. The terminal is used to implement the method described in the first aspect of the embodiments of this disclosure, and the network device can be used to implement the method described in the second aspect of the embodiments of this disclosure.

[0142] Figure 9 This is a schematic diagram illustrating the structure of a chip 900 for implementing the above method according to an exemplary embodiment. (Refer to...) Figure 9 The chip 900 includes a communication interface 901 and at least one processor 902. The communication interface 901 is used to receive signals input to the chip 900 or signals output from the chip 900. The processor 902 communicates with the communication interface 901 and implements the methods described in the above embodiments of this disclosure through logic circuits or executing code instructions.

[0143] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.

[0144] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in at least one embodiment or example.

[0145] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing a particular logical function or process, and the scope of the preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which embodiments of the invention pertain.

[0146] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a system including a processing module, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having at least one wiring (control method), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic device, and portable optical disc read-only memory (CDROM). Furthermore, computer-readable media can even be paper or other suitable media on which programs can be printed, because programs can be obtained electronically, for example, by optically scanning the paper or other media, followed by editing, interpreting, or otherwise processing as necessary, and then stored in computer memory.

[0147] It should be understood that various parts of the embodiments of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0148] Those skilled in the art will understand that all or part of the steps of the methods described in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0149] Furthermore, the functional units in the various embodiments of the present invention can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc.

[0150] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A method of coordinate determination, characterized by, The method comprises: determining a coordinate increment of a second thread according to a coordinate of a first thread, the first thread and the second thread belonging to a first thread block, and a serial number of the first thread being smaller than a serial number of the second thread; determining a coordinate of the second thread according to the coordinate of the first thread and the coordinate increment of the second thread; the determining of the coordinate increment of the second thread according to the coordinate of the first thread comprises: determining a maximum dimension of the first thread block; determining the coordinate increment of the second thread according to the maximum dimension of the first thread block and the coordinate of the first thread, the coordinate increment comprising a first coordinate increment, a second coordinate increment and a third coordinate increment, and the coordinate of the first thread comprising a first coordinate value, a second coordinate value and a third coordinate value.

2. The method of claim 1, wherein, the determining of the first coordinate increment, the second coordinate increment and the third coordinate increment of the second thread according to the maximum dimension of the first thread block and the coordinate of the first thread comprises: determining a serial number of a thread bundle to which the first thread belongs, and determining a first remainder according to the serial number of the thread bundle and the maximum dimension of the first thread block; determining a second remainder and a third remainder according to the maximum dimension of the first thread block and a number of threads contained in the thread bundle; determining a value of the first coordinate increment and a value of the second coordinate increment according to at least one of the first remainder, the second remainder, the third remainder and the first coordinate value; determining a value of the third coordinate increment according to the maximum dimension of the first thread block, the number of threads contained in the thread bundle and the second coordinate increment.

3. The method of claim 2, wherein, the determining of the value of the first coordinate increment and the value of the second coordinate increment according to at least one of the first remainder, the second remainder, the third remainder and the first coordinate value comprises: determining the value of the first coordinate increment as a first value in a case where a sum of the first remainder and the second remainder satisfies a first preset condition; determining the value of the first coordinate increment as a second value in a case where the sum of the first remainder and the second remainder does not satisfy the first preset condition; determining the value of the second coordinate increment as a first value in a case where a sum of the third remainder and the first coordinate value satisfies a second preset condition; determining the value of the second coordinate increment as a second value in a case where the sum of the third remainder and the first coordinate value does not satisfy the second preset condition.

4. The method of claim 2, wherein, the coordinate of the second thread comprises a fourth coordinate value, a fifth coordinate value and a sixth coordinate value, and the determining of the coordinate of the second thread according to the coordinate of the first thread and the coordinate increment of the second thread comprises: determining a fixed increment value according to the maximum dimension of the first thread block and the number of threads contained in the thread bundle; determining a sum of the fixed increment value, the first coordinate value and the first coordinate increment as the fourth coordinate value; determining the fifth coordinate value according to the second coordinate increment and the second coordinate value; and determining the sixth coordinate value according to the third coordinate increment and the third coordinate value. The sixth coordinate value is determined according to the third coordinate value, the third coordinate increment, the first coordinate increment, the maximum dimension of the first thread block, and the number of at least one thread included in the thread bundle.

5. The method of claim 4, wherein, The fifth coordinate value is determined according to the second coordinate increment and the second coordinate value, including: When the value of the second coordinate increment is a first value, the fifth coordinate value is determined according to the third remainder, the first coordinate value, and the maximum dimension of the first thread block; When the value of the second coordinate increment is a second value, the sum of the third remainder and the first coordinate value is determined as the fifth coordinate value.

6. The method of claim 4, wherein, The sixth coordinate value is determined according to the third coordinate value, the third coordinate increment, the first coordinate increment, the maximum dimension of the first thread block, and the number of at least one thread included in the thread bundle, including: The number of carries is determined according to the maximum dimension of the first thread block, the number of at least one thread included in the thread bundle, and the first coordinate increment; The sixth coordinate value is determined according to the third coordinate value, the third coordinate increment, and the number of carries.

7. The method of claim 4, wherein, The method further includes: When the value of the first coordinate increment is a first value, the fourth remainder corresponding to the fourth coordinate value is determined according to the maximum dimension of the first thread block, the first remainder, and the second remainder; When the value of the first coordinate increment is a second value, the sum of the first remainder and the second remainder is determined as the fourth remainder corresponding to the fourth coordinate value.

8. A coordinate determination apparatus, the apparatus comprising: a first processing unit configured to determine a coordinate increment of a second thread according to a coordinate of a first thread, the first thread and the second thread belonging to a first thread block, and the sequence number of the first thread being smaller than that of the second thread; a second processing unit configured to determine a coordinate of the second thread according to the coordinate of the first thread and the coordinate increment of the second thread; the first processing unit is further configured to determine a maximum dimension of the first thread block; the coordinate increment of the second thread is determined according to the maximum dimension of the first thread block and the coordinate of the first thread, the coordinate increment including a first coordinate increment, a second coordinate increment, and a third coordinate increment, and the coordinate of the first thread including a first coordinate value, a second coordinate value, and a third coordinate value.

9. An electronic device, comprising: comprising: at least one processor; and a memory connected with the at least one processor in communication; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-7.

10. A non-transitory computer-readable storage medium having stored thereon computer instructions, wherein, The computer instructions are used to enable the computer to perform the method of any one of claims 1-7.

11. A chip, characterized by comprising at least one processor and a communication interface; the communication interface is used to receive signals input into the chip or signals output from the chip, the processor is in communication with the communication interface and implements the method of any one of claims 1 to 7 through a logic circuit or execution of code instructions.

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