Circuit parameter adjustment method and device, equipment and storage medium
Through the self-supervised learning model BERT, the device group parameters in circuit design are optimized, and the problem of inefficiency of traditional DTCO processes is solved, faster and more accurate circuit performance prediction and parameter adjustment are achieved, and the design efficiency and competitiveness of semiconductor manufacturing are improved.
Patent Information
- Application Number
- CN202411960952.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-05-06
AI Technical Summary
In the field of semiconductor manufacturing, traditional DTCO processes are inefficient and difficult to cope with changing device parameters and complex process conditions. Especially in advanced process nodes, such as 7nm, 5nm and below, the impact of process changes on circuit performance is more significant.
By obtaining circuit design data, preprocessing and generating a training data set suitable for the self-supervised learning model BERT, the self-supervised learning model BERT is constructed and trained until the model converges to the training set. The trained model is then used to optimize and adjust the parameters of the device group to be predicted in the circuit design to achieve forward and reverse prediction.
It significantly reduces the number of iterations of circuit parameter adjustments under advanced process nodes in the DTCO process, accelerates the design cycle, reduces costs, and improves the market competitiveness of the chip.
Smart Images
Figure CN119940248A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a circuit parameter adjustment method, device, equipment and storage medium. Background Art
[0002] In semiconductor manufacturing, traditional DTCO (Design Technology Co-Optimization) processes typically involve extensive manual iteration and experimentation, making them inefficient and unable to cope with the reality of volatile device group parameters and complex process conditions. This is especially true at advanced process nodes, such as 7nm, 5nm, and below, where process variations have a more significant impact on circuit performance. With technological advancements, circuit design increasingly relies on precise and rapidly iterative device models and parameters. This requires new methods that can accurately predict circuit performance and quickly adjust device group parameters to meet design specifications.
[0003] Although new DTCO methods based on device substitution modeling followed by circuit simulation have been proposed, they often rely on accurate device modeling and a large amount of experimental data. The device models also require a significant amount of circuit simulation time using SPICE simulators. These models and data are expensive to acquire, have long update cycles, and are time-consuming and labor-intensive to manually verify, limiting the flexibility and responsiveness of the DTCO process.
[0004] Therefore, how to automatically optimize circuit parameters to meet performance requirements while reducing design cycle and cost has become an urgent problem to be solved. Summary of the Invention
[0005] To solve the above technical problems, the present invention provides a circuit parameter adjustment method, device, equipment and storage medium, which significantly reduce the number of iterations of circuit parameter adjustment at advanced process nodes in the DTCO process, accelerate the design cycle, reduce costs, and improve the market competitiveness of chips.
[0006] The present invention is achieved through the following technical solutions.
[0007] The present invention provides a circuit parameter adjustment method, comprising:
[0008] Acquiring circuit design data, wherein the circuit design data includes circuit simulation data in a netlist form and device group parameters;
[0009] Preprocessing the obtained circuit design data to generate a training data set suitable for the self-supervised learning model BERT;
[0010] Building and training a self-supervised learning model BERT until the self-supervised learning model BERT converges on the training set;
[0011] The trained self-supervised learning model BERT is used to optimize and adjust the parameters of the device group to be predicted in the circuit design, so as to achieve forward prediction from the device group parameters to the performance specifications of the circuit to be predicted, and reversely derive the corresponding device group parameters to be predicted based on the performance requirements of the circuit to be predicted.
[0012] Furthermore, the circuit design data is obtained from standard unit circuits and fixed IP circuits.
[0013] Further,
[0014] The pretreatment includes:
[0015] Data cleaning to remove outliers and missing values;
[0016] Data normalization is used to make each feature in the dataset have zero mean and unit variance;
[0017] Data encoding, a one-hot encoding strategy is used for the relationship between device group parameters and circuit simulation data to convert the device group parameters into a format acceptable to the self-supervised learning model BERT.
[0018] Further,
[0019] The standardization formula for the data standardization is:
[0020]
[0021] Among them, X represents the original circuit design data, X std represents the standardized circuit design data, μ represents the mean of the circuit design data, and σ represents the standard deviation of the circuit design data;
[0022] The data encoding step uses the following mapping function to map the device group parameter P into the feature space F, F=encode(P), and the encode function is a rule-based encoding process.
[0023] Furthermore, the step of constructing and training the self-supervised learning model BERT until the self-supervised learning model BERT converges on the training set includes:
[0024] The self-supervised learning model BERT is trained using MLM tasks and NSP tasks.
[0025] In the MLM task, the input device group parameters and circuit simulation data are first converted into embedding vectors through the embedding layer, and then processed through the multi-layer BERT network to output a new feature representation vector.
[0026] The mathematical expression of the self-attention mechanism in the BERT network is expressed as:
[0027]
[0028] Among them, the Attention function is the vector after considering all positions in the entire sequence, the softmax function is the function that takes the key and query matching as probabilities, Q is the query matrix, K is the key matrix, V is the value matrix, and d k is the dimension of the key vector;
[0029] The NSP task is used to enable the self-supervised learning model BERT to capture the relationship between sequences and thus understand the contextual information of circuit design data.
[0030] Furthermore, the optimization adjustment includes applying the bidirectional characteristics of the self-supervised learning model BERT, combining circuit simulation data and performance specifications, and optimizing the parameters of the device group to be predicted in the circuit design to be predicted by fine-tuning the parameters of the self-supervised learning model BERT, and testing the prediction performance of the model through a validation set to ensure that the parameter adjustment results meet the performance requirements of the circuit design;
[0031] The bidirectional mapping process of the self-supervised learning model BERT is set as:
[0032] Z={z1,z2,...z i} is the input parameter sequence of the device group to be predicted,
[0033] Y={y1,y2,...y i} is the corresponding circuit simulation data sequence to be predicted,
[0034] The self-supervised learning model BERT first converts the input device group parameter sequence to be predicted into a continuous vector E representation through an embedding layer:
[0035] E = embeddinglayer(Z)
[0036] Next, the self-supervised learning model BERT extracts features through a multi-layer Transformer structure. The output of each layer can be expressed as:
[0037] H l =Transformerlayer(H l-1 ),l=1,2,...L
[0038] Among them, H l is the continuous vector E of the input, L is the number of layers of the Transformer structure;
[0039] When mapping bidirectional features, the self-supervised learning model BERT calculates the output vector for each position through the self-attention mechanism, taking into account the information of the entire sequence. For the p-th position in the l-th layer, the output of the self-attention is expressed as:
[0040]
[0041] in, is the attention weight calculated by the softmax function, which indicates the degree of attention of position p to position j.
[0042] The self-supervised learning model BERT converts feature representations into predictions for target circuit simulation data through an output layer:
[0043]
[0044] Furthermore, the parameters of the self-supervised learning model BERT are optimized by minimizing the loss function between the predicted circuit simulation data and the actual circuit simulation data:
[0045]
[0046] Among them, LossFunction is MSE or other loss functions suitable for regression tasks.
[0047] The present invention also provides a circuit parameter adjustment device, comprising:
[0048] A circuit design data acquisition module, configured to acquire circuit design data, wherein the circuit design data includes circuit simulation data in a netlist format and device group parameters;
[0049] A preprocessing module, configured to preprocess the obtained circuit design data to generate a training data set suitable for a self-supervised learning model BERT;
[0050] A model building module, configured to build and train a self-supervised learning model BERT until the self-supervised learning model BERT converges on the training set;
[0051] The optimization and adjustment module is used to optimize and adjust the parameters of the device group to be predicted in the circuit design using the trained self-supervised learning model BERT, so as to achieve forward prediction from the device group parameters to the performance specifications of the circuit to be predicted, and reversely derive the corresponding device group parameters to be predicted based on the performance requirements of the circuit to be predicted.
[0052] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the circuit parameter adjustment method described above is implemented.
[0053] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements any of the circuit parameter adjustment methods described above.
[0054] The invention also provides a computer program product, comprising a computer program, which, when executed by a processor, implements any of the circuit parameter adjustment methods described above.
[0055] The beneficial effects of the present invention are:
[0056] Automating the circuit parameter tuning process through self-supervised learning reduces manual intervention, improves circuit design efficiency, and shortens product development cycles. By processing large amounts of historical data using self-supervised learning models, the complex relationship between circuit performance and design parameters can be more accurately captured, thereby improving design accuracy and circuit performance.
[0057] Self-supervised learning does not rely on large-scale labeled datasets, making it more efficient in utilizing unlabeled data and reducing the time and cost of data annotation. By learning patterns from historical design data, the present invention can respond quickly and accurately to new design challenges, providing more powerful learning and optimization capabilities. Because the self-supervised learning model can learn from the data itself, the present invention is adaptable to changing design requirements and process conditions and exhibits strong generalization capabilities.
[0058] This invention provides a closed-loop optimization process that continuously refines circuit designs through continuous iteration until performance requirements are met, ensuring design quality. This automated and optimized design process reduces the need for expensive computing resources and labor costs, thereby lowering the overall cost of design and testing.
[0059] By combining the self-supervised learning algorithm with the DTCO process, the present invention not only improves the automation level and design quality of circuit design, but also provides strong technical support for the semiconductor manufacturing industry in the face of rapidly iterating market demands. BRIEF DESCRIPTION OF THE DRAWINGS
[0060] Figure 1 It is a structural diagram of the circuit parameter adjustment method provided by the present invention;
[0061] Figure 2 It is a structural schematic diagram of the circuit parameter adjustment device provided by the present invention;
[0062] Figure 3 It is a structural schematic diagram of the electronic device provided by the present invention;
[0063] Figure 4 This is a specific case of forward performance prediction of circuit design. DETAILED DESCRIPTION
[0064] The technical solution of the present invention is further described below, but the scope of protection claimed is not limited to the description.
[0065] like Figures 1-4 As shown, a circuit parameter adjustment method includes:
[0066] Step 110: Acquire circuit design data, wherein the circuit design data includes circuit simulation data in a netlist format and device group parameters;
[0067] Circuit design data is obtained from standard unit circuits and fixed IP (Intellectual Property) circuits. The data includes circuit simulation data in the form of netlists and device group parameters.
[0068] Step 120: pre-process the obtained circuit design data to generate a training data set suitable for the self-supervised learning model BERT;
[0069] The preprocessing includes data cleaning, data standardization, and data encoding to adapt the input format of the BERT (Bidirectional Encoder Representations from Transformer) model and construct feature representations.
[0070] First, data cleaning is performed on the circuit design data to remove outliers and missing values.
[0071] Secondly, data standardization is performed so that each feature in the data set has zero mean and unit variance. The standardization formula is:
[0072]
[0073] Among them, X represents the original circuit design data, X std represents the standardized circuit design data, μ represents the mean of the circuit design data, and σ represents the standard deviation of the circuit design data.
[0074] The data encoding operation uses a one-hot encoding strategy to transform the features of the category so that they can be processed by the self-supervised learning model BERT. For the relationship between the device group parameters and the circuit simulation data, a specific encoding strategy is adopted, and the device group parameters P are mapped to the feature space F using the following mapping function:
[0075] F=encode(P)
[0076] The encode function is a rule-based encoding process that converts the device group parameters into a format acceptable to the self-supervised learning model BERT.
[0077] Through such preprocessing, a training dataset suitable for self-supervised learning was constructed, laying the foundation for subsequent model training and circuit parameter tuning.
[0078] Step 130: Build and train a self-supervised learning model, BERT (Bidirectional Encoder Representations from Transformer), until the model converges on the device group parameter-circuit simulation data training set;
[0079] The training of the self-supervised learning model BERT uses the MLM (Masked Language Model) task and the NSP (Next Sentence Prediction) task.
[0080] The MLM task randomly masks part of the input device group parameters and / or circuit simulation data, so that the self-supervised learning model BERT predicts the masked part of the input device group parameters and / or circuit simulation data, thereby learning the intrinsic correlation between the device group parameters and the circuit simulation data;
[0081] The NSP task is to predict whether a pair of circuit design data sequences are arranged in sequence, so as to understand the sequential relationship in the data.
[0082] In the MLM task of the self-supervised learning model BERT, the input device group parameter-circuit simulation data set is first converted into an embedding vector through the embedding layer, and then processed by the multi-layer BERT network. For a given device group parameter-circuit simulation data input sequence X = {x1, x2, ... x n}, its embedding is represented as E={e1,e2,...e n}, where e n is the output of the embedding layer. After the embedding layer, each layer of the BERT network processes these embedding vectors and outputs a new feature representation vector. The self-attention mechanism in the BERT network allows the model to consider all positions in the entire sequence when processing the input at each position. Its mathematical expression can be expressed as:
[0083]
[0084] Among them, the Attention function is the vector after considering all positions in the entire sequence, the softmax function can use the key and query matching as probabilities, Q is the query matrix, K is the key matrix, and V is the value matrix.k is the dimension of the key vector, used to scale the dot product to prevent the vanishing gradient problem.
[0085] In the MLM task of the self-supervised learning model BERT, the masked parts are replaced by a special mask token at the input, and the model is trained by predicting the original values of these mask positions.
[0086] In the NSP task, the self-supervised learning model BERT receives a pair of sequences A and B, and the model predicts whether sequence B is the next sentence of sequence A. The purpose of this task is to enable the model to capture the relationship between sequences and thus better understand the contextual information of circuit design data.
[0087] By combining these two tasks, the self-supervised learning model BERT continuously iteratively updates parameters under the framework of self-supervised learning to improve the prediction accuracy in the DTCO circuit parameter adjustment task.
[0088] Step 140: Use the trained self-supervised learning model BERT to optimize and adjust the parameters of the device group to be predicted in the circuit design, so as to achieve forward prediction from the device group parameters to the performance specifications of the circuit to be predicted, and reversely derive the corresponding device group parameters to be predicted based on the performance requirements of the circuit to be predicted.
[0089] The optimization and adjustment includes applying the bidirectional characteristics of the self-supervised learning model BERT, combining circuit simulation data and performance specifications, and optimizing the device group parameters in the predicted circuit design by fine-tuning the model parameters. The prediction performance of the model is tested through a validation set to ensure that the parameter adjustment results meet the performance requirements of the circuit design.
[0090] The bidirectional feature of the self-supervised learning model BERT is used. The bidirectional feature allows the model to consider the contextual information before and after the device group parameters at the same time. The bidirectional mapping process of the self-supervised learning model BERT can be assumed as: Z = {z1, z2, ... z i} is the input device group parameter sequence, and Y={y1,y2,...y i} is the corresponding circuit simulation data sequence. The self-supervised learning model BERT first converts the input sequence into a continuous vector E through an embedding layer:
[0091] E = embeddinglayer(Z)
[0092] Next, the self-supervised learning model BERT extracts features through a multi-layer Transformer structure. The output of each layer can be expressed as:
[0093] H l =Transformerlayer(H l-1),l=1,2,...L
[0094] Among them, H l is the continuous vector E of the input, and L is the number of layers of the Transformer structure.
[0095] When mapping bidirectional features, the self-supervised learning model BERT uses the self-attention mechanism to calculate the output vector for each position, taking into account the information of the entire sequence. For the p-th position in the l-th layer, the output of the self-attention is expressed as:
[0096]
[0097] in, is the attention weight calculated by the softmax function, which indicates the degree of attention of position p to position j.
[0098] The self-supervised learning model BERT converts feature representations into predictions for target circuit simulation data through an output layer:
[0099]
[0100] During the fine-tuning phase, the parameters of the self-supervised learning model BERT are optimized by minimizing the loss function between the predicted circuit simulation data and the actual circuit simulation data:
[0101]
[0102] Among them, LossFunction is MSE (Mean Squared Error) or other loss functions suitable for regression tasks.
[0103] Through the above steps, the self-supervised learning model BERT can learn the complex relationship between device group parameters and circuit simulation data, and optimize the device group parameters in the predicted circuit design through a fine-tuning process to meet the performance specification requirements.
[0104] Figure 4 This is a specific case study of forward performance prediction for a circuit design. It's based on an ADDF (Add Full) circuit in the K (characterization Stand Cell) library in the 18-process. Under FF (Fast NMOS, Fast PMOS) process corners, the static power consumption of the circuit is predicted and continuously verified based on the influence of temperature among the three PVT (Process, Voltage, Temperature) factors.
[0105] The test file uses a 18-processor with a 1.8V VDD supply voltage. Based on the characteristic data extracted from the standard cell circuit in the library file, the model continuously verifies and optimizes the static power consumption prediction of the full adder circuit at -40°C. The model predicts the static power consumption of full adder circuits with different computational requirements, gradually refining the prediction results. The model uses the static power consumption of an A*B*CI*CO*S circuit of a full adder at 125°C, -50°C, and -40°C, as well as the A*B*!CI*CO*!S circuit of a full adder at 125°C and -50°C as input sample data, and predicts the A*B*!CI*CO*!S circuit of a full adder at -40°C. The self-supervised model predicted a value of 0.0189822nW, while the actual SPICE simulator simulated value was 0.0192664nW, with an error rate of 3.03222%. After fine-tuning and optimization, the model underwent four rounds of migration testing. Using the static power consumption of the full adder A*B*CI*CO*S circuit at 125℃, -50℃, and -40℃, the A*B*!CI*CO*! S circuit of the full adder at 125℃, -50℃, and -40℃, the A*B*!CI*CO*! S circuit of the full adder at 125℃, -50℃, and -40℃, the A*B*!CI*CO*! S circuit of the full adder at 125℃, -50℃, and -40℃, the A*B*!CI*CO*! CO*S circuit of the full adder at 125℃, -50℃, and -40℃, and the A*B*CI*CO*! S circuit of the full adder at 125℃ and -50℃ as input sample data, the model accurately predicted the A*B*CI*CO*! The static power consumption value of the S circuit is predicted by the self-supervised model to be 0.0145659nW, while the actual SPICE simulator simulation value is 0.0145661nW, with an error rate of 0.00137%.
[0106] The circuit parameter adjustment device provided by the present invention is described below. Figure 2 As shown, the circuit parameter adjustment device described below and the circuit parameter adjustment method described above can refer to each other.
[0107] A circuit parameter adjustment device, comprising:
[0108] A circuit design data acquisition module 210 is configured to acquire circuit design data, wherein the circuit design data includes circuit simulation data in a netlist format and device group parameters;
[0109] A preprocessing module 220 is used to preprocess the obtained circuit design data to generate a training data set suitable for the self-supervised learning model BERT;
[0110] A model building module 230 is used to build and train a self-supervised learning model BERT until the self-supervised learning model BERT converges on the training set;
[0111] The optimization and adjustment module 240 is used to optimize and adjust the parameters of the device group to be predicted in the circuit design using the trained self-supervised learning model BERT, so as to achieve forward prediction from the device group parameters to the performance specifications of the circuit to be predicted, and reversely derive the corresponding device group parameters to be predicted based on the performance requirements of the circuit to be predicted.
[0112] Figure 3 An example of a physical structure diagram of an electronic device is shown below. Figure 3 As shown, the electronic device may include: a processor 310, a communication interface 320, a memory 330, and a communication bus 340, wherein the processor 310, the communication interface 320, and the memory 330 communicate with each other via the communication bus 340. The processor 310 may call the logic instructions in the memory 330 to execute the circuit parameter adjustment method, which includes:
[0113] Acquiring circuit design data, wherein the circuit design data includes circuit simulation data in a netlist form and device group parameters;
[0114] Preprocessing the obtained circuit design data to generate a training data set suitable for the self-supervised learning model BERT;
[0115] Building and training a self-supervised learning model BERT until the self-supervised learning model BERT converges on the training set;
[0116] The trained self-supervised learning model BERT is used to optimize and adjust the parameters of the device group to be predicted in the circuit design, so as to achieve forward prediction from the device group parameters to the performance specifications of the circuit to be predicted, and reversely derive the corresponding device group parameters to be predicted based on the performance requirements of the circuit to be predicted.
[0117] In addition, the logic instructions in the above-mentioned memory 330 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when sold or used as an independent product. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.
[0118] On the other hand, the present invention further provides a computer program product, which includes a computer program. The computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can perform the circuit parameter adjustment method provided by the above methods, which includes:
[0119] Acquiring circuit design data, wherein the circuit design data includes circuit simulation data in a netlist form and device group parameters;
[0120] Preprocessing the obtained circuit design data to generate a training data set suitable for the self-supervised learning model BERT;
[0121] Building and training a self-supervised learning model BERT until the self-supervised learning model BERT converges on the training set;
[0122] The trained self-supervised learning model BERT is used to optimize and adjust the parameters of the device group to be predicted in the circuit design, so as to achieve forward prediction from the device group parameters to the performance specifications of the circuit to be predicted, and reversely derive the corresponding device group parameters to be predicted based on the performance requirements of the circuit to be predicted.
[0123] In another aspect, the present invention further provides a non-transitory computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the circuit parameter adjustment method provided by the above methods is implemented, and the method includes:
[0124] Acquiring circuit design data, wherein the circuit design data includes circuit simulation data in a netlist form and device group parameters;
[0125] Preprocessing the obtained circuit design data to generate a training data set suitable for the self-supervised learning model BERT;
[0126] Building and training a self-supervised learning model BERT until the self-supervised learning model BERT converges on the training set;
[0127] The trained self-supervised learning model BERT is used to optimize and adjust the parameters of the device group to be predicted in the circuit design, so as to achieve forward prediction from the device group parameters to the performance specifications of the circuit to be predicted, and reversely derive the corresponding device group parameters to be predicted based on the performance requirements of the circuit to be predicted.
[0128] By combining the above methods, the self-supervised learning DTCO circuit parameter adjustment method proposed in the present invention not only improves the efficiency and accuracy of circuit design, but also enhances the predictability and adjustability of circuit performance, thereby achieving collaborative optimization of circuit design processes and having important industrial application value. The present invention extracts the device group parameters of standard unit circuits and fixed IP circuits and their corresponding circuit performance data sets to construct a data set. The data set is used to train a self-supervised model, enabling the model to predict circuit performance and adjust device parameters: on the one hand, forward prediction of circuit performance is made using the device parameters in the circuit netlist; on the other hand, reverse prediction of each key parameter of the device group is made based on the circuit performance specifications. After training is completed, the model is continuously verified and fine-tuned to ensure the stability and accuracy of the model output. This circuit parameter adjustment mechanism can adapt to different material properties and process nodes, ensuring that the model can still provide reliable circuit performance and device parameter data under variable process conditions. Through this method, the efficiency of the DTCO process can be improved, and the performance and quality requirements of chip design can be better met.
[0129] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they may be located in one location or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the present embodiment. Persons of ordinary skill in the art will be able to understand and implement the present invention without inventive effort.
[0130] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, or of course, by hardware. Based on this understanding, the essence of the above technical solution or the part that contributes to the existing technology can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or certain parts of the embodiments.
[0131] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.
Claims
1. A circuit parameter adjustment method, characterized in that: include: Acquiring circuit design data, wherein the circuit design data includes circuit simulation data in a netlist form and device group parameters; Preprocessing the obtained circuit design data to generate a training data set suitable for a self-supervised learning model BERT; Constructing and training a self-supervised learning model BERT until the self-supervised learning model BERT converges on the training set; The trained self-supervised learning model BERT is used to optimize and adjust the parameters of the device group to be predicted in the circuit design, so as to achieve forward prediction from the device group parameters to the performance specifications of the circuit to be predicted, and reversely derive the corresponding device group parameters to be predicted based on the performance requirements of the circuit to be predicted.
2. A circuit parameter adjustment method as claimed in claim 1, characterized in that: The circuit design data is obtained from a standard unit circuit and a fixed IP circuit.
3. A circuit parameter adjustment method as claimed in claim 1, characterized in that: The pre-processing comprises: Data cleaning to remove outliers and missing values; Data standardization is used to make each feature in the data set have zero mean and unit variance; Data encoding,A one-hot encoding strategy is used for the relationship between device group parameters and circuit simulation data,,which converts the device group parameters into a format acceptable to the,selfsupervised learning model BERT.
4. A circuit parameter adjustment method as claimed in claim 3, characterized in that: The standardization formula for the data standardization is: Where X represents the original circuit design data, X std represents the standardized circuit design data, μ represents the mean of the circuit design data, and σ represents the standard deviation of the circuit design data; The data encoding step uses the following mapping function to map the device group parameter P into the feature space F, F=encode(P), and the encode function is a rule-based encoding process.
5. A circuit parameter adjustment method as claimed in claim 1, characterized in that: The step of constructing and training the self-supervised learning model BERT until the self-supervised learning model BERT converges on the training set includes: The self-supervised learning model BERT is trained using MLM tasks and NSP tasks. In the MLM task, the input device group parameters and circuit simulation data are first converted into embedding vectors through the embedding layer, and then processed through the multi-layer BERT network to output a new feature representation vector. The mathematical expression of the self-attention mechanism in the BERT network is expressed as: Among them, the Attention function is the vector after considering all positions in the entire sequence, the softmax function is a function that takes the key and query matching as probabilities, Q is the query matrix, K is the key matrix, V is the value matrix, and d k is the dimension of the key vector; The NSP task is used to enable the self-supervised learning model BERT to capture the relationship between sequences and thus understand the contextual information of circuit design data.
6. A circuit parameter adjustment method as claimed in claim 1, characterized in that: The optimization adjustment includes applying the bidirectional characteristics of the self-supervised learning model BERT, combining circuit simulation data and performance specifications, optimizing the parameters of the device group to be predicted in the circuit design to be predicted by fine-tuning the parameters of the self-supervised learning model BERT, and testing the prediction performance of the model through a validation set to ensure that the parameter adjustment results meet the performance requirements of the circuit design; The bidirectional mapping process of the self-supervised learning model BERT is set as: Z={z1,z2,...z i } is the input parameter sequence of the device group to be predicted, Y={y1,y2,...y i } is the corresponding circuit simulation data sequence to be predicted, The self-supervised learning model BERT first converts the input device group parameter sequence to be predicted into a continuous vector E representation through an embedding layer: E = embeddinglayer(Z) Next, the self-supervised learning model BERT extracts features through a multi-layer Transformer structure. The output of each layer can be expressed as: H l =Transformerlayer(H l-1 ),l=1,2,...L Among them, H l is the continuous vector E of the input, L is the number of layers of the Transformer structure; When mapping bidirectional features, the self-supervised learning model BERT calculates the output vector of each position through the self-attention mechanism, taking into account the information of the entire sequence. For the p-th position of the l-th layer, the output of the self-attention is expressed as: in, is the attention weight calculated by the softmax function, which indicates the degree of attention of position p to position j. The self-supervised learning model BERT converts feature representations into predictions for target circuit simulation data through an output layer:
7. A circuit parameter adjustment method as claimed in claim 6, characterized in that: The parameters of the self-supervised learning model BERT are optimized by minimizing the loss function Loss between the predicted circuit simulation data and the actual circuit simulation data: Among them, LossFunction is MSE or other loss function suitable for regression tasks.
8. A circuit parameter adjustment device, characterized in that: include: A circuit design data acquisition module, used to acquire circuit design data, wherein the circuit design data includes circuit simulation data in the form of a netlist and device group parameters; A preprocessing module, used for preprocessing the obtained circuit design data to generate a training data set suitable for a self-supervised learning model BERT; A model building module, used to build and train a self-supervised learning model BERT until the self-supervised learning model BERT converges on the training set; The optimization and adjustment module is used to optimize and adjust the parameters of the device group to be predicted in the circuit design using the trained self-supervised learning model BERT, so as to achieve forward prediction from the device group parameters to be predicted to the performance specifications of the circuit to be predicted, and reversely derive the corresponding device group parameters to be predicted based on the performance requirements of the circuit to be predicted.
9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the circuit parameter adjustment method as described in any one of claims 1-7 is implemented.
10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, it implements the circuit parameter adjustment method as described in any one of claims 1-7 above.