Method for realizing automatic wiring of simulation layout matching array

By automatically generating twig, trunk, strap1 and strap2 traces, the existing EDA tools are solved inefficient in simulated layout matching array automatic connection, achieving efficient and area-saving automatic connection effect.

CN119940256APending Publication Date: 2025-05-06成都星拓微电子科技股份有限公司
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Patent Information

Application Number
CN202510024376.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-07
Publication Date
2025-05-06

AI Technical Summary

Technical Problem

Existing EDA tools are inefficient in simulating automatic wiring of layout matching arrays, occupying additional layout area and having parasitic effects, making it difficult to achieve fully automatic matching placement and connection with one-click.

Method used

By obtaining the metal level information of the layout process and the device position information, twig, trunk, strap1 and strap2 traces are automatically generated to realize automatic connection of the simulated layout matching array. This method adapts to different matching scenarios according to the user-defined mode and generates the least connection path.

Benefits of technology

It realizes efficient automatic connection of simulated layout matching arrays, saves layout area, reduces parasitic effects, and improves layout drawing efficiency.

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Abstract

The invention provides a method for realizing automatic wiring of a simulation layout matching array, and belongs to the technical field of simulation layout automation. Aiming at a common current mirror, resistor and capacitor matching scene, after the layout of a matching array is determined, a method for realizing automatic connection between devices is provided only for internal connection of the matching array, so that the layout drawing efficiency is improved. In a device matching array, the types, ports and arrangement modes of devices are automatically identified, virtual devices are identified, one-key automatic wiring can be realized according to a conventional wiring mode of a simulation layout only by setting a few constraint parameters, and a calculation method for assisting in judging whether matching is reasonable or not is provided while an automatic wiring function is achieved.
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Description

Technical Field

[0001] The invention belongs to the technical field of analog layout automation, and in particular relates to a method for realizing automatic connection of an analog layout matching array. Background Art

[0002] In the process of layout realization of analog circuits, the manufacturing and working environment of the layout devices will affect the working performance of the devices. Specifically, the environmental impact mainly includes: manufacturing etching accuracy, residual stress, and temperature gradient during operation. The same devices placed in different environments will produce characteristic deviations between each other. These deviations are often avoided as much as possible for circuit performance realization. Therefore, in the layout design process, the environmental differences between devices are often minimized by matching the device positions.

[0003] When designing the layout, first of all, all the devices that need to be matched need to be placed in the same matching array according to the type and quantity of the devices. There are many types of matching arrays, and the most common ones are cross-coupling matching, common centroid matching, and interdigital matching. After the matching array is completed, it is necessary to connect the devices scattered throughout the array to achieve the same connection relationship as the analog circuit. In order to improve work efficiency, layout engineers often have a strong demand for automation of the above process. However, due to the variety of types, processes, quantities and matching types of matching devices, the current mainstream electronic design automation (EDA) tools are difficult to provide one-click fully automatic matching placement and wiring functions. Although some tools provide related functions, the wiring template is either single and inflexible, or the wiring form is not in line with habits and cannot be adjusted, or many constraints need to be preset. Compared with manual wiring, the wiring form also has disadvantages in terms of area and parasitics. There are also tools that are flexible and fast in layout automation, but the learning cost is too high.

[0004] For common current mirror and resistor-capacitor matching scenarios, the connection patterns provided by mainstream EDA tools generally require dedicated routing channel areas. Once the routing channel area overlaps with the device area, most connection patterns cannot support it, which will occupy additional layout area. Summary of the invention

[0005] The purpose of the present invention is to propose a method for realizing automatic wiring of analog layout matching array, so as to solve the technical problems proposed in the above background technology for common current mirror and resistor-capacitor matching scenarios, such as low layout drawing efficiency, additional layout area occupied and disadvantages in parasitic aspects.

[0006] To achieve the above object, the present invention provides the following technical solutions:

[0007] A method for realizing automatic wiring of a simulated layout matching array comprises the following steps:

[0008] S01. Obtaining constraints, wherein the constraints include obtaining layout process metal layer information, and obtaining the layer, line width, direction, and line spacing information of twig, trunk, strap1, and strap2;

[0009] S02. Obtain the number of rows and columns of the array, the pitch of the rows and columns, the position and direction of each device in the array, and the net information of each port of the device, and store them;

[0010] S03. Determine whether to use the strap2 layer to connect the matching array, and then generate a range list from the smallest column number to the largest column number for each net in each row according to the row and column positions where each net appears, and automatically generate the required twig, trunk, strap1 or twig, trunk, strap1, strap2 to complete all the connections.

[0011] Furthermore, in step S03, the process of generating twig, trunk, and strap1 routing is as follows:

[0012] (1) For each net, determine whether there is an intersection in column numbers between trunks in different rows;

[0013] (2) If there is an intersection in column numbers, calculate and generate the minimum number of trunks x required in a row: for the range list, traverse each column number. If there are at most x lists that contain the same column number, calculate the number of basic trunks required for the row as x, and record the column number range corresponding to the maximum number of trunks in each row; if there is no intersection in column numbers, extend and generate trunks according to the requirements of cross-row connections: give priority to avoiding the column corresponding to the maximum number of trunks in each row for extension. If it cannot be avoided, select the row with the smallest number of basic trunks for extension, and record the number of additional trunks in the row plus 1; when calculating the next net position that needs to be extended, calculate and arrange it according to the total number of trunks in each row that has been recounted;

[0014] (3) Use strap1 to vertically connect all trunks of the same net: Calculate the column intersection of the same net in different rows, and select appropriate columns to generate strap1 in order from small to large intersection range to complete automatic connection.

[0015] Furthermore, in step S03, the process of generating twig, trunk, strap1, and strap2 routing is as follows:

[0016] (1) Determine whether the column routing is prioritized for each net one by one: For each net at each position, find the number of times the same net appears at other positions in the same row, recorded as n, and find the number of times the same net appears at other positions in the same column, recorded as m. If n ≥ m, the row priority is accumulated by 1, otherwise the column priority is accumulated by 1; compare the row priority and column priority of each net;

[0017] (2) If column routing is prioritized, generate trunks that do not cross columns; if routing is prioritized, calculate the minimum number of trunks x required in a row and generate: for the range list, traverse each column number. If there are at most x lists that contain the same column number, then the number of basic trunks required for the row is x, and record the column number range corresponding to the maximum number of trunks in each row;

[0018] (3) Generate strap1 at all column positions that need to be connected across rows;

[0019] (4) For each net, determine whether there is a row number intersection between different column strap1s. If there is a row number intersection, select a suitable position in the row intersection to generate a strap2 connection. If there is no row number intersection, extend the generated strap1 until a row number intersection appears, and then select a suitable position in the row intersection to generate a strap2 connection to complete the automatic connection.

[0020] Furthermore, before generating the trunk, it is necessary to determine whether the number of trunks in each row meets the process constraints. If not, the process is terminated and the process is continued after increasing the row spacing. Before generating the strap1, it is necessary to determine whether the number of strap1s in each column meets the process constraints. If not, the process is terminated and the process is continued after increasing the column spacing. Generate twig according to the trunk position.

[0021] Furthermore, according to the occurrence position of each net in the array, the necessary conditions for judging whether the match is reasonable are: for each net at the source and drain ends, calculate its occurrence position one by one, count the number of rows and columns it occupies, and the number of rows * number of columns / number of devices are equal to each other.

[0022] The present invention has the following beneficial effects:

[0023] 1. A more efficient implementation method. Based on user-defined patterns, it is equivalent to using a universal pattern to be compatible with all situations, achieving one-step automatic connection.

[0024] 2. Use simpler constraints to complete fully automatic matching and connection. In theory, the process of the present invention only needs to obtain process constraints (line width and line spacing level, etc.) to calculate a reasonable line width range, and at the same time, the user-defined value selection can also be retained.

[0025] 3. A conventional wiring method that is more in line with analog layout design. The implementation method of the present invention is equivalent to a fixed wiring pattern, which is in line with the wiring habits of analog layout, does not rely on dedicated wiring channels, and saves array area.

[0026] 4. The algorithm can be used to determine whether the placement of matching components is reasonable. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for describing the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0028] Figure 1 It is the overall operation steps of the present invention;

[0029] Figure 2 This is a logic block diagram of the automatic connection process of the present invention;

[0030] Figure 3 This is the schematic diagram of the current mirror connection relationship circuit;

[0031] Figure 4 This is a schematic diagram of layout position matching;

[0032] Figure 5 To generate a Twig routing diagram;

[0033] Figure 6 To generate a trunk routing diagram;

[0034] Figure 7 To generate a strap1 routing diagram;

[0035] Figure 8 Generate a strap2 routing diagram. DETAILED DESCRIPTION

[0036] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] See also Figure 1-2 As shown, a method for realizing automatic wiring of a simulated layout matching array specifically comprises the following steps:

[0038] Step 1. Obtain constraints. The constraints include obtaining layout process metal level information, and obtaining the level, line width, direction and other constraints of twig, trunk, strap1 and strap2. Twig is the smallest branch connecting the device port, and is generally connected using the first layer of metal in the back-end process; trunk can be understood as a thicker branch, and generally the second layer of metal in the back-end process can be used. The trunk can be used to connect the twig holes of the same connection relationship (net) in multiple devices in a row together; strap1 is the bus that ultimately connects the trunks of different rows with the same connection relationship together, and strap2 is the bus that connects different strap1s of the same net together. Under certain conditions, strap2 is not necessary, which depends on the placement of the devices in the matching array. In this embodiment, strap1 and strap2 can be completed using the third and fourth layers of metal, respectively.

[0039] Step 2. Get the number of rows and columns of the array, the pitch of the rows and columns, the position and direction of each device in the array, and the net information of each port of the device. Store this information in the code, which can be accessed at any time based on the row and column numbers.

[0040] Step 3. After obtaining the above information, the program will traverse all rows and columns, read the net information of the device port one by one according to the row and column numbers, and automatically generate the required twig, trunk, strap1, and strap2 according to the row and column positions of each net, and complete all the connections as evenly and concisely as possible. This step is the key to the entire code operation logic. Take the case where twig is vertical, trunk is used to horizontally connect the twig of the same net in each row, strap1 is vertical, and strap2 is horizontal as an example. The core and difficulty lies in facing a variety of matching methods, how to calculate the minimum number of trunks to generate, use the minimum number of trunks to achieve all matching connections, and determine under what conditions it is necessary to abandon the use of trunks to complete all horizontal connections, and introduce strap2 to help complete the horizontal connections.

[0041] Figure 2 To generate the logic diagram of twig, trunk, strap1, and strap2 routing according to the constraints, the specific process is as follows:

[0042] ① Get all the nets for each row and column in the array information;

[0043] ② In each row, get the occurrence position of each net, and generate a range list for each net from its smallest column number to its largest column number, so that each net corresponds to a range list in each row;

[0044] ③ Determine whether the process supports the use of 4 or more layers of metal for connecting the matching array, that is, determine whether the use of strap2 layer for connecting the matching array is allowed. This judgment is the primary condition of the entire routing process and determines the subsequent different routing strategies.

[0045] ④ Situations where strap2 layer is allowed:

[0046] Determine for each net whether the vertical (column) routing is prioritized: traverse all nets, for each net at each position, find the number of times the same net appears at other positions in the same row, recorded as n, and at the same time find the number of times the same net appears at other positions in the same column, recorded as m. If n ≥ m, the row priority is accumulated by 1, otherwise the column priority is accumulated by 1; after traversing all nets in all row and column positions, compare the row priority and column priority of each net.

[0047] If vertical (column) routing is prioritized, a trunk that does not cross columns is generated;

[0048] If horizontal (row) routing is prioritized, calculate the minimum number of trunks x required in a row and generate: traverse the smallest column number to the largest column number, for all net range lists, traverse each column number, there are at most x lists that contain the same column number at the same time, then calculate the number of basic trunks required for the row as x, and record the column number range corresponding to the maximum number of trunks in each row.

[0049] Under given process constraints, sometimes the array spacing provided by the user does not allow for all the routing that can be connected. For example, when the maximum number of trunks in a single row multiplied by the minimum routing pitch of the process is greater than the row pitch, the user needs to be prompted to increase the row spacing. Therefore, before generating the trunk, it is necessary to determine whether the number of trunks in each row meets the process constraints. If not, the process is terminated and continued after increasing the row spacing; if it is satisfied, the trunk is generated according to the above priority judgment. At the same time, twigs are generated according to the trunk position to facilitate the subsequent trunk downward drilling.

[0050] After the trunk is generated, generate strap1 for all column positions that need to be connected across rows.

[0051] Similarly, before generating strap1, it is necessary to determine whether the number of strap1s in each column meets the process constraints. If not, terminate the process and continue after increasing the column spacing; if so, generate strap1.

[0052] Next, for each net, determine whether there is a row number intersection between different column strap1s. If there is a row number intersection, select a suitable position in the row intersection to generate a strap2 connection; if there is no row number intersection, the generated strap1 needs to be extended until a row number intersection appears, and then select a suitable position in the row intersection to generate a strap2 connection. The selected position should ensure that the strap2 is evenly distributed. At this point, the automatic connection is completed and matching suggestions are given.

[0053] ⑤Situations where strap2 layer is not allowed:

[0054] For each net, determine whether there is an intersection in column numbers between trunks in different rows. If there is an intersection in column numbers, calculate the minimum number of trunks x required in a row and generate them: traverse from the smallest column number to the largest column number, for the range list of all nets, traverse each column number, and there are at most x lists that contain the same column number at the same time, then the number of basic trunks required for the row is calculated to be x, and record the column number range corresponding to the maximum number of trunks in each row; if there is no intersection in column numbers, extend the trunk according to the needs of cross-row connection, that is, use the trunk to help complete the connection of the same net between different rows: for example, an array has 2 rows and 3 columns, where netA only appears in the first column in the first row, only appears in the third column in the second row, and only appears in the third column in the row There is no intersection between the column numbers of A and the rows. In order to connect netA across rows, netA must be extended to occupy more columns in a row, for example, extended to the third column in the first row, so that it can be connected across rows with strap later. Similarly, there may be more than one net that needs to be extended; it is necessary to select a suitable row to place the extended trunk of the net. The code preferentially avoids the column corresponding to the maximum number of trunks in each row for extension (that is, extending the trunk does not increase the number of basic trunks in each row). If it cannot be avoided, the row with the smallest number of basic trunks is selected for extension, and the number of additional trunks in the row is recorded plus 1; when calculating the position of the next net that needs to be extended, the calculation and arrangement are made according to the re-counted total number of trunks in each row.

[0055] After that, use strap1 to vertically connect all trunks with the same net: calculate the column intersection of the same net in different rows, and select appropriate columns to generate strap1 in order from small to large intersection range, so as to ensure that strap1 is evenly distributed. At this point, the automatic connection is completed and matching suggestions are given.

[0056] Similarly, in this case, before generating the trunk, it is necessary to determine whether the number of trunks in each row meets the process constraints. If not, the process is terminated and the row spacing is increased before continuing. If it is, the trunk is generated, and twig is generated according to the trunk position. Before generating the strap1, it is necessary to determine whether the number of strap1s in each column meets the process constraints. If not, the process is terminated and the column spacing is increased before continuing. If it is, the strap1 is generated.

[0057] The reasonableness of the match can be determined based on the position of each net in the array. For example, for each net at the source and drain ends of all MOS field effect transistors, its position is calculated one by one, and the number of rows and columns it occupies is counted. The number of rows * number of columns / number of devices being equal is a necessary condition for reasonable matching.

[0058] Figure 3 This is a circuit schematic diagram corresponding to a simple application case of the present invention, which shows a simple current mirror connection relationship. Figures 4 to 8 Shown Figure 3 The schematic diagram follows Figure 4 How to automatically generate connections step by step according to the code running logic when the layout position matches (users will directly see the final result during actual operation). The following is a brief explanation.

[0059] Figure 3 Only the field effect transistors with two connection relationships, A and B, need to be matched. There are 6 B transistors and 3 A transistors, arranged in a 3x3 matching array, with A transistors in the middle in one vertical row and B transistors in two vertical rows on both sides. Figure 1 The input conditions of Step 3 in Figure 2 The logic shown below explains how each routing is generated:

[0060] According to the above process ①, the program first obtains the net information that appears in each row and column. For example, each row contains [net1net2 net3], the first column only contains [net1 net3], the second column only contains [net1 net2], and so on. This information is stored in two lists in order of row number and column number, respectively, for easy subsequent retrieval.

[0061] According to the above process ②, the program will obtain the occupied range of each net. For example, for net3, the smallest column position it occupies in the first row is 1, and the largest column position is 3; for net2, the smallest column position is 2, and the largest is also 2 (only appears in the second column). These column range information are stored in a list in order of row numbers for easy subsequent retrieval. The same applies to the statistical method for each column.

[0062] Then, according to the above process ③, determine whether the constraints allow the use of strap2 layer, that is, the fourth layer routing. Figures 3 to 8 The selected use is allowed.

[0063] Next, determine the horizontal and vertical connection method according to the above process ④. Figures 3 to 8 The case belongs to the vertical connection priority. The basis for judging the vertical priority is as follows, see Figure 4 :For example, for the net3 in the first row and first column, the net3 in the same row appears in the third column of the first row, that is, the same row count n=2 (net3 appears twice in this row). Similarly, for the net3 in the first row and first column, the same column count m=3 (the same column appears three times). m>n, so the column priority is accumulated by 1. When the net3 in 6 positions is traversed, since the column priority is given to each position, the column priority is accumulated to 6. The row priority is still 0, so the calculation result for net3 is column priority. Therefore, for net3, the horizontally connected trunk routing does not cross columns (that is, the net3 in the first column and the third column are not connected through the trunk). Note that net2 will appear at the gate and source ends of the MOS tube at the same time. For the convenience of connection, the net at the gate end is counted separately and will not be calculated together with the source and drain ends.

[0064] According to the above calculation results, the number of trunks required for each row is 3 (assuming that net3 is row-connected first, this number will be 4, and the trunks of net3 and net2 will appear in parallel in the second column). Based on the line width and line spacing constraints, twig is generated to facilitate the subsequent trunk drilling downwards, such as Figure 5 shown.

[0065] Figure 6 Generate trunks based on the net information and net ranges contained in each row previously counted. For example, since net3 and net2 are both vertically routed first at the source and drain ends, the generated trunks do not cross column ranges and are only generated within the range of a single MOS tube. Via is generated at the intersection of the trunk and twig of the same net. Each trunk is assigned the corresponding net information.

[0066] Figure 7 Generate strap1 based on the net information and net range contained in each column previously counted, and assign corresponding net information to each strap1. Punch holes at the intersection of the trunk and strap of the same net, and generate vias at the intersection nodes of the strap1 and trunk of the same net.

[0067] Figure 8 For the strap1 of the same net, use strap2 to connect horizontally, and generate vias at the intersection nodes of strap2 and strap1 of the same net. At this point, all routing and drilling are completed.

[0068] The present invention is aimed at common current mirror and resistor-capacitor matching scenarios. After the matching array has been laid out, only the internal wiring of the matching array is used to provide a method for realizing automatic wiring between devices, so as to improve the efficiency of layout drawing. In a device matching array, the type, port, and arrangement of the device are automatically identified, and the virtual (dummy) device is identified. Only a few constraint parameter settings are required to realize one-key automatic wiring according to the conventional wiring method of the analog layout.

[0069] The preferred embodiments of the present invention disclosed above are only used to help explain the present invention. The preferred embodiments do not describe all the details in detail, nor do they limit the invention to the specific implementation methods described. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well.

Claims

1. A method for realizing automatic wiring of a simulated layout matching array, characterized in that: The following steps are involved: S01. Obtaining constraints, wherein the constraints include obtaining layout process metal layer information, and obtaining the layer, line width, direction, and line spacing information of twig, trunk, strap1, and strap2; S02. Obtain the number of rows and columns of the array, the pitch of the rows and columns, the position and direction of each device in the array, and the net information of each port of the device, and store them; S03. Determine whether to use the strap2 layer to connect the matching array, and then generate a range list from the smallest column number to the largest column number for each net in each row according to the row and column positions where each net appears, and automatically generate the required twig, trunk, strap1 or twig, trunk, strap1, strap2 to complete all the connections.

2. A method for realizing automatic wiring of analog layout matching array according to claim 1, characterized in that: In step S03, the process of generating twig, trunk, and strap1 routing is as follows: (1) For each net, determine whether there is an intersection in column numbers between trunks in different rows; (2) If there is an intersection in column numbers, calculate and generate the minimum number of trunks x required in a row: for the range list, traverse each column number. If there are at most x lists that contain the same column number, calculate the number of basic trunks required for the row as x, and record the column number range corresponding to the maximum number of trunks in each row; if there is no intersection in column numbers, extend and generate trunks according to the requirements of cross-row connections: give priority to avoiding the column corresponding to the maximum number of trunks in each row for extension. If it cannot be avoided, select the row with the smallest number of basic trunks for extension, and record the number of additional trunks in the row plus 1; when calculating the next net position that needs to be extended, calculate and arrange it according to the total number of trunks in each row that has been recounted; (3) Use strap1 to vertically connect all trunks of the same net: Calculate the column intersection of the same net in different rows, and select appropriate columns to generate strap1 in order from small to large intersection range to complete automatic connection.

3. A method for realizing automatic wiring of analog layout matching array according to claim 1, characterized in that: In step S03, the process of generating twig, trunk, strap1, and strap2 routing is as follows: (1) Determine whether the column routing is prioritized for each net one by one: For each net at each position, find the number of times the same net appears at other positions in the same row, recorded as n, and find the number of times the same net appears at other positions in the same column, recorded as m. If n ≥ m, the row priority is accumulated by 1, otherwise the column priority is accumulated by 1; compare the row priority and column priority of each net; (2) If column routing is prioritized, a trunk that does not cross columns is generated; If the walking line is prioritized, the minimum number of trunks x required in a row is calculated and generated: for the range list, traverse each column number. If there are at most x lists that contain the same column number, the number of basic trunks required for the row is calculated to be x, and the column number range corresponding to the maximum number of trunks in each row is recorded; (3) Generate strap1 at all column positions that need to be connected across rows; (4) For each net, determine whether there is a row number intersection between different column strap1s. If there is a row number intersection, select a suitable position in the row intersection to generate a strap2 connection. If there is no row number intersection, extend the generated strap1 until a row number intersection appears, and then select a suitable position in the row intersection to generate a strap2 connection to complete the automatic connection.

4. A method for realizing automatic wiring of analog layout matching array according to any one of claims 1 to 3, characterized in that: Before generating the trunk, it is necessary to determine whether the number of trunks in each row meets the process constraints. If not, the process is terminated and the process is continued after increasing the row spacing. Before generating the strap1, it is necessary to determine whether the number of strap1s in each column meets the process constraints. If not, the process is terminated and the process is continued after increasing the column spacing. Generate twig according to the trunk position.

5. A method for realizing automatic wiring of analog layout matching array according to any one of claims 1 to 3, characterized in that: The necessary condition for judging whether the match is reasonable is that for each type of net at the source and drain ends, the number of rows * the number of columns / the number of devices are equal to each other.