Current source equivalence method, computing device and computer readable storage medium

By acquiring and processing the graphics on the target metal layer, determining the effective pin pattern to determine the current source equivalent point of the chip device, the problem of expanding current flow range and voltage drop equivalent caused by standard device pins and metal wire connections is solved, achieving more efficient and accurate simulation verification.

CN119940277AActive Publication Date: 2025-05-06PHLEXING TECH CO LTD
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Patent Information

Application Number
CN202510423171.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-07
Publication Date
2025-05-06
Estimated Expiration
2045-04-07

AI Technical Summary

Technical Problem

In chip layout simulation verification, the pin area and metal wire connection part of the standard device cause an expansion of the current flow range, resulting in a voltage drop equivalent effect, making it difficult to accurately determine the current source equivalent point of the device.

Method used

By obtaining the target pattern on the target metal layer, including the target metal pattern and the pin pattern, determine the effective pin pattern, and determine the current source equivalent point of the target device based on the target metal pattern and the effective pin pattern.

Benefits of technology

This method simplifies the simulation verification process, shortens the simulation time, speeds up iteration, and improves the simulation accuracy.

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Abstract

The invention discloses an equivalent method of a current source, computing equipment and a computer readable storage medium, and the method comprises the steps: obtaining a target pattern on a target metal layer according to the information of a target device, and the target pattern comprises a target metal pattern and a pin pattern; determining effective pin patterns in the pin patterns; and determining a current source equivalent point of the target device based on the target metal pattern and the effective pin pattern. Therefore, by obtaining the effective pin pattern on the target metal layer, combining the target metal pattern and determining the current source equivalent point of the target device, the operation is simple and convenient, meanwhile, the layout can be simplified, the verification iteration speed is accelerated, and the simulation precision is ensured.
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Description

Technical Field

[0001] The present application relates to the field of chip technology, and in particular to an equivalent method of a current source, a computing device, and a computer-readable storage medium. Background Art

[0002] The layout of an integrated circuit is composed of metal interconnects and devices. In layout simulation verification, the standard device library will provide power consumption information under a given voltage and connection relationship, thereby deriving the size of the current source formed by the standard device. However, since the pins of standard devices have a certain area, the part where the pins and metal wires are connected will become the range of electron flow and the current flowing on the chip, resulting in effects such as voltage drop. Therefore, in order to simplify the simulation verification process and ensure the accuracy of the simulation, it is necessary to convert the actual circuit and current source into a topological network, thereby shortening the simulation time and speeding up the iteration speed. At the same time, it is necessary to adopt certain methods to make the device pins equivalent to ensure accuracy. However, how to determine the current source equivalent point corresponding to the device pin has been under research. Summary of the invention

[0003] The purpose of the present application is to provide an equivalent method of a current source, a computing device and a computer-readable storage medium to at least solve the problems in the related art.

[0004] To achieve the above objectives: In a first aspect, an embodiment of the present application provides an equivalent method of a current source, the method comprising: Acquire a target pattern on a target metal layer according to information of a target device, wherein the target pattern includes a target metal pattern and a pin pattern; Determining a valid pin pattern among the pin patterns; Based on the target metal pattern and the effective pin pattern, a current source equivalent point of the target device is determined.

[0005] In one embodiment, before determining the valid pin patterns in the pin patterns, the method includes: Obtaining a pin pattern block after the pin pattern is split and merged; The determining of a valid pin pattern in the pin pattern comprises: Determine the effective pin pattern according to the weight relationship between the pin pattern blocks; and / or, The pin pattern block is determined as a valid pin pattern. In one embodiment, determining the effective pin pattern according to the weight relationship between the pin pattern blocks includes: Determine the weight of each pin pattern block according to the area of ​​each pin pattern block, and determine at least one pin pattern block with the largest weight as a valid pin pattern; and / or, The weight of each pin pattern block is determined according to the number of edges of each pin pattern block contacting the target device boundary, and at least one pin pattern block with the largest weight is determined as a valid pin pattern.

[0006] In one embodiment, determining the current source equivalent point of the target device based on the target metal pattern and the effective pin pattern includes: Determining the number of said valid pin patterns; According to the number of the effective pin patterns, a current source equivalent point of the target device is determined based on the target metal pattern and the effective pin pattern.

[0007] In one embodiment, the determining the current source equivalent point of the target device based on the target metal pattern and the effective pin pattern according to the number of the effective pin patterns comprises: If the number of the effective pin patterns is less than or equal to a preset number threshold, simplifying the effective pin pattern to a center point of the effective pin pattern, and when the center point of the effective pin pattern overlaps with the target metal pattern, determining the center point of the effective pin pattern as a current source equivalent point of the target device; If the number of the effective pin patterns is greater than a preset number threshold, a center point of an overlapping portion of the target metal pattern and the effective pin pattern is determined as a current source equivalent point of the target device.

[0008] In one embodiment, after determining a valid pin pattern in the pin patterns, the method further comprises: In response to a requirement for segmenting the effective pin pattern, obtaining at least two effective pin segmentation patterns after segmenting the effective pin pattern; The step of determining the current source equivalent point of the target device based on the target metal pattern and the effective pin pattern according to the number of effective pin patterns comprises: If the number of the effective pin patterns is less than or equal to a preset number threshold, simplifying at least two effective pin cutting patterns after cutting into the center points of the effective pin cutting patterns respectively, and when the target metal pattern overlaps with the center points of the effective pin cutting patterns, determining the center points of the effective pin cutting patterns as the current source equivalent point of the target device; If the number of the effective pin patterns is greater than a preset number threshold, the center point of the overlapping portion of the target metal pattern and the effective pin cutting pattern is determined as the current source equivalent point of the target device.

[0009] In one embodiment, the target metal pattern includes a metal line pattern and a via pattern.

[0010] In one embodiment, before acquiring the target pattern on the target metal layer according to the information of the target device, the method includes: In response to the received input information, the target metal layer is determined.

[0011] In a second aspect, an embodiment of the present application provides a computing device, comprising: a processor and a memory storing a computer program, wherein when the processor runs the computer program, the equivalent method of the current source described in the first aspect is implemented.

[0012] In a third aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the equivalent method of the current source described in the first aspect above is implemented.

[0013] In the current source equivalent method, computing device and computer-readable storage medium provided in the embodiments of the present application, the current source equivalent point of the target device is determined by obtaining the effective pin pattern on the target metal layer and combining it with the target metal pattern. The operation is simple and convenient, and at the same time, the layout can be simplified, the verification iteration speed can be accelerated, and the accuracy of the simulation can be guaranteed. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A schematic flow chart of an equivalent method for a current source provided in an embodiment of the present application.

[0015] Figure 2 Schematic diagram of the target graphics in the embodiment of this application Figure 1 .

[0016] Figure 3 Schematic diagram of pin glitch pattern current in an embodiment of the present application.

[0017] Figure 4 Schematic diagram of the target graphics in the embodiment of this application Figure 2 .

[0018] Figure 5 This is a schematic diagram of determining an effective pin pattern based on area in an embodiment of the present application.

[0019] Figure 6 This is a schematic diagram of determining a valid pin pattern based on the number of edges in an embodiment of the present application.

[0020] Figure 7 Schematic diagram of the generation of the current source equivalent point in the embodiment of the present application Figure 1 .

[0021] Figure 8 Schematic diagram of the generation of the current source equivalent point in the embodiment of the present application Figure 2 .

[0022] Fig. 9 This is a schematic diagram of dividing the effective pin pattern in an embodiment of the present application.

[0023] Fig.10 Schematic diagram of selecting the target metal layer in the embodiment of the present application.

[0024] Fig.11 A process diagram of an equivalent method for a current source provided in an embodiment of the present application.

[0025] Fig.12 A schematic diagram of the structure of a computing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0026] Here, exemplary embodiments are described in detail, and examples thereof are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application.

[0027] It should be noted that, in this article, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.

[0028] It should be understood that, although the terms first, second, third, etc. may be used to describe various information in this article, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of this article, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein can be interpreted as "at the time of..." or "when..." or "in response to determination". Furthermore, as used in this article, the singular forms "one", "one" and "the" are intended to also include plural forms, unless there is an opposite indication in the context. It should be further understood that the terms "comprising", "including" indicate that there are described features, steps, operations, elements, components, projects, kinds, and / or groups, but do not exclude the existence, occurrence or addition of one or more other features, steps, operations, elements, components, projects, kinds, and / or groups. The terms "or" and "and / or" used herein are interpreted as inclusive, or mean any one or any combination. Thus, “A, B, or C” or “A, B and / or C” means “any of the following: A; B; C; A and B; A and C; B and C; A, B, and C.” An exception to this definition will occur only when a combination of elements, functions, steps, or operations are inherently mutually exclusive in some manner.

[0029] It should be understood that, although the various steps in the flowchart in the embodiment of the present application are displayed in sequence according to the indication of the arrows, these steps are not necessarily performed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and it can be performed in other orders. Moreover, some steps in the figure may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily performed at the same time, but can be performed at different times, and their execution order is not necessarily performed in sequence, but can be performed in turn or alternately with other steps or sub-steps of other steps or parts of stages.

[0030] It should be noted that, in this article, step codes such as S101, S102, etc. are used for the purpose of expressing the corresponding content more clearly and concisely, and do not constitute a substantial limitation on the sequence. When implementing the step, those skilled in the art may execute S102 first and then S101, etc., but these should all be within the scope of protection of this application.

[0031] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0032] In the subsequent description, the suffixes such as "module", "component" or "unit" used to represent elements are only used to facilitate the description of the present application, and have no specific meanings. Therefore, "module", "component" or "unit" can be used in a mixed manner.

[0033] See also Figure 1 The embodiment of the present application provides an equivalent method of a current source. The equivalent method of the current source can be executed by an equivalent device of a current source provided by the embodiment of the present application. The equivalent device of the current source can be implemented in software and / or hardware, for example, it can be a computing device such as a computer. The equivalent method of the current source provided by the embodiment includes: Step S101, acquiring a target pattern on a target metal layer according to information of a target device, wherein the target pattern includes a target metal pattern and a pin pattern.

[0034] Among them, the target device is a device with pins and power consumption for obtaining the current source equivalent point. The target device may have multiple pins and each pin can only be connected to one metal layer in the layout, but multiple pins can be connected to the same metal layer. The target device can specifically be a MOS tube, triode and other devices in the layout. It should be noted that the target device is connected to the metal layer through the pin, and since the target device may have multiple pins, and the metal layers connected to different pins may be the same or different, the target device may be connected to only one metal layer or multiple metal layers. At the same time, when the pins of the target device are connected to the metal layer, a pin pattern is generated at the corresponding connection position on the metal layer. The target metal layer can be any metal layer connected to the pins of the target device. The metal layer refers to the conductive layer used for electrical connection in the layout. When the pins of the target device are connected to multiple metal layers, each of the multiple metal layers can be used as the target metal layer. The target metal pattern refers to a pattern on the target metal layer and associated with the pin pattern of the target device, such as a pattern on the target metal layer that overlaps or connects with the pin pattern of the target device. The target metal pattern includes a metal line pattern and / or a through-hole pattern. The metal line pattern refers to a pattern formed by a conductive path on the metal layer, and the through-hole pattern refers to a pattern formed by a through-hole on the metal layer. The pin pattern refers to a pattern corresponding to the pin of the target device on the target metal layer.

[0035] Wherein, obtaining the target pattern on the target metal layer according to the information of the target device may be obtaining the target pattern on the target metal layer according to the pin distribution information of the target device and the boundary information of the target device. Figure 2 As shown, taking the target metal layer as layer 1 and the target metal pattern including a metal line pattern as an example, the target pattern includes a pattern set consisting of a pin pattern 11 located within the boundary of a target device 12 on layer 1 and a metal line pattern 10 connected to the pin pattern 11.

[0036] Step S102: Determine valid pin patterns in the pin patterns.

[0037] It can be understood that since part of the pin pattern may be a pin burr pattern, that is, the burr part of the pin corresponds to the generated pattern, such as Figure 3 As shown, based on Ohm's law and Kirchhoff's law, the resistance of the burr part is very small, the current is also very small, and the total current I1+I2 and I3+I4 flowing out from both sides are always constant, which makes the proportion of the current source of the burr part very small. At the same time, considering this part will increase the subsequent calculation amount and affect the simulation speed. Therefore, the pin burr pattern in the pin pattern can be ignored, and only the effective pin pattern in the pin pattern can be extracted.

[0038] The effective pin pattern refers to the pin pattern that can be used to determine the current source equivalent point of the target device. Among all the pin patterns, only some of them may be effective pin patterns, or all of them may be effective pin patterns. It should be noted that the patterns other than the effective pin patterns in the pin patterns can be called pin burr patterns or burr patterns.

[0039] In one embodiment, before determining a valid pin pattern in the pin pattern, the method includes: Obtaining a pin graphic block after the pin graphic is split and merged; Determine the valid pin graphics in the pin graphics, including: Determine the effective pin pattern according to the weight relationship between the pin pattern blocks; and / or, Identifies a pin pattern block as a valid pin pattern.

[0040] Among them, since the target device may have multiple pin patterns on the target metal layer, and some pin patterns may overlap or be connected, in order to prevent repeated processing caused by overlapping or connected pin patterns and improve processing efficiency, the pin patterns can be split-merged. In this embodiment, the pin patterns can be split-merged based on the scan line algorithm, and the specific process can refer to the prior art. For example, Figure 2 The pin pattern shown in FIG. 1 is not subjected to the split-merge process, and Figure 4 For Figure 2 By comparison, it can be seen that by performing splitting and merging processing on the pin graphics, the overlapping and / or connected pin graphics in the target graphics can be merged, thereby reducing the number of pin graphics.

[0041] It should be noted that when the target device is a standard device, the effective pin pattern can be determined based on the weight relationship between the pin pattern blocks. When the target device is a non-standard device, all pin pattern blocks can be determined as effective pin patterns. Among them, a standard device is a device with a pin length less than or equal to a preset length threshold, and a non-standard device is a device with a pin length greater than a preset length threshold. The pin length of a device refers to the length along the pin pattern of the device, that is, the distance of the pin pattern of the device along the pin direction of the device, such as Figure 4 As shown, the pin length of the device is L. In addition, the weight of the pin pattern block is used to characterize whether the pin pattern block can be used as an evaluation index for a valid pin pattern. The larger or smaller the weight of the pin pattern block is, the greater or smaller the possibility of the pin pattern block being a valid pin pattern is. In this way, the type of the target device can be quickly determined to determine the valid pin pattern, further improving the speed of obtaining the current source equivalent point of the target device and further accelerating the verification iteration speed.

[0042] In one embodiment, determining the effective pin pattern according to the weight relationship between the pin pattern blocks includes: Determine the weight of each pin pattern block according to the area of ​​each pin pattern block, and determine at least one pin pattern block with the largest weight as a valid pin pattern; and / or, The weight of each pin pattern block is determined according to the number of edges of each pin pattern block contacting the target device boundary, and at least one pin pattern block with the largest weight is determined as a valid pin pattern. Among them, since the shape of the pin graphic blocks is a rectangle, the area of ​​the pin graphic blocks can be obtained based on the length and width of the pin graphic blocks. After obtaining the area of ​​each pin graphic block, the area of ​​each pin graphic block can be determined as the weight corresponding to each pin graphic block, or the pin graphic blocks can be sorted in order of area from small to large, and the sorting number can be used as the weight corresponding to each pin graphic block, or the ratio of the area of ​​the pin graphic block to the sum of the areas of all pin graphic blocks can be used as the weight corresponding to the pin graphic block, which is not specifically limited here. Figure 5 As shown, taking the pin pattern block including Legend 1 and Legend 2 as an example, since the area of ​​Legend 2 is larger than the area of ​​Legend 1, Legend 2 can be selected to be determined as the valid pin pattern.

[0043] Among them, based on the position information of the pin graphic block boundary and the position information of the target device boundary, by comparing whether there are identical parts in the position information, it can be determined whether the pin graphic block boundary is in contact with the target device boundary. For example, when the position information includes coordinates, if the coordinates of the pin graphic block boundary and the coordinates of the target device boundary intersect, it is determined that the pin graphic block boundary is in contact with the target device boundary; if the coordinates of the pin graphic block boundary and the coordinates of the target device boundary do not intersect, it is determined that the pin graphic block boundary is not in contact with the target device boundary. After obtaining the number of edges of each pin graphic block boundary in contact with the target device boundary, the number of edges of each pin graphic block boundary in contact with the target device boundary can be determined as the weight corresponding to each pin graphic block, or each pin graphic block can be sorted in order of the number of edges from small to large, and the sorting number can be used as the weight corresponding to each pin graphic block, etc., which is not specifically limited here. Figure 6 As shown, taking the pin graphic block including Legend 1 and Legend 2 as an example, the target device boundaries are edges a, b, c, and d respectively. Since Legend 1 contacts edges a and c respectively, that is, the number of edges contacting between the boundary of Legend 1 and the boundary of the target device is 2, and the number of edges contacting between the boundary of Legend 2 and the boundary of the target device is 0, Legend 1 can be selected as the valid pin graphic.

[0044] Among them, determining at least one pin pattern block with the largest weight as the effective pin pattern may be determining the pin pattern block with the largest weight as the effective pin pattern, or may be determining N pin pattern blocks with the largest weight as the effective pin patterns, where N is a positive integer. In this way, the effective pin pattern can be determined quickly, further improving the speed of obtaining the current source equivalent point of the target device.

[0045] Step S103: determining a current source equivalent point of a target device based on the target metal pattern and the effective pin pattern.

[0046] After determining the effective pin pattern from the pin patterns included in the target pattern, the current source equivalent point of the target device can be determined in combination with the target metal pattern. Here, the current source equivalent point of the target device can be regarded as the current source equivalent point of the pin of the target device on the target metal layer.

[0047] In one embodiment, determining a current source equivalent point of a target device based on a target metal pattern and an effective pin pattern includes: Determine the number of valid pin patterns; According to the number of effective pin patterns, a current source equivalent point of a target device is determined based on the target metal pattern and the effective pin pattern.

[0048] After determining the effective pin pattern, the number of effective pin patterns can be obtained accordingly. When the number of effective pin patterns is different, the method of determining the current source equivalent point of the target device based on the target metal pattern and the effective pin pattern may also be different. In this way, according to the difference in the number of effective pin patterns, the current source equivalent point of the target device is determined based on the target metal pattern and the effective pin pattern, so as to accurately and quickly determine the current source equivalent point of the target device.

[0049] In one embodiment, according to the number of effective pin patterns, determining a current source equivalent point of a target device based on a target metal pattern and an effective pin pattern includes: If the number of valid pin patterns is less than or equal to a preset number threshold, simplifying the valid pin pattern to a center point of the valid pin pattern, and when the center point of the valid pin pattern overlaps with the target metal pattern, determining the center point of the valid pin pattern as a current source equivalent point of the target device; If the number of valid pin patterns is greater than a preset number threshold, the center point of the overlapping portion of the target metal pattern and the valid pin pattern is determined as the current source equivalent point of the target device.

[0050] Among them, the preset number threshold can be set according to the actual needs. In this embodiment, the preset number threshold is 1 as an example for explanation. If the number of valid pin graphics is less than or equal to the preset number threshold, it means that the valid pin graphics are small, then the valid pin graphics can be simplified to the center point of the valid pin graphics, and then it is detected whether the center point of the valid pin graphics overlaps with the target metal graphics, and when the center point of the valid pin graphics overlaps with the target metal graphics, the center point of the valid pin graphics is determined as the current source equivalent point of the target device on the target metal layer, and when the center point of the valid pin graphics does not overlap with the target metal graphics, the corresponding processing is not performed, that is, the center point of the valid pin graphics will not be determined as the current source equivalent point of the target device. Among them, the center point of the valid pin graphics overlaps with the target metal graphics, which can be the center point of the valid pin graphics overlapping with the metal wire graphics or the through-hole graphics. If the number of valid pin graphics is greater than the preset number threshold, it means that there are more valid pin graphics, then first detect whether the target metal graphic overlaps with the valid pin graphic, and when the target metal graphic overlaps with the valid pin graphic, determine the overlapping part of the target metal graphic and the valid pin graphic, and then determine the center point of the overlapping part as the current source equivalent point of the target device, and when the target metal graphic does not overlap with the valid pin graphic, no processing is performed. Among them, it can be determined whether the center point of the valid pin graphic overlaps with the target metal graphic by detecting whether the coordinates of the center point of the valid pin graphic and the coordinates of the target metal graphic have an intersection. Similarly, it can be determined whether the target metal graphic overlaps with the valid pin graphic by detecting whether the coordinates of the target metal graphic and the coordinates of the valid pin graphic have an intersection.

[0051] For example, the target metal pattern includes a metal line pattern and a via (ie, through-hole) pattern. Figure 7 As shown in , when the pin pattern is a valid pin pattern and there is only one pin pattern, the pattern becomes the center point of the valid pin pattern after simplification, and the center point only coincides with the metal wire pattern and does not coincide with the via hole, so the current source equivalent point is at the center point of the valid pin pattern; Figure 8 As shown in the figure, when the pin pattern is a valid pin pattern and there are two of them, there is no need to perform the pattern simplification process, and the overlapping parts of the metal wire pattern and the via hole with the valid pin pattern are directly determined, and then the center point of the overlapping part is determined as the current source equivalent point. In this way, according to the size relationship between the number of valid pin patterns and the preset number threshold, the current source equivalent point of the target device is determined accordingly, which improves the acquisition speed of the current source equivalent point of the target device.

[0052] In one embodiment, after determining a valid pin pattern in the pin pattern, the method includes: In response to a requirement for segmentation of the effective pin pattern, obtaining at least two effective pin segmentation patterns after segmentation of the effective pin pattern; According to the number of effective pin patterns, the current source equivalent point of the target device is determined based on the target metal pattern and the effective pin pattern, including: If the number of valid pin patterns is less than or equal to a preset number threshold, simplifying at least two valid pin cutting patterns after cutting into center points of the valid pin cutting patterns respectively, and when the target metal pattern overlaps with the center point of the valid pin cutting pattern, determining the center point of the valid pin cutting pattern as the current source equivalent point of the target device; If the number of effective pin patterns is greater than a preset number threshold, the center point of the overlapping portion of the target metal pattern and the effective pin segmentation pattern is determined as the current source equivalent point of the target device.

[0053] It can be understood that according to the resistance calculation formula ΔR=ΔL*(Rho) / s, the longer the cutting length ΔL, the greater the resistance ΔR, where Rho is the resistivity and s is the cross-sectional area. According to Ohm's law ΔU=I*ΔR, when the current I remains unchanged, the larger the resistance ΔR, the greater the voltage difference ΔU, which makes the simulation accuracy loss greater. Therefore, in order to reduce the accuracy loss of the simulation and improve the accuracy of subsequent simulations, the effective pin graphics can be segmented first, and then the current source equivalent point of the target device can be determined based on the effective pin graphics after segmentation. Among them, the segmentation requirements for the effective pin graphics may include the segmentation length, and the user can set or adjust the segmentation length based on actual needs. For each effective pin graphic, it can be segmented according to the segmentation length included in the segmentation requirements, and then at least two effective pin segmentation graphics after the effective pin graphics are segmented are obtained. It should be noted that due to the influence of the length of the effective pin graphic and the segmentation length, the length of some effective pin segmentation graphics may be equal to the segmentation length, while the length of some effective pin segmentation graphics may be less than the segmentation length. For example Fig. 9 As shown, the effective pin pattern can be cut according to a predefined cutting length ΔL.

[0054] Wherein, if the number of effective pin patterns is less than or equal to the preset number threshold, it means that there are fewer effective pin patterns, then the at least two effective pin cutting patterns after cutting can be simplified to the center point of the effective pin cutting pattern respectively, then detect whether the center point of the effective pin cutting pattern overlaps with the target metal pattern, and when the target metal pattern overlaps with the center point of the effective pin cutting pattern, the center point of the effective pin cutting pattern is determined as the current source equivalent point of the target device, and when the center point of the effective pin cutting pattern does not overlap with the target metal pattern, the corresponding processing is not performed, that is, the center point of the effective pin cutting pattern will not be determined as the current source equivalent point of the target device. If the number of effective pin patterns is greater than the preset number threshold, it means that there are more effective pin patterns, then first detect whether the target metal pattern overlaps with the effective pin cutting pattern, and when the target metal pattern overlaps with the effective pin cutting pattern, determine the overlapping part of the target metal pattern and the effective pin cutting pattern, and then determine the center point of the overlapping part of the target metal pattern and the effective pin cutting pattern as the current source equivalent point of the target device, and when the target metal pattern does not overlap with the effective pin cutting pattern, no processing is performed. Among them, it is possible to determine whether the center point of the effective pin cutting pattern overlaps with the target metal pattern by detecting whether the coordinates of the center point of the effective pin cutting pattern and the coordinates of the target metal pattern intersect. Similarly, it is possible to determine whether the target metal pattern overlaps with the effective pin cutting pattern by detecting whether the coordinates of the target metal pattern and the coordinates of the effective pin cutting pattern intersect. In this way, by dividing the effective pin pattern and then determining the current source equivalent point of the target device based on the divided effective pin pattern, the accuracy loss of the simulation can be effectively reduced, and the accuracy of the simulation can be further improved. In one embodiment, before acquiring the target pattern on the target metal layer according to the information of the target device, the method includes: determining the target metal layer in response to the received input information.

[0055] Among them, the user can input information to the computing device based on the needs to set the target metal layer. For example, considering that the voltage point of the chip is usually added to the highest metal layer, the user can input information to the computing device to select the highest metal layer where the target device is located as the target metal layer, so as to reduce the data calculation scale and increase the speed of obtaining the current source equivalent point. At the same time, the voltage drop of the target device can be calculated as quickly as possible based on the above shortest path. Fig.10 As shown, if layer 1 is the highest metal layer, layer 1 can be selected as the target metal layer. In addition, based on accuracy considerations, all metal layers with metal line patterns can also be selected as target metal layers. In this way, the target metal layer is set based on demand, which improves operational flexibility.

[0056] The following is an example of the equivalent process of the current source. Fig.11 , including the following steps: Step S201: Determine the device to be processed.

[0057] Step S202: Merge the pin patterns of the device.

[0058] Here, there are two ways of merging, namely, merging along the horizontal direction and merging along the vertical direction. In this embodiment, the direction with the smallest number of graphics after merging is selected, which is usually related to the direction in which the device is placed.

[0059] Step S203, determine whether the device is a standard device, if so, execute step S204, otherwise execute step S208.

[0060] Here, the type of device affects the subsequent processing flow because the pins of standard devices are usually simple and limited in length, while the pins of non-standard devices are usually longer.

[0061] Step S204, determine whether to retain the pin patterns of all metal layers, if so, execute step S205, otherwise execute step S206.

[0062] Here, in this example, a setting is provided to select whether to retain the pin graphics of all metal layers. If the pin graphics of all metal layers are not retained, the pin graphics of the highest metal layer will be selected, and the pin graphics of the metal layers are retained based on accuracy considerations. Step S205: Select the pin patterns of all metal layers as the pin patterns to be processed.

[0063] Step S206: Select the pin pattern of the highest metal layer as the pin pattern to be processed.

[0064] Here, the pin pattern of the highest metal layer is selected as the pin pattern to be processed. On the one hand, it can reduce the data size. On the other hand, it is based on practical design considerations. Usually, the voltage point of the chip is added to the top layer, and the voltage drop of the device can be calculated fastest according to the shortest path method.

[0065] Step S207: perform burr processing on the pin pattern to be processed to obtain a valid pin pattern.

[0066] Among them, performing burr processing on the pin pattern to be processed can be regarded as filtering out the pin burr pattern in the pin pattern, which can be specifically judged based on the number of edges of the pin pattern boundary contacting the device boundary and / or the pin pattern area. For details, please refer to the above embodiment.

[0067] Step S208: All pin patterns are regarded as valid pin patterns.

[0068] For non-standard devices, all pin patterns are directly used as valid pin patterns.

[0069] Step S209: Slice the effective pin pattern according to a preset length to obtain an effective pin segmentation pattern.

[0070] Step S210: determining a current source equivalent point based on the effective pin segmentation pattern.

[0071] Here, for pins with more than 1 effective pin segmentation pattern (referring to pins with the same attributes), the effective pin segmentation pattern is not simplified, and the final current source equivalent point is the center point of the overlapped part of the effective pin segmentation pattern and the metal wire pattern or via. For pins with 1 effective pin segmentation pattern, the effective pin segmentation pattern is simplified to the center point of the effective pin segmentation pattern, and the current source equivalent point is the overlapped part of the center point and the metal wire pattern or via, which is usually the position of the center point itself.

[0072] In summary, in the equivalent method of the current source provided in the above embodiment, for standard devices, the simple equivalent center method can simplify the network and speed up the verification iteration speed. For complex BLOCKs or other devices with special functions, the number of analog current sources can be increased to increase the accuracy of the simulation. It can also allow users to balance the accuracy and performance requirements and choose a better method. Based on the same inventive concept as the above embodiments, an embodiment of the present invention provides a computing device, such as Fig.12 As shown, the computing device includes: a processor 310 and a memory 311 storing a computer program; wherein, Fig.12 The processor 310 shown in the figure is not used to indicate that the number of the processor 310 is one, but is only used to indicate the positional relationship of the processor 310 relative to other devices. In actual applications, the number of the processor 310 may be one or more; similarly, Fig.12 The memory 311 shown in the figure has the same meaning, that is, it is only used to refer to the position relationship of the memory 311 relative to other devices. In practical applications, the number of memories 311 can be one or more. When the processor 310 runs the computer program, the equivalent method of the current source applied to the above computing device is implemented.

[0073] The computing device may also include: a network interface 312. The various components in the electronic device are coupled together via a bus system 313. It is understood that the bus system 313 is used to achieve connection and communication between these components. In addition to the data bus, the bus system 313 also includes a power bus, a control bus, and a status signal bus. However, for the sake of clarity, the bus system 313 is not used in the example above. Fig.12 Various buses are labeled as bus system 313.

[0074] The memory 311 may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. The non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM); the magnetic surface memory may be a disk memory or a tape memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM, SyncLink Dynamic Random Access Memory), and direct RAMbus random access memory (DRRAM, Direct Rambus Random Access Memory).The memory 311 described in the embodiments of the present invention is intended to include but is not limited to these and any other suitable types of memories.

[0075] Based on the same inventive concept as the above-mentioned embodiment, this embodiment further provides a computer-readable storage medium, in which a computer program is stored. The computer-readable storage medium may be a ferromagnetic random access memory (FRAM), a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM); it may also be various devices including one or any combination of the above memories, such as a mobile phone, a computer, a tablet device, a personal digital assistant, etc. When the computer program stored in the computer-readable storage medium is executed by the processor, the equivalent method of the above-mentioned current source is implemented. For the specific steps implemented when the computer program is executed by the processor, please refer to Figure 1 The description of the illustrated embodiment will not be repeated here.

[0076] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0077] In this document, the terms "comprises," "comprising," or any other variations thereof, are intended to cover a non-exclusive inclusion of elements other than those listed and may also include additional elements not expressly listed.

[0078] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A current source equivalent method, characterized in that: The method comprises: Acquire a target pattern on a target metal layer according to information of a target device, wherein the target pattern includes a target metal pattern and a pin pattern; Determining a valid pin pattern among the pin patterns; Based on the target metal pattern and the effective pin pattern, a current source equivalent point of the target device is determined.

2. The method according to claim 1, characterized in that Before determining the valid pin patterns in the pin patterns, the method includes: Obtaining a pin pattern block after the pin pattern is split and merged; The determining of a valid pin pattern in the pin pattern comprises: Determine the effective pin pattern according to the weight relationship between the pin pattern blocks; and / or, The pin pattern block is determined as a valid pin pattern.

3. The method according to claim 2, characterized in that The determining of the effective pin pattern according to the weight relationship between the pin pattern blocks comprises: Determine the weight of each pin pattern block according to the area of ​​each pin pattern block, and determine at least one pin pattern block with the largest weight as a valid pin pattern; and / or, The weight of each pin pattern block is determined according to the number of edges of each pin pattern block contacting the target device boundary, and at least one pin pattern block with the largest weight is determined as a valid pin pattern.

4. The method according to claim 1, characterized in that: The step of determining the current source equivalent point of the target device based on the target metal pattern and the effective pin pattern comprises: Determining the number of said valid pin patterns; According to the number of the effective pin patterns, a current source equivalent point of the target device is determined based on the target metal pattern and the effective pin pattern.

5. The method according to claim 4, characterized in that The step of determining the current source equivalent point of the target device based on the target metal pattern and the effective pin pattern according to the number of the effective pin patterns comprises: If the number of the effective pin patterns is less than or equal to a preset number threshold, simplifying the effective pin pattern to a center point of the effective pin pattern, and when the center point of the effective pin pattern overlaps with the target metal pattern, determining the center point of the effective pin pattern as a current source equivalent point of the target device; If the number of the effective pin patterns is greater than a preset number threshold, a center point of an overlapping portion of the target metal pattern and the effective pin pattern is determined as a current source equivalent point of the target device.

6. The method according to claim 4, characterized in that After determining the valid pin patterns in the pin patterns, the method further comprises: In response to a requirement for segmenting the effective pin pattern, obtaining at least two effective pin segmentation patterns after segmenting the effective pin pattern; The step of determining the current source equivalent point of the target device based on the target metal pattern and the effective pin pattern according to the number of effective pin patterns comprises: If the number of the effective pin patterns is less than or equal to a preset number threshold, simplifying at least two effective pin cutting patterns after cutting into the center points of the effective pin cutting patterns respectively, and when the target metal pattern overlaps with the center points of the effective pin cutting patterns, determining the center points of the effective pin cutting patterns as the current source equivalent point of the target device; If the number of the effective pin patterns is greater than a preset number threshold, the center point of the overlapping portion of the target metal pattern and the effective pin cutting pattern is determined as the current source equivalent point of the target device.

7. The method according to claim 1, characterized in that The target metal pattern includes a metal line pattern and a through-hole pattern.

8. The method according to claim 1, characterized in that: Before acquiring the target pattern on the target metal layer according to the information of the target device, the method includes: In response to the received input information, the target metal layer is determined.

9. A computing device, characterized in that The method comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements the equivalent method of the current source according to any one of claims 1 to 8 when executing the computer program.

10. A computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the equivalent method of the current source according to any one of claims 1 to 8 is implemented.

Citation Information

Patent Citations

  • Electrically conductive pins for microcircuit tester

    CN102422726A

  • PCB pin identifier processing method and device, equipment and storage medium

    CN117377204A

  • Parasitic resistance network generation method, computing device and computer readable storage medium

    CN119443038A

  • Manufacturing method and manufacturing apparatus for flexible circuit board

    JP2009016416A

  • Semiconductor circuit design and unit pin placement

    US10997350B1