Pixel circuit, driving method thereof and display panel

Abstract

The embodiment of the invention discloses a pixel circuit, a driving method of the pixel circuit and a display panel, the pixel circuit comprises a time control module, a current control module, a first potential control module, a second potential control module, a reset module and a light emitting module, and the reset module is connected with the output end of the time control module. The reset module is used for resetting the output end of the time control module in a reset stage; the first potential control module and the second potential control module are both connected between the output end of the time control module and the control end of the current control module, and the second potential control module is used for keeping the voltage of the control end of the current control module at the break-over voltage in the reset stage. The first potential control module is used for keeping the voltage of the control end of the current control module at the turn-off voltage in the light emitting stage. According to the scheme, the phenomenon of flicker or uneven display caused by unstable output signals of the time control module when the pixel circuit is closed can be improved, and the display effect can be improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of display technology, and in particular to a pixel circuit and a driving method thereof, and a display panel. Background Art

[0002] With the continuous development of display technology, people have higher and higher requirements on the display effects of display devices.

[0003] Display driving methods include PWM (Pulse Width Modulation), PAM (Pulse Amplitude Modulation) and a mixture of the two. Currently, in the existing digital-analog hybrid driving method, there is a problem of poor display effect. Summary of the invention

[0004] The embodiment of the present invention provides a pixel circuit and a driving method thereof and a display panel to improve display effect.

[0005] According to one aspect of the present invention, a pixel circuit is provided, the pixel circuit comprising: a time control module, a current control module, a first potential control module, a second potential control module, a reset module and a light emitting module;

[0006] The current control module and the light-emitting module are connected between the first power line and the second power line, and the current control module is used to drive the light-emitting module to emit light according to the data signal in the light-emitting stage;

[0007] The time control module is used to control the potential of its own output terminal according to the time signal and the sweep frequency signal during the light-emitting stage to control the light-emitting time of the light-emitting module;

[0008] The reset module is connected to the output end of the time control module, and the reset module is used to reset the output end of the time control module in the reset phase;

[0009] The first potential control module is connected between the output end of the time control module and the control end of the current control module, and the second potential control module is connected between the output end of the time control module and the control end of the current control module. The second potential control module is used to keep the control end voltage of the current control module at the on-voltage according to the voltage of the output end of the time control module in the reset stage, and the first potential control module is used to keep the control end voltage of the current control module at the off-voltage according to the voltage of the output end of the time control module in the light-emitting stage.

[0010] Optionally, the first potential control module includes a first logic unit and a first switch unit, the first input end of the first logic unit is connected to the first reference signal, the second input end of the first logic unit is connected to the output end of the time control module, the output end of the first logic unit is connected to the control end of the first switch unit, the first end of the first switch unit is connected to the third power line, and the second end of the first switch unit is connected to the control end of the current control module;

[0011] The second potential control module includes a second logic unit and a second switch unit, the first input end of the second logic unit is connected to the second reference signal, the second input end of the second logic unit is connected to the output end of the time control module, the output end of the second logic unit is connected to the control end of the second switch unit, the first end of the second switch unit is connected to the first initialization signal line, and the second end of the second switch unit is connected to the control end of the current control module.

[0012] Optionally, the first logic unit includes a NAND gate, the first switch unit includes a first transistor, a first input end of the NAND gate is connected to a first reference signal, a second input end of the NAND gate is connected to an output end of the time control module, an output end of the NAND gate is connected to a gate of the first transistor, a first electrode of the first transistor is connected to a third power line, and a second electrode of the first transistor is connected to a control end of the current control module;

[0013] The second logic unit includes a NOR gate, the second switch unit includes a second transistor, the first input end of the NOR gate is connected to the second reference signal, the second input end of the NOR gate is connected to the output end of the time control module, the output end of the NOR gate is connected to the gate of the second transistor, the first electrode of the second transistor is connected to the first initialization signal line, and the second electrode of the second transistor is connected to the control end of the current control module;

[0014] Optionally, the first reference signal and the second reference signal are inverse signals of each other;

[0015] Optionally, the channel type of the first transistor is different from the channel type of the second transistor;

[0016] Optionally, the reset module is connected between the first initialization signal line and the output end of the time control module.

[0017] Optionally, the pixel circuit further includes a third potential control module, the third potential control module is connected to the control end of the current control module, and the third potential control module is used to respond to the first reference signal to continuously conduct in the highlight display mode, so as to continuously maintain the control end voltage of the current control module at the conduction voltage;

[0018] Optionally, the third potential control module includes a third transistor, a gate of the third transistor is connected to the first reference signal, a first electrode of the third transistor is connected to the first initialization signal line, and a second electrode of the third transistor is connected to the control end of the current control module.

[0019] Optionally, the pixel circuit further includes a first storage unit, a first end of the first storage unit is connected to the second power line, and a second end of the first storage unit is connected to the control end of the current control module.

[0020] Optionally, the current control module includes a first driving unit, a first data writing unit and a current control unit;

[0021] The current control unit and the first driving unit are connected between the first power line and the first end of the light emitting module, the second end of the light emitting module is connected to the second power line, the first data writing unit is connected to the first driving unit, and the first data writing unit is used to write the data signal to the control end of the first driving unit;

[0022] Optionally, the current control module further includes a first compensation unit, the first compensation unit is connected between the second end and the control end of the first driving unit, the first data writing unit is connected to the first end of the first driving unit, and the control end of the first data writing unit and the control end of the first compensation unit are both connected to the first scan line;

[0023] Optionally, the current control module further includes a first light-emitting control unit and a second light-emitting control unit, wherein the first end of the first light-emitting control unit is connected to the first power line, the second end of the first light-emitting control unit is connected to the first end of the first driving unit, the second end of the first driving unit is connected to the first end of the current control unit, the second end of the current control unit is connected to the first end of the first end of the second light-emitting control unit, and the second end of the second light-emitting control unit is connected to the first end of the light-emitting module; the control end of the second light-emitting control unit is connected to the first light-emitting control signal line, and the control end of the first light-emitting control unit is connected to the second light-emitting control signal line;

[0024] Optionally, the current control module further includes a second storage unit, and the second storage unit is connected between the control end of the first driving unit and the first power line;

[0025] Optionally, the current control module further includes a first initialization unit, a first end of the first initialization unit is connected to the first initialization signal line, a second end of the first initialization unit is connected to the control end of the first driving unit, and the control end of the first initialization unit is connected to the second scan line;

[0026] Optionally, the current control module also includes a second initialization unit, a first end of the second initialization unit is connected to the second power line or the second initialization signal line, a second end of the second initialization unit is connected to the first end of the light emitting module, and a control end of the second initialization unit is connected to the second scan line.

[0027] Optionally, the time control module includes a second driving unit, a second data writing unit, a third initialization unit and a coupling unit;

[0028] The second driving unit is connected between the third power line and the output end of the time control module, and the second data writing unit is used to write the time signal to the control end of the second driving unit; the third initialization unit is connected between the third initialization signal line and the control end of the second driving unit, and the control end of the third initialization unit is connected to the first scanning line;

[0029] The coupling unit is connected to the control end of the second driving unit, and the coupling unit is used to control the potential of the control end of the second driving unit according to the sweep signal;

[0030] Optionally, the time control module further includes a second compensation unit, the second compensation unit is connected between the control end and the second end of the second driving unit, the control end of the second compensation unit and the control end of the second data writing unit are both connected to the third scanning line, and the second data writing unit is connected to the first end of the second driving unit;

[0031] Optionally, the time control module further includes a third light-emitting control unit and a fourth light-emitting control unit, the control end of the third light-emitting control unit and the control end of the fourth light-emitting control unit are both connected to the second light-emitting control signal line, the first end of the third light-emitting control unit is connected to the third power line, the second end of the third light-emitting control unit is connected to the first end of the second driving unit, the first end of the fourth light-emitting control unit is connected to the second end of the second driving unit, and the second end of the fourth light-emitting control unit is connected to the output end of the time control module;

[0032] Optionally, the time control module further includes a third storage unit, and the third storage unit is connected between the third power line and the control end of the second driving unit.

[0033] According to another aspect of the present invention, a method for driving a pixel circuit is provided, the method comprising:

[0034] In the reset stage, the reset module is controlled to reset the output end of the time control module, and the second potential control module is controlled to keep the control end voltage of the current control module at the on-voltage according to the voltage of the output end of the time control module;

[0035] In the light-emitting stage, the current control module is controlled to drive the light-emitting module to emit light according to the data signal, and the time control module is controlled to control the potential of its own output terminal according to the time signal and the sweep signal. At the end of the light-emitting, the first potential control module is controlled to keep the control terminal voltage of the current control module at the shutdown voltage according to the voltage of the output terminal of the time control module, so as to control the light-emitting time of the light-emitting module.

[0036] Optionally, the pixel circuit further includes a third potential control module; and the driving method of the pixel circuit further includes:

[0037] In the highlight display mode, the third potential control module is controlled to be continuously turned on in response to the first reference signal at its control terminal, so as to continuously maintain the control terminal voltage of the current control module at the on-voltage.

[0038] According to another aspect of the present invention, a display panel is provided. The display panel includes the pixel circuit provided by any embodiment of the present invention.

[0039] The technical solution provided by the embodiment of the present invention is to set a second potential control module between the output end of the time control module and the control end of the current control module to keep the control end of the current control module at the on-voltage in the reset stage, and set a first potential control module between the output end of the time control module and the control end of the current control module to quickly and stably keep the potential of the control end of the current control module at the off-voltage when the light-emitting module stops emitting light, thereby maintaining the stability of the potential of the control end of the current control module, and quickly turning off the current control module, effectively avoiding the phenomenon of unstable light emission of the light-emitting module, which is beneficial to improving the flickering or uneven display phenomenon caused by the unstable output signal of the time control module when the pixel circuit is turned off, and is beneficial to improving the display effect.

[0040] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0042] Figure 1 A schematic diagram of the structure of a pixel circuit provided by an embodiment of the present invention;

[0043] Figure 2A schematic diagram of the structure of another pixel circuit provided by an embodiment of the present invention;

[0044] Figure 3 A schematic diagram of the structure of another pixel circuit provided by an embodiment of the present invention;

[0045] Figure 4 A schematic diagram of the structure of another pixel circuit provided by an embodiment of the present invention;

[0046] Figure 5 A schematic diagram of the structure of a current control module provided by an embodiment of the present invention;

[0047] Figure 6 A schematic diagram of the structure of a time control module provided by an embodiment of the present invention;

[0048] Figure 7 A schematic diagram of the structure of another pixel circuit provided by an embodiment of the present invention;

[0049] Figure 8 A driving timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0050] Fig. 9 A flowchart of a driving method of a pixel circuit provided by an embodiment of the present invention;

[0051] Fig.10 A schematic structural diagram of a display panel provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0052] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0053] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0054] As described in the background technology, the existing analog-digital hybrid driving method has the problem of poor display effect. After careful study by the inventors, it is found that the reason for the above problem is that for the existing pixel circuit adopting the analog-digital hybrid driving method, the pixel circuit usually includes a PWM driving module and a PAM driving module, wherein the PWM driving module is used to convert the analog grayscale voltage through PWM modulation to control the switching time of the PAM driving module to generate the driving current, thereby controlling the light-emitting time of the light-emitting element. However, the time control signal output by the PWM driving module is easily affected by the leakage of the PWM driving module itself or the threshold voltage drift, resulting in signal attenuation, node potential instability and other phenomena, affecting the node voltage of the PAM driving module, and then resulting in poor uniformity of light-emitting brightness, reducing the display effect.

[0055] In view of the above problems, an embodiment of the present invention provides a pixel circuit. Figure 1 A schematic diagram of a pixel circuit according to an embodiment of the present invention is provided. Figure 1 The pixel circuit provided in this embodiment includes a time control module 10, a current control module 20, a first potential control module 30, a second potential control module 40, a reset module 50 and a light emitting module 60;

[0056] The current control module 20 and the light-emitting module 60 are connected between the first power line L1 and the second power line L2. The current control module 20 is used to drive the light-emitting module 60 to emit light according to the data signal Vdata_I in the light-emitting stage; the time control module 10 is used to control the potential of its own output terminal according to the time signal Vdata_t and the sweep signal SWEEP in the light-emitting stage to control the light-emitting time of the light-emitting module 30;

[0057] The reset module 50 is connected to the output end of the time control module 10, and the reset module 50 is used to reset the output end of the time control module 10 in the reset phase;

[0058] The first potential control module 30 is connected between the output end of the time control module 10 and the control end of the current control module 20, and the second potential control module 40 is connected between the output end of the time control module 10 and the control end of the current control module 20. The second potential control module 40 is used to keep the control end voltage of the current control module 20 at the on-voltage according to the voltage of the output end of the time control module 10 in the reset stage, and the first potential control module 30 is used to keep the control end voltage of the current control module 20 at the off-voltage according to the voltage of the output end of the time control module 10 in the light-emitting stage.

[0059] The first power line L1 is used to provide a first power voltage VDDA, and the second power line L2 is used to provide a second power voltage VSS. When the connection path between the first power line L1 and the second power line L2 is turned on, the current control module 20 can generate a driving current according to the data signal Vdata_I to drive the light-emitting module 60 to emit light. The magnitude of the driving current is related to the magnitude of the data signal Vdata_I.

[0060] Specifically, the output end of the time control module 10 is connected to the input end of the first potential control module 30 and the input end of the second potential control module 40 at the first node PW1, and the control end of the current control module 20 is connected to the output end of the first potential control module 30 and the output end of the second potential control module 40 at the second node PW2. The first potential control module 30 and the second potential control module 40 are respectively connected between the first node PW1 and the second node PW2. The working process of the pixel circuit at least includes a reset stage and a light-emitting stage. In the reset stage, the reset module 50 is turned on to reset the potential of the first node PW1, and at the same time, the second potential control module 40 is controlled to be turned on. The second potential control module 40 keeps the voltage of the second node PW2 at the on-voltage according to the voltage of the first node PW1. In the light-emitting stage, the current control module 20 generates a driving current according to the data signal Vdata_I to drive the light-emitting module 60 to emit light. When the light emission ends, the time control module 10 outputs a time control signal according to the time signal Vdata_t and the sweep signal SWEEP, and the first potential control module 30 keeps the voltage of the second node PW2 at the turn-off voltage according to the time control signal to control the current control module 20 to turn off, thereby controlling the light-emitting module 60 to turn off.

[0061] In this embodiment, the potential of the control end (i.e., the second node PW2) of the current control module 20 is controlled by the first potential control module 30 and the second potential control module 40. Even if the voltage of the first node PW1 of the time control module 10 is unstable due to leakage or threshold voltage drift, the potential of the control end of the current control module 20 can be stabilized at the shutdown voltage (for example, the shutdown voltage can be the third power supply voltage VDDW; in other embodiments, the shutdown voltage can be any voltage that can shut down the current control module 20) through the first potential control module 30, thereby preventing the potential of the control end of the current control module 20 from attenuating and other unstable problems, thereby ensuring that the current control module 20 can be quickly shut down at the end of light emission, reducing the driving current attenuation phenomenon caused by the unstable potential of the control end of the current control module 20, improving the difference in driving current between different pixels, improving the uniformity of the driving current, and effectively avoiding the difference in light emission time between different pixels, which is beneficial to improving the display effect.

[0062] The pixel circuit provided by the embodiment of the present invention sets a second potential control module between the output end of the time control module and the control end of the current control module to keep the control end of the current control module at the on-voltage in the reset stage, and sets a first potential control module between the output end of the time control module and the control end of the current control module to quickly and stably keep the potential of the control end of the current control module at the off-voltage when the light-emitting module stops emitting light, thereby maintaining the stability of the potential of the control end of the current control module, quickly turning off the current control module, and effectively avoiding the phenomenon of unstable light emission of the light-emitting module, which is beneficial to improving the flickering or uneven display caused by the unstable output signal of the time control module when the pixel circuit is turned off, and is beneficial to improving the display effect.

[0063] Figure 2 A schematic diagram of another pixel circuit provided by an embodiment of the present invention, referring to Figure 2 On the basis of the above technical solution, optionally, the first potential control module 30 includes a first logic unit 301 and a first switch unit 302, the first input end of the first logic unit 301 is connected to the first reference signal EN1, the second input end of the first logic unit 301 is connected to the output end of the time control module 10, the output end of the first logic unit 301 is connected to the control end of the first switch unit 302, the first end of the first switch unit 302 is connected to the third power line, and the second end of the first switch unit 302 is connected to the control end of the current control module 20.

[0064] The third power line can transmit a third power voltage VDDW, and the third power voltage VDDW is a shutdown voltage, which can shut down the current control module 20.

[0065] The second potential control module 40 includes a second logic unit 401 and a second switch unit 402, the first input end of the second logic unit 401 is connected to the second reference signal EN2, the second input end of the second logic unit 401 is connected to the output end of the time control module 10, the output end of the second logic unit 401 is connected to the control end of the second switch unit 402, the first end of the second switch unit 402 is connected to the first initialization signal line, and the second end of the second switch unit 402 is connected to the control end of the current control module 20.

[0066] The first initialization signal line is used to transmit a first initialization voltage Vinit1 . The first initialization voltage Vinit is a turn-on voltage, which can turn on the current control module 20 .

[0067] Specifically, in the reset stage, the reset module 50 resets the first node PW1, the second logic unit 401 controls the second switch unit 402 to turn on according to the second reference signal EN2 and the voltage of the first node PE1, and the second switch unit 402 transmits the first initialization voltage Vinit1 to the second node PW2, so that the current control module 20 is turned on.

[0068] In the light-emitting stage, the current control module 20 drives the light-emitting module 60 to emit light. When the light-emitting ends, the time control module 10 generates a time control signal according to the time signal Vdata_t and the sweep signal SWEEP, the first logic unit 301 controls the first switch unit 302 to turn on according to the voltage of the first node PW1 and the first reference signal EN1 (the second logic unit 401 is turned off at this time), and the first switch unit 302 transmits the third power supply voltage VDDW to the second node PW2, so that the current control module 20 is turned off, thereby controlling the light-emitting module 60 to turn off.

[0069] Figure 3 A schematic diagram of another pixel circuit structure provided by an embodiment of the present invention, specifically: Figure 2 The first potential control module 30 and the second potential control module 40 in the pixel circuit are subdivided into a schematic diagram of the structure of the device, refer to Figure 3 The first logic unit 301 includes a NAND gate U1, the first switch unit 302 includes a first transistor M1, the first input end of the NAND gate U1 is connected to the first reference signal EN1, the second input end of the NAND gate U1 is connected to the output end of the time control module 10, the output end of the NAND gate U1 is connected to the gate of the first transistor M1, the first electrode of the first transistor M1 is connected to the third power line, and the second electrode of the first transistor M1 is connected to the control end of the current control module 20.

[0070] The second logic unit 401 includes a NOR gate U2, the second switch unit 402 includes a second transistor M2, the first input end of the NOR gate U2 is connected to the second reference signal EN2, the second input end of the NOR gate U2 is connected to the output end of the time control module 10, the output end of the NOR gate U2 is connected to the gate of the second transistor M2, the first electrode of the second transistor M2 is connected to the first initialization signal line, and the second electrode of the second transistor M2 is connected to the control end of the current control module 20.

[0071] The first transistor M1 and the second transistor M2 have different channel types.

[0072] Specifically, the reset module 50 can be connected between the first initialization signal line and the first node PW1. In the reset stage, the reset module 50 transmits the first initialization voltage Vinit1 to the first node PW1, the potential of the first node PW1 is low, the NAND gate U2 outputs a high level according to the first initialization voltage Vinit1 and the second reference signal EN2, the NAND gate U1 outputs a high level according to the first initialization voltage Vinit1 and the first reference signal EN2, the first transistor M1 is turned off, the second transistor M2 is turned on, the first initialization voltage Vinit1 is transmitted to the second node PW2, and the current control module 20 is turned on.

[0073] In the light-emitting stage, the current control module 20 generates a driving current according to the data signal Vdata_I, and drives the light-emitting module 60 to emit light. Under the action of the sweep signal SWEEP, the time control module 10 gradually outputs a time control signal to the first node PW1. When the voltage of the first node PW1 causes the NAND gate U1 to output a low level, the first transistor M1 is turned on, and at this time, the NOR gate U2 outputs a low level, and the second transistor M2 is turned off. The first transistor M1 transmits the third power supply voltage VDDW to the second node PW2, quickly pulls up the potential of the control end of the current control module 20, controls the current control module 20 to turn off, and ends the light emission. It effectively avoids the potential of the control end of the current control module 20 gradually changing with the time control signal of the first node PW1, ensures the stability of the potential of the control end of the current control module 20, and then ensures the stability of the light emission.

[0074] Optionally, the first reference signal EN1 and the second reference signal EN2 are inverse signals of each other to ensure that the output levels of the NAND gate U1 and the NOR gate U2 jump at the same time, ensure the synchronization of the timing actions of the NAND gate U1 and the NOR gate U2, and further improve the control accuracy of the control terminal potential of the current control module 20.

[0075] Figure 4 A schematic diagram of another pixel circuit provided by an embodiment of the present invention, referring to Figure 4On the basis of the above technical solutions, optionally, the pixel circuit further includes a third potential control module 70, which is connected to the control end of the current control module 10. The third potential control module 70 is used to respond to the first reference signal EN1 and continuously turn on in the highlight display mode to continuously keep the control end voltage of the current control module 20 at the on-voltage.

[0076] Specifically, in some special scenarios, continuous high-brightness display is required. In this case, the third potential control module 70 can be controlled to respond to the first reference signal EN1 to turn on, and the first initialization voltage Vinit1 can be transmitted to the control end of the current control module 20, so that the current control module 20 is continuously turned on and the light-emitting module 60 continues to emit light.

[0077] Optionally, the third potential control module 70 includes a third transistor M3 , a gate of the third transistor M3 is connected to the first reference signal EN1 , a first electrode of the third transistor M3 is connected to the first initialization signal line, and a second electrode of the third transistor M3 is connected to the control end of the current control module 20 .

[0078] Continue to refer Figure 4 The pixel circuit further includes a first storage unit 80, which is connected between the second power line L2 and the control end of the current control module 20. The first storage unit 80 may include a first capacitor C1, which is used to store the potential of the control end of the current control module 20 and maintain the stability of the potential of the control end of the current control module 20 when the current control module 20 is turned off, so that the current control module 20 can be turned off more reliably.

[0079] Optionally, in this embodiment, the reset module 50, the second switch unit 402 and the third potential control module 70 are all connected to the first initialization signal line, which is beneficial to reducing the number of signal lines and thus beneficial to improving PPI.

[0080] The technical solution provided in this embodiment controls the potential of the control end of the current control module 20 through the first potential control module 30 and the second potential control module 40. When the time control module 10 gradually outputs the time control signal according to the sweep signal SWEEP and the time signal Vdata_t, when the potential of the first node PW1 causes the first switch unit 302 in the first potential control module 30 to be turned on, the control end of the current control module 20 is quickly positioned at the off voltage to prevent the potential of the control end of the current control module 20 from gradually changing with the time control signal of the first node PW1, thereby ensuring the stability of the potential of the control end of the current control module 20 and thus ensuring the stability of the light emission. In addition, by setting the third potential control module 70, the light emitting module 60 can continuously emit light to meet the requirements of high-brightness display, enriching the functions of the pixel circuit of digital-analog hybrid drive.

[0081] Figure 5 A schematic diagram of a current control module according to an embodiment of the present invention is provided. Figure 5 On the basis of the above technical solutions, optionally, the current control module 20 includes a first driving unit 201, a first data writing unit 202 and a current control unit 203, the current control unit 203 and the first driving unit 201 are connected between the first power line L1 and the first end of the light emitting module 60, the second end of the light emitting module 60 is connected to the second power line L2, the first data writing unit 202 is connected to the first driving unit 201, and the first data writing unit 202 is used to write the data signal Vdata_I to the control end of the first driving unit 201. Among them, the control end of the current control unit 203 is connected to the second node PW2 as the control end of the current control module 20. In the light emitting stage, the light emitting time of the light emitting module 60 is controlled by controlling the on-off state of the current control unit 203.

[0082] The current control module 20 further includes a first compensation unit 204, which is connected between the second end and the control end of the first driving unit 204, the first data writing unit 202 is connected to the first end of the first driving unit 201, and the control end of the first data writing unit 202 and the control end of the first compensation unit 204 are both connected to the first scan line. The first scan line is used to transmit the first scan signal S1, and the first compensation unit 204 is used to compensate for the threshold voltage of the first driving unit 201 to improve the problem of poor uniformity of the driving current caused by the change of the threshold voltage characteristic of the first driving unit 201.

[0083] The current control module 20 further includes a first light-emitting control unit 205 and a second light-emitting control unit 206. The first end of the first light-emitting control unit 205 is connected to the first power line L1, the second end of the first light-emitting control unit 205 is connected to the first end of the first driving unit 201, the second end of the first driving unit 201 is connected to the first end of the current control unit 203, the second end of the current control unit 203 is connected to the first end of the first end of the second light-emitting control unit 206, and the second end of the second light-emitting control unit 206 is connected to the first end of the light-emitting module 60; the control end of the second light-emitting control unit 206 is connected to the first light-emitting control signal line, and the control end of the first light-emitting control unit 205 is connected to the second light-emitting control signal line. The first light-emitting control unit 205 is used to cut off the connection between the first driving unit 201 and the first power line L1 in the non-light-emitting stage, so as to prevent the first power supply voltage VDDA from interfering with the data signal Vdata_I when the data signal Vdata_I is transmitted to the first end of the first driving unit 201, thereby affecting the light-emitting quality. At the start of the light-emitting stage, the first light-emitting control unit 205 and the second light-emitting control unit 206 are controlled to be turned on, so that the connection path between the first power line L1 and the second power line L2 is turned on, and the light-emitting stage is entered.

[0084] Optionally, continue to refer to Figure 5 The current control module 20 further includes a second storage unit 208 , which is connected between the control end of the first driving unit 201 and the first power line L1 , and is used to store the voltage of the control end of the first driving unit 201 .

[0085] Optionally, the current control module 20 also includes a first initialization unit 207, a first end of the first initialization unit 207 is connected to the first initialization signal line, a second end of the first initialization unit 207 is connected to the control end of the first driving unit 201, and the control end of the first initialization unit 207 is connected to the second scanning line. The first initialization unit 207 is used to respond to the second scanning signal S2 on the second scanning line, initialize the potential of the control end of the first driving unit 201, and prevent residual charge from having an adverse effect on the driving current.

[0086] Optionally, the current control module 20 further includes a second initialization unit 209, a first end of the second initialization unit 209 is connected to the second power line L2 or the second initialization signal line, a second end of the second initialization unit 209 is connected to the first end of the light-emitting module 60, and a control end of the second initialization unit 209 is connected to the second scan line. The second initialization unit 209 is used to respond to the conduction of the second scan signal S2 on the second scan line, transmit the second power supply voltage VSS or the second initialization voltage Vinit2 on the second initialization signal line to the first end of the light-emitting module 60, and initialize the potential of the first end of the light-emitting module 60. Wherein, the second initialization voltage Vinit2 and the second power supply voltage VSS are both negative voltages, and the second initialization voltage Vinit2 is lower than the second power supply voltage VSS.

[0087] Figure 6 A schematic diagram of a time control module provided by an embodiment of the present invention, referring to Figure 6 On the basis of the above technical solutions, optionally, the time control module 10 includes a second driving unit 101, a second data writing unit 102, a third initialization unit 103 and a coupling unit 104, the second driving unit 101 is connected between the third power line L3 and the output end of the time control module 10, the second data writing unit 102 is used to write the time signal Vdata_t to the control end of the second driving unit 101; the third initialization unit 103 is connected between the third initialization signal line and the control end of the second driving unit 101, and the control end of the third initialization unit 103 is connected to the first scan line.

[0088] The coupling unit 104 is connected to the control end of the second driving unit 101 , and the coupling unit 104 is used to control the potential of the control end of the second driving unit 101 according to the sweep signal SWEEP.

[0089] Optionally, the time control module 10 further includes a second compensation unit 105, which is connected between the control end and the second end of the second driving unit 101, the control end of the second compensation unit 105 and the control end of the second data writing unit 102 are both connected to the third scan line, and the second data writing unit 102 is connected to the first end of the second driving unit 101. The second compensation unit 105 is used to compensate for the threshold voltage of the second driving unit 101 to ensure the accuracy of the time control signal output by the time control module 10.

[0090] Optionally, the time control module 10 also includes a third light-emitting control unit 106 and a fourth light-emitting control unit 107, the control end of the third light-emitting control unit 106 and the control end of the fourth light-emitting control unit 107 are both connected to the second light-emitting control signal line, the first end of the third light-emitting control unit 106 is connected to the third power line L3, the second end of the third light-emitting control unit 106 is connected to the first end of the second driving unit 101, the first end of the fourth light-emitting control unit 107 is connected to the second end of the second driving unit 101, and the second end of the fourth light-emitting control unit 107 is connected to the output end of the time control module 10.

[0091] Optionally, the time control module 10 further includes a third storage unit 108 , which is connected between the third power line L3 and the control end of the second driving unit 101 and is used to store the voltage of the control end of the second driving unit 101 .

[0092] Specifically, before the light-emitting stage, the third initialization unit 103 is turned on in response to the first scan signal S1 on the first scan line, and the third initialization voltage Vinit3 on the third initialization signal line is transmitted to the control end of the second driving unit 101, the potential of the control end of the second driving unit 101 is initialized, and the second driving unit 101 is turned on. Afterwards, the second data writing unit 102 and the second compensation unit 105 are turned on in response to the third scan signal S3 on the third scan line, and the time signal Vdata_t is transmitted to the control end of the second driving unit 101, and a constant voltage difference is maintained at both ends of the coupling unit 104. In the light-emitting stage, the current control module 20 can generate a driving current in the light-emitting stage according to the voltage state of its control end, and drive the light-emitting module 60 to emit light. Among them, the sweep signal SWEEP is used to scan the signal from a high level to a low level, or from a low level to a high level during the light-emitting stage, so as to control the voltage at the output end (first node PW1) of the time control module 10, thereby controlling the voltage at the control end of the current control module 20, and further controlling the working state (on or off) of the current control module 20, thereby realizing the control of the light-emitting time of the light-emitting module 60.

[0093] As a preferred implementation provided in this embodiment, Figure 7 A schematic diagram of another pixel circuit structure provided by an embodiment of the present invention, specifically a schematic diagram of a pixel circuit being refined into a device structure. Figure 7, the first driving unit 201 includes a fourth transistor M4, the first data writing unit 202 includes a fifth transistor M5, the current control unit 203 includes a sixth transistor M6, the first compensation unit 204 includes a seventh transistor M7, the first light emitting control unit 205 includes an eighth transistor M8, the second light emitting control unit 206 includes a ninth transistor M9, the first initialization unit 207 includes a tenth transistor M10, the second initialization unit 209 includes an eleventh transistor M11, and the second storage unit 208 includes a second capacitor C2. The light emitting module 60 includes a light emitting diode D1, which may be an LED, an OLED, a Micro LED, or a Mini LED.

[0094] The second driving unit 101 includes a twelfth transistor M12, the second data writing unit 102 includes a thirteenth transistor M13, the second compensation unit 105 includes a fourteenth transistor M14, the third initialization unit 103 includes a fifteenth transistor M15, the third light-emitting control unit 106 includes a sixteenth transistor M16, the fourth light-emitting control unit 107 includes a seventeenth transistor M17, the coupling unit 104 includes a third capacitor C3, and the third storage unit 108 includes a fourth capacitor C4.

[0095] The reset module 50 includes an eighteenth transistor M18.

[0096] Figure 8 A driving timing diagram of a pixel circuit provided by an embodiment of the present invention can be applied to Figure 7 The pixel circuit shown, combined with Figure 7 and Figure 8 Taking the example that except for the second transistor M2 which is an N-type transistor, all other transistors are P-type transistors, the specific operation of the pixel circuit provided in this embodiment includes a voltage writing stage T1, a reset stage T2 and a light emitting stage T3, wherein the voltage writing stage T1 includes an initialization stage t1, a first data writing stage t2 and a second data writing stage t3.

[0097] In the initialization stage t1, the first scan signal line is configured to transmit a high-level first scan signal S1, the second scan signal line is configured to transmit a low-level second scan signal S2, the third scan signal line is configured to transmit a high-level third scan signal S3, the reset signal line is configured to transmit a high-level reset signal Set, the first light-emitting control signal line is configured to transmit a high-level first light-emitting control signal EM1, and the second light-emitting control signal line is configured to transmit a high-level second light-emitting control signal EM2. Therefore, the tenth transistor M10 and the eleventh transistor M11 are turned on, and the first initialization voltage Vinit1 transmitted on the first initialization signal line is written to the gate of the fourth transistor M4, realizing the initialization of the gate potential of the fourth transistor M4, and turning on the fourth transistor M4. At the same time, the second initialization voltage Vinit2 on the second initialization signal line or the second power supply voltage VSS on the second power supply line L2 is transmitted to the first electrode of the light-emitting diode D1 through the eleventh transistor M11, and the potential of the first electrode of the light-emitting diode D1 is initialized.

[0098] In the first data writing phase t2, the first scan signal line is configured to transmit a low-level first scan signal S1, the second scan signal line is configured to transmit a high-level second scan signal S2, the third scan signal line is configured to transmit a high-level third scan signal S3, the reset signal line is configured to transmit a high-level reset signal Set, the first light-emitting control signal line is configured to transmit a high-level first light-emitting control signal EM1, and the second light-emitting control signal line is configured to transmit a high-level second light-emitting control signal EM2. Therefore, the fifth transistor M5, the seventh transistor M7, and the fifteenth transistor M15 are turned on. The data signal Vdata_I is transmitted to the gate of the fourth transistor M4 via the fifth transistor M5, the fourth transistor M4, and the seventh transistor M7. The gate potential of the fourth transistor M4 is Vdata_I+Vth4, and is stored on the second capacitor C2, where Vth4 is the threshold voltage of the fourth transistor M4, and the threshold compensation of the fourth transistor M4 is realized.

[0099] The third initialization voltage Vinit3 transmitted on the third initialization signal line is transmitted to the gate of the twelfth transistor M12 via the fifteenth transistor M15, thereby initializing the gate potential of the twelfth transistor M12 and turning on the twelfth transistor M12.

[0100] In the second data writing phase t3, the first scan signal line is configured to transmit a high-level first scan signal S1, the second scan signal line is configured to transmit a high-level second scan signal S2, the third scan signal line is configured to transmit a low-level third scan signal S3, the reset signal line is configured to transmit a high-level reset signal Set, the first light-emitting control signal line is configured to transmit a high-level first light-emitting control signal EM1, and the second light-emitting control signal line is configured to transmit a high-level second light-emitting control signal EM2. Therefore, the thirteenth transistor M13 and the fourteenth transistor M14 are turned on, and the time signal Vdata_t is transmitted to the gate of the twelfth transistor M12 through the thirteenth transistor M13, the twelfth transistor M12, and the fourteenth transistor M14, until the gate potential of the twelfth transistor M12 is Vdata_t+Vth12, and the twelfth transistor M12 is turned off, wherein Vth12 is the threshold voltage of the twelfth transistor M12. A constant voltage difference is maintained across the third capacitor C3.

[0101] Phase t4 is the time period during which the voltage writing phase T1 is performed row by row for the remaining rows of sub-pixels, so as to complete the data writing of all the pixel rows.

[0102] In the reset phase T2, the first scan signal line is configured to transmit a high-level first scan signal S1, the second scan signal line is configured to transmit a high-level second scan signal S2, the third scan signal line is configured to transmit a high-level third scan signal S3, the reset signal line is configured to transmit a low-level reset signal Set, the first light-emitting control signal line is configured to transmit a high-level first light-emitting control signal EM1, and the second light-emitting control signal line is configured to transmit a high-level second light-emitting control signal EM2. Therefore, the eighteenth transistor M18 is turned on, and the first initialization voltage Vinit1 on the first initialization signal line is transmitted to the first node PW1 through the eighteenth transistor M18 to initialize the first node PW1.

[0103] The NOR gate U2 outputs a high level according to the low-level first initialization voltage Vinit1 and the low-level second reference voltage EN2, controls the second transistor M2 to be turned on, the first initialization voltage Vinit1 is transmitted to the second node PW2 via the second transistor M2, and the sixth transistor M6 is turned on.

[0104] In the light-emitting stage T3, the first scan signal line is configured to transmit a high-level first scan signal S1, the second scan signal line is configured to transmit a high-level second scan signal S2, the third scan signal line is configured to transmit a high-level third scan signal S3, the reset signal line is configured to transmit a high-level reset signal Set, the first light-emitting control signal line is configured to transmit a low-level first light-emitting control signal EM1, and the second light-emitting control signal line is configured to transmit a low-level second light-emitting control signal EM2. Therefore, the eighth transistor M8, the ninth transistor M9, the sixteenth transistor M16, and the seventeenth transistor M17 are turned on, and the first power supply voltage VDDA on the first power supply line L1 is transmitted to the first electrode of the fourth transistor M4, and the fourth transistor M4 generates a driving current under the control of its gate voltage to drive the light-emitting diode D1 to emit light.

[0105] At the same time, the sweep signal SWEEP gradually changes from the high level SWEEP-H to the low level SWEEP-L, and due to the coupling effect of the third capacitor C3, the potential of the gate of the twelfth transistor M12 changes synchronously. When the potential of the gate of the twelfth transistor M12 turns on the twelfth transistor M12, the third power supply voltage VDDW is transmitted to the first node PW1 through the sixteenth transistor M16, the twelfth transistor M12 and the seventeenth transistor M17, and the first node PW1 is high. The NOR gate U2 outputs a low level under the high level of the first node PW1, controls the second transistor M2 to turn off, and the NAND gate U1 outputs a low level under the high level of the first node PW1 and the high level first reference signal EN1, controls the first transistor M1 to turn on, and the first transistor M1 transmits the third power supply voltage VDDW to the second node PW2, thereby quickly pulling the potential of the second node PW2 to the turn-off voltage of the current control module 20, controls the sixth transistor M6 to turn off, and the light-emitting diode D1 stops emitting light.

[0106] In addition, when continuous highlight display is required, the first reference signal EN1 is controlled to jump to a low level, the third transistor M3 is controlled to be continuously turned on, and the gate voltage of the sixth transistor M6 is maintained at the on-voltage, so that the light emitting diode D1 continuously emits light.

[0107] Optionally, an embodiment of the present invention further provides a driving method for a pixel circuit, and the driving method can be applicable to the pixel circuit provided by any of the above technical solutions. Fig. 9 A flowchart of a driving method of a pixel circuit provided by an embodiment of the present invention, combined with Figure 1 and Fig. 9 Specifically, the driving method of the pixel circuit includes:

[0108] S110 , in the reset stage, controlling the reset module to reset the output end of the time control module, and controlling the second potential control module to keep the control end voltage of the current control module at the on-voltage according to the voltage of the output end of the time control module.

[0109] S120. In the light-emitting stage, the current control module is controlled to drive the light-emitting module to emit light according to the data signal, and the time control module is controlled to control the potential of its own output terminal according to the time signal and the sweep signal. At the end of the light-emitting, the first potential control module is controlled to keep the control terminal voltage of the current control module at the shut-off voltage according to the voltage of the output terminal of the time control module, so as to control the light-emitting time of the light-emitting module.

[0110] The driving method of the pixel circuit provided by the embodiment of the present invention sets a second potential control module between the output end of the time control module and the control end of the current control module to keep the control end of the current control module at the on-voltage in the reset stage, and sets a first potential control module between the output end of the time control module and the control end of the current control module to quickly and stably keep the potential of the control end of the current control module at the off-voltage when the light-emitting module stops emitting light, thereby maintaining the stability of the potential of the control end of the current control module, and quickly turning off the current control module, effectively avoiding the phenomenon of unstable light emission of the light-emitting module, which is beneficial to improving the flickering or uneven display phenomenon caused by the unstable output signal of the time control module when the pixel circuit is turned off, and is beneficial to improving the display effect.

[0111] Optionally, the driving method of the pixel circuit further includes:

[0112] In the highlight display mode, the third potential control module is controlled to be continuously turned on in response to the first reference signal at its control end, so as to continuously maintain the control end voltage of the current control module at the on-voltage to meet the highlight display requirement.

[0113] An embodiment of the present invention further provides a display panel, the display panel comprising the pixel circuit provided by any embodiment of the present invention, Fig.10 A schematic diagram of a display panel according to an embodiment of the present invention is provided. The display panel 200 can be Fig.10 The mobile phone panel shown can also be a display panel in electronic devices such as tablets, mobile phones, watches, wearable devices, and vehicle displays, camera displays, televisions, and computer screens. Since the display panel includes the pixel circuit provided by any embodiment of the present invention, the display panel provided by the embodiment of the present invention also has the beneficial effects described in any embodiment of the present invention.

[0114] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0115] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A pixel circuit, characterized in that: include: A time control module, a current control module, a first potential control module, a second potential control module, a reset module and a light emitting module; The current control module and the light emitting module are connected between the first power line and the second power line, and the current control module is used to drive the light emitting module to emit light according to the data signal in the light emitting stage; The time control module is used to control the potential of its own output terminal according to the time signal and the sweep signal in the light-emitting stage to control the light-emitting time of the light-emitting module; The reset module is connected to the output end of the time control module, and the reset module is used to reset the output end of the time control module in the reset stage; The first potential control module is connected between the output end of the time control module and the control end of the current control module, the second potential control module is connected between the output end of the time control module and the control end of the current control module, the second potential control module is used to keep the control end voltage of the current control module at the on-voltage according to the voltage of the output end of the time control module during the reset stage, and the first potential control module is used to keep the control end voltage of the current control module at the off-voltage according to the voltage of the output end of the time control module during the light-emitting stage.

2. The pixel circuit according to claim 1, characterized in that: The first potential control module includes a first logic unit and a first switch unit, the first input end of the first logic unit is connected to the first reference signal, the second input end of the first logic unit is connected to the output end of the time control module, the output end of the first logic unit is connected to the control end of the first switch unit, the first end of the first switch unit is connected to the third power line, and the second end of the first switch unit is connected to the control end of the current control module; The second potential control module includes a second logic unit and a second switch unit, the first input end of the second logic unit is connected to the second reference signal, the second input end of the second logic unit is connected to the output end of the time control module, the output end of the second logic unit is connected to the control end of the second switch unit, the first end of the second switch unit is connected to the first initialization signal line, and the second end of the second switch unit is connected to the control end of the current control module.

3. The pixel circuit according to claim 2, characterized in that: The first logic unit includes a NAND gate, the first switch unit includes a first transistor, the first input end of the NAND gate is connected to the first reference signal, the second input end of the NAND gate is connected to the output end of the time control module, the output end of the NAND gate is connected to the gate of the first transistor, the first electrode of the first transistor is connected to the third power line, and the second electrode of the first transistor is connected to the control end of the current control module; The second logic unit includes a NOR gate, the second switch unit includes a second transistor, the first input end of the NOR gate is connected to the second reference signal, the second input end of the NOR gate is connected to the output end of the time control module, the output end of the NOR gate is connected to the gate of the second transistor, the first electrode of the second transistor is connected to the first initialization signal line, and the second electrode of the second transistor is connected to the control end of the current control module; Preferably, the first reference signal and the second reference signal are inverse signals of each other; Preferably, a channel type of the first transistor is different from a channel type of the second transistor; Preferably, the reset module is connected between the first initialization signal line and the output end of the time control module.

4. The pixel circuit according to claim 1, characterized in that: It also includes a third potential control module, the third potential control module is connected to the control end of the current control module, and the third potential control module is used to respond to the first reference signal to continuously conduct in the highlight display mode, so as to continuously maintain the control end voltage of the current control module at the conduction voltage; Preferably, the third potential control module includes a third transistor, a gate of the third transistor is connected to the first reference signal, a first electrode of the third transistor is connected to the first initialization signal line, and a second electrode of the third transistor is connected to the control end of the current control module.

5. The pixel circuit according to claim 4, characterized in that: It also includes a first storage unit, a first end of the first storage unit is connected to the second power line, and a second end of the first storage unit is connected to the control end of the current control module.

6. The pixel circuit according to claim 1, characterized in that: The current control module includes a first driving unit, a first data writing unit and a current control unit; The current control unit and the first driving unit are connected between the first power line and the first end of the light emitting module, the second end of the light emitting module is connected to the second power line, the first data writing unit is connected to the first driving unit, and the first data writing unit is used to write the data signal to the control end of the first driving unit; Preferably, the current control module further includes a first compensation unit, the first compensation unit is connected between the second end and the control end of the first driving unit, the first data writing unit is connected to the first end of the first driving unit, and the control end of the first data writing unit and the control end of the first compensation unit are both connected to the first scan line; Preferably, the current control module further includes a first light-emitting control unit and a second light-emitting control unit, wherein a first end of the first light-emitting control unit is connected to the first power line, a second end of the first light-emitting control unit is connected to a first end of the first driving unit, a second end of the first driving unit is connected to a first end of the current control unit, a second end of the current control unit is connected to a first end of a first end of the second light-emitting control unit, and a second end of the second light-emitting control unit is connected to a first end of the light-emitting module; a control end of the second light-emitting control unit is connected to a first light-emitting control signal line, and a control end of the first light-emitting control unit is connected to a second light-emitting control signal line; Preferably, the current control module further includes a second storage unit, and the second storage unit is connected between the control end of the first driving unit and the first power line; Preferably, the current control module further comprises a first initialization unit, a first end of the first initialization unit is connected to a first initialization signal line, a second end of the first initialization unit is connected to a control end of the first driving unit, and a control end of the first initialization unit is connected to a second scanning line; Preferably, the current control module also includes a second initialization unit, a first end of the second initialization unit is connected to the second power line or the second initialization signal line, a second end of the second initialization unit is connected to the first end of the light-emitting module, and a control end of the second initialization unit is connected to the second scan line.

7. The pixel circuit according to claim 1, characterized in that: The time control module includes a second driving unit, a second data writing unit, a third initialization unit and a coupling unit; The second driving unit is connected between the third power line and the output end of the time control module, and the second data writing unit is used to write the time signal to the control end of the second driving unit; the third initialization unit is connected between the third initialization signal line and the control end of the second driving unit, and the control end of the third initialization unit is connected to the first scan line; The coupling unit is connected to the control end of the second driving unit, and the coupling unit is used to control the potential of the control end of the second driving unit according to the sweep signal; Preferably, the time control module further includes a second compensation unit, the second compensation unit is connected between the control end and the second end of the second driving unit, the control end of the second compensation unit and the control end of the second data writing unit are both connected to the third scanning line, and the second data writing unit is connected to the first end of the second driving unit; Preferably, the time control module further includes a third light-emitting control unit and a fourth light-emitting control unit, the control end of the third light-emitting control unit and the control end of the fourth light-emitting control unit are both connected to the second light-emitting control signal line, the first end of the third light-emitting control unit is connected to the third power line, the second end of the third light-emitting control unit is connected to the first end of the second driving unit, the first end of the fourth light-emitting control unit is connected to the second end of the second driving unit, and the second end of the fourth light-emitting control unit is connected to the output end of the time control module; Preferably, the time control module further includes a third storage unit, and the third storage unit is connected between the third power line and the control end of the second driving unit.

8. A method for driving a pixel circuit, characterized in that: In the reset stage, the reset module is controlled to reset the output end of the time control module, and the second potential control module is controlled to keep the control end voltage of the current control module at the on-voltage according to the voltage of the output end of the time control module; In the light-emitting stage, the current control module is controlled to drive the light-emitting module to emit light according to the data signal, and the time control module is controlled to control the potential of its own output terminal according to the time signal and the sweep signal. At the end of the light-emitting, the first potential control module is controlled to keep the control terminal voltage of the current control module at the shutdown voltage according to the voltage of the output terminal of the time control module, so as to control the light-emitting time of the light-emitting module.

9. The driving method of the pixel circuit according to claim 8, characterized in that: The pixel circuit also includes a third potential control module; The driving method of the pixel circuit further includes: In the highlight display mode, the third potential control module is controlled to be continuously turned on in response to the first reference signal at its control end, so as to continuously maintain the control end voltage of the current control module at the turn-on voltage.

10. A display panel, characterized in that: Comprising the pixel circuit as described in any one of claims 1-7.

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