Display panel and display device

By introducing storage circuits into the sub-pixels of the OLED display panel, light energy is converted into electrical energy and stored in the energy storage capacitor, solving the problem that the luminous efficiency of the light-emitting material is close to the upper limit and achieving a longer battery life.

CN119942979BActive Publication Date: 2025-10-28WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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Patent Information

Application Number
CN202510130784.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-02-05
Publication Date
2025-10-28
Estimated Expiration
2045-02-05

AI Technical Summary

Technical Problem

The luminous efficiency of the light-emitting materials in existing OLED display panels is nearing its limit, resulting in insufficient battery life.

Method used

By introducing a storage circuit into the sub-pixels of the OLED display panel, the light-emitting device converts light energy into electrical energy and stores it in the energy storage capacitor when it is not emitting light. When it is emitting light, the energy storage capacitor provides the driving current, realizing self-powered operation and reducing power consumption during display.

Benefits of technology

It improves the battery life of OLED display panels by reducing power consumption through a self-powered mechanism, thus extending the product's usage time.

✦ Generated by Eureka AI based on patent content.

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Abstract

This application provides a display panel and a display device. The display panel includes multiple sub-pixels, each sub-pixel including a pixel driving circuit, a light-emitting device, and a storage circuit connected to each other. The light-emitting device is configured to a non-light-emitting state, the pixel driving circuit is configured to a non-operating state, the light-emitting device charges the storage circuit, and the light-emitting device is configured to a light-emitting state. The pixel driving circuit and / or the storage circuit provide driving current to the light-emitting device. By setting a storage circuit in the sub-pixel, this application enables the light-emitting device to convert the received light energy into electrical energy and charge the storage capacitor in the non-light-emitting state. The storage circuit can provide the required driving current to the light-emitting device when it is configured to a light-emitting state, thereby realizing the self-powered display panel, reducing the power consumption of the product during display, and improving the product's battery life.
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Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) are a new type of current-driven semiconductor light-emitting device that displays light by controlling the charge carriers in the device and exciting organic materials.

[0003] In current OLED display panels, the luminous efficiency of the light-emitting material is an important indicator of the product's battery life. However, the improvement of the luminous efficiency of the current light-emitting material has reached its limit. Therefore, how to improve the battery life of the product is a problem that current OLED display panels need to solve. Summary of the Invention

[0004] This application provides a display panel and display device to improve the technical problem of low battery life of existing OLED display panels.

[0005] To address the above issues, the technical solution provided in this application is as follows:

[0006] This application proposes a display panel comprising a plurality of sub-pixels, each sub-pixel comprising:

[0007] Pixel driving circuit;

[0008] A light-emitting device, connected to the pixel driving circuit;

[0009] A storage circuit is connected to the light-emitting device and the pixel driving circuit;

[0010] In one configuration, the light-emitting device is configured to be in a non-light-emitting state, the pixel driving circuit is configured to be in a non-operating state, and the light-emitting device charges the storage circuit; in another configuration, the light-emitting device is configured to be in a light-emitting state, and the pixel driving circuit and / or the storage circuit provide driving current to the light-emitting device.

[0011] Optionally, the storage circuit includes:

[0012] A first control transistor, wherein the first electrode of the first control transistor is electrically connected to the anode of the light-emitting device;

[0013] An energy storage capacitor, wherein the first plate of the energy storage capacitor is electrically connected to the second electrode of the first control transistor, and the second plate of the energy storage capacitor is electrically connected to the cathode of the light-emitting device;

[0014] Wherein, the light-emitting device is configured to be in a non-light-emitting state, the first control transistor is turned on, and the light-emitting device charges the energy storage capacitor;

[0015] The light-emitting device is configured to emit light, with the first control transistor turned on, the energy storage capacitor discharged, and the light-emitting device provided with a driving current; or, the light-emitting device is configured to emit light, with the first control transistor turned off, and the pixel driving circuit provided a driving current to the light-emitting device; or, the light-emitting device is configured to emit light, with the first control transistor turned on, and the pixel driving circuit and the energy storage capacitor simultaneously provided a driving current to the light-emitting device.

[0016] Optionally, the storage circuit further includes:

[0017] The second control transistor has its first electrode electrically connected to the first plate of the energy storage capacitor, and its second electrode electrically connected to the pixel driving circuit of the adjacent sub-pixel.

[0018] The plurality of sub-pixels include a first sub-pixel and a second sub-pixel. The light-emitting device of the first sub-pixel is configured to be in a non-light-emitting state, and the light-emitting device of the second sub-pixel is configured to be in a light-emitting state. The first control transistor of the first sub-pixel is turned off, the second control transistor of the first sub-pixel is turned on, and the energy storage capacitor of the first sub-pixel discharges and provides driving current to the light-emitting device of the second sub-pixel.

[0019] Optionally, the storage circuit further includes:

[0020] A voltage monitoring unit, one end of which is electrically connected to the first plate of the energy storage capacitor, and the other end of which is electrically connected to the second electrode of the first control transistor.

[0021] Optionally, the plurality of sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel, wherein the light-emitting device of the first sub-pixel emits red light, the light-emitting device of the second sub-pixel emits green light, and the light-emitting device of the third sub-pixel emits blue light.

[0022] Wherein, the capacitance of the energy storage capacitor in the third sub-pixel is greater than the capacitance of the energy storage capacitor in the second sub-pixel, and the capacitance of the energy storage capacitor in the third sub-pixel is greater than the capacitance of the energy storage capacitor in the first sub-pixel.

[0023] Optionally, the material of the light-emitting device includes a direct bandgap semiconductor.

[0024] Optionally, the light-emitting device includes an anode layer, a hole-functional layer, a light-emitting layer, an electron-functional layer, and a cathode layer stacked together;

[0025] The direct bandgap semiconductor is located in one of the hole functional layer, the light-emitting layer, and the electron functional layer.

[0026] Optionally, the hole functional layer includes a hole injection layer and a hole transport layer, and the electron functional layer includes an electron injection layer and an electron transport layer;

[0027] The direct bandgap semiconductor is located within the light-emitting layer, and the LUMO energy level barrier of the hole transport layer is smaller than that of the light-emitting layer, while the LUMO energy level barrier of the electron transport layer is larger than that of the light-emitting layer.

[0028] Optionally, the absolute value of the difference between the LUMO energy level barrier of the hole transport layer and the LUMO energy level barrier of the light-emitting layer is 0.2 eV to 0.4 eV, and the absolute value of the difference between the LUMO energy level barrier of the electron transport layer and the LUMO energy level barrier of the light-emitting layer is 0.2 eV to 0.4 eV.

[0029] This application also proposes a display device, which includes the above-described display panel.

[0030] Other features and advantages of the present application will be described in detail in the subsequent detailed description. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present application. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.

[0032] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0033] Figure 1 A simplified structural diagram of the display panel provided in the embodiments of this application;

[0034] Figure 2 A film layer diagram of a display panel provided in an embodiment of this application;

[0035] Figure 3 This is a first structural diagram of the light-emitting functional layer in a display panel provided in an embodiment of this application;

[0036] Figure 4 This is a second structural diagram of the light-emitting functional layer in the display panel provided in the embodiments of this application;

[0037] Figure 5This application provides a first circuit diagram of a sub-pixel in a display panel.

[0038] Figure 6 This is a pixel driving circuit diagram in a display panel provided in an embodiment of this application;

[0039] Figure 7 This is a second circuit diagram of a sub-pixel in a display panel provided in an embodiment of this application;

[0040] Figure 8 The circuit diagram of three sub-pixels in the display panel provided in the embodiment of this application. Detailed Implementation

[0041] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0042] Please see Figures 1 to 8 This application proposes a display panel 100, which includes a plurality of sub-pixels PX, each of the sub-pixels PX including a pixel driving circuit PL, a light-emitting device EL connected to the pixel driving circuit PL, and a storage circuit SL connected to the light-emitting device EL and the pixel driving circuit PL.

[0043] In this embodiment, the light-emitting device EL is configured to be in a non-light-emitting state, the pixel driving circuit PL is configured to be in a non-operating state, and the light-emitting device EL charges the storage circuit SL; when the light-emitting device EL is configured to be in a light-emitting state, the pixel driving circuit PL and / or the storage circuit SL provide driving current to the light-emitting device EL.

[0044] This application achieves self-powered display panel 100 by setting a storage circuit SL in the sub-pixel PX, and by converting the received light energy into electrical energy and charging the storage capacitor when the light-emitting device EL is configured to be in a non-light-emitting state, and by providing the required driving current to the light-emitting device EL when the light-emitting device EL is configured to be in a light-emitting state. This reduces the power consumption of the product during display and improves the product's battery life.

[0045] The technical solution of this application will now be described in conjunction with specific embodiments.

[0046] Please see Figure 1The display panel 100 includes a display area AA and a non-display area NA adjacent to the display area AA. Optionally, the non-display area NA surrounds the display area AA, so that the display area AA is surrounded by the non-display area NA. The display area AA is the area within the display panel 100 used for display functions, and it contains a plurality of sub-pixels PX that implement its display functions. The non-display area NA may be a border area of ​​the display panel 100, and it may contain functional components that assist the sub-pixels PX within the display area AA in displaying information.

[0047] Please see Figure 1 A bonding terminal is provided on the lower side of the display area AA. The bonding terminal can be connected to an external circuit and transmits the signals input from the external circuit to the data traces, thereby driving the display panel 100 to display the image. For example, the bonding terminal can be bonded to a chip or a flip-chip film to provide power and drive signals to the display panel 100.

[0048] Please see Figure 2 The display panel 100 may include a substrate 10, an array layer 20 disposed on the substrate 10, a pixel layer 30 disposed on the array layer 20, a light-emitting functional layer 40 and an encapsulation layer 50, a color filter layer 60 disposed on the encapsulation layer 50, and a cover plate layer 70 disposed on the color filter layer 60.

[0049] In this embodiment, the substrate 10 can be made of materials such as glass, quartz, or polyimide; for example, when the display panel 100 is a flexible panel, the substrate 10 can be made of flexible materials such as polyimide, or can be composed of a laminate of flexible materials and inorganic materials; when the display panel 100 is a rigid panel, the substrate 10 can be made of rigid materials such as glass or quartz.

[0050] In this embodiment, please refer to Figure 2 The array layer 20 may include multiple thin-film transistors (TFTs). These TFTs can be etch-block type, back-channel etch type, or classified into bottom-gate TFTs, top-gate TFTs, etc., depending on the position of the gate and the active layer AS. There are no specific limitations. For example, Figure 2The thin-film transistor shown is a top-gate thin-film transistor. The thin-film transistor may include an active layer AS disposed on a substrate 10, a first gate insulating layer 202 disposed on the active layer AS, a first gate layer GE1 disposed on the first gate insulating layer 202, a second gate insulating layer 203 disposed on the first gate layer GE1, a second gate layer GE2 disposed on the second gate insulating layer 203, a first inter-insulating layer 204 disposed on the second gate layer GE2, a second inter-insulating layer 205 disposed on the first inter-insulating layer 204, a first source-drain layer SD1 disposed on the second inter-insulating layer 205, a third inter-insulating layer 201 disposed on the first source-drain layer SD1, a first planarization layer 206 disposed on the third inter-insulating layer 201, a second source-drain layer SD2 disposed on the first planarization layer 206, a second planarization layer 207 disposed on the second source-drain layer SD2, and a third planarization layer 208 disposed on the second planarization layer 207.

[0051] It should be noted that the number of source and drain layers can be set according to the wiring space requirements. For example, the source and drain layers in this application can be two layers. At the same time, the number of gate layers can be set according to the wiring space and capacitance requirements. For example, the gate layers in this application can be two layers.

[0052] It should be noted that the first gate insulating layer 202, the second gate insulating layer 203, the first interlayer insulating layer 204, the second interlayer insulating layer 205 and the third interlayer insulating layer 201 can all be inorganic materials composed of elements such as nitrogen, silicon, oxygen and aluminum, such as single or multiple stacked inorganic film layers composed of one of silicon nitride, silicon oxide and aluminum oxide.

[0053] Please see Figure 2 The pixel layer 30 may include a first pixel definition portion 310 and a second pixel definition portion 320. The first pixel definition portion 310 is disposed on the side of the third planarization layer 208 away from the substrate 10, and the second pixel definition portion 320 is disposed on the surface of the first pixel definition portion 310 away from the substrate 10.

[0054] It should be noted that, since the light-emitting layer 402 of this application is prepared using inkjet printing technology, in order to reduce the precision of inkjet printing, the first pixel definition part 310 of this application may include a plurality of horizontally and vertically intersecting first pixel dams 311. The horizontally and vertically intersecting first pixel dams 311 enclose a plurality of pixel openings corresponding to sub-pixels. The second pixel definition part 320 includes a plurality of horizontally or vertically intersecting second pixel dams 321. The multiple sub-pixels between two adjacent second pixel dams 321 have the same color, so that in the inkjet printing process, multiple sub-pixels between two adjacent second pixel dams 321 can be printed simultaneously along the direction of the second pixel dams 321, thereby reducing the precision of inkjet printing and improving process efficiency.

[0055] In this embodiment, since the second pixel dam 321 mainly serves to isolate sub-pixels of different colors, the thickness of the second pixel dam 321 in this application can be greater than the thickness of the first pixel dam 311, that is, the thickness of the first pixel definition part 310 in this application is less than the thickness of the second pixel definition part 320.

[0056] It should be noted that the materials of the first flattening layer 206, the second flattening layer 207, the third flattening layer 208, the first pixel definition section 310, and the second pixel definition section 320 can all be positive organic materials.

[0057] Please see Figures 2 to 4 The light-emitting functional layer 40 may include an anode layer 401 disposed on the third planarization layer 208, a hole functional layer 40a disposed on the anode layer 401, a light-emitting layer 402 disposed on the hole functional layer 40a, an electronic functional layer 40b disposed on the light-emitting layer 402, and a cathode layer 403 disposed on the electronic functional layer 40b. The anode layer 401 includes a plurality of anodes corresponding one-to-one with pixel openings, and the light-emitting layer 402 may include a plurality of light-emitting portions corresponding one-to-one with the plurality of anodes. The anodes corresponding to the light-emitting portions, the electronic functional layer 40b, the hole functional layer 40a, and the cathode constitute the light-emitting device EL of this application.

[0058] It should be noted that the hole functional layer 40a includes a hole injection layer 404 and a hole transport layer 405, and the electron functional layer 40b includes an electron injection layer 406 and an electron transport layer 407.

[0059] Please see Figure 2 The encapsulation layer 50 covers the pixel layer 30 and continuously covers multiple pixel openings and multiple light-emitting parts; the encapsulation layer 50 may include a first inorganic encapsulation layer 501, an organic encapsulation layer 502, and a second inorganic encapsulation layer 503 that may be stacked in sequence.

[0060] Please see Figure 2 The color filter layer 60 includes a plurality of color filters 610 and light-shielding units 620 disposed on both sides of the color filters 610, with each color filter 610 corresponding to a light-emitting part.

[0061] Please see Figure 2 The cover layer 70 is disposed on the side of the color filter layer 60 away from the substrate 10. The cover layer 70 can be a glass cover or formed directly on the color filter layer 60.

[0062] It should be noted that the display panel 100 of this application may also include a touch layer (not shown), and the touch layer may be positioned between the encapsulation layer 50 and the cover layer 70.

[0063] It should be noted that since the third planarization layer 208 is disposed on the second planarization layer 207, and the purpose of the third planarization layer 208 is to further adjust the flatness of the film layer, the thickness of the third planarization layer 208 in this application can be less than the thickness of the second planarization layer 207 and the first planarization layer 206.

[0064] It should be noted that the material of the light-emitting device EL described in this application may include direct bandgap semiconductors, such as gallium arsenide, indium phosphide, or perovskite semiconductor materials.

[0065] In this embodiment, the direct bandgap semiconductor can be located in one of the hole functional layer 40a, the light-emitting layer 402, and the electron functional layer 40b. For example, the direct bandgap semiconductor can be located in the hole functional layer 40a, which is equivalent to providing a film layer 408 containing the direct bandgap semiconductor between the hole injection layer 404 and the hole transport layer 405. Please refer to [link to relevant documentation]. Figure 3 Alternatively, the direct bandgap semiconductor may be located within the light-emitting layer 402; please refer to [link / reference]. Figure 4 .

[0066] It should be noted that when the light-emitting device EL is configured to emit light, holes generated at the anode enter the light-emitting layer 402 through the hole functional layer 40a, and electrons generated at the cathode enter the light-emitting layer 402 through the electron functional layer 40b. Holes and electrons combine in the light-emitting layer 402 to emit light. Meanwhile, since the material of the light-emitting device EL in this application includes a direct bandgap semiconductor, when the light-emitting device EL is configured to be non-emitting, the light-emitting layer 402 can absorb the light source and convert it into electrical energy, transferring electrons to the cathode and holes to the anode of the light-emitting device EL. The electrons in the cathode and the holes in the anode are respectively transferred to different plates of the energy storage capacitor Csl in the storage circuit SL to store the electrical energy generated by the light-emitting device EL.

[0067] It should be noted that the light converted into electrical energy by the light-emitting device EL can be ambient light or light generated when an adjacent light-emitting device EL emits light.

[0068] In this embodiment, with Figure 4 Taking the structure in the example, the direct bandgap semiconductor is located within the light-emitting layer 402. Since the light-emitting device EL of this application transmits electrons to the cathode and holes to the anode after absorbing light energy, the LUMO energy level barrier of the hole transport layer 405 of this application is smaller than the LUMO energy level barrier of the light-emitting layer 402, and the LUMO energy level barrier of the electron transport layer 407 is larger than the LUMO energy level barrier of the light-emitting layer 402, so as to satisfy the transmission of holes and electrons.

[0069] In this embodiment, the absolute value of the difference between the LUMO energy level barrier of the hole transport layer 405 and the LUMO energy level barrier of the light-emitting layer 402 is 0.2 eV to 0.4 eV, and the absolute value of the difference between the LUMO energy level barrier of the electron transport layer 407 and the LUMO energy level barrier of the light-emitting layer 402 is 0.2 eV to 0.4 eV.

[0070] In this embodiment, the hole transport layer 405 can be made of poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine], and the electron transport layer 407 can be made of 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline, [6,6]-phenyl-C61-butyrate isomethyl ester, or [6,6]-phenyl-C71-butyrate isomethyl ester.

[0071] Please see Figure 5 Each sub-pixel PX includes a pixel driving circuit PL, a light-emitting device EL connected to the pixel driving circuit PL, and a storage circuit SL connected to the light-emitting device EL and the pixel driving circuit PL.

[0072] Please see Figure 6 The pixel driving circuit can be an mTnC circuit structure, such as 3T1C, 5T1C, 7T1C, 7T2C, 8T2C, 8T3C, 8T4C, etc. The following embodiment uses the 7T1C pixel driving circuit as an example for illustration.

[0073] Please see Figure 3 The pixel driving circuit PL may include a switching transistor T2, a driving transistor T1, a compensation transistor T3, a first reset transistor T4, a second reset transistor T7, a first light-emitting transistor T5, a second light-emitting transistor T6, and a storage capacitor Cst.

[0074] Please see Figure 3The first electrode of switching transistor T2 is connected to the first data signal line Data, the second electrode of switching transistor T2 is connected to the first node A, and the switching gate T2G of switching transistor T2 is connected to the first control signal line Pscan1; the first electrode of driving transistor T1 is connected to the first node A, the second electrode of driving transistor T1 is connected to the second node B, and the driving gate T1G of driving transistor T1 is connected to the third node Q; the first electrode of compensation transistor T3 is connected to the third node Q, the second electrode of compensation transistor T3 is connected to the second node B, and the compensation gate T3G of compensation transistor T3 is connected to the second control signal line Nscan1; the first electrode of the first reset transistor T4 is connected to the first reset signal line Vi1, the second electrode of the first reset transistor T4 is connected to the third node Q, and the first reset gate T4G of the first reset transistor T4 is connected to the third control signal line Nscan2. The first electrode of the second reset transistor T7 is connected to the second reset signal line Vi2, the second electrode of the second reset transistor T7 is connected to the anode of the light-emitting device, and the second reset gate T7G of the second reset transistor T7 is connected to the fourth control signal line Pscan2; the first electrode of the first light-emitting transistor T5 is connected to the high potential line VDD, the second electrode of the first light-emitting transistor T5 is connected to the first node A, and the first light-emitting gate T5G of the first light-emitting transistor T5 is connected to the light-emitting signal line EM; the first electrode of the second light-emitting transistor T6 is connected to the second node B, the second electrode of the second light-emitting transistor T6 is connected to the anode of the light-emitting device, and the second light-emitting gate T6G of the second light-emitting transistor T6 is connected to the light-emitting signal line EM; the first plate of the storage capacitor Cst is connected to the third node Q, the second plate of the storage capacitor Cst is connected to the high potential line VDD, and the cathode of the light-emitting device is connected to the low potential line VSS.

[0075] It should be noted that the data signal lines connected to the switching transistor T2 in different sub-pixels are different. This application only uses one of them as an example for illustration.

[0076] In this embodiment, the high potential line VDD is used to provide a constant high voltage level to the pixel driving circuit PL, and the low potential line VSS is used to provide a constant low voltage level to the pixel driving circuit.

[0077] In this embodiment, the switching transistor T2, driving transistor T1, compensation transistor T3, first reset transistor T4, second reset transistor T7, first light-emitting transistor T5, and second light-emitting transistor T6 can be either P-type transistors or N-type transistors; for example, in this application, the switching transistor T2, driving transistor T1, second reset transistor T7, third reset transistor T8, first light-emitting transistor T5, second light-emitting transistor T6, compensation transistor T3, and first reset transistor T4 are all P-type transistors.

[0078] In this embodiment, the first electrode can be either the source or the drain, and the second electrode can be either the source or the drain.

[0079] It should be noted that the compensation transistor T3 and the first reset transistor T4 in this application can each be composed of two transistors connected in series, so as to reduce the leakage current of the compensation transistor T3 and the first reset transistor T4.

[0080] It should be noted that, for the sake of simplifying the structure, this application will... Figure 6 The structure excluding the driving transistor T1 constitutes the driving unit DM. Please refer to [link / reference] for details. Figure 5 The structure.

[0081] Please see Figure 5 The storage circuit SL includes a first control transistor T11 and an energy storage capacitor Csl. The first electrode of the first control transistor T11 is electrically connected to the anode of the light-emitting device EL. The first plate of the energy storage capacitor Csl is electrically connected to the second electrode of the first control transistor T11. The second plate of the energy storage capacitor Csl is electrically connected to the cathode of the light-emitting device EL.

[0082] exist Figure 5 In the structure, the light-emitting device EL is configured to be in a non-light-emitting state, the first control transistor T11 is turned on, the light-emitting device EL converts external light or light emitted by adjacent light-emitting devices EL into electrical energy, and transmits it to the two plates of the energy storage capacitor Csl to charge the energy storage capacitor Csl.

[0083] The light-emitting device EL is configured to emit light. If the energy stored in the energy storage capacitor Csl is sufficient to provide the driving current required for the light-emitting device EL to emit light, then the first control transistor T11 is turned on, the energy storage capacitor Csl discharges, and provides driving current to the light-emitting device EL. If the energy stored in the energy storage capacitor Csl is insufficient to provide the driving current required for the light-emitting device EL to emit light, then the first control transistor T11 is turned on, and the pixel driving circuit PL and the energy storage capacitor Csl simultaneously provide driving current to the light-emitting device EL. If no energy is stored in the energy storage capacitor Csl, the first control transistor T11 is turned off, and the pixel driving circuit PL provides driving current to the light-emitting device EL.

[0084] Please see Figure 7 The storage circuit SL further includes a voltage monitoring unit 80, one end of which is electrically connected to the first plate of the energy storage capacitor Csl, and the other end of which is electrically connected to the second electrode of the first control transistor T11.

[0085] In this embodiment, the voltage detection unit is used to detect the capacitance in the energy storage capacitor Csl in real time; for example, the voltage detection unit transmits the capacitance in the energy storage capacitor Csl to the timing controller, and the timing controller controls the conduction and cutoff of the first control transistor T11 through the capacitance in the energy storage capacitor Csl.

[0086] Please see Figure 8 The storage circuit SL further includes a second control transistor T12, the first electrode of which is electrically connected to the first plate of the energy storage capacitor Csl, and the second electrode of which is electrically connected to the pixel driving circuit PL of the adjacent sub-pixel PX.

[0087] exist Figure 8 In the structure, the plurality of sub-pixels PX may include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3, and each sub-pixel PX may include an appendix. Figure 7 The structure in.

[0088] In this embodiment, the light-emitting device EL of the first sub-pixel PX1 emits red light, the light-emitting device EL of the second sub-pixel PX2 emits green light, and the light-emitting device EL of the third sub-pixel PX3 emits blue light.

[0089] The technical solution of this application will be described below using the first sub-pixel PX1 and the second sub-pixel PX2 as examples.

[0090] The light-emitting device EL of the first sub-pixel PX1 is configured to be in a non-light-emitting state, the light-emitting device EL of the second sub-pixel PX2 is configured to be in a non-light-emitting state, the first control transistor T11 of the first sub-pixel PX1 and the second sub-pixel PX2 is turned on, the second control transistor T12 of the first sub-pixel PX1 and the second sub-pixel PX2 is turned off, and the energy storage capacitor Csl of the first sub-pixel PX1 and the second sub-pixel PX2 is charged.

[0091] The first sub-pixel PX1's light-emitting device EL is configured to be in a non-light-emitting state, and the second sub-pixel PX2's light-emitting device EL is configured to be in a light-emitting state. The first control transistor T11 of the first sub-pixel PX1 is turned off, and the second control transistor T12 of the first sub-pixel PX1 is turned on. The energy storage capacitor Csl of the first sub-pixel PX1 and the second sub-pixel PX2 discharges and provides driving current to the light-emitting device EL of the second sub-pixel PX2; or, the first control transistor T11 of the first sub-pixel PX1 is turned on, and the second control transistor T12 of the first sub-pixel PX1 is turned off. The energy storage capacitor Csl of the second sub-pixel PX2 discharges and provides driving current to the light-emitting device EL of the second sub-pixel PX2. The energy storage capacitor Csl of the first sub-pixel PX1 is continuously charged.

[0092] The light-emitting device EL of the first sub-pixel PX1 is configured to be in a light-emitting state, and the non-light-emitting device EL of the second sub-pixel PX2 is configured to be in a light-emitting state. The first control transistor T11 of the first sub-pixel PX1 is turned on, and the second control transistor T12 of the first sub-pixel PX1 is turned off. The energy storage capacitor Csl of the first sub-pixel PX1 is discharged and provides driving current to the light-emitting device EL of the first sub-pixel PX1. The first control transistor T11 of the second sub-pixel PX2 is turned on, and the energy storage capacitor Csl of the second sub-pixel PX2 is continuously charged.

[0093] The light-emitting device EL of the first sub-pixel PX1 is configured to be in a light-emitting state, the light-emitting device EL of the second sub-pixel PX2 is configured to be in a light-emitting state, the first control transistor T11 of the first sub-pixel PX1 and the second sub-pixel PX2 is turned off, the second control transistor T12 of the first sub-pixel PX1 and the second sub-pixel PX2 is turned off, and the energy storage capacitor Csl of the first sub-pixel PX1 and the second sub-pixel PX2 is discharged to provide driving current to the corresponding light-emitting device EL.

[0094] It should be noted that when the light-emitting device EL in the sub-pixel PX is configured to emit light, the pixel driving circuit PL in the sub-pixel PX can be adaptively turned on according to the capacitance value of the energy storage capacitor Csl. For example, taking the first sub-pixel PX1 and the second sub-pixel PX2 as examples, when the first sub-pixel PX1 is configured to emit light, and the energy storage capacitor Csl in the first sub-pixel PX1 or / and the energy storage capacitor Csl in the second sub-pixel PX2 meets the driving current required for the light-emitting device EL of the first sub-pixel PX1 to emit light, the pixel driving circuit PL in the first sub-pixel PX1 can be in a non-working state, which is equivalent to the driving transistor being turned off. When the energy storage capacitor Csl in the first sub-pixel PX1 or / and the energy storage capacitor Csl in the second sub-pixel PX2 meets the driving current required for the light-emitting device EL of the first sub-pixel PX1 to emit light, the pixel driving circuit PL in the first sub-pixel PX1 can be in a working state, which is equivalent to the driving transistor being turned on, so as to provide the driving current required for the light-emitting device EL to emit light.

[0095] In this embodiment, since the luminous efficiency of different color sub-pixels PX is different, for example, the luminous efficiency of blue light-emitting device ELb is lower than that of red light-emitting device ELr and green light-emitting device ELg, in order to ensure the consistency of the luminous efficiency of each sub-pixel PX, the area of ​​blue light-emitting device EL can be increased.

[0096] Since the blue light-emitting device ELb has the largest area, it can absorb the most light, thus enabling it to output higher electrical energy. This application can increase the area of ​​the energy storage capacitor Csl in the third sub-pixel PX3, thereby increasing the capacitance of the energy storage capacitor Csl in the third sub-pixel PX3. This makes the capacitance of the energy storage capacitor Csl in the third sub-pixel PX3 greater than the capacitance of the energy storage capacitor Csl in the second sub-pixel PX2, and the capacitance of the energy storage capacitor Csl in the third sub-pixel PX3 greater than the capacitance of the energy storage capacitor Csl in the first sub-pixel PX1.

[0097] It should be noted that this application also proposes a display device, which includes the aforementioned display panel, and the display device of this application can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator.

[0098] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0099] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0100] In the above embodiments, the structures shown in the accompanying drawings are only schematic diagrams, and the specific structure of the display panel of this application is based on the description in the specification.

[0101] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.

[0102] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A display panel, characterized in that, The sub-pixel includes multiple sub-pixels, each sub-pixel including a pixel driving circuit, a light-emitting device connected to the pixel driving circuit, and a storage circuit connected to the light-emitting device and the pixel driving circuit, the storage circuit including: A first control transistor, wherein the first electrode of the first control transistor is electrically connected to the anode of the light-emitting device; An energy storage capacitor, wherein the first plate of the energy storage capacitor is electrically connected to the second electrode of the first control transistor, and the second plate of the energy storage capacitor is electrically connected to the cathode of the light-emitting device; The second control transistor has its first electrode electrically connected to the first plate of the energy storage capacitor, and its second electrode electrically connected to the pixel driving circuit of the adjacent sub-pixel. In one configuration, the light-emitting device is configured to be in a non-light-emitting state, the pixel driving circuit is configured to be in a non-operating state, and the light-emitting device charges the storage circuit; in another configuration, the light-emitting device is configured to be in a light-emitting state, and the pixel driving circuit and / or the storage circuit provides driving current to the light-emitting device. The plurality of sub-pixels include a first sub-pixel and a second sub-pixel. The light-emitting device of the first sub-pixel is configured to be in a non-light-emitting state, and the light-emitting device of the second sub-pixel is configured to be in a light-emitting state. The first control transistor of the first sub-pixel is turned off, the second control transistor of the first sub-pixel is turned on, and the energy storage capacitor of the first sub-pixel discharges and provides driving current to the light-emitting device of the second sub-pixel.

2. The display panel according to claim 1, characterized in that, When the light-emitting device is configured to be in a non-light-emitting state, the first control transistor is turned on, and the light-emitting device charges the energy storage capacitor. The light-emitting device is configured to emit light, the first control transistor is turned on, the energy storage capacitor is discharged and provides driving current to the light-emitting device; Alternatively, when the light-emitting device is configured to emit light, the first control transistor is turned off, and the pixel driving circuit provides driving current to the light-emitting device; Alternatively, the light-emitting device is configured to emit light, the first control transistor is turned on, and the pixel driving circuit and the energy storage capacitor simultaneously provide driving current to the light-emitting device.

3. The display panel according to claim 2, characterized in that, The storage circuit also includes: A voltage monitoring unit, one end of which is electrically connected to the first plate of the energy storage capacitor, and the other end of which is electrically connected to the second electrode of the first control transistor.

4. The display panel according to claim 2, characterized in that, The plurality of sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel, wherein the light-emitting device of the first sub-pixel emits red light, the light-emitting device of the second sub-pixel emits green light, and the light-emitting device of the third sub-pixel emits blue light. Wherein, the capacitance of the energy storage capacitor in the third sub-pixel is greater than the capacitance of the energy storage capacitor in the second sub-pixel, and the capacitance of the energy storage capacitor in the third sub-pixel is greater than the capacitance of the energy storage capacitor in the first sub-pixel.

5. The display panel according to any one of claims 1 to 4, characterized in that, The material of the light-emitting device includes direct bandgap semiconductors.

6. The display panel according to claim 5, characterized in that, The light-emitting device includes an anode layer, a hole-functional layer, a light-emitting layer, an electron-functional layer, and a cathode layer stacked together. The direct bandgap semiconductor is located in one of the hole functional layer, the light-emitting layer, and the electron functional layer.

7. The display panel according to claim 6, characterized in that, The hole functional layer includes a hole injection layer and a hole transport layer, and the electron functional layer includes an electron injection layer and an electron transport layer. The direct bandgap semiconductor is located within the light-emitting layer, and the LUMO energy level barrier of the hole transport layer is smaller than that of the light-emitting layer, while the LUMO energy level barrier of the electron transport layer is larger than that of the light-emitting layer.

8. The display panel according to claim 7, characterized in that, The absolute value of the difference between the LUMO energy level barrier of the hole transport layer and the LUMO energy level barrier of the light-emitting layer is 0.2 eV to 0.4 eV, and the absolute value of the difference between the LUMO energy level barrier of the electron transport layer and the LUMO energy level barrier of the light-emitting layer is 0.2 eV to 0.4 eV.

9. A display device, characterized in that, The display device includes a display panel as described in any one of claims 1 to 8.

Citation Information

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