Wafer resistor

Abstract

A chip resistor includes a substrate, first to fourth electrodes, a resistive layer, a resin electrode layer, first and second insulating protective layers, and first and second external electrode layers. The front side of the substrate includes opposing first and second edge regions. The first and second electrodes are respectively disposed on portions of the first and second edge regions. The resistive layer extends from the first electrode to the second electrode. The first insulating protective layer completely covers the resistive layer. The resin electrode layer includes first to third portions that respectively cover the first electrode, the second electrode, and the first insulating protective layer on the resistive layer. The second insulating protective layer completely covers the third portion and partially covers the first and second portions. The third and fourth electrodes are disposed on the back side of the substrate. The first and second external electrode layers are respectively connected to the first and third electrodes and the second and fourth electrodes. The resin electrode layers protect the first and second electrodes from environmental moisture and sulfur, allow for electroplating connections of the external electrodes, and contribute to heat dissipation and metallic waterproofing of the chip resistor.

Description

Technical Field

[0001] This disclosure relates to a passive component, and more particularly to a chip resistor. Background Technology

[0002] Traditional wafer resistors mainly consist of a pair of electrodes and a resistive layer spanning between them. Traditional wafer resistors utilize laser cutting or photolithography to alter the current path within the resistive layer. According to Ohm's law, the longer the current path, the greater the resistance. Currently, given the same resistive material, there are generally two methods to increase the resistance value of a wafer resistor. The first method is to reduce the thickness of the resistive layer, and the second method is to increase the number of laser cuts or use photolithography to increase the winding pattern of the resistive layer.

[0003] Increasing the resistance of a chip resistor by reducing the thickness of the resistive layer may result in an excessively thin resistive layer, leading to a decrease in the product's power handling capacity and weather resistance. Consequently, the chip resistor is more susceptible to failure due to electrostatic discharge (ESD) or damage from voltage surges.

[0004] If a wire-wound pattern is added to the resistive layer, the thickness of the resistive layer must first be increased before the wire-wound pattern is created using laser or etching. Furthermore, increasing the number of cuts results in the spacing between the wires in the resistive layer's wire-wound pattern becoming too close, for example, with a linewidth <7μm. In this case, the thermal effect of laser processing will affect the resistive layer itself, thus impacting the stability of the wafer's electrical performance. On the other hand, using photolithography and etching processes makes it difficult to achieve fine linewidths, and the cost is far higher than laser processing.

[0005] Furthermore, chip resistors have rated power and maximum operating voltage specifications indicated in their datasheets. This specification means that when the product's resistance value exceeds a certain threshold, the product specification applies only to the maximum operating voltage, not the rated power. To increase the withstand voltage of a product at the same rated power, the current path of the resistive layer needs to be increased, requiring more bends in the resistive layer's circuitry to lower the potential on the resistive layer's lines, thereby reducing the voltage drop per unit length. However, according to Ohm's law, increasing the current path of the resistive layer shortens the cross-sectional area of ​​the current path, leading to a decrease in the product's power stability. Summary of the Invention

[0006] Therefore, one object of this disclosure is to provide a chip resistor that reduces the size of the first and second electrodes on the front side of the substrate to increase the area of ​​the resistive layer covering the front side of the substrate. This allows the resistive layer to have more space to be designed with more bends, thereby increasing the resistance value and reducing the voltage difference per unit length of the resistor.

[0007] Another objective of this disclosure is to provide a chip resistor in which the first and second portions of the resin electrode layer protect the internal first and second electrodes from the effects of environmental moisture and sulfur, and allow for external electrode electroplating connections. The third portion, located above the resistive layer, facilitates heat dissipation and metallic waterproofing of the chip resistor.

[0008] According to the above-mentioned objectives of this disclosure, a chip resistor is provided, comprising a substrate, a first electrode, a second electrode, a resistive layer, a first insulating protective layer, a resin electrode layer, a second insulating protective layer, a third electrode, a fourth electrode, a first external electrode layer, and a second external electrode layer. The substrate includes a front side and a back side. The front side includes a first edge region and a second edge region opposite to each other. The first electrode and the second electrode are respectively disposed on portions of the first edge region and portions of the second edge region. The resistive layer is disposed on the front side and extends from the first electrode to the second electrode. The first insulating protective layer completely covers the resistive layer. The resin electrode layer includes a first portion, a second portion, and a third portion. The first portion covers the first electrode and portions of the first insulating protective layer adjacent to the first electrode. The second portion covers the second electrode and portions of the first insulating protective layer adjacent to the second electrode. The third portion covers portions of the first insulating protective layer on the resistive layer. The first portion, the second portion, and the third portion are separated from each other. The second insulating protective layer completely covers the third portion and partially covers the first and second portions. The third electrode and the fourth electrode are disposed on the back side and are opposite to the first electrode and the second electrode, respectively. The first external electrode layer extends from the first electrode through a first side of the substrate to the third electrode. The second external electrode layer extends from the second electrode through the second side of the substrate to the fourth electrode.

[0009] According to one embodiment of this disclosure, both the first electrode and the second electrode comprise a first segment, a second segment, and a third segment. The first segment and the second segment are respectively joined to opposite ends of the third segment and protrude from the third segment. The third segments of the first electrode and the second electrode extend along one side of the first side and one side of the second side, respectively. The first electrode has a C-shaped structure, and the second electrode has an inverted C-shaped structure.

[0010] According to one embodiment of the present disclosure, the lengths of the first and second segments are greater than about 50 μm and less than about 250 μm, and the length of the third segment is greater than about 50 μm and less than about 150 μm.

[0011] According to one embodiment of this disclosure, both the first electrode and the second electrode are rectangular structures, and extend toward the second edge region and the first edge region, respectively. The lengths of both the first and second electrodes are greater than about 50 μm and less than about 250 μm, and their widths are both greater than about 50 μm and less than about 200 μm.

[0012] According to one embodiment of this disclosure, the first electrode and the second electrode are located at opposite corners on the front side. The resistive layer has a first U-shaped groove and a second U-shaped groove, which respectively expose a portion of the first electrode and a portion of the second electrode. The front end of the first electrode is spaced apart from the inner side surface of the first U-shaped groove, and the front end of the second electrode is spaced apart from the inner side surface of the second U-shaped groove.

[0013] According to one embodiment of the present disclosure, the distances between the first electrode and the second electrode and the long side of the adjacent front surface are both greater than or equal to 0 μm and less than about 250 μm.

[0014] According to one embodiment of the present disclosure, the materials of the first electrode and the second electrode are copper, copper-nickel alloy, nickel-phosphorus alloy, or sintered silver paste containing silver and glass, and the materials of the third electrode and the fourth electrode are epoxy resin and silver.

[0015] According to one embodiment of the present disclosure, the material of the resistive layer is a nickel-chromium alloy, a copper-nickel alloy, a nickel-chromium-silicon alloy, a nickel-chromium-aluminum alloy, a nickel-chromium-aluminum-silicon alloy, a nickel-chromium-aluminum-yttrium alloy, a nickel-chromium-tantalum-molybdenum alloy, tantalum nitride, a copper-manganese-tin alloy, or a copper-manganese-nickel alloy.

[0016] According to one embodiment of the present disclosure, the material of the first insulating protective layer is silicon oxide, tantalum oxide, or silicon nitride, and the material of the second insulating protective layer is epoxy resin, polyimide (PI), or resin.

[0017] According to one embodiment of this disclosure, the material of the resin electrode layer is epoxy resin and silver. Attached Figure Description

[0018] A better understanding of the features disclosed herein can be obtained from the following detailed description taken in conjunction with the accompanying drawings. It should be noted that, according to industry standard practice, the features are not drawn to scale. In fact, the dimensions of the features can be arbitrarily increased or decreased for clarity of discussion.

[0019] Figures 1A to 1I This is a schematic diagram illustrating the fabrication process of a chip resistor according to one embodiment of the present disclosure.

[0020] Figure 2 This is a schematic diagram illustrating the arrangement of a first electrode, a second electrode, and a resistive layer in a wafer resistor according to another embodiment of the present disclosure. Detailed Implementation

[0021] The embodiments of this disclosure are discussed in detail below. However, it will be understood that the embodiments provide many applicable concepts that can be implemented in a wide variety of specific situations. The embodiments discussed and disclosed are for illustrative purposes only and are not intended to limit the scope of this disclosure. All embodiments of this disclosure reveal a variety of different features, but these features can be implemented individually or in combination as needed.

[0022] Furthermore, the terms "first," "second," etc., used in this article do not specifically refer to order or sequence; they are merely used to distinguish elements or operations described using the same technical terms.

[0023] The spatial relationship between the two elements described in this disclosure applies not only to the orientation shown in the accompanying drawings, but also to orientations not shown in the drawings, such as inverted orientations. Furthermore, the terms "connection," "electrical connection," or similar expressions used in this disclosure to refer to two components are not limited to a direct or electrical connection, but may also include indirect or electrical connections as needed.

[0024] Please refer to Figures 1A to 1I This is a schematic diagram illustrating the fabrication process of a chip resistor 100 according to one embodiment of the present disclosure. Figure 1I As shown, the chip resistor 100 may mainly include a substrate 110, a first electrode 120, a second electrode 130, a resistive layer 140, a first insulating protective layer 150, a resin electrode layer 160, a second insulating protective layer 170, a third electrode 180, a fourth electrode 190, a first external electrode layer 200, and a second external electrode layer 210.

[0025] When fabricating the chip resistor 100, a substrate 110 can be provided first. The substrate 110 can be a planar structure. For example, such as... Figure 1A As shown, the substrate 110 can be a rectangular flat plate structure, with a length L and a width W. For example... Figure 1I As shown, substrate 110 has a front side 112 and a back side 114 facing each other, and a first side side 116 and a second side side 118 facing each other, wherein the first side side 116 and the second side side 118 are bonded between the front side 112 and the back side 114. Both the front side 112 and the back side 114 may be planar. The front side 112 of substrate 110 includes a first edge region 112a and a second edge region 112b facing each other. Specifically, the first edge region 112a and the second edge region 112b are located on opposite sides of substrate 110 along the length L direction. Both the first edge region 112a and the second edge region 112b are rectangular regions. Substrate 110 may be a ceramic substrate. For example, the material of substrate 110 may be alumina, aluminum nitride, boron nitride, silicon carbide, or a glass-containing material.

[0026] Next, as Figure 1AAs shown, a first electrode 120 and a second electrode 130 can be formed on the first edge region 112a and the second edge region 112b of the front side 112 of the substrate 110, respectively, using printing or sputtering methods. The first electrode 120 and the second electrode 130 are formed only on a portion of the first edge region 112a and a portion of the second edge region 112b, respectively. That is, the area occupied by the first electrode 120 and the second electrode 130 on the front side 112 of the substrate 110 is reduced compared to the front electrode of a conventional resistor.

[0027] For example, please also refer to Figure 1A and Figure 1I The first electrode 120 may include a first segment 122, a second segment 124, and a third segment 126, and the second electrode 130 may include a first segment 132, a second segment 134, and a third segment 136. The third segment 126 of the first electrode 120 extends along one side 116a of the first side surface 116, and the third segment 136 of the second electrode 130 extends along one side 118a of the second side surface 118. The first segment 122 and the second segment 124 of the first electrode 120 are respectively joined to opposite ends of the third segment 126 and protrude from the third segment 126 toward the second edge region 112b. The first segment 132 and the second segment 134 of the second electrode 130 are respectively joined to opposite ends of the third segment 136 and protrude from the third segment 136 toward the first edge region 112a. The first electrode 120 may be mirror-symmetrical to the second electrode 130. For example, the first electrode 120 has a C-shaped structure and the second electrode 130 has an inverted C-shaped structure.

[0028] like Figure 1A As shown, the first segment 122 and the second segment 124 of the first electrode 120, and the first segment 132 and the second segment 134 of the second electrode 130, each have a length L1. The third segment 126 of the first electrode 120 and the third segment 136 of the second electrode 130 each have a length L2 and a width W1. In some embodiments, the length L1 is greater than about 50 μm and less than about 250 μm, and the length L2 is greater than about 50 μm and less than about 150 μm. Furthermore, the materials of the first electrode 120 and the second electrode 130 can be low-resistivity materials, such as copper, copper-nickel alloys, nickel-phosphorus alloys, or sintered silver paste containing silver and glass. The first electrode 120 and the second electrode 130 can be an integrally formed structure.

[0029] Next, please refer to Figure 1B and Figure 1C The resistive layer 140 can be fabricated. In some embodiments, a peelable shielding layer 220 can be formed on the front side 112 of the substrate 110 to shield the coating. The shielding layer 220 can shield areas of the front side 112 that are not intended to have the resistive layer 140 formed. The shielding layer 220 shields a portion of the first electrode 120 and a portion of the second electrode 130. Figure 1B As shown, for example, the shielding layer 220 can completely shield the first segment 122 and the second segment 124 of the first electrode 120, and the first segment 132 and the second segment 134 of the second electrode 130, and partially shield the third segments 126 and 136, while exposing a portion of the third segments 126 and 136. For example, the material of the shielding layer 220 is a removable ink or photoresist. The shielding layer 220 can be formed using, for example, printing or photolithography.

[0030] Next, a resistive material layer can be formed, for example, by sputtering, onto the front side 112 of the substrate 110 and the shielding layer 220. Subsequently, the shielding layer 220 is removed by solvent or water washing. Figure 1C As shown, when the shielding layer 220 is removed, the resistive material on the shielding layer 220 is also removed, and a resistive layer 140 with a preset pattern is formed on the front side 112 of the substrate 110. The resistive layer 140 extends from the first electrode 120 to the second electrode 130 and is in contact with and electrically connected to the first electrode 120 and the second electrode 130. For example, the material of the resistive layer 140 can be a nickel-chromium alloy, copper-nickel alloy, nickel-chromium-silicon alloy, nickel-chromium-aluminum alloy, nickel-chromium-aluminum-silicon alloy, nickel-chromium-aluminum-yttrium alloy, nickel-chromium-tantalum-molybdenum alloy, tantalum nitride, copper-manganese-tin alloy, or copper-manganese-nickel alloy, etc. Other suitable resistive materials may be used in this disclosure, and are not limited thereto.

[0031] By reducing the electrode space, the area of ​​the resistive layer 140 covering the front side 112 of the substrate 110 can be increased. This allows the resistive layer 140 to have more space to design more bending curves, thereby increasing the resistance value of the chip resistor 100 and reducing the voltage difference per unit length of the resistive layer 140. The electrode length of a conventional resistor is typically 1 / 6 to 1 / 4 of the long side length of the substrate, and the resistive region length is typically 1 / 2 to 2 / 3 of the long side length of the substrate. In this embodiment, the electrode length of the chip resistor 100 can be shortened by 50% compared to the electrode length of a conventional resistor, while the resistive region length can be increased by 15%. Based on 0402, i.e., a length of 0.4 mm and a width of 0.2 mm, the basic operating voltage of a single resistor product can be increased from 50V to over 60V.

[0032] Next, the resistance value can be selectively adjusted according to the product requirements of the chip resistor 100. In some embodiments, such as Figure 1D As shown, the resistive layer 140 is patterned using laser or physical processing methods to adjust the resistance value of the wafer resistor 100.

[0033] After completing the resistance adjustment of the 100Ω chip resistor, as follows: Figure 1EAs shown, a first insulating protective layer 150 is formed on the front side 112 of the substrate 110 using sputtering or chemical vapor deposition. The first insulating protective layer 150 completely covers the resistive layer 140 and covers a portion of the third segment 126 of the first electrode 120 and a portion of the third segment 136 of the second electrode 130. In some embodiments, the material of the first insulating protective layer 150 is silicon oxide, tantalum oxide, or silicon nitride.

[0034] Next, a conductive resin electrode layer 160 is formed using, for example, a printing method. In some embodiments, such as... Figure 1F As shown, the resin electrode layer 160 includes a first portion 162, a second portion 164, and a third portion 166, wherein the first portion 162, the second portion 164, and the third portion 166 are physically separated from each other. The first portion 162 covers the first electrode 120 and the portion of the first insulating protective layer 150 adjacent to the first electrode 120. The second portion 164 covers the second electrode 130 and the portion of the first insulating protective layer 150 adjacent to the second electrode 130. The first portion 162 and the second portion 164 can be connected to the first electrode 120 and the second electrode 130, respectively. By setting the first portion 162 and the second portion 164, the first electrode 120 and the second electrode 130 can be protected from the influence of environmental moisture and sulfur, and the connection of external electrode electroplating can be achieved simultaneously. The third portion 166 is located between the first portion 162 and the second portion 164 and covers a portion of the first insulating protective layer 150 on the resistive layer 140. The third part 166 is disposed above the resistive layer 140, which can improve the heat dissipation performance of the chip resistor 100 and provide metallic waterproofing. In some embodiments, the resin electrode layer 160 is made of epoxy resin and silver.

[0035] Subsequently, as Figure 1G As shown, a second insulating protective layer 170 is formed using, for example, a printing method. The second insulating protective layer 170 completely covers the third portion 166 of the resin electrode layer 160 and partially covers the first portion 162 and the second portion 164 of the resin electrode layer 160. For example, the material of the second insulating protective layer 170 may be epoxy resin, polyimide, or resin.

[0036] Next, as Figure 1H As shown, the third electrode 180 and the fourth electrode 190 can be formed on the back side 114 of the substrate 110, for example, by printing. The third electrode 180 and the fourth electrode 190 are respectively opposite to the first electrode 120 and the second electrode 130. The shapes of the third electrode 180 and the fourth electrode 190 may be different from or the same as the shapes of the first electrode 120 and the second electrode 130. For example, the materials of the third electrode 180 and the fourth electrode 190 may be epoxy resin and silver.

[0037] Next, as Figure 1I As shown, a first external electrode layer 200 and a second external electrode layer 210 can be used to fabricate a wafer resistor 100. The first external electrode layer 200 extends from the first electrode 120 on the front side 112 of the substrate 110, through the first side 116 of the substrate 110, to the third electrode 180 on the back side 114. The second external electrode layer 210 extends from the second electrode 130 on the front side 112, through the second side 118 of the substrate 110, to the fourth electrode 190 on the back side 114. In some embodiments, the first external electrode layer 200 covers the first electrode 120 and the third electrode 180 to form a C-shaped structure; and the second external electrode layer 210 covers the second electrode 130 and the fourth electrode 190 to form an inverted C-shaped structure.

[0038] In some embodiments, a nickel-chromium layer is first formed on the first side 116 and the second side 118 of the substrate 110 using, for example, sputtering, to serve as a side connection layer. Then, a nickel layer and a tin layer are formed sequentially using, for example, electroplating, or a nickel layer, a copper layer, another nickel layer, and a tin layer are formed sequentially. Therefore, the first external electrode layer 200 and the second external electrode layer 210 may include a nickel-chromium layer, a nickel layer, and a tin layer stacked sequentially, or a nickel-chromium layer, a nickel layer, a copper layer, another nickel layer, and a tin layer stacked sequentially.

[0039] The electrode and resistor configuration of the chip resistor disclosed herein can be designed differently. Please refer to... Figure 2 This is a schematic diagram illustrating the arrangement of a first electrode 120a, a second electrode 130a, and a resistive layer 140a in a wafer resistor 100a according to another embodiment of this disclosure. In this embodiment, the first electrode 120a and the second electrode 130a are respectively disposed on a portion of a first edge region 112a and a portion of a second edge region 112b on the front side 112 of the substrate 110. Therefore, the area occupied by the first electrode 120a and the second electrode 130a on the front side 112 of the substrate 110 is reduced compared to the front electrode of a conventional resistor.

[0040] In some embodiments, the first electrode 120a and the second electrode 130a are located at opposite corners of the front surface 112 of the substrate 110. Both the first electrode 120a and the second electrode 130a are rectangular structures. The first electrode 120a extends toward the second edge region 112b. The second electrode 130a extends toward the first edge region 112a. Both the first electrode 120a and the second electrode 130a have a length L3 and a width W2. Furthermore, the first electrode 120a has a distance D between it and the adjacent long side 112c of the front surface 112, and the second electrode 130a also has a distance D between it and the adjacent long side 112d of the front surface 112. In some embodiments, the length L3 is greater than about 50 μm and less than about 250 μm, the width W2 is greater than about 50 μm and less than about 200 μm, and the distance D is greater than or equal to 0 μm and less than about 250 μm.

[0041] like Figure 2 As shown, the resistive layer 140a has a first U-shaped groove CA1 and a second U-shaped groove CA2 located at opposite corners of the resistive layer 140a. The first U-shaped groove CA1 is located on the first electrode 120a, exposing a portion of the first electrode 120a. The second U-shaped groove CA2 is located on the second electrode 130a, exposing a portion of the second electrode 130a. The first U-shaped groove CA1 is spaced by a length L4 between itself and the adjacent short side 112e of the front surface 112 along the length of the first electrode 120a, and has a length L5 along the length of the first electrode 120a. Similarly, the second U-shaped groove CA2 is spaced by a length L4 between itself and the adjacent short side 112f of the front surface 112 along the length of the second electrode 130a, and has a length L5 along the length of the second electrode 130a. The length L5 is greater than the difference between the lengths L3 and L4. That is, the front end 120a' of the first electrode 120a is separated from the inner side CA1' of the first U-shaped groove CA1, and the front end 130a' of the second electrode 130a is separated from the inner side CA2' of the second U-shaped groove CA2.

[0042] As can be seen from the above embodiments, one advantage of this disclosure is that the first and second electrodes on the front side of the wafer resistor reduction substrate increase the area of ​​the resistive layer covering the front side of the substrate. This allows the resistive layer to have more space to be designed with more bends, thereby increasing the resistance value and reducing the voltage difference per unit length of the resistor.

[0043] Another advantage of this disclosure is that the first and second portions of the resin electrode layer of the chip resistor can protect the internal first and second electrodes from the effects of environmental moisture and sulfur, and can be connected to external electrodes for electroplating. The third portion, located above the resistive layer, helps the chip resistor dissipate heat and provide metallic waterproofing.

[0044] Although this disclosure has been illustrated above with reference to embodiments, it is not intended to limit this disclosure. Any person skilled in the art may make various modifications and refinements without departing from the spirit and scope of this disclosure. Therefore, the scope of protection of this disclosure shall be determined by the appended claims.

[0045] [Symbol Explanation]

[0046] 100: Chip Resistor

[0047] 100A: Chip Resistor

[0048] 110:Substrate

[0049] 112: Front

[0050] 112a: First Edge Region

[0051] 112b: Second Edge Region

[0052] 112c: Long side

[0053] 112d: Long side

[0054] 112e: Short side

[0055] 112f: Short side

[0056] 114: Back

[0057] 116: First side view

[0058] 116a: Edge

[0059] 118: Second side view

[0060] 118a: Edge

[0061] 120: First electrode

[0062] 120a: First electrode

[0063] 120a': Frontend

[0064] 122: First paragraph

[0065] 124: Second paragraph

[0066] 126: Third paragraph

[0067] 130: Second electrode

[0068] 130a: Second electrode

[0069] 130a': Frontend

[0070] 132: First paragraph

[0071] 134: Second paragraph

[0072] 136: Third paragraph

[0073] 140: Resistive layer

[0074] 140a: Resistive layer

[0075] 150: First insulating protective layer

[0076] 160: Resin electrode layer

[0077] 162: Part One

[0078] 164: Part Two

[0079] 166: Part Three

[0080] 170: Second insulating protective layer

[0081] 180: Third electrode

[0082] 190: Fourth electrode

[0083] 200: First outer electrode layer

[0084] 210: Second outer electrode layer

[0085] 220: Shielding layer

[0086] CA1: First U-shaped groove

[0087] CA1': Inner side

[0088] CA2: Second U-shaped groove

[0089] CA2': Inner side

[0090] D: Distance

[0091] L: Length

[0092] L1: Length

[0093] L2: Length

[0094] L3: Length

[0095] L4: Length

[0096] L5: Length

[0097] W: Width

[0098] W1: Width

[0099] W2: Width.

Claims

1. A wafer resistor, characterized in that, The chip resistor contains: A substrate comprising a front side and a back side, wherein the front side comprises a first edge region and a second edge region opposite to each other; The first electrode and the second electrode are respectively disposed on a portion of the first edge region and a portion of the second edge region; A resistive layer is disposed on the front side and extends from the first electrode to the second electrode; The first insulating protective layer completely covers the resistive layer; A resin electrode layer, wherein the resin electrode layer comprises: The first part is the portion covering the first electrode and the portion of the first insulating protective layer adjacent to the first electrode; The second part is the portion that covers the second electrode and the portion of the first insulating protective layer adjacent to the second electrode; as well as The third part is the portion that covers the first insulating protective layer on the resistive layer, wherein the first part, the second part, and the third part are separate from each other; The second insulating protective layer completely covers the third part and partially covers the first part and the second part; The third and fourth electrodes are disposed on the back side and are respectively opposite to the first and second electrodes; A first external electrode layer extends from the first electrode, across a first side surface of the substrate, to the third electrode; and The second external electrode layer extends from the second electrode, through the second side of the substrate, to the fourth electrode. Each of the first electrode and the second electrode has a rectangular structure, and the first electrode and the second electrode extend toward the second edge region and the first edge region, respectively. The first electrode and the second electrode are located at two diagonal angles on the front side, and the resistive layer has a first U-shaped groove and a second U-shaped groove that expose a portion of the first electrode and a portion of the second electrode, respectively. The front end of the first electrode is separated from the inner side of the first U-shaped groove, and the front end of the second electrode is separated from the inner side of the second U-shaped groove.

2. The wafer resistor according to claim 1, characterized in that, The distance between each of the first electrode and the second electrode and the long side of the adjacent front surface is greater than or equal to 0 μm and less than 250 μm.

3. The wafer resistor according to claim 1, characterized in that, The first electrode and the second electrode are made of copper, copper-nickel alloy, nickel-phosphorus alloy, or sintered silver paste containing silver and glass, and the third electrode and the fourth electrode are made of epoxy resin and silver.

4. The wafer resistor according to claim 1, characterized in that, The resistive layer is made of nickel-chromium alloy, copper-nickel alloy, nickel-chromium-silicon alloy, nickel-chromium-aluminum alloy, nickel-chromium-aluminum-silicon alloy, nickel-chromium-aluminum-yttrium alloy, nickel-chromium-tantalum-molybdenum alloy, tantalum nitride, copper-manganese-tin alloy, or copper-manganese-nickel alloy.

5. The wafer resistor according to claim 1, characterized in that, The first insulating protective layer is made of silicon oxide, tantalum oxide, or silicon nitride, and the second insulating protective layer is made of polyimide or resin.

6. The wafer resistor according to claim 1, characterized in that, The resin electrode layer is made of epoxy resin and silver.

7. A wafer resistor, characterized in that, The chip resistor contains: A substrate comprising a front side and a back side, wherein the front side comprises a first edge region and a second edge region opposite to each other; The first electrode and the second electrode are respectively disposed on a portion of the first edge region and a portion of the second edge region; A resistive layer is disposed on the front side and extends from the first electrode to the second electrode; The first insulating protective layer completely covers the resistive layer; A resin electrode layer, wherein the resin electrode layer comprises: The first part is the portion covering the first electrode and the portion of the first insulating protective layer adjacent to the first electrode; The second part is the portion that covers the second electrode and the portion of the first insulating protective layer adjacent to the second electrode; as well as The third part is the portion that covers the first insulating protective layer on the resistive layer, wherein the first part, the second part, and the third part are separate from each other; The second insulating protective layer completely covers the third part and partially covers the first part and the second part; The third and fourth electrodes are disposed on the back side and are respectively opposite to the first and second electrodes; A first external electrode layer extends from the first electrode, across a first side surface of the substrate, to the third electrode; and The second external electrode layer extends from the second electrode, through the second side of the substrate, to the fourth electrode. Each of the first electrode and the second electrode includes a first segment, a second segment, and a third segment. The first segment and the second segment are respectively joined to opposite ends of the third segment and protrude from the third segment. The third segment of the first electrode and the third segment of the second electrode extend along one side of the first side and one side of the second side, respectively. The first electrode has a C-shaped structure, and the second electrode has an inverted C-shaped structure.

8. The wafer resistor according to claim 7, characterized in that, The length (L1) of each of the first and second segments of the first electrode and the first and second segments of the second electrode is greater than 50 μm and less than 250 μm, and the length (L2) of each of the third segment of the first electrode and the third segment of the second electrode is greater than 50 μm and less than 150 μm.

9. The wafer resistor according to claim 7, characterized in that, The first electrode and the second electrode are made of copper, copper-nickel alloy, nickel-phosphorus alloy, or sintered silver paste containing silver and glass, and the third electrode and the fourth electrode are made of epoxy resin and silver.

10. The wafer resistor according to claim 7, characterized in that, The resistive layer is made of nickel-chromium alloy, copper-nickel alloy, nickel-chromium-silicon alloy, nickel-chromium-aluminum alloy, nickel-chromium-aluminum-silicon alloy, nickel-chromium-aluminum-yttrium alloy, nickel-chromium-tantalum-molybdenum alloy, tantalum nitride, copper-manganese-tin alloy, or copper-manganese-nickel alloy.

11. The wafer resistor according to claim 7, characterized in that, The first insulating protective layer is made of silicon oxide, tantalum oxide, or silicon nitride, and the second insulating protective layer is made of polyimide or resin.

12. The wafer resistor according to claim 7, characterized in that, The resin electrode layer is made of epoxy resin and silver.

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