Semiconductor device and electronic apparatus
By setting anti-warping parts under the plastic seal, the deformation stress of the plastic seal at high temperature is balanced, and the problem of chips with packaging sizes greater than 20*20mm warping at high temperature is solved, the welding quality is improved and short circuits and dummy welding is avoided.
Patent Information
- Application Number
- CN202311447493.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-01
- Publication Date
- 2025-05-06
AI Technical Summary
Chips with package sizes greater than 20*20mm will undergo severe warping at high temperatures, affecting the welding quality and leading to welding short circuits and dummy welding problems.
A warp-proof member is provided under the plastic seal. The anti-warp-proof member generates a force opposite to the deformation stress of the plastic seal, so as to balance the deformation stress of the plastic seal at high temperatures, thereby avoiding chip warping.
It effectively avoids chip warping caused by thermal expansion and contraction stress, improves chip welding quality, and avoids the problems of welding short circuit and dummy welding.
Smart Images
Figure CN119943767A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a semiconductor device and an electronic device. Background Art
[0002] At present, chips with a package size larger than 20*20mm will experience severe warping at high temperatures, which will affect the welding quality of the chip and cause chip welding short circuits and cold solder joints. Summary of the invention
[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one purpose of the present invention is to provide a semiconductor device, which can prevent the chip from warping due to the stress of thermal expansion and contraction by arranging an anti-warping member under the plastic package, thereby no longer affecting the welding quality of the chip and avoiding the problems of chip welding short circuit and cold solder joint.
[0004] In order to solve the above problems, an embodiment of the first aspect of the present invention provides a semiconductor device, comprising: a substrate; a chip, the chip being located on the substrate; an anti-warping member, the anti-warping member being located on the substrate; a plastic package, the plastic package being located on the substrate and embedding the chip and the anti-warping member; the anti-warping member being used to generate a force along the extension direction of the plastic package and opposite to the deformation stress of the plastic package.
[0005] According to the semiconductor device of the embodiment of the present invention, an anti-warping component is arranged on the substrate to manufacture the plastic package, and the anti-warping component generates a force opposite to the deformation stress of the plastic package and acts on the plastic package, thereby balancing the deformation stress generated by the plastic package at high temperature. Therefore, the semiconductor device in the present application avoids the problem of chip warping caused by the stress of thermal expansion and contraction by adding the anti-warping component, thereby no longer affecting the welding quality of the chip, and avoiding the problems of chip welding short circuit and cold soldering.
[0006] In some embodiments, the anti-warping member is located beside the chip and close to the chip.
[0007] In some embodiments, the anti-warping member is located around the chip.
[0008] In some embodiments, the anti-warping member is a metal strip or a plurality of metal wires arranged side by side.
[0009] In some embodiments, the metal bar is a copper bar or a gold bar, and the metal wire is a copper wire or a gold wire.
[0010] In some embodiments, at least one welding spot is provided on the substrate, and at least one welding spot is used for welding the anti-warping member.
[0011] In some embodiments, at least one of the solder joints is in plurality, and the plurality of solder joints are spaced apart around the chip.
[0012] In some embodiments, the substrate includes a first side and a second side opposite to each other, and the substrate also includes a third side and a fourth side opposite to each other; four welding points are respectively arranged along the first side and the second side, and three welding points are respectively arranged along the third side and the fourth side.
[0013] In some embodiments, the weld is an aluminum sheet.
[0014] In some embodiments, the package size of the semiconductor device is greater than 20 mm×20 mm.
[0015] In some embodiments, the package size of the semiconductor device is 25.3 mm×22.6 mm, the thickness of the anti-warping member is 20 um, and the width of the anti-warping member is 2 mm.
[0016] A second aspect of the present invention provides an electronic device, characterized in that it includes the semiconductor device described in the above embodiment.
[0017] According to the electronic device of the embodiment of the present invention, through the semiconductor device of the above embodiment, an anti-warping member can be set under the plastic package to avoid the problem of chip warping caused by the stress of thermal expansion and contraction, thereby no longer affecting the welding quality of the chip and avoiding the problems of chip welding short circuit and cold solder joint.
[0018] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:
[0020] Figure 1 is a schematic diagram of a semiconductor device according to an embodiment of the present invention;
[0021] Figure 2 is a schematic diagram of chip warpage changing with temperature according to an embodiment of the present invention;
[0022] Figure 3 is a structural block diagram of an electronic device according to an embodiment of the present invention.
[0023] Reference numerals:
[0024] Electronic device 20; semiconductor device 10;
[0025] Substrate 1; chip 2; anti-warping member 3; solder joint 4. DETAILED DESCRIPTION
[0026] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.
[0027] In order to solve the above problems, the first embodiment of the present invention provides a semiconductor device. By using the semiconductor device, an anti-warping part can be set under the plastic package to avoid the problem of chip warping caused by the stress of thermal expansion and contraction, thereby no longer affecting the welding quality of the chip, and avoiding the problems of chip welding short circuit and cold solder joints.
[0028] Reference below Figure 1 A semiconductor device 10 according to an embodiment of the present invention is described. Figure 1 As shown, the semiconductor device 10 includes: a substrate 1, a chip 2, an anti-warping member 3 and a plastic package.
[0029] Among them, the chip is located on the substrate 1; the anti-warping member 3 is located on the substrate 1; the plastic package is located on the substrate 1 and embeds the chip and the anti-warping member 3; the anti-warping member 3 is used to generate a force along the extension direction of the plastic package and opposite to the deformation stress of the plastic package.
[0030] Specifically, at present, chips with a package size greater than 20*20mm will experience serious warping at high temperatures, thereby affecting the welding quality of the chip and causing chip welding short circuits and cold solder joints. In order to solve this problem, in the present application, an anti-warping member 3 is arranged on the substrate 1 to generate a force along the extension direction of the plastic package and opposite to the deformation stress of the plastic package, and the force is applied to the anti-warping member 3 to balance the deformation stress of the plastic package at high temperatures, thereby avoiding the problem of chip warping caused by the stress of thermal expansion and contraction, and thus no longer affecting the welding quality of the chip, and avoiding the problem of chip welding short circuits and cold solder joints. That is to say, since the substrate 1 contains copper, which will generate a force on the plastic package, an anti-warping member 3 is arranged on the substrate 1, and then a plastic package is manufactured on the substrate 1 to embed the chip and the anti-warping member 3, and the anti-warping member 3 is closely attached to the plastic package, thereby preventing the plastic package from deforming under high temperature conditions, so that the chip will not warp under the action of the plastic package, and thus no longer affecting the welding quality of the chip, and avoiding the problem of chip welding short circuits and cold solder joints.
[0031] According to the semiconductor device 10 of the embodiment of the present invention, an anti-warping component 3 is arranged on the substrate 1 to manufacture the plastic package. The anti-warping component 3 generates a force opposite to the deformation stress of the plastic package and acts on the plastic package, thereby balancing the deformation stress generated by the plastic package at high temperature. Therefore, the semiconductor device 10 in the present application avoids the problem of chip warping caused by the stress of thermal expansion and contraction by adding the anti-warping component 3, and no longer affects the welding quality of the chip, thereby avoiding the problems of chip welding short circuit and cold soldering.
[0032] In some embodiments, the anti-warping member 3 is located beside and close to the chip 2 to generate a force along the extension direction of the plastic package and opposite to the deformation stress of the plastic package, thereby preventing the plastic package from deforming under high temperature conditions, so that the chip will not warp under the action of the plastic package, and will no longer affect the welding quality of the chip, avoiding the problem of chip welding short circuit and cold soldering.
[0033] In some embodiments, the anti-warping member 3 is located around the chip 2 to generate a force along the extension direction of the plastic package and opposite to the deformation stress of the plastic package, thereby preventing the plastic package from deforming under high temperature conditions, so that the chip will not warp under the action of the plastic package, and will no longer affect the welding quality of the chip, avoiding the problem of chip welding short circuit and cold soldering.
[0034] In some embodiments, the anti-warping member 3 is a metal strip or a plurality of metal wires arranged side by side.
[0035] Exemplarily, the plastic package may be EMC (Epoxy Molding Compound). Since the coefficient of thermal expansion (CTE) of EMC and the coefficient of thermal expansion of substrate 1 do not match under high temperature conditions, that is, when the thermal expansion coefficient is large, the expansion is large at high temperature, and different thermal expansion coefficients cause different thermal expansion coefficients, the chip may warp.
[0036]
[0037] Table 1
[0038] As shown in Table 1, when the temperature is greater than the glass transition temperature, the value of α2 needs to be referred to. The actual reflow temperature will reach about 260°C. At this time, the thermal expansion coefficient of EMC at high temperature is 34ppm / c, while the thermal expansion coefficient of copper, the main component of substrate 1, is 17ppm / c, the thermal expansion coefficient of core (inner layer board) is 6ppm / c, and the thermal expansion coefficient of prepreg (prepreg material) is 9ppm / c. The equivalent thermal expansion coefficient will not be higher than 17ppm / C, which will cause EMC to expand more than substrate 1 at high temperatures such as 260°C, resulting in warping. In addition,
[0039] As shown in Table 1, the CTE of copper is nearly 17ppm / C smaller than that of EMC. Adding copper wire at a higher position and replacing part of the EMC with copper will reduce the equivalent CTE of the upper layer of the EMC, so that the CTE of the EMC and the substrate will be closer, thereby reducing warpage.
[0040] In order to solve the above problems, in the present application, an anti-warping member 3, i.e., a metal wire or a metal strip, is added under the EMC, and the metal wire or the metal strip is close to the EMC, so that the equivalent thermal expansion coefficient of the upper layer of the EMC is reduced, thereby causing the thermal expansion coefficient of the EMC to be close to the thermal expansion coefficient of the substrate 1, i.e., reducing the expansion difference, so as to reduce the warpage of the chip. At the same time, the copper contained in the upper layer of the EMC will enhance the rigidity of the upper layer of the EMC, making it less likely to deform. Thus, by adding a metal wire or a metal strip near the surface of the EMC to adjust the equivalent CTE and Young's modulus of the EMC part, the CTE is more matched with the substrate 1, thereby improving the warpage of the chip. In addition, it should be noted that the metal wire or the metal strip is made close to the plastic package, i.e., the top of the EMC, by wire bonding.
[0041] In some embodiments, the metal strip is a copper strip or a gold strip, and the metal wire is a copper wire or a gold wire, without limitation.
[0042] Specifically, in the related art, a copper sheet is added to the upper surface of the plastic package to prevent the chip from warping, but the cost of this method is high, and the copper sheet is not grounded, which leads to poor electrostatic compatibility and electromagnetic interference. In order to solve this problem, in this application, an anti-warping member 3, that is, a metal strip or a metal wire is arranged under the plastic package layer, that is, a copper strip or a gold strip or a copper wire or a gold wire is arranged under the plastic package layer and grounded to increase the copper and gold content near the surface of the plastic package, and a copper strip or a gold strip or a copper wire or a gold wire is arranged under the plastic package layer in close contact with the plastic package, thereby avoiding the problem of chip warping caused by the stress of thermal expansion and contraction. At the same time, since the anti-warping member 3 is grounded, the problem of poor electrostatic compatibility and electromagnetic interference can also be avoided, and the cost is low and does not affect the appearance and height of the chip.
[0043] For example, a copper sheet with a thickness of 20um and a width of 2mm is added to the upper surface of the plastic package at a position of 5mm, and a copper wire is arranged under the plastic package layer. The chip size is 25.3*22.6mm. The simulation data comparison is as follows.
[0044] 25℃ 150℃ 260℃ Copper Sheet -6um -171um 149um Copper wire -5um -154um 99um
[0045] Table 2
[0046] It can be seen from the data in Table 2 that the improvement in warpage when copper wires are arranged under the plastic encapsulation layer in the present application is greater than the improvement in warpage when a copper sheet is added to the upper surface of the plastic encapsulation. For example, at 150°C, the improvement in warpage when copper wires are arranged is 17 um compared to the improvement when copper sheets are arranged. Therefore, compared to the method of improving chip warpage by adding a copper sheet to the upper surface of the plastic encapsulation, the copper wires are arranged under the plastic encapsulation layer in the present application, which has a better effect of preventing chip warpage and a lower cost.
[0047]
[0048] Table 3
[0049] like Figure 2 The curve of the warpage of the old version chip corresponding to the temperature change is a, and the curve of the warpage of the new version chip corresponding to the temperature change is b. Figure 2 It can be seen that the warping improvement of the new version chip using the anti-warping member 3 is lower than that of the old version chip. Therefore, in the present application, copper wire is arranged under the plastic packaging layer to better prevent the chip from warping, and effectively improve high-temperature warping and warping near the glass transition temperature.
[0050] In some embodiments, Figure 1 As shown, at least one welding spot 4 is provided on the substrate 1, and the at least one welding spot 4 is used to weld the anti-warping member 3, for example, the anti-warping member 3 is bonded to the welding spot 4 of the substrate 1 by ultrasonic vibration friction.
[0051] In some embodiments, at least one solder joint 4 is multiple, and multiple solder joints 4 are arranged at intervals around the chip to provide solder joints 4 for the anti-warping member 3. Exemplarily, when the anti-warping member 3 is a metal wire, multiple metal wires are provided with solder joints 4. It should be noted that the more metal wires there are and the thicker the metal wires are, and the closer to the chip surface as possible, the better the anti-warping effect of the chip. In addition, the longer the metal wire, the steeper and shorter the slope of the solder joints 4 connecting the two metal wires.
[0052] In some embodiments, Figure 1As shown, the substrate 1 includes a first side L1 and a second side L2 that are opposite to each other, and the substrate 1 also includes a third side L3 and a fourth side L4 that are opposite to each other, four solder joints 4 are arranged at intervals along the first side L1 and the second side L2, and three solder joints 4 are arranged along the third side L3 and the fourth side L4. Thus, the anti-warping member 3 is welded on the four sides of the substrate 1 through a plurality of solder joints 4, thereby preventing the problem of deformation of the plastic sealing member under high temperature, so that the chip will not be warped under the action of the plastic sealing member, and thus will no longer affect the welding quality of the chip, thereby avoiding the problem of chip welding short circuit and cold solder joint.
[0053] In some embodiments, the solder joint 4 is an aluminum sheet, and the thickness and size of the aluminum sheet can be adjusted according to the chip size to provide the solder joint 4 for the anti-warping member 3. In addition, the addition of the aluminum sheet can provide a solder joint for additional bonding wires.
[0054] In some embodiments, the package size of the semiconductor device 10 is greater than 20mm╳20mm. By setting an anti-warping member 3 under the plastic packaging layer, the semiconductor device 10 with a package size greater than 20*20mm can be prevented from serious warping at high temperatures, thereby no longer affecting the welding quality of the chip and avoiding the problems of chip welding short circuit and cold soldering.
[0055] In some embodiments, the package size of the semiconductor device 10 is 25.3 mm×22.6 mm, the thickness of the anti-warping member 3 is 20 um, and the width of the anti-warping member 3 is 2 mm.
[0056] A second aspect of the present invention provides an electronic device, such as Figure 3 As shown, the electronic device 20 includes the semiconductor device 10 of the above embodiment.
[0057] According to the electronic device 20 of the embodiment of the present invention, through the semiconductor device 10 of the above embodiment, the anti-warping part 3 can be set under the plastic package to avoid the problem of chip warping caused by the stress of thermal expansion and contraction, thereby no longer affecting the welding quality of the chip, and avoiding the problems of chip welding short circuit and cold solder joint.
[0058] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.
[0059] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.
Claims
1. A semiconductor device, characterized in that: include: substrate; A chip, wherein the chip is located on the substrate; an anti-warping member, the anti-warping member being located on the substrate; A plastic package, which is located on the substrate and embeds the chip and the anti-warping component; The anti-warping component is used to generate a force along the extension direction of the plastic packaging component and opposite to the deformation stress of the plastic packaging component.
2. The semiconductor device according to claim 1, wherein: The anti-warping member is located beside the chip and close to the chip.
3. The semiconductor device according to claim 1, wherein: The anti-warping member is located around the chip.
4. The semiconductor device according to any one of claims 1 to 3, characterized in that: The anti-warping member is a metal strip or a plurality of metal wires arranged side by side.
5. The semiconductor device according to claim 4, characterized in that The metal bar is a copper bar or a gold bar, and the metal wire is a copper wire or a gold wire.
6. The semiconductor device according to any one of claims 1 to 3, characterized in that: At least one welding spot is arranged on the substrate, and at least one welding spot is used for welding the anti-warping component.
7. The semiconductor device according to claim 6, characterized in that At least one of the soldering points is multiple, and the multiple soldering points are arranged at intervals around the chip.
8. The semiconductor device according to claim 7, characterized in that The substrate comprises a first side and a second side opposite to each other, and the substrate further comprises a third side and a fourth side opposite to each other; Four welding spots are arranged at intervals along the first side and the second side, respectively, and three welding spots are arranged along the third side and the fourth side, respectively.
9. The semiconductor device according to claim 6, characterized in that The welding point is an aluminum sheet.
10. The semiconductor device according to claim 8, characterized in that The package size of the semiconductor device is greater than 20 mm×20 mm.
11. The semiconductor device according to claim 10, characterized in that The package size of the semiconductor device is 25.3 mm×22.6 mm, the thickness of the anti-warping member is 20 um, and the width of the anti-warping member is 2 mm.
12. An electronic device, characterized in that: A semiconductor device comprising any one of claims 1 to 11.