Embedded device heat dissipation substrate laminated mounting structure and preparation method thereof

Abstract

The invention, which relates to the field of the semiconductor packaging structure, discloses a pre-embedded device heat dissipation substrate laminated mounting structure and a preparation method therefor, comprising a first substrate, an intermediate substrate and a second substrate which are arranged in a laminated manner; the device further comprises a heat dissipation cover and a pre-embedded inductor. The embedded inductor is wrapped in the intermediate substrate; the heat dissipation cover is connected with the intermediary substrate and covers the second substrate; a first connector is arranged in the first substrate, an intermediate connector is arranged in the intermediate substrate, and a second connector is arranged in the second substrate; the intermediary substrate realizes the connection of the first connector and the second connector through the intermediary connector; and the intermediary substrate also realizes the connection of the pre-embedded inductor and the first connector through the intermediary connector. According to the invention, the pre-embedded inductor, the intermediate connector and the heat dissipation cover are all integrated on the intermediate substrate, so that the device is highly integrated; the embedded inductor is wrapped in the intermediary substrate, so that the packaging difficulty of the device is reduced; the medium substrate can dissipate heat through the body and the heat dissipation cover, so that the energy consumption is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging structures, and in particular to a pre-embedded device heat dissipation substrate stacking mounting structure and a preparation method thereof. Background Art

[0002] SMT-LGA (Ball Grid Array) packaging structure, referred to as LGA packaging structure, is a packaging structure in which integrated circuits use an organic substrate. Metal contacts are used to replace traditional pin pins, and the metal contacts are connected to the contacts on the motherboard to achieve electrical connection between the chip and the motherboard.

[0003] In the prior art, when the SMT-LGA packaging structure is used to package the inductor, a customized copper connector is required. Specifically, the copper connector and the inductor are sandwiched between two substrates, and the packaged overall device is supported by the inductor and the copper connector in the middle of the two substrates, and the two substrates are interconnected by the copper connector. The packaging structure requires that the error between the welding thickness of the copper connector and the welding thickness of the inductor cannot exceed ±200um, otherwise the size thickness of the overall device will exceed the standard; since the interconnection between the two substrates is only achieved through the copper connector, the copper connector cannot be damaged. If the copper connector is damaged during subsequent use, the overall device will be scrapped; the heat generated by the inductor is in the middle of the two layers of substrates, which will cause the overall device to have poor thermal conductivity.

[0004] Therefore, we need a new semiconductor packaging structure to solve the problems of high heat dissipation energy consumption and high packaging difficulty in existing semiconductor packaging technology. Summary of the invention

[0005] The present invention provides a pre-embedded device heat dissipation substrate stacking mounting structure and a preparation method thereof, which solves the problems of high heat dissipation energy consumption and great packaging difficulty in the existing semiconductor packaging technology.

[0006] In order to achieve the above object, the present invention adopts the following technical scheme:

[0007] In a first aspect, the present invention provides a pre-embedded device heat dissipation substrate stacking mounting structure, comprising a first substrate, an intermediate substrate and a second substrate arranged in a stacked manner; further comprising a heat dissipation cover and a pre-embedded inductor;

[0008] The embedded inductor is coated inside the intermediate substrate;

[0009] The heat dissipation cover is connected to the intermediate substrate and is disposed outside the second substrate;

[0010] A first connector is arranged in the first substrate, an intermediate connector is arranged in the intermediate substrate, and a second connector is arranged in the second substrate;

[0011] The intermediate substrate realizes the connection between the first connector and the second connector through the intermediate connector; the intermediate substrate also realizes the connection between the embedded inductor and the first connector through the intermediate connector.

[0012] In a possible implementation, an IC chip and circuit components connected to the second connector are disposed on a side of the second substrate away from the intermediate substrate;

[0013] A side of the IC chip away from the second substrate is connected to the heat dissipation cover.

[0014] In a possible implementation, an inductor mounting hole is provided on the intermediate substrate, the embedded inductor is arranged in the inductor mounting hole, and an ABF adhesive layer is filled between the outside of the embedded inductor and the inductor mounting hole.

[0015] In a possible implementation manner, a solder paste layer is provided between the first connector and the intermediate connector, and between the intermediate connector and the second connector.

[0016] In a possible implementation, a thermosetting adhesive layer is provided between the first substrate and the intermediate substrate, and between the intermediate substrate and the second substrate, and the thermosetting adhesive layer and the solder paste layer are spaced apart in the same layer.

[0017] In a possible implementation, a heat dissipation adhesive layer is provided between the IC chip and the heat dissipation cover.

[0018] In a possible implementation manner, the heat dissipation adhesive layer is a non-conductive adhesive layer with a thermal conductivity greater than 3 W / (m·K).

[0019] In a possible implementation manner, an adhesive layer is provided between the heat dissipation cover and the intermediate substrate.

[0020] In a second aspect, the present invention provides a method for preparing a pre-embedded device heat dissipation substrate stacking structure based on any one of the above items, the method comprising:

[0021] An inductor mounting hole is opened on the intermediate substrate, an embedded inductor is placed in the middle of the inductor mounting hole, ABF glue is filled between the outside of the embedded inductor and the inductor mounting hole, and the intermediate connector in the intermediate substrate is subjected to sputtering, wiring, lamination, exposure, development exposure, sputtering, etching, and coating to obtain an intermediate substrate coated with the embedded inductor;

[0022] Adhere an intermediate substrate coated with a pre-embedded inductor between the first substrate and the second substrate; connect the intermediate connector of the intermediate substrate and the first connector of the first substrate, and connect the intermediate connector of the intermediate substrate and the second connector of the second substrate through solder paste; connect the intermediate substrate and the first substrate, and the intermediate substrate and the second substrate through thermosetting adhesive;

[0023] The heat dissipation cover is arranged outside the second substrate, and the opening end of the heat dissipation cover is bonded to a side of the intermediate substrate away from the first substrate.

[0024] In a possible implementation, before bonding the intermediate substrate coated with the embedded inductor between the first substrate and the second substrate, the method further includes:

[0025] An IC chip and circuit components are mounted on one side of the second substrate; the IC chip and the circuit components are both connected to the second connector of the second substrate, the intermediate substrate is located on the side of the second substrate where the IC chip and the circuit components are not mounted, and the side of the IC chip away from the second substrate is bonded to the heat dissipation cover by heat dissipation adhesive.

[0026] The embedded device heat dissipation substrate stacked mounting structure provided by the embodiment of the present invention utilizes an intermediate substrate to integrate the embedded inductor, the intermediate connector and the heat dissipation cover into a substrate, so that the first substrate and the second substrate can be connected to each other, thereby realizing the high integration of semiconductor devices. The embedded inductor is coated in the intermediate substrate, and the first substrate and the second substrate are connected through the intermediate connector buried in the intermediate substrate; that is, the present invention utilizes the thickness of the intermediate substrate itself to embed the embedded inductor, and utilizes the intermediate connector buried in the intermediate substrate to replace the copper connector in the traditional SMT-LGA packaging structure, which can not only solve the problem that the copper connector is easily damaged when directly exposed to the air, but also solve the problem that the existing SMT-LGA packaging structure has high packaging precision requirements, thereby reducing the difficulty of packaging semiconductor devices. The present invention also utilizes the good thermal conductivity of metal to dissipate the heat of the semiconductor device during operation to the metal surface through the intermediate substrate and the heat dissipation cover, thereby increasing the heat dissipation capacity of the packaged device and reducing energy consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 A schematic diagram of a structure for packaging an inductor using an existing SMT-LGA packaging structure;

[0028] Figure 2 A schematic structural diagram of a pre-embedded device heat dissipation substrate stacking structure provided by an embodiment of the present invention;

[0029] Figure 3A flowchart of the steps of a method for preparing a pre-embedded device heat dissipation substrate stacking mounting structure provided by an embodiment of the present invention;

[0030] Figure 4 A schematic diagram of a structure in which an inductor mounting hole is provided on an intermediate substrate in a method for preparing a pre-embedded device heat dissipation substrate stacking mounting structure provided by an embodiment of the present invention;

[0031] Figure 5 A schematic diagram of a method for preparing a pre-embedded device heat dissipation substrate stacked mounting structure provided by an embodiment of the present invention, wherein a first adhesive film is attached to the back of an intermediate substrate and a pre-embedded inductor is arranged in an inductor mounting hole;

[0032] Figure 6 A schematic diagram of a structure in which ABF glue is filled in an inductor mounting hole of an intermediate substrate in a method for preparing a pre-embedded device heat dissipation substrate stacking mounting structure provided by an embodiment of the present invention;

[0033] Figure 7 A schematic diagram of the structure of an intermediate substrate coated with a pre-embedded inductor obtained by sputtering, wiring, laminating, exposing, developing and exposing, sputtering, etching, and coating an intermediate substrate in a method for preparing a pre-embedded device heat dissipation substrate stacked mounting structure provided by an embodiment of the present invention;

[0034] Figure 8 A schematic diagram of a structure in which a second adhesive film is attached to the soldering pins on the front side of an intermediate substrate in a method for preparing a pre-embedded device heat dissipation substrate stacking structure provided by an embodiment of the present invention;

[0035] Fig. 9 A schematic structural diagram of an intermediate substrate after the second adhesive film is removed after sputtering treatment in a method for preparing a pre-embedded device heat dissipation substrate stacking structure provided by an embodiment of the present invention;

[0036] Fig.10 A schematic diagram of the structure of a second substrate after mounting IC chips and circuit components in a method for preparing a pre-embedded device heat dissipation substrate stacking structure provided by an embodiment of the present invention;

[0037] Fig.11 A schematic diagram of a structure in which a second substrate is mounted on an intermediate substrate in a method for preparing a pre-embedded device heat dissipation substrate stacking structure provided by an embodiment of the present invention;

[0038] Fig.12 A schematic diagram of a structure for mounting a heat dissipation cover on an intermediate substrate in a method for preparing a pre-embedded device heat dissipation substrate stacking structure provided by an embodiment of the present invention;

[0039] Fig.13A schematic structural diagram of an overall device prepared by a method for preparing a pre-embedded device heat dissipation substrate stacking structure provided by an embodiment of the present invention.

[0040] Reference numerals and descriptions:

[0041] 11. Substrate; 12. Copper connector; 13. Inductor;

[0042] 21. First substrate; 22. Intermediate substrate; 23. Second substrate; 24. Heat dissipation cover; 25. Embedded inductor; 26. First connector; 27. Intermediate connector; 28. Second connector; 29. ​​IC chip; 210. Circuit components; 211. Inductor mounting hole; 212. ABF adhesive layer; 213. Solder paste layer; 214. Thermosetting adhesive layer; 215. Heat dissipation adhesive layer; 216. Adhesive layer; 217. First adhesive film; 218. Second adhesive film; 219. Sputtering layer. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0044] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "multiple" means two or more. In addition, the use of "based on" or "according to" means openness and inclusiveness, because the process, steps, calculations or other actions "based on" or "according to" one or more of the conditions or values ​​may be based on additional conditions or values ​​beyond the described values ​​in practice.

[0045] like Figure 1 As shown, the conventional SMT-LGA packaging structure includes a substrate 11, a copper connector 12 and an inductor 13. There are two substrates 11, which are respectively arranged on both sides of the inductor 13, and the copper connector 12 is arranged between the two substrates 11 and arranged side by side on the left side of the inductor 13, and is respectively connected to the circuits in the two substrates 11 for conducting the two substrates 11.

[0046] The packaging structure requires that the error between the welding thickness of the copper connector 12 and the welding thickness of the inductor 11 cannot exceed ±200um, otherwise the size and thickness of the overall device will exceed the standard.

[0047] Since the interconnection between the two substrates 11 is only achieved through the copper connector 12, the copper connector 12 cannot be damaged. If the copper connector 12 is damaged during subsequent use, the entire device will be scrapped.

[0048] The heat generated by the inductor 13 is between the two layers of the substrate 11, which will result in poor thermal conductivity of the entire device.

[0049] In order to solve the problems of high heat dissipation energy consumption and great packaging difficulty in the existing semiconductor packaging technology, an embodiment of the present invention provides a pre-embedded device heat dissipation substrate stacking mounting structure and a preparation method thereof.

[0050] like Figure 2 As shown, in the first aspect, an embodiment of the present invention provides a pre-embedded device heat dissipation substrate stacked mounting structure, including a stacked first substrate 21, an intermediate substrate 22 and a second substrate 23, and also includes a heat dissipation cover 24 and a pre-embedded inductor 25.

[0051] The embedded inductor 25 is wrapped inside the intermediate substrate 22 .

[0052] The thickness of the embedded inductor 25 cannot exceed the thickness of the intermediate substrate 22, so that the embedded inductor 25 can be wrapped inside the intermediate substrate by utilizing the space advantage of the internal thickness of the intermediate substrate 22, thereby reducing the scrap caused by the difference in welding thickness during the copper connector and inductor packaging process.

[0053] In this embodiment, in order to ensure that the intermediate substrate 22 can cover the embedded inductor 25, the thickness tolerance of the embedded inductor 25 needs to be kept below 50um, otherwise the thickness of the intermediate substrate 22 is not enough to bury the embedded inductor 25, which will cause the intermediate substrate 22 to be scrapped. Therefore, the embedded inductor 25 needs to be screened in advance.

[0054] The heat dissipation cover 24 is connected to the intermediate substrate 22 and covers the outside of the second substrate 23 .

[0055] The heat dissipation cover 24 is made of metal and connected to the intermediate substrate 22 , so as to transfer the heat in the intermediate substrate 22 to the heat dissipation cover 24 , thereby improving the heat dissipation capability of the packaged device.

[0056] A first connector 26 is disposed in the first substrate 21 , an intermediate connector 27 is disposed in the intermediate substrate 22 , and a second connector 28 is disposed in the second substrate 23 .

[0057] The interposer substrate 22 realizes the connection between the first connector 26 and the second connector 28 via the interposer connector 27 .

[0058] The intermediate substrate 22 also realizes the connection between the embedded inductor 25 and the first connector 26 through the intermediate connector 27 .

[0059] The first connector 26 is a connection line arranged in the first substrate 21 , the second connector 28 is a connection line arranged in the second substrate 23 , and the intermediate connector 27 is a connection line arranged in the intermediate substrate 22 .

[0060] The embedded device heat dissipation substrate stacking mounting structure provided by the embodiment of the present invention integrates the embedded inductor 25, the intermediate connector 27 and the heat dissipation cover 24 into one substrate by using the intermediate substrate 22, so that the first substrate 21 and the second substrate 23 can be mutually conductive, thereby realizing the high integration of semiconductor devices. The embedded inductor 25 is coated in the intermediate substrate 22, and the conductive connection between the first substrate 21 and the second substrate 23 is realized through the intermediate connector 27 embedded in the intermediate substrate 22.

[0061] That is to say, the present invention utilizes the thickness of the intermediate substrate 22 itself to embed the embedded inductor 25, and utilizes the intermediate connector 27 buried in the intermediate substrate 22 to replace the copper connector in the traditional SMT-LGA packaging structure, which not only solves the problem that the copper connector is easily damaged when directly exposed to the air, but also solves the problem of high packaging precision requirements of the existing SMT-LGA packaging structure, thereby reducing the packaging difficulty of semiconductor devices.

[0062] The present invention also utilizes the good thermal conductivity of metal to dissipate the heat generated during the operation of the semiconductor device to the metal surface through the intermediate substrate 22 and the heat dissipation cover 24, thereby increasing the heat dissipation capacity of the packaged device and reducing energy consumption.

[0063] Furthermore, an IC chip 29 and a circuit component 210 connected to the second connector 28 are disposed on a side of the second substrate 23 away from the intermediate substrate 22;

[0064] The side of the IC chip 29 away from the second substrate 23 is connected to the heat dissipation cover 24 .

[0065] Specifically, the present invention utilizes the good thermal conductivity of metal to dissipate the heat generated during the operation of the embedded inductor 25 and the IC chip 29 to the surface of the heat dissipation cover 24, thereby increasing the heat dissipation area of ​​the packaged device and reducing energy consumption.

[0066] Furthermore, an inductor mounting hole 211 is formed on the intermediate substrate 22 , the embedded inductor 25 is disposed in the inductor mounting hole 211 , and an ABF adhesive layer 212 is filled between the outside of the embedded inductor 25 and the inductor mounting hole 211 .

[0067] Specifically, the inductor mounting hole 211 is provided to facilitate the placement of the embedded inductor 25 inside the intermediate substrate 22 , and the ABF adhesive layer 212 is used to wrap the embedded inductor 25 and fill the inductor mounting hole 211 to prevent voids from appearing in the chip circuit layer, which would cause circuit oxidation and bridging and become scrapped.

[0068] Furthermore, a solder paste layer 213 is provided between the first connector 26 and the intermediate connector 27 , and between the intermediate connector 27 and the second connector 28 .

[0069] Specifically, the connection and conduction between the first connector 26 and the intermediate connector 27 , and between the intermediate connector 27 and the second connector 28 are achieved through the solder paste layer 213 .

[0070] Furthermore, a thermosetting adhesive layer 214 is disposed between the first substrate 21 and the intermediate substrate 22 , and between the intermediate substrate 22 and the second substrate 23 , and the thermosetting adhesive layer 214 and the solder paste layer 213 are spaced apart in the same layer.

[0071] Specifically, the first substrate 21 and the intermediate substrate 22, and the intermediate substrate 22 and the second substrate 23 are mounted by the thermosetting adhesive layer 214. The solder paste layer 213 and the thermosetting adhesive layer 214 can be cured in one furnace without separate baking, which simplifies the packaging process.

[0072] Furthermore, a heat dissipation adhesive layer 215 is provided between the IC chip 29 and the heat dissipation cover 24 .

[0073] The IC chip 29 is connected to the heat dissipation cover 24 via the heat dissipation adhesive layer 215 , so that the heat dissipation effect of the IC chip 29 can be improved.

[0074] Furthermore, the heat dissipation adhesive layer 215 is a non-conductive adhesive layer with a thermal conductivity greater than 3 W / (m·K).

[0075] Even if the non-conductive adhesive layer flows onto other devices, there will be no short circuit risk, thereby improving the safety performance of the packaged devices.

[0076] Furthermore, an adhesive layer 216 is disposed between the heat dissipation cover 24 and the intermediate substrate 22 .

[0077] Specifically, the heat dissipation cover 24 is bonded to the intermediate substrate 22 by forming an adhesive layer 216 with adhesive.

[0078] like Figure 3 As shown, in a second aspect, an embodiment of the present invention further provides a method for preparing a pre-embedded device heat dissipation substrate stacking structure based on any one of the above items, the method comprising the following steps:

[0079] Step 101, an inductor mounting hole 211 is opened on the intermediate substrate 22, the embedded inductor 25 is placed in the middle of the inductor mounting hole 211, ABF glue is filled between the outside of the embedded inductor 25 and the inductor mounting hole 211, and the intermediate connector 27 in the intermediate substrate 22 is sputtered, wired, laminated, exposed, developed, sputtered, etched, and plated to obtain the intermediate substrate 22 coated with the embedded inductor 25.

[0080] Step 102 : bonding the intermediate substrate 22 coated with the embedded inductor 25 between the first substrate 21 and the second substrate 23 .

[0081] The intermediate connector 27 of the intermediate substrate 22 and the first connector 26 of the first substrate 21 , as well as the intermediate connector 27 of the intermediate substrate 22 and the second connector 28 of the second substrate 23 are connected by solder paste.

[0082] The intermediate substrate 22 and the first substrate 21 , and the intermediate substrate 22 and the second substrate 23 are connected by thermosetting adhesive.

[0083] Step 103 , cover the heat dissipation cover 24 on the outside of the second substrate 23 , and bond the open end of the heat dissipation cover 24 to a side of the intermediate substrate 22 away from the first substrate 21 .

[0084] Furthermore, before bonding the intermediate substrate 22 coated with the embedded inductor 25 between the first substrate 21 and the second substrate 23, the method further includes:

[0085] An IC chip 29 and a circuit component 210 are mounted on one side of the second substrate 23 .

[0086] Among them, the IC chip 29 and the circuit components 210 are both connected to the second connector 28 of the second substrate 23, the intermediate substrate 22 is located on the side of the second substrate 23 where the IC chip 29 and the circuit components 210 are not mounted, and the side of the IC chip 29 away from the second substrate 23 is bonded to the heat dissipation cover 24 by heat dissipation glue.

[0087] Specifically, in step 101, first, Figure 4 As shown, connection wiring is arranged in the intermediate substrate 22 , and an inductor mounting hole 211 is opened in a reserved area of ​​the intermediate substrate 22 .

[0088] Secondly, if Figure 5 As shown, a first adhesive film 217 is attached to the back of the intermediate substrate 22 , and a pre-embedded inductor 25 is placed in the middle of the inductor mounting hole 211 .

[0089] Again, if Figure 6 As shown, ABF glue is poured into the inductor mounting hole 211 to form an ABF glue layer 212, so that there is no void in the intermediate substrate 22, and the circuit oxidation bridge is avoided and scrapped; the first glue film 217 is removed, and the ABF glue layer 212 on the back of the intermediate substrate 22 is thinned, so that the ABF glue layer 212 on the back of the intermediate substrate 22 is flush with the back of the intermediate substrate 22.

[0090] Furthermore, before removing the first adhesive film 217 , it is necessary to make the first adhesive film 217 non-sticky to prevent the sticky glue from adhering to the intermediate substrate 22 and causing the substrate to be scrapped.

[0091] After that, the intermediate substrate 22 is subjected to sputtering Cu / Ti treatment, and the connection wiring in the intermediate substrate 22 is subjected to sputtering, wiring, lamination, exposure, development exposure, sputtering, etching, and coating treatment to obtain a Figure 7 The intermediate substrate 22 shown encapsulates the embedded inductor 25 .

[0092] The intermediate substrate 22 is relatively fragile and cannot be rolled up during the subsequent packaging process. There cannot be serious pad damage on the substrate, otherwise it will cause damage to the substrate chip or circuit.

[0093] In order to protect the intermediate substrate 22 and extend the service life of the intermediate substrate 22, a green oil layer with a thickness of 15-20 um can be coated on the surface of the intermediate substrate 22. The green oil, also known as liquid photoresist, is an acrylic oligomer, which is usually coated on a printed circuit board PCB as a protective layer covering the circuits and substrates that do not need to be soldered, or used as a solder resist.

[0094] After that, if Figure 8 As shown, a second adhesive film 218 is attached to the surface of the interposer substrate 22 where the pins are soldered.

[0095] The place where the pins are welded on the surface of the intermediate substrate 22 is specifically the end of the intermediate connector that leaks out of the intermediate substrate.

[0096] The second adhesive film 218 is used to protect the film-attaching area of ​​the intermediate substrate 22 from being contaminated during the subsequent sputtering process, thereby ensuring that subsequent devices can be mounted normally.

[0097] Finally, the surface of the intermediate substrate 22 is subjected to a sputtering treatment to form a sputtering layer 219, and then the second adhesive film 218 on the surface of the intermediate substrate 22 is removed to obtain a Fig. 9 The illustrated example is an interposer substrate 22 encapsulating an embedded inductor 25 .

[0098] Furthermore, in the step of mounting the IC chip 29 and the circuit components 210 on one side of the second substrate 23, multiple groups of IC chips 29 and circuit components 210 are mounted on the front side of the second substrate 23, and then the entire mounted second substrate 23 is cut to obtain the following: Fig.10 The second substrate 23 is shown as a single body.

[0099] Further, in step 102, if Fig.11 As shown, solder paste is applied to the area on the surface of the intermediate substrate 22 where the intermediate connector 27 is exposed to form a solder paste layer 213; thermosetting glue is applied to the area on the surface of the intermediate substrate 22 where the intermediate connector 27 is not exposed to form a thermosetting glue layer 214; and the second substrate 23 is mounted on the front side of the intermediate substrate 22.

[0100] Among them, the solder paste and thermosetting glue can be cured in one furnace without the need for multiple baking.

[0101] Further, in step 103, if Fig.12 As shown, heat dissipation glue is coated on the surface of the IC chip 29 to form a heat dissipation glue layer 215; viscous glue is coated on the edge area of ​​the front side of the intermediate substrate 22 to form an adhesive layer, so that the opening of the heat dissipation cover 24 is connected to the intermediate substrate 22, and the bottom plate of the heat dissipation cover 24 is connected to the surface of the IC chip 29.

[0102] Further, in step 102, if Fig.13 As shown, solder paste and thermosetting adhesive are coated on the front side of the first substrate 21 , and the mounted intermediate substrate 22 , the second substrate 23 and the heat dissipation cover 24 are integrally bonded to the first substrate 21 .

[0103] The first substrate 21 is mainly used to match the product circuit with the connection port on the application-end PCB, that is, to play the role of rewiring.

[0104] The connection body of the first substrate 21 and the intermediate substrate 22 is cut according to the position of the second substrate 23 to obtain a packaged device unit.

[0105] The present invention adopts a vertical three-dimensional arrangement mode, utilizes the thickness of the intermediate substrate itself to embed the embedded inductor, utilizes the embedded wire in the intermediate substrate to replace the copper connector in the traditional packaging structure, thereby reducing the semiconductor device packaging process, solving a series of problems caused by the copper connector being directly exposed to the air, and reducing the scrap caused by the difference in welding thickness between the copper connector and the inductor; at the same time, utilizes the good thermal conductivity of the metal to dissipate the heat generated during the operation of the embedded inductor and the IC chip to the metal surface, thereby increasing the heat dissipation capacity of the packaged device and reducing the energy consumption of the packaged device.

[0106] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A pre-embedded device heat dissipation substrate stacking mounting structure, characterized in that: It comprises a first substrate (21), an intermediate substrate (22) and a second substrate (23) which are stacked; it also comprises a heat dissipation cover (24) and a pre-buried inductor (25); The embedded inductor (25) is coated inside the intermediate substrate (22); The heat dissipation cover (24) is connected to the intermediate substrate (22) and is arranged outside the second substrate (23); A first connector (26) is arranged inside the first substrate (21), an intermediate connector (27) is arranged inside the intermediate substrate (22), and a second connector (28) is arranged inside the second substrate (23); The intermediate substrate (22) realizes the connection between the first connector (26) and the second connector (28) through the intermediate connector (27); the intermediate substrate (22) also realizes the connection between the embedded inductor (25) and the first connector (26) through the intermediate connector (27).

2. The pre-embedded device heat dissipation substrate stacking mounting structure according to claim 1, characterized in that: An IC chip (29) and circuit components (210) connected to the second connector (28) are arranged on a side of the second substrate (23) away from the intermediate substrate (22); The side of the IC chip (29) away from the second substrate (23) is connected to the heat dissipation cover (24).

3. The pre-embedded device heat dissipation substrate stacking mounting structure according to claim 1, characterized in that: An inductor mounting hole (211) is provided on the intermediate substrate (22), the embedded inductor (25) is arranged in the inductor mounting hole (211), and an ABF adhesive layer (212) is filled between the outside of the embedded inductor (25) and the inductor mounting hole (211).

4. The pre-embedded device heat dissipation substrate stacking mounting structure according to claim 1, characterized in that: A solder paste layer (213) is provided between the first connector (26) and the intermediate connector (27), and between the intermediate connector (27) and the second connector (28).

5. The pre-embedded device heat dissipation substrate stacking mounting structure according to claim 4, characterized in that: A thermosetting adhesive layer (214) is provided between the first substrate (21) and the intermediate substrate (22), and between the intermediate substrate (22) and the second substrate (23), and the thermosetting adhesive layer (214) and the solder paste layer (213) are spaced apart in the same layer.

6. The pre-embedded device heat dissipation substrate stacking mounting structure according to claim 2, characterized in that: A heat dissipation adhesive layer (215) is provided between the IC chip (29) and the heat dissipation cover (24).

7. The pre-embedded device heat dissipation substrate stacking mounting structure according to claim 6, characterized in that: The heat dissipation adhesive layer (215) is a non-conductive adhesive layer with a thermal conductivity greater than 3 W / (m·K).

8. The pre-embedded device heat dissipation substrate stacking mounting structure according to claim 2, characterized in that: An adhesive layer (216) is provided between the heat dissipation cover (24) and the intermediate substrate (22).

9. A method for preparing a pre-embedded device heat dissipation substrate stacking mounting structure based on claim 1, characterized in that: include: An inductor mounting hole (211) is opened on an intermediate substrate (22), a pre-embedded inductor (25) is placed in the middle of the inductor mounting hole (211), ABF glue is filled between the outside of the pre-embedded inductor (25) and the inductor mounting hole (211), and an intermediate connector (27) in the intermediate substrate (22) is subjected to sputtering, wiring, lamination, exposure, development exposure, sputtering, etching, and coating treatment to obtain an intermediate substrate (22) coated with the pre-embedded inductor (25); An intermediate substrate (22) coated with a pre-embedded inductor (25) is bonded between a first substrate (21) and a second substrate (23); an intermediate connector (27) of the intermediate substrate (22) and a first connector (26) of the first substrate (21), and an intermediate connector (27) of the intermediate substrate (22) and a second connector (28) of the second substrate (23) are connected by solder paste; and the intermediate substrate (22) and the first substrate (21), and the intermediate substrate (22) and the second substrate (23) are connected by thermosetting adhesive; The heat dissipation cover (24) is arranged outside the second substrate (23), and the open end of the heat dissipation cover (24) is bonded to a side of the intermediate substrate (22) away from the first substrate (21).

10. The method for preparing the pre-embedded device heat dissipation substrate stacking mounting structure according to claim 9, characterized in that: Before bonding the intermediate substrate (22) coated with the embedded inductor (25) between the first substrate (21) and the second substrate (23), the method further comprises: An IC chip (29) and a circuit component (210) are mounted on one side of the second substrate (23); the IC chip (29) and the circuit component (210) are both connected to a second connector (28) of the second substrate (23); the intermediate substrate (22) is located on a side of the second substrate (23) on which the IC chip (29) and the circuit component (210) are not mounted; and a side of the IC chip (29) away from the second substrate (23) is bonded to the heat dissipation cover (24) by heat dissipation adhesive.

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