Semiconductor circuit and plastic packaging method thereof
By setting protruding feet and isolation grooves on the substrate of the semiconductor circuit, the problem of the pin hole affecting product reliability during the plastic packaging process is solved, and the flexibility of the circuit design and the sealing after plastic packaging are improved.
Patent Information
- Application Number
- CN202510064144.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-15
- Publication Date
- 2025-05-06
AI Technical Summary
During the plastic packaging process, the existence of the thimble hole affects the product reliability, and the circuit design needs to avoid the thimble position, affecting the design flexibility.
When designing semiconductor circuits, a protruding foot and an isolation groove are provided on the substrate, and a thimble placement surface is formed on the protruding foot. The isolation groove prevents external moisture and air from entering. The thimble of the plastic sealing mold is directly pushed on the protruding foot to avoid the thimble hole affecting product reliability.
It improves the flexibility of circuit design, ensures sealing and product reliability after plastic sealing, and avoids the impact of pin holes on the circuit.
Smart Images

Figure CN119943775A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of semiconductors, and in particular relates to a semiconductor circuit and a plastic packaging method thereof. Background Art
[0002] In order to ensure that the exposed back side of the substrate can fit tightly against the surface of the mold cavity, semi-encapsulated semiconductor circuit products in the semiconductor industry generally use ejector pins to hold the front side of the substrate during plastic encapsulation, so that the back side of the substrate fits tightly against the surface of the mold cavity to prevent glue overflow. However, this ejector pin method will leave ejector pin holes on the surface of the circuit substrate after injection molding. The position where the ejector pin holes are left will affect product reliability because there is no resin protection. At the same time, when designing the circuit, it is necessary to consider in advance the devices on the circuit substrate to avoid the ejector pin position, which affects the flexibility of the circuit design. In addition, sometimes in order to avoid the devices on the circuit substrate, the designed ejector pin position cannot achieve the effect of preventing glue overflow, and sometimes it can only be set near the injection port, which affects the injection effect.
[0003] The existing solution uses a movable ejector pin during the injection molding process. When the resin inside the mold has not yet solidified, the ejector pin is first retracted, so that the resin that has not yet fully solidified can fill the ejector pin hole. This solution will not leave an ejector pin hole above the circuit substrate, but the circuit design still needs to consider avoiding the ejector pin position, and the glue injection problem has not been solved. In addition, the related equipment and mold design of the movable ejector pin solution are complex and costly. Summary of the invention
[0004] The present invention aims to improve at least one technical problem in the background technology.
[0005] The present invention provides a semiconductor circuit, comprising:
[0006] A substrate, one side of the substrate is used as a layout surface, a plurality of protruding feet are provided on one side of the substrate, an ejector placement surface is formed on the protruding feet, the ejector placement surface and the layout surface face the same direction, and an isolation groove is formed between the ejector placement surface and the layout surface;
[0007] A circuit wiring layer, the circuit wiring layer is arranged on the layout surface;
[0008] A circuit component assembly, wherein the circuit component assembly is disposed on the circuit wiring layer, and the circuit component assembly is electrically connected to the circuit wiring layer;
[0009] A plurality of pins, one end of each of the plurality of pins being electrically connected to the circuit wiring layer;
[0010] The plastic package body covers the circuit wiring layer, the circuit component assembly and the electrical connection between the plurality of pins and the circuit wiring layer, and the free ends of the plurality of pins extend out of the plastic package body.
[0011] The beneficial effects of the semiconductor circuit of the present invention are as follows: through the arrangement of the protruding pins and the isolation grooves on the substrate, when the semiconductor circuit of the present invention is plastic-sealed, the ejector pins of the plastic-sealing mold can directly press against the ejector pin placement surface of the protruding pins. On the one hand, there are no circuits or devices arranged on the protruding pins, and no protection of the plastic-sealing body is required, so the ejector pin holes left on the protruding pins after plastic-sealing do not affect the reliability of the product; on the other hand, the isolation grooves can prevent external moisture and air from entering the arrangement surface of the substrate from the ejector pin holes, thereby ensuring the sealing of the semiconductor circuit after plastic-sealing.
[0012] Furthermore, a plurality of protruding legs are arranged at intervals.
[0013] Preferably, there are two protruding legs, which are respectively located at two ends of one side of the substrate.
[0014] Furthermore, an insulating layer is provided on the layout surface, the circuit wiring layer is arranged on the insulating layer, and the substrate is one of a metal substrate, a glass substrate, a ceramic substrate, an organic substrate, and a composite substrate. The insulating layer effectively avoids direct contact between the circuit wiring layer and the substrate, prevents short circuit, reduces current leakage, and improves the stability and reliability of the semiconductor circuit.
[0015] Furthermore, a green oil layer is provided on the circuit wiring layer, and the green oil layer is used to protect the circuit wiring layer from external environmental factors (such as moisture, dust, etc.), resist corrosion by chemical substances such as acid and alkali, and thus extend the service life of the semiconductor circuit.
[0016] Furthermore, the circuit component assembly and the circuit wiring layer are electrically connected through wires, and the wires are metal wires, specifically one of gold wires, aluminum wires, and copper wires.
[0017] Furthermore, the circuit component assembly includes high-power components, and a heat sink is provided between the high-power components and the circuit wiring layer. The heat sink can dissipate the heat generated by the high-power components in a timely manner to ensure the reliability of the operation of the high-power components.
[0018] Furthermore, the pins are copper alloy pins, and the grade of the copper alloy is C194-1 / 2H or KFC-1 / 2H.
[0019] Furthermore, the plastic packaging body is a mixed resin plastic packaging body, which is a mixture of epoxy resin, phenolic resin, silicon micropowder and additives, wherein the epoxy resin serves as a matrix resin, providing the basic structure and mechanical strength of the plastic packaging body; the phenolic resin serves as a curing agent, chemically reacting with the epoxy resin to form a cross-linked structure, thereby curing and forming; the silicon micropowder serves as a filler, which not only increases the volume stability of the plastic packaging body, but also improves its thermal conductivity and electrical insulation properties.
[0020] The present invention also provides a method for encapsulating the semiconductor circuit as described above, wherein the semiconductor circuit is encapsulated by an encapsulation mold, wherein the encapsulation mold is provided with an injection port and a plurality of pin extension ports, wherein the encapsulation mold comprises an upper mold and a lower mold, wherein the upper mold and the lower mold are enclosed to form an encapsulation mold cavity, wherein the encapsulation mold cavity matches the semiconductor circuit, wherein the upper mold is provided with a plurality of ejectors, wherein the ejectors are fixed ejectors or movable ejectors, and the ejectors extend downward into the encapsulation mold cavity and correspond to ejector placement surfaces respectively;
[0021] The plastic encapsulation method comprises the following steps:
[0022] placing the substrate on the lower mold with the layout surface facing upward;
[0023] Cover the upper mold so that the ejector pins are against the ejector placement surface and the free ends of the pins extend out of the corresponding pin extension openings;
[0024] The plastic encapsulation body is heated and squeezed into the plastic encapsulation mold cavity through the injection port;
[0025] When the plastic package body is completely cured, the plastic package mold is opened to complete the plastic packaging of the semiconductor circuit.
[0026] The beneficial effects of the semiconductor circuit plastic packaging method of the present invention are as follows: by adopting the semiconductor circuit plastic packaging method of the present invention, there is no need to consider avoiding ejector pins when designing and laying out the circuit, thereby improving the flexibility of circuit design; even if ejector pin holes are left in the semiconductor circuit plastic packaging method of the present invention, the internal circuit will not be affected, and there is no need to consider the problem of ejector pins affecting glue injection. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:
[0028] Figure 1 It is a schematic diagram of the structure of a semiconductor circuit;
[0029] Figure 2 A top view of a semiconductor circuit;
[0030] Figure 3 This is a schematic diagram of a semiconductor circuit in a plastic packaging mold.
[0031] In the attached drawings: 1-substrate; 101-protruding foot; 102-isolation groove; 2-insulating layer; 3-circuit wiring layer; 4-green oil layer; 51-chip resistor; 52-chip capacitor; 53-components; 54-high-power components; 55-heat sink; 6-wire; 7-pin; 8-plastic encapsulation body; 9-plastic encapsulation mold; 91-upper mold; 92-lower mold; 93-thrust pin; 94-thrust pin hole. DETAILED DESCRIPTION
[0032] Embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.
[0033] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.
[0034] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.
[0035] Combine the following Figures 1 to 3 Embodiments of the present invention are described.
[0036] An embodiment of the present invention provides a semiconductor circuit, including:
[0037] A substrate 1, one side of the substrate 1 is used as a layout surface, a plurality of protruding feet 101 are provided on one side of the substrate 1, an ejector placement surface is formed on the protruding feet 101, the ejector placement surface and the layout surface face the same direction, and an isolation groove 102 is formed between the ejector placement surface and the layout surface;
[0038] A circuit wiring layer 3, the circuit wiring layer 3 is arranged on the layout surface;
[0039] A circuit component assembly, wherein the circuit component assembly is arranged on the circuit wiring layer 3, and the circuit component assembly is electrically connected to the circuit wiring layer 3;
[0040] A plurality of pins 7, one end of each of the plurality of pins 7 being electrically connected to the circuit wiring layer 3;
[0041] The plastic package body 8 covers the circuit wiring layer 3 , the circuit component assembly, and the electrical connection between the plurality of pins 7 and the circuit wiring layer 3 , and the free ends of the plurality of pins 7 extend out of the plastic package body 8 .
[0042] In this embodiment, a protruding foot 101 and an isolation groove 102 are provided on the substrate 1, wherein the protruding foot 101 has a special ejector pin placement surface, and there is no need to consider reserving ejector pin positions when designing a circuit on the layout surface of the substrate 1, thereby improving the flexibility of circuit design layout; and the isolation groove 102 can block the entry of external moisture and air, so that the ejector pin hole 94 left on the protruding foot 101 after plastic packaging does not affect the reliability of the product.
[0043] Furthermore, there are two protruding legs 101 , which are respectively located at two ends of one side of the substrate 1 .
[0044] Furthermore, an insulating layer 2 is provided on the layout surface, and the circuit wiring layer 3 is arranged on the insulating layer 2. In this embodiment, the substrate 1 is a metal substrate, and the insulating layer 2 effectively avoids direct contact between the circuit wiring layer 3 and the metal substrate, prevents short circuit, reduces current leakage, and improves the stability and reliability of the semiconductor circuit.
[0045] Furthermore, a green oil layer 4 is provided on the circuit wiring layer 3, and the green oil layer 4 is used to protect the circuit wiring layer 3. In this embodiment, the circuit wiring layer 3 is protected from external environmental factors (such as moisture, dust, etc.) and from corrosion by chemical substances such as acids and alkalis through the provision of the green oil layer 4, thereby extending the service life of the semiconductor circuit.
[0046] Furthermore, the circuit component assembly is electrically connected to the circuit wiring layer 3 via an electric wire 6 , and in this embodiment, the electric wire 6 is a copper wire.
[0047] Furthermore, the circuit component assembly includes a chip resistor 51, a chip capacitor 52, a component 53 and a high-power component 54, wherein the component 53 and the high-power component 54 are composed of the required chips for various internal functional circuits of the semiconductor circuit; the chip resistor 51 is connected to the gate of the IGBT chip inside the semiconductor circuit to limit the switching speed by current limiting; the chip capacitor 52 plays a filtering, coupling and bootstrapping role in the semiconductor circuit.
[0048] Furthermore, a heat sink 55 is provided between the high-power component 54 and the circuit wiring layer 3. In this embodiment, the heat sink 55 is a copper heat sink with a silver-plated surface. Through the setting of the heat sink 55, the heat generated by the high-power component 54 can be dissipated in time, thereby ensuring the reliability of the operation of the high-power component 54.
[0049] Furthermore, the pin 7 is a copper alloy pin 7, and the grade of the copper alloy in this embodiment is C194-1 / 2H.
[0050] Furthermore, the plastic sealing body 8 is a mixed resin plastic sealing body 8, which is a mixture of epoxy resin, phenolic resin, silicon micropowder and additives, wherein the epoxy resin serves as a matrix resin to provide the basic structure and mechanical strength of the plastic sealing body 8; the phenolic resin serves as a curing agent to chemically react with the epoxy resin to form a cross-linked structure, thereby curing and forming; the silicon micropowder serves as a filler to not only increase the volume stability of the plastic sealing body 8, but also improve its thermal conductivity and electrical insulation properties.
[0051] The method for manufacturing a semiconductor circuit in this embodiment includes the following steps:
[0052] Two protruding feet 101 are formed on one side of the substrate 1 by cutting, and an isolation groove 102 is provided between the ejector pin placement surface of the protruding feet 101 and the arrangement surface of the substrate 1;
[0053] A copper foil layer is provided on the layout surface of the substrate 1, and the copper foil layer is etched to obtain a circuit wiring layer 3;
[0054] A green oil layer 4 is formed on the surface of the circuit wiring layer 3, and the green oil layer 4 avoids the preset position of the circuit component assembly and the pin 7 (not shown in the figure);
[0055] Place the substrate 1 on a carrier (the carrier is a ceramic material with a high temperature resistance of more than 200°C), apply solder paste on the preset position of the circuit component assembly, and mount the circuit component assembly to its preset position through an automatic die bonding device (wherein the high-power component 54 is first mounted on the silver-plated copper heat sink 55 through a soft solder die bonding machine);
[0056] preparing pin 7, and installing pin 7 at a preset position of pin 7;
[0057] The carrier carries the substrate 1 into the reflow furnace to solder all the circuit components to the corresponding preset positions, and the soldering quality of the circuit components is inspected by visual inspection equipment (AOI optical inspection instrument);
[0058] By spraying, ultrasonic or other cleaning methods, foreign matter such as flux and aluminum chips remaining on the substrate 1 are removed;
[0059] The circuit component assembly and the circuit wiring layer 3 are electrically connected through metal wires;
[0060] Complete the plastic packaging of semiconductor circuits;
[0061] The product is post-cured and stress-relieved in a high-temperature oven, and the redundant pins 7 and connecting ribs are cut off by rib cutting and forming equipment;
[0062] Perform welding installation of the limit pin 7;
[0063] After completing the electrical parameter and appearance parameter tests, the semiconductor circuit is obtained.
[0064] In this embodiment, the semiconductor circuit is encapsulated by the encapsulation mold 9, and the encapsulation mold 9 is provided with an injection port and a plurality of pin 7 extension ports, and the encapsulation mold 9 includes an upper mold 91 and a lower mold 92, and the upper mold 91 and the lower mold 92 are enclosed to form a encapsulation mold cavity, and the encapsulation mold cavity matches the semiconductor circuit, and the upper mold 91 is provided with a plurality of ejector pins 93, and the ejector pins 93 are fixed ejector pins, and the ejector pins 93 extend downward into the encapsulation mold cavity, respectively corresponding to the ejector placement surfaces;
[0065] The plastic encapsulation method comprises the following steps:
[0066] Place the substrate 1 on the lower mold 92 with the layout surface facing upward;
[0067] Cover the upper mold 91, so that the ejector pin 93 is against the ejector placement surface, and the free end of the pin 7 is extended from the corresponding pin 7 extension port;
[0068] The plastic encapsulation body 8 is heated and squeezed into the plastic encapsulation mold cavity through the injection port, and the squeezing method is a heat transfer molding method;
[0069] When the plastic package body 8 is completely cured, the plastic package mold 9 is opened to complete the plastic packaging of the semiconductor circuit.
[0070] In this embodiment, a fixed ejector pin is used, which can reduce the cost of the plastic packaging mold 9. Although an ejector hole 94 will be left in the plastic packaging body 8 after plastic packaging, since there is no circuit arrangement on the protruding foot 101 and there is an isolation groove 102, the ejector hole 94 does not affect the internal circuit; in addition, the ejector pin does not affect the injection of glue, thereby reducing the difficulty of mold design and the risk of adverse injection of glue.
[0071] The preferred embodiments of the present invention are described in detail above, but the present invention is not limited to the embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present invention.
Claims
1. A semiconductor circuit, characterized in that: include: A substrate (1), one side of the substrate (1) being used as a layout surface, a plurality of protruding feet (101) being provided on one side of the substrate (1), an ejector placement surface being formed on the protruding feet (101), the ejector placement surface and the layout surface facing the same direction, and an isolation groove (102) being formed between the ejector placement surface and the layout surface; A circuit wiring layer (3), the circuit wiring layer (3) being arranged on the layout surface; A circuit component assembly, wherein the circuit component assembly is arranged on the circuit wiring layer (3), and the circuit component assembly is electrically connected to the circuit wiring layer (3); A plurality of pins (7), one end of each of the plurality of pins (7) being electrically connected to the circuit wiring layer (3); A plastic package (8), wherein the plastic package (8) covers the circuit wiring layer (3), the circuit component assembly, and the electrical connection points between the plurality of pins (7) and the circuit wiring layer (3), and the free ends of the plurality of pins (7) extend out from the plastic package (8).
2. The semiconductor circuit according to claim 1, characterized in that The plurality of protruding legs (101) are arranged at intervals.
3. The semiconductor circuit according to claim 2, characterized in that The number of the protruding feet (101) is two, which are respectively located at two ends of one side of the substrate (1).
4. The semiconductor circuit according to claim 1, wherein: An insulating layer (2) is provided on the layout surface, and the circuit wiring layer (3) is arranged on the insulating layer (2).
5. The semiconductor circuit according to claim 1, wherein: A green oil layer (4) is provided on the circuit wiring layer (3), and the green oil layer (4) is used to protect the circuit wiring layer (3).
6. The semiconductor circuit according to claim 1, wherein: The circuit component assembly and the circuit wiring layer (3) are electrically connected via an electric wire (6).
7. The semiconductor circuit according to claim 1, wherein: The circuit component assembly comprises a high-power component (54), and a heat sink (55) is provided between the high-power component (54) and the circuit wiring layer (3).
8. The semiconductor circuit according to claim 1, wherein: The pin (7) is a copper alloy pin (7).
9. The semiconductor circuit according to claim 1, wherein: The plastic sealing body (8) is a mixed resin plastic sealing body (8).
10. A method for plastic packaging of a semiconductor circuit according to any one of claims 1 to 9, characterized in that: The semiconductor circuit is plastic-sealed by a plastic-sealing mold (9), wherein the plastic-sealing mold (9) is provided with an injection port and a plurality of pin (7) extension ports, wherein the plastic-sealing mold (9) comprises an upper mold (91) and a lower mold (92), wherein the upper mold (91) and the lower mold (92) enclose a plastic-sealing mold cavity, wherein the plastic-sealing mold cavity matches the semiconductor circuit, and wherein the upper mold (91) is provided with a plurality of ejector pins, wherein the ejector pins are fixed ejector pins or movable ejector pins, and wherein the ejector pins extend downward into the plastic-sealing mold cavity and correspond to the ejector pin placement surfaces respectively; The plastic encapsulation method comprises the following steps: Placing the substrate (1) on the lower mold (92) with the arrangement surface facing upward; covering the upper mold (91) so that the ejector pins are against the ejector pin placement surface and the free ends of the pins (7) extend out of the corresponding pin (7) extension openings; The plastic encapsulation body (8) is heated and squeezed into the plastic encapsulation mold cavity through the injection port; When the plastic encapsulation body (8) is completely cured, the plastic encapsulation mold (9) is opened to complete the plastic encapsulation of the semiconductor circuit.