Semiconductor circuit and manufacturing method thereof

Abstract

The invention relates to a semiconductor circuit and a manufacturing method of the semiconductor circuit, the semiconductor circuit comprises a circuit substrate, an electronic element, a circuit wiring layer, a plurality of pins and a packaging body, the substrate comprises a mounting surface; the circuit wiring layer is arranged on the mounting surface, the electronic element is arranged on the circuit wiring layer, one ends of the plurality of pins are respectively connected with the circuit wiring layer, the packaging body at least partially covers the mounting surface of the circuit substrate, and the other ends of the plurality of pins respectively extend outwards from the packaging body, the parts, located in the packaging body, of the plurality of pins are respectively provided with a plurality of notches. According to the invention, the pins are designed to be provided with the multiple gaps, and the gaps can well absorb the stress generated by tolerance between the pins and the substrate, thereby solving the problem of cracking of the insulating layer caused by the stress, and solving the problem of glue overflow of the substrate and the pins at the same time.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor circuit technology, and specifically relates to a semiconductor circuit and a method for manufacturing a semiconductor circuit. Background Art

[0002] Since the industry standard for the thickness tolerance of aluminum substrates is +-10%, the large tolerance makes it impossible for the aluminum substrates to achieve precise matching with the mold, which leads to easy overflow of materials when semi-encapsulating semiconductor circuits. In the relevant technical solutions to solve the overflow, mechanical grinding or laser engraving is often used to remove the overflow glue, but for aluminum substrates with anodized surfaces, these methods will destroy the anodized layer on the surface of the substrate. At present, the industry often uses the ejector solution to force the substrate down through the ejector when the mold is closed to achieve a close fit between the substrate and the mold cavity to prevent overflow of glue, but the resulting substrate delamination problem is also a major problem in the industry. Summary of the invention

[0003] The purpose of the present application is to provide a semiconductor circuit that can solve the delamination problem in the above-mentioned problem.

[0004] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0005] In a first aspect, an embodiment of the present application provides a semiconductor circuit, comprising a circuit substrate, the substrate comprising a mounting surface; a circuit wiring layer, which is arranged on the mounting surface; an electronic component, which is arranged on the circuit wiring layer; a plurality of pins, one ends of the plurality of pins are respectively connected to the circuit wiring layer; and a package body, at least partially covering the mounting surface, the other ends of the plurality of pins respectively extending outward from the package body; wherein the portions of the plurality of pins located within the package body are respectively provided with a plurality of notches.

[0006] The semiconductor circuit provided in the embodiment of the present application is designed with multiple notches on the pins, which can well absorb the stress caused by tolerance between the pins and the substrate, and solve the industry problem of substrate cracking and delamination caused by stress through stress-free packaging. At the same time, the problem of glue overflow between the substrate and the pins is solved, and the reliability of the semiconductor circuit is improved.

[0007] According to some embodiments of the present application, a plurality of notches are respectively arranged on both sides of the end of the pin.

[0008] According to some embodiments of the present application, a plurality of the notches are arranged at intervals along the length direction of one end of the pin.

[0009] According to some embodiments of the present application, the plurality of pins are further provided with connection ports, and the connection ports are used to connect with pins of different semiconductor circuits.

[0010] According to some embodiments of the present application, a mounting hole is further provided on the package body, and the mounting hole corresponds to the position of the connection port.

[0011] According to some embodiments of the present application, a plurality of component mounting positions for cooperatively connecting with the electronic components are provided on the circuit wiring layer.

[0012] According to some embodiments of the present application, the electronic components include capacitors, resistors, and circuit chips, and the capacitors, resistors, and circuit chips are respectively mounted on a plurality of component mounting positions.

[0013] According to some embodiments of the present application, the circuit substrate includes a metal base material, an insulating layer and a copper foil layer, the metal base material, the insulating layer and the copper foil layer are sequentially bonded and connected, the circuit wiring layer is connected to the insulating layer, and the pin is connected to the copper foil layer.

[0014] According to some embodiments of the present application, the circuit substrate further includes a protective layer, and the protective layer is disposed above the copper foil layer.

[0015] In a second aspect, the present application provides a method for manufacturing a semiconductor circuit according to the above, comprising the following steps:

[0016] Providing a circuit substrate;

[0017] An insulating layer and a circuit wiring layer are sequentially arranged on the surface of the circuit substrate;

[0018] preparing a pin, and opening a plurality of notches at one end of the pin;

[0019] The electronic components and pins are arranged on the circuit wiring layer, wherein one end of the pin having a plurality of notches is arranged on the circuit wiring layer;

[0020] Electrically connecting the electronic component and the circuit wiring layer through bonding wires;

[0021] The circuit substrate provided with the circuit wiring layer and the plurality of pins is injection molded through a packaging mold to form a sealing body, and the other end of each pin is led out from the side of the sealing body to form the semiconductor circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a schematic diagram of the structure of a semiconductor circuit provided by an embodiment of the present application;

[0023] Figure 2 It is a schematic diagram of a substrate structure in a semiconductor circuit provided in an embodiment of the present application;

[0024] Figure 3It is a schematic diagram of a parallel structure in a semiconductor circuit provided in an embodiment of the present application;

[0025] Figure 4 It is a schematic flow chart of a method for manufacturing a semiconductor circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0026] The following description provides specific application scenarios and requirements of this specification, with the purpose of enabling those skilled in the art to make and use the contents of this specification. Various local modifications to the disclosed embodiments will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of this specification. Therefore, this specification is not limited to the embodiments shown, but to the widest scope consistent with the claims.

[0027] It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other if there is no conflict in structure or function. The present application is described in detail below through specific embodiments:

[0028] Reference Figure 1 to Figure 3 :When the pins are soldered to the circuit substrate through solder paste, and then the processed semi-finished product is placed in the packaging mold for packaging, the three tolerances of the circuit substrate tolerance (+-10%) + pin welding tolerance + mold tolerance are superimposed, resulting in the circuit substrate surface and the cavity surface not fitting properly. Generally, when the pins and the circuit substrate are equal to the depth of the lower mold cavity, the circuit substrate and the lower mold fit tightly, so that the pins and the circuit substrate will not generate force during the mold closing process. In this case, there will be no glue overflow or delamination, which is the best state.

[0029] However, there will always be more or less tolerances in the actual production process. That is to say, when the assembly tolerance of the pin and the circuit substrate is less than the depth of the lower mold cavity, there will be a gap between the circuit substrate and the lower mold. The EMC plastic encapsulation material will soften at a mold temperature of 180°C, and the EMC will be injected into the cavity through the injection pressure of the equipment. The gap between the circuit substrate and the lower mold will also enter the gap under the injection pressure, resulting in glue overflow.

[0030] Generally, during injection molding, an ejector pin is added to the mold to add pressure to the circuit substrate, so that the circuit substrate fits tightly with the lower mold, thereby eliminating the gap between the circuit substrate and the lower mold. However, under the external force of the ejector pin, a downward force is generated between the pin and the circuit substrate, and the insulation layer of the circuit substrate becomes very fragile at a mold temperature of 180°C, that is, at high temperatures. Once an external force is generated in the middle, cracks will occur, which will lead to delamination of the insulation layer, and at this time, cracks will appear on the circuit substrate at one end of the pin. When the assembly tolerance of the pin and the aluminum circuit substrate is greater than the depth of the lower mold cavity, the pin will be higher than the mold closing surface. When the mold is closed, an extrusion force will appear between the pin and the circuit substrate. Under this extrusion external force, cracks will also appear in the insulation layer, and the cracks will appear on the circuit substrate at the end of the pin.

[0031] In order to solve the existing problems, Figure 1 A semiconductor circuit according to some embodiments of the present application is shown, including a circuit substrate, an electronic component, a circuit wiring layer, a plurality of pins and a package;

[0032] Among them, the circuit substrate 200 includes a mounting surface 201; a circuit wiring layer (not shown in the figure) is arranged on the mounting surface 201, and multiple electronic components 500 are arranged on the circuit wiring layer. The circuit wiring layer and the electrical components or the electrical components can be electrically connected through metal wires 600.

[0033] Multiple pins 100 are used to connect to external circuits. One end of each of the multiple pins 100 is connected to the circuit wiring layer. Specifically, the pins 100 can be made of C194 (-1 / 2H) (chemical composition: Cu (≧97.0) Fe: 2.4P: 0.03Zn: 0.12) or KFC (-1 / 2H) (chemical composition: Cu (≧99.6) Fe: 0.1 (0.05-0.15) P: 0.03 (0.025-0.04)), and then the surface is first nickel-plated with a thickness of 0.1-0.5um and then tin-plated with a thickness of 2-5um.

[0034] The package body 300 at least partially covers the mounting surface 201, and the other ends of the plurality of pins 100 extend outward from the package body 300; wherein the portions of the plurality of pins 100 located in the package body 300 are respectively provided with a plurality of notches 101. Specifically, the package body can be made of a powdered molding compound made of epoxy resin as a base resin, high-performance phenolic resin as a curing agent, silicon micropowder as a filler, and a variety of additives, which is extruded into a mold cavity by a heat transfer molding method to embed the semiconductor chip therein, and cross-linked and cured to form a device with a certain appearance structure.

[0035] In this way, by designing the pin 100 with multiple notches 101, the multiple components of the semiconductor circuit are sealed and fixed by plastic packaging. When the mold ejector pin is used to apply downward force, the notches 101 can well absorb the stress caused by tolerance between the pin 100 and the circuit substrate 200, so that the circuit substrate 200 will not be delaminated due to other forces between the pin 100 and the circuit substrate 200, that is, the industry problem of cracking and delamination of the circuit substrate 200 caused by stress is solved by stress-free packaging. Because the circuit substrate 200 and the lower mold are just fitted under the action of the ejector pin during mold closing, there is no gap between the circuit substrate 200 and the lower mold, and the notches 101 on the pin 100 absorb the corresponding stress, so that no other forces are generated between the pin 100 and the circuit substrate 200, and there will be no glue overflow at this time, that is, the glue overflow problem of the circuit substrate 200 and the pin 100 is solved at the same time, and the reliability of the semiconductor circuit is improved.

[0036] For example, Figure 1 As shown, only the cross-sectional shape of the notch 101 provided on the pin 100 is shown to be V-shaped, and the shape of the notch 101 may also be an angle or a broken line, and the number of the notches 101 may also be 1, 2, 3, etc. Further, the notches 101 are respectively provided on both sides of the end of the pin 100. Furthermore, the notches 101 are spaced apart along the length direction of one end of the pin 100.

[0037] In some embodiments, the plurality of pins 100 are further provided with a connection port 103; the connection port 103 is used to connect with the pins 100 of different semiconductor circuits. Figure 1 and Figure 3 As shown, the plurality of pins 100 are also provided with a connection port 103, which is provided on the pins 100 and is used to connect with the pins of different semiconductor circuits. By providing the connection port, the contact ability is increased when the pins 100 are connected to each other, making the parallel connection more reliable. Thus, the plurality of semiconductor circuits connected in parallel are directly connected to the corresponding connection port by inserting the end of the pin 100 into the corresponding connection port to contact with the pin 100 of another semiconductor circuit to achieve electrical connection.

[0038] In some embodiments, the package body 300 is further provided with a mounting hole 301, and the mounting hole 301 corresponds to the position of the connection port 103. When the semiconductor circuit is connected, the pin 100 is inserted into the mounting hole 301 and matched with the connection port 103, which is convenient for connection, effectively prevents the pin 100 from shaking during connection, and ensures the stability of the semiconductor circuits when connected to each other.

[0039] In some embodiments, the circuit wiring layer is provided with a plurality of component mounting positions that are connected to the electronic components 500, so as to facilitate mounting resistors, capacitors and semi-finished components on the component mounting positions by automatic SMT equipment.

[0040] Optionally, the electronic component 500 includes capacitors, resistors and circuit chips, which are installed on multiple component installation positions. The resistor is used to connect to the gate of the IGBT chip in the semiconductor circuit, and the IGBT switching speed is limited by current limiting; the chip capacitor is used to play a filtering, coupling and bootstrapping role in the semiconductor circuit, and there are chips and other components required to form the internal functional circuit of the semiconductor circuit. The capacitor, resistor and circuit chip are installed on multiple component installation positions of the circuit wiring layer.

[0041] In some embodiments, see Figure 2 The circuit substrate 200 includes a metal substrate 210, an insulating layer 220 and a copper foil layer 230. Specifically, the copper foil layer 230 is made by etching a copper foil of about 70 um into a desired circuit through a chemical reaction to form a circuit wiring layer. The setting of the insulating layer 220 can prevent the copper foil layer 230 from conducting electricity with the circuit substrate 200. The metal substrate 210 includes a heat dissipation surface and a mounting surface 201. The mounting surface 201 can be mounted with corresponding circuit wiring and circuit components, and the heat dissipation surface is used to dissipate heat for power components in the semiconductor circuit. The metal substrate 210, the insulating layer 220 and the copper foil layer 230 are sequentially bonded and connected, the circuit wiring layer is connected to the insulating layer 220, and the pin 100 is connected to the copper foil layer 230. Further, the circuit substrate 200 also includes a protective layer 240, which is arranged above the copper foil layer 230 to cut off the electrical connection between the circuits.

[0042] The present application also provides a method for manufacturing the semiconductor circuit according to the above, see Figure 4 , which comprises the following steps:

[0043] Providing a circuit substrate;

[0044] An insulating layer and a circuit wiring layer are sequentially arranged on the surface of the circuit substrate;

[0045] preparing a pin, and opening a plurality of notches at one end of the pin;

[0046] Arrange electronic components and pins on the circuit wiring layer, wherein one end of the pin with a plurality of notches is arranged on the circuit wiring layer;

[0047] Electrically connecting electronic components and circuit wiring layers through bonding wires;

[0048] A circuit substrate provided with a circuit wiring layer and a plurality of pins is injection molded through a packaging mold to form a sealing body, and the other end of each pin is led out from the side of the sealing body to form a semiconductor circuit.

[0049] Specifically, the finished metal circuit substrate is first placed on a special carrier, which can be placed by automated equipment or manually, wherein the carrier can be aluminum, synthetic stone, ceramic, PPS and other materials that are resistant to high temperatures above 200°C. Through the automatic die bonding equipment DA machine, the semiconductor inverter circuit chip is mounted on the component mounting position reserved on the copper foil circuit layer of the circuit substrate finished product by brushing solder paste or applying silver glue. The high-voltage power device, namely the PFC circuit, is mounted on the silver-plated copper heat sink through a soft solder die bonding machine to form a semi-finished component. The resistors, capacitors and semi-finished components are mounted on the component mounting position through automatic SMT equipment, and then the multi-segment connecting pins are placed on the corresponding welding position on the metal circuit substrate by a robot or manually. Then the entire semi-finished product including the carrier is reflowed through a reflow furnace to solder all the components to the corresponding mounting position. After welding, the welding quality of the components can be inspected by visual inspection AOI equipment. Then, the flux and aluminum chips and other foreign matters remaining on the circuit substrate are removed by spraying, ultrasonic cleaning, etc., and then the circuit elements and the circuit wiring are electrically connected by bonding wires, wherein the bonding wires are metal wires, and materials such as gold, aluminum, and copper can be selected. Then, the circuit substrate circuit is plastic-sealed in a specific mold by packaging equipment.

[0050] Finally, the product is marked by laser marking, and the product is post-cured and stress-relieved in a high-temperature oven. Optionally, the rib cutting and forming equipment cuts off the ribs and dummy pins of the pins and shapes them into the required shape. Finally, the electrical parameter test is performed to form the final qualified semiconductor circuit product.

[0051] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0052] In addition, certain terms in this application have been used to describe embodiments of the present application. For example, "one embodiment", "embodiment" and / or "some embodiments" mean that a particular feature, structure or characteristic described in conjunction with the embodiment may be included in at least one embodiment of the present application. Therefore, it can be emphasized and should be understood that two or more references to "embodiment" or "one embodiment" or "alternative embodiment" in various parts of this specification do not necessarily refer to the same embodiment. In addition, specific features, structures or characteristics may be appropriately combined in one or more embodiments of the present application.

[0053] Therefore, the embodiments disclosed in this specification are only examples and not limitations. It should be pointed out that a person skilled in the art can make several modifications and improvements without departing from the inventive concept of the present application, and these all fall within the scope of protection of the present application.

Claims

1. A semiconductor circuit, characterized in that: include: A circuit substrate, the circuit substrate comprising a mounting surface; A circuit wiring layer, which is arranged on the mounting surface; An electronic component, which is arranged on the circuit wiring layer; A plurality of pins, one end of each of the plurality of pins being connected to the circuit wiring layer; and a package body, at least partially covering the mounting surface, the other ends of each of the plurality of pins extending outward from the package body; Wherein, the parts of the plurality of pins located in the package body are respectively provided with a plurality of notches.

2. A semiconductor circuit according to claim 1, characterized in that: A plurality of notches are respectively arranged on both sides of the end of the pin.

3. A semiconductor circuit according to claim 2, characterized in that: A plurality of notches are arranged at intervals along the length direction of one end of the pin.

4. A semiconductor circuit according to claim 1, characterized in that: The plurality of pins are also provided with connection ports, and the connection ports are used to connect with pins of different semiconductor circuits.

5. A semiconductor circuit according to claim 4, characterized in that: The packaging body is also provided with a mounting hole, and the mounting hole corresponds to the position of the connecting port.

6. A semiconductor circuit according to claim 1, characterized in that: The circuit wiring layer is provided with a plurality of component mounting positions which are connected with the electronic components.

7. A semiconductor circuit according to claim 6, characterized in that: The electronic components include capacitors, resistors and circuit chips, and the capacitors, resistors and circuit chips are respectively mounted on a plurality of component mounting positions.

8. A semiconductor circuit according to any one of claims 1 to 7, characterized in that: The circuit substrate comprises a metal substrate, an insulating layer and a copper foil layer, wherein the metal substrate, the insulating layer and the copper foil layer are sequentially bonded and connected, the circuit wiring layer is connected to the insulating layer, and the pins are connected to the copper foil layer.

9. A semiconductor circuit according to claim 8, characterized in that: The circuit substrate further comprises a protective layer, and the protective layer is arranged above the copper foil layer.

10. A method for manufacturing a semiconductor circuit as claimed in claim 1, characterized in that: The manufacturing method comprises: Providing a circuit substrate; An insulating layer and a circuit wiring layer are sequentially arranged on the surface of the circuit substrate; preparing a pin, and opening a plurality of notches at one end of the pin; The electronic components and pins are arranged on the circuit wiring layer, wherein one end of the pin having a plurality of notches is arranged on the circuit wiring layer; Electrically connecting the electronic component and the circuit wiring layer through bonding wires; The circuit substrate provided with the circuit wiring layer and the plurality of pins is injection molded through a packaging mold to form a sealing body, and the other end of each pin is led out from the side of the sealing body to form the semiconductor circuit.

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