A phase-locked loop and control method based on multi-stage filtering and compensation
Through the multi-stage filtering and compensation phase-locked loop, the phase-locked loop accuracy and speed problems of the traditional phase-locked loop under grid imbalance and harmonic interference are solved, and fast and accurate grid phase information acquisition is achieved, which is suitable for power electronic grid-connected equipment.
Patent Information
- Application Number
- CN202510065471.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-16
- Publication Date
- 2025-09-26
- Estimated Expiration
- 2045-01-16
AI Technical Summary
The traditional three-phase synchronous phase-locked loop (SRF-PLL) cannot take into account both phase-locking accuracy and phase-locking speed at the same time, and cannot meet the high reliability requirements of the power system.
A phase-locked loop based on multi-stage filtering and compensation is used to convert the three-phase AC input voltage of the power grid into a two-phase stationary coordinate system through Clark transformation. The negative sequence component, third harmonic component and subharmonic component are filtered out in turn, and amplitude and phase compensation are performed. Finally, the voltage is sent to the PLL phase-locked loop for control phase locking.
Under the conditions of unbalanced grid voltage and harmonic interference, the phase-locking accuracy is improved without slowing down the phase-locking speed, the dynamic response speed is fast, the parameter design is simple, and it has high reliability.
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Figure CN119944821B_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the field of power electronics technology, and more specifically, relates to a phase-locked loop and control method based on multi-stage filtering and compensation. Background Art
[0002] Phase-locked synchronization is a critical component of grid-connected power electronics equipment, such as photovoltaic inverters, PCSs (Power Conversion Systems), and UPQCs (Unified Power Quality Conditioners). Its speed and accuracy have a crucial impact on the overall performance of the power system. Although my country has established national standards and industry regulations for power quality, limiting the permissible fluctuation range of grid voltage and frequency, the integration of diverse loads (capacitive and inductive) and the dynamic balance of various instantaneous power, active power, and reactive power in the power system inevitably lead to power quality issues such as voltage deviations from a sine wave, and amplitude and frequency deviations from rated values. These abnormal grid fluctuations place higher demands on power electronics equipment.
[0003] Traditional three-phase synchronous phase-locked loops (SRF-PLLs) primarily consist of a phase detector (PD), a loop filter (LF), and a voltage-controlled oscillator (VCO). When the power grid is unbalanced or distorted, these loops can only achieve effective phase lock by reducing the system bandwidth. However, this reduction in bandwidth also affects their dynamic response speed. In scenarios with specific requirements for grid phase-locked dynamic performance, the traditional SRF-PLLs offer unsatisfactory phase-locking accuracy and speed, failing to meet the demands of power systems with higher reliability requirements. Summary of the Invention
[0004] In response to the defects of the existing technology, the purpose of this application is to provide a phase-locked loop and control method based on multi-stage filtering and compensation, aiming to solve the problem that the traditional three-phase synchronous phase-locked loop SRF-PLL cannot simultaneously take into account the phase-locked accuracy and phase-locked speed.
[0005] To achieve this objective, in a first aspect, the present application provides a phase-locked loop based on multi-stage filtering and compensation, comprising:
[0006] Clark converter, used to convert the collected three-phase AC input voltage of the power grid into a two-phase stationary coordinate system voltage through Clark transformation, and send it to the multi-stage filtering and compensation module;
[0007] K-level filtering and compensation module is used to filter out the negative sequence component, third harmonic component, and... Subharmonic components, after each level of filtering, the amplitude and phase of the d-axis and q-axis components of the filtered fundamental positive sequence component are compensated and used as the compensation input for the next level of filtering;
[0008] The PLL phase-locked loop is used to receive the voltage value of the fundamental positive sequence component after K-level filtering and compensation in a two-phase stationary coordinate system, perform phase locking control, and obtain the phase information of the three-phase AC power grid.
[0009] Preferably, the K-level filtering and compensation module includes: a negative sequence component filtering and compensation submodule, a third harmonic filtering and compensation submodule... and Subharmonic filtering and compensation submodule;
[0010] The negative sequence component filtering and compensation submodule is used to adjust the voltage in the two-phase stationary coordinate system according to the phase-locked loop output phase. 、 Perform positive and negative sequence separation to obtain the fundamental positive and negative sequence components. After filtering out the negative sequence components with high-pass filtering, perform amplitude and phase compensation and inverse Park transformation to obtain the voltage value of the fundamental positive sequence component after primary filtering and compensation in the two-phase stationary coordinate system. ;
[0011] The third harmonic filtering and compensation submodule is used to adjust the voltage value of the fundamental positive sequence component after the first level filtering and compensation in the two-phase stationary coordinate system according to the phase-locked loop output phase. Perform 3 times Rotational transformation is used to obtain the third harmonic voltage component. After high-pass filtering to remove the third harmonic voltage component, amplitude and phase compensation and inverse Park transformation are performed to obtain the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after secondary filtering and compensation. ;
[0012] described Subharmonic filtering and compensation submodule is used to adjust the harmonics according to the phase-locked loop output phase. The voltage value of the fundamental positive sequence component after level filtering and compensation in the two-phase stationary coordinate system conduct Second-rate Rotation transformation, we get Subharmonic voltage components are filtered out by high-pass filtering After the subharmonic voltage components are obtained, amplitude and phase compensation and inverse Park transformation are performed to obtain The voltage value of the fundamental positive sequence component after level filtering and compensation in the two-phase stationary coordinate system , sent to the PLL phase-locked loop.
[0013] Preferably, these submodules have the same structure but different parameters.
[0014] Preferably, the submodule includes:
[0015] Park converter, used to utilize the phase information output by the phase-locked loop , the voltage values of the α-axis and β-axis in the two-phase stationary coordinate system are Convert to d-axis and q-axis components in the rotating coordinate system , respectively sent to the d-axis high-pass filter and the q-axis high-pass filter;
[0016] d-axis high-pass filter, used to convert The interference signal in the form of DC is filtered out, and the compensation Axis component Send to the d-axis phase amplitude compensator;
[0017] q-axis high-pass filter, used to convert The interference signal in the form of DC is filtered out, and the compensation Axis component Send to the q-axis phase amplitude compensator;
[0018] d-axis phase amplitude compensator, used for Perform phase amplitude compensation and Axis component Send to the anti-Park converter;
[0019] The q-axis phase amplitude compensator is used to Perform phase amplitude compensation and Axis component Send to the anti-Park converter;
[0020] Inverse Park converter, used to utilize the phase information of the phase-locked loop output , reverse the rotation transformation of the compensated d-axis and q-axis negative sequence components to obtain the voltage value of the two-phase stationary coordinate system after filtering and compensation .
[0021] Preferably, the negative sequence component Park transformation is specifically as follows:
[0022]
[0023]
[0024] The positive sequence component Park transform is as follows:
[0025]
[0026]
[0027] The Park transform of the hth harmonic component is as follows:
[0028]
[0029]
[0030] in, 、 Positive sequence components In the coordinate system 、 Axis component; Negative sequence components In the coordinate system 、 Axis component; are the hth harmonic components respectively In the coordinate system 、 Axis component, They are the Park transformation matrix of the positive sequence component, the Park transformation matrix of the negative sequence component, and the Park transformation matrix of the hth harmonic component, respectively. is the αβ axis component of the positive sequence component in the two-phase stationary coordinate system, is the αβ axis component of the negative sequence component in the two-phase stationary coordinate system, is the αβ axis component of the hth harmonic in the two-phase stationary coordinate system, is the amplitude of the fundamental positive sequence component, is the amplitude of the fundamental negative sequence component, is the amplitude of the hth harmonic component, is the grid voltage fundamental positive sequence phase, is the phase of the negative sequence fundamental wave of the grid voltage, is the grid angular frequency, For time, is the harmonic order.
[0031] Preferably, the transfer function of the high-pass filter is ,in, is the complex frequency in the Laplace transform, is the high-pass filter cutoff frequency constant, is the cutoff frequency, and in the negative sequence fundamental component filtering, , in the negative sequence 3rd harmonic component filtering, take , in negative sequence Subharmonic component filtering .
[0032] Preferably, the compensation calculation formula is as follows:
[0033]
[0034] in, 、 Before compensation 、 Axis component, After compensation 、 Axis component, is the high-pass filter cutoff frequency constant, is the harmonic order.
[0035] Preferably, the PLL phase-locked loop comprises:
[0036] Park converter is used to perform Park conversion on the voltage value of the two-phase stationary coordinate system of the fundamental positive sequence component after multi-stage filtering and compensation to obtain the d-axis voltage value of the fundamental positive sequence component. and q-axis voltage value , sent to the PLL module;
[0037] The PLL module includes a PI controller and an integral link, among which,
[0038] The PI controller is used to convert the q-axis voltage value of the fundamental positive sequence component After PI control, the current error angular frequency is obtained , and combine it with the grid angular frequency feedforward control signal Superposition is performed to obtain the angular frequency , sent to the points link;
[0039] The integration link is used to convert the angular frequency Convert to The signal is sent to the Park converter for phase-locked control.
[0040] To achieve this objective, in a second aspect, the present application provides a control method for a phase-locked loop based on multi-stage filtering and compensation as described in the first aspect, comprising:
[0041] Get the three-phase AC input voltage of the power grid 、 、 , input it into the Clark transformer;
[0042] The collected three-phase AC input voltage of the power grid is converted into a voltage in a two-phase stationary coordinate system through Clark transformation and sent to the multi-stage filtering and compensation module;
[0043] Filter out the negative sequence component and the third harmonic component in the voltage of the two-phase stationary coordinate system in sequence... Subharmonic component, after each stage of filtering, the amplitude and phase compensation of the d-axis and q-axis components of the filtered fundamental positive sequence component is performed;
[0044] The voltage value of the fundamental positive sequence component after K-level filtering and compensation in the two-phase stationary coordinate system is sent to the PLL phase-locked loop for control phase locking.
[0045] To achieve this objective, in a third aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program. When the computer program runs on a processor, the processor executes the control method as described in the second aspect.
[0046] In general, the above technical solutions conceived by this application have the following beneficial effects compared with the existing technologies:
[0047] The present application proposes a phase-locked loop and control method based on multi-stage filtering and compensation. Different from the traditional three-phase phase-locked loop that performs rotational transformation and then phase-locks the q-axis component, the present application first collects the voltage when the power grid is unbalanced or abnormal, and then obtains the positive sequence, negative sequence, 3rd and 5th harmonic d-axis and q-axis components through positive and negative sequence separation. Then, a high-pass filter is designed to filter out the negative sequence, 3rd and 5th harmonic components. Finally, the filtered d-axis and q-axis components are amplitude-phase compensated and sent to the traditional phase-locked loop for control phase locking, so as to quickly obtain more accurate power grid phase information. In the case of unbalanced power grid voltage, harmonic interference, phase and frequency mutation, the present application only needs to design a set of filtering and compensation parameters to filter out the interference signals of the 3rd and 5th harmonics, thereby improving the phase-locking accuracy without slowing down the phase-locking speed. In practical applications, it has the advantages of fast dynamic response speed, simple parameter design, and high reliability. BRIEF DESCRIPTION OF THE DRAWINGS
[0048] Figure 1 A schematic diagram of a phase-locked loop structure based on multi-stage filtering and compensation provided in this application.
[0049] Figure 2 This is a schematic diagram of the negative sequence component filtering and compensation submodule structure provided in this application.
[0050] Figure 3 This application provides a flow chart of a control method for a phase-locked loop based on multi-stage filtering and compensation. DETAILED DESCRIPTION
[0051] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.
[0052] The term "and / or" as used herein describes an association between related objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, or B exists alone. The symbol " / " as used herein indicates that the related objects are in an "or" relationship, for example, A / B means either A or B.
[0053] The terms "first" and "second" in this specification and claims are used to distinguish different objects rather than to describe a specific order of objects. For example, "first response message" and "second response message" are used to distinguish different response messages rather than to describe a specific order of response messages.
[0054] In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be interpreted as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.
[0055] In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more, for example, multiple processing units means two or more processing units, etc.; multiple elements means two or more elements, etc.
[0056] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application.
[0057] like Figure 1 As shown, the present application proposes a phase-locked loop based on multi-stage filtering and compensation, including: a Clark converter 10, a multi-stage filtering and compensation module 20 and a PLL phase-locked loop.
[0058] Clark converter 10 is used to convert the collected three-phase AC input voltage of the power grid into 、 、 Converted to voltage in two-phase stationary coordinate system 、 , and sent to the multi-stage filtering and compensation module 20.
[0059] The multi-stage filtering and compensation module in the present application includes but is not limited to three-stage filtering and compensation. This embodiment takes the three-stage filtering and compensation module as an example.
[0060] Specifically, the three-stage filtering and compensation module 20 includes: a negative sequence component filtering and compensation submodule 21 , a third harmonic filtering and compensation submodule 22 , and a fifth harmonic filtering and compensation submodule 23 .
[0061] The negative sequence component filtering and compensation submodule 21 is used to adjust the voltage of the two-phase stationary coordinate system according to the phase-locked loop output phase. 、 Perform positive and negative sequence separation to obtain the fundamental positive and negative sequence components. After filtering out the fundamental negative sequence component through high-pass filtering, perform amplitude and phase compensation and inverse Park transformation to obtain the voltage value of the fundamental positive sequence component after primary filtering and compensation in the two-phase stationary coordinate system. .
[0062] The third harmonic filtering and compensation submodule 22 is used to adjust the voltage value of the fundamental positive sequence component after the first level filtering and compensation in the two-phase stationary coordinate system according to the phase-locked loop output phase. Perform 3 times Rotational transformation is used to obtain the third harmonic voltage component. After high-pass filtering to remove the third harmonic voltage component, amplitude and phase compensation and inverse Park transformation are performed to obtain the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after secondary filtering and compensation. .
[0063] The fifth harmonic filtering and compensation submodule 23 is used to adjust the voltage value of the fundamental positive sequence component after secondary filtering and compensation in the two-phase stationary coordinate system according to the phase-locked loop output phase. Perform 5 times Rotational transformation is used to obtain the 5th harmonic voltage component. After high-pass filtering to remove the 5th harmonic voltage component, amplitude phase compensation and inverse Park transformation are performed to obtain the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after three-stage filtering and compensation. , and sent to the PLL phase-locked loop for PI control to obtain the phase information of the three-phase AC power grid.
[0064] The structures of these three submodules are the same, and the negative sequence component filtering and compensation submodule 21 is taken as an example for description below.
[0065] like Figure 2 As shown, the negative sequence component filtering and compensation submodule 21 includes a Park converter 211, a d-axis high-pass filter 212, a d-axis phase amplitude compensator 213, an inverse Park converter 214, a q-axis high-pass filter 215, and a q-axis phase amplitude compensator 216.
[0066] Park converter 211 is used to utilize the phase information output by the phase-locked loop , the voltage values of the α-axis and β-axis in the two-phase stationary coordinate system are Convert to d-axis and q-axis components in the rotating coordinate system , respectively sent to the d-axis high-pass filter 212 and the q-axis high-pass filter 215;
[0067] The d-axis high-pass filter 212 is used to The interference signal in the form of DC is filtered out, and the compensation Axis component Send to d-axis phase amplitude compensator 213;
[0068] The q-axis high-pass filter 215 is used to The interference signal in the form of DC is filtered out, and the compensation Axis component Sent to the q-axis phase amplitude compensator 216;
[0069] The d-axis phase amplitude compensator 213 is used to Perform phase amplitude compensation and Axis component sent to the inverse Park converter 214;
[0070] The q-axis phase amplitude compensator 216 is used to Perform phase amplitude compensation and Axis component sent to the inverse Park converter 214;
[0071] Inverse Park converter 214 is used to utilize the phase information output by the phase-locked loop , reverse the rotation transformation of the compensated d-axis and q-axis negative sequence components to obtain the voltage value of the two-phase stationary coordinate system after filtering and compensation .
[0072] It should be noted that the negative sequence component Park transformation is as follows:
[0073]
[0074]
[0075] The positive sequence component Park transform is as follows:
[0076]
[0077]
[0078] The Park transform of the hth harmonic component is as follows:
[0079]
[0080]
[0081] in, 、 Positive sequence In the coordinate system 、 Axis component; Negative sequence In the coordinate system 、 Axis component; h times respectively In the coordinate system 、 Axis component, They are the Park transformation matrix of the positive sequence component, the Park transformation matrix of the negative sequence component, and the Park transformation matrix of the hth harmonic component, respectively. is the positive sequence component in the two-phase stationary coordinate system αβ, is the negative sequence component in the two-phase stationary coordinate system αβ, is the hth harmonic component in the two-phase stationary coordinate system αβ, is the amplitude of the fundamental positive sequence component, is the amplitude of the fundamental negative sequence component, is the hth harmonic component amplitude (including DC bias amplitude), is the grid voltage fundamental positive sequence phase, is the phase of the negative sequence fundamental wave of the grid voltage, is the grid angular frequency, For time, is the harmonic order, which is 3 or 5 in this application.
[0082] The grid voltage fundamental positive sequence component, negative sequence component, third harmonic voltage component, and fifth harmonic voltage component can all be converted into DC components. This application uses a first-order high-pass filter to filter out interference signals in the form of negative sequence component, third harmonic voltage component, and fifth harmonic voltage component.
[0083] It should be noted that the transfer functions of the d-axis high-pass filter 212 and the q-axis high-pass filter 215 are both ,in, is the complex frequency in the Laplace transform, is the cutoff frequency constant of the high-pass filter, usually 0.2, is the cutoff frequency, and in the negative sequence fundamental component filtering, , in the negative sequence 3rd harmonic component filtering, take , in the negative sequence 5th harmonic component filtering, take .
[0084] Although the fundamental negative sequence component, the third harmonic component and the fifth harmonic component can be filtered out by a high-pass filter, the amplitude and phase of the filtered fundamental component are changed according to the high-pass filter transfer function. Therefore, it is necessary to compensate the amplitude and phase of the fundamental positive sequence component and finally obtain the d-axis component after compensation. and q-axis component Perform inverse Park transform to obtain the α-axis component and β-axis component of the fundamental positive sequence component, which are sent to the PLL phase-locked loop for PI control to obtain the phase information of the three-phase AC power grid.
[0085] It should be noted that the compensation functions of the d-axis phase amplitude compensator 213 and the q-axis phase amplitude compensator 216 are both .
[0086] The compensation calculation formula is as follows:
[0087]
[0088] in, 、 Before compensation 、 Axis component, After compensation 、 Axis component, is the cutoff frequency constant of the high-pass filter, usually 0.2, is the harmonic order.
[0089] The inverse Park transform matrix in the inverse Park transformer 214 is Park converter 211 The inverse matrix of .
[0090] The PLL phase-locked loop includes a Park converter 30 and a PLL module 40 .
[0091] The Park converter 30 is used to convert the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after three-stage filtering and compensation into Perform Park transformation to obtain the fundamental positive sequence component d-axis voltage value and q-axis voltage value , sent to the PLL module 40.
[0092] The PLL module 40 includes a PI controller 41 and an integral link 42, wherein the PI controller 41 is used to convert the q-axis voltage value of the fundamental positive sequence component into After PI control, the current error angular frequency is obtained , and combine it with the grid angular frequency feedforward control signal Superposition is performed to obtain the angular frequency , is sent to the integration link 42; the integration link 42 is used to convert the angular frequency Convert to The signal is sent to the Park converter 30 for phase-locked control.
[0093] like Figure 3 As shown, the present application provides a control method for a phase-locked loop based on multi-stage filtering and compensation, comprising:
[0094] Get the three-phase AC input voltage of the power grid 、 、 , input it into the Clark transformer;
[0095] The collected three-phase AC input voltage of the power grid is converted into a voltage in a two-phase stationary coordinate system through Clark transformation and sent to the multi-stage filtering and compensation module;
[0096] Filter out the negative sequence component and the third harmonic component in the voltage of the two-phase stationary coordinate system in sequence... Subharmonic component, after each stage of filtering, the amplitude and phase compensation of the d-axis and q-axis components of the filtered fundamental positive sequence component is performed;
[0097] The voltage value of the fundamental positive sequence component after K-level filtering and compensation in the two-phase stationary coordinate system is sent to the PLL phase-locked loop for control phase locking.
[0098] It is understandable that the detailed functional implementation of each of the above units / modules can be found in the introduction of the aforementioned method embodiment, and will not be repeated here.
[0099] It should be understood that the above-mentioned device is used to execute the method in the above-mentioned embodiment. The implementation principle and technical effect of the corresponding program module in the device are similar to those described in the above-mentioned method. The working process of the device can refer to the corresponding process in the above-mentioned method and will not be repeated here.
[0100] Based on the method in the above embodiment, an embodiment of the present application provides a computer-readable storage medium, which stores a computer program. When the computer program runs on a processor, the processor executes the method in the above embodiment.
[0101] Based on the method in the above embodiment, an embodiment of the present application provides a computer program product. When the computer program product runs on a processor, the processor executes the method in the above embodiment.
[0102] It is understood that the processor in the embodiments of the present application may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA), other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The general-purpose processor may be a microprocessor or any conventional processor.
[0103] The method steps in the embodiments of the present application can be implemented by hardware or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, which can be stored in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, mobile hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be an integral part of the processor. The processor and storage medium can be located in an ASIC.
[0104] The above embodiments can be implemented in whole or in part using software, hardware, firmware, or any combination thereof. When implemented using software, they can be implemented in whole or in part in the form of a computer program product. The computer program product comprises one or more computer instructions. When loaded and executed on a computer, the computer program instructions fully or partially produce the processes or functions described in the embodiments of this application. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted via the computer-readable storage medium. The computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible by a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium can be magnetic media (e.g., floppy disk, hard disk, tape), optical media (e.g., DVD), or semiconductor media (e.g., solid-state drive (SSD)).
[0105] It will be understood that the various numerical numbers involved in the embodiments of the present application are merely distinctions for the convenience of description and are not intended to limit the scope of the embodiments of the present application.
[0106] It is easy for those skilled in the art to understand that the above is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the scope of protection of the present application.
Claims
1. A phase-locked loop based on multi-stage filtering and compensation, characterized in that: include: Clark converter, used to convert the collected three-phase AC input voltage of the power grid into a two-phase stationary coordinate system voltage through Clark transformation, and send it to the K-level filtering and compensation module; K-level filtering and compensation module is used to filter out the negative sequence component, third harmonic component, and... Subharmonic components, after each level of filtering, the amplitude and phase of the d-axis and q-axis components of the filtered fundamental positive sequence component are compensated and used as the compensation input for the next level of filtering; The PLL phase-locked loop is used to receive the voltage value of the fundamental positive sequence component after K-level filtering and compensation in the two-phase stationary coordinate system, perform phase locking control, and obtain the phase information of the three-phase AC power grid; The K-level filtering and compensation module includes: a negative sequence component filtering and compensation submodule, a third harmonic filtering and compensation submodule... and Subharmonic filtering and compensation submodule; The negative sequence component filtering and compensation submodule is used to adjust the voltage in the two-phase stationary coordinate system according to the phase-locked loop output phase. 、 Perform positive and negative sequence separation to obtain the fundamental positive and negative sequence components. After filtering out the negative sequence components with high-pass filtering, perform amplitude and phase compensation and inverse Park transformation to obtain the voltage value of the fundamental positive sequence component after primary filtering and compensation in the two-phase stationary coordinate system. ; The third harmonic filtering and compensation submodule is used to adjust the voltage value of the fundamental positive sequence component after the first level filtering and compensation in the two-phase stationary coordinate system according to the phase-locked loop output phase. Perform 3 times Rotational transformation is used to obtain the third harmonic voltage component. After high-pass filtering to remove the third harmonic voltage component, amplitude and phase compensation and inverse Park transformation are performed to obtain the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after secondary filtering and compensation. ; described Subharmonic filtering and compensation submodule is used to adjust the harmonics according to the phase-locked loop output phase. The voltage value of the fundamental positive sequence component after level filtering and compensation in the two-phase stationary coordinate system conduct Second-rate Rotation transformation, we get Subharmonic voltage components are filtered out by high-pass filtering After the subharmonic voltage components are obtained, amplitude and phase compensation and inverse Park transformation are performed to obtain The voltage value of the fundamental positive sequence component after level filtering and compensation in the two-phase stationary coordinate system , sent to the PLL phase-locked loop.
2. The phase-locked loop according to claim 1, wherein: Negative sequence component filtering and compensation submodule, 3rd harmonic filtering and compensation submodule... and Subharmonic filtering and compensation submodules have the same structure but different parameters.
3. The phase-locked loop according to claim 2, wherein: Submodules with the same structure include: Park converter, used to utilize the phase information output by the phase-locked loop , the voltage values of the α-axis and β-axis in the two-phase stationary coordinate system are Convert to d-axis and q-axis components in the rotating coordinate system 、 , respectively sent to the d-axis high-pass filter and the q-axis high-pass filter; d-axis high-pass filter, used to convert The interference signal in the form of DC is filtered out, and the compensation Axis component Send to the d-axis phase amplitude compensator; q-axis high-pass filter, used to convert The interference signal in the form of DC is filtered out, and the compensation Axis component Send to the q-axis phase amplitude compensator; d-axis phase amplitude compensator, used for Perform phase amplitude compensation and Axis component Send to the anti-Park converter; The q-axis phase amplitude compensator is used to Perform phase amplitude compensation and Axis component Send to the anti-Park converter; Inverse Park converter, used to utilize the phase information of the phase-locked loop output , reverse the rotation transformation of the compensated d-axis and q-axis negative sequence components to obtain the voltage value of the two-phase stationary coordinate system after filtering and compensation .
4. The phase-locked loop according to claim 3, wherein: The negative sequence component Park transform is as follows: The positive sequence component Park transform is as follows: The Park transform of the hth harmonic component is as follows: in, Positive sequence components In the coordinate system 、 Axis component; Negative sequence components In the coordinate system 、 Axis component; are the hth harmonic components respectively In the coordinate system 、 Axis component, They are the Park transformation matrix of the positive sequence component, the Park transformation matrix of the negative sequence component, and the Park transformation matrix of the hth harmonic component, respectively. is the αβ axis component of the positive sequence component in the two-phase stationary coordinate system, is the αβ axis component of the negative sequence component in the two-phase stationary coordinate system, is the αβ axis component of the hth harmonic in the two-phase stationary coordinate system, is the amplitude of the fundamental positive sequence component, is the amplitude of the fundamental negative sequence component, is the amplitude of the hth harmonic component, is the grid voltage fundamental positive sequence phase, is the phase of the negative sequence fundamental wave of the grid voltage, is the grid angular frequency, For time, is the harmonic order.
5. The phase-locked loop according to claim 3, wherein: The transfer function of the high-pass filter is ,in, is the complex frequency in the Laplace transform, is the high-pass filter cutoff frequency constant, is the cutoff frequency, and in the negative sequence fundamental component filtering, , in the negative sequence 3rd harmonic component filtering, take , in negative sequence Subharmonic component filtering .
6. The phase-locked loop according to claim 3, wherein: The calculation formula for the phase amplitude compensation is as follows: in, Before compensation 、 Axis component, After compensation 、 Axis component, is the high-pass filter cutoff frequency constant, is the harmonic order.
7. The phase-locked loop according to claim 1, wherein: The PLL phase-locked loop comprises: Park converter is used to perform Park conversion on the voltage value of the two-phase stationary coordinate system of the fundamental positive sequence component after multi-stage filtering and compensation to obtain the d-axis voltage value of the fundamental positive sequence component. and q-axis voltage value , sent to the PLL module; The PLL module includes a PI controller and an integral link, among which, The PI controller is used to convert the q-axis voltage value of the fundamental positive sequence component After PI control, the current error angular frequency is obtained , and combine it with the grid angular frequency feedforward control signal Superposition is performed to obtain the angular frequency , sent to the points link; The integration link is used to convert the angular frequency Convert to The signal is sent to the Park converter for phase-locked control.
8. A control method for a phase-locked loop based on multi-stage filtering and compensation according to any one of claims 1 to 7, characterized in that: include: Get the three-phase AC input voltage of the power grid 、 、 , input it into the Clark transformer; The collected three-phase AC input voltage of the power grid is converted into a voltage in a two-phase stationary coordinate system through Clark transformation and sent to the K-level filtering and compensation module; Filter out the negative sequence component and the third harmonic component in the voltage of the two-phase stationary coordinate system in sequence... Subharmonic component, after each stage of filtering, the amplitude and phase compensation of the d-axis and q-axis components of the filtered fundamental positive sequence component is performed; The voltage value of the fundamental positive sequence component after K-level filtering and compensation in the two-phase stationary coordinate system is sent to the PLL phase-locked loop for control phase locking.
9. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed on a processor, the processor is caused to execute the control method according to claim 8 .
Citation Information
Patent Citations
Three-phase grid-connected phase-locked loop based on double-layer filtering
CN117081152A