Balanced hybrid topology circuit of UPS system bus

Abstract

The embodiment of the invention discloses a bus balance hybrid topology circuit of a UPS system. The bus balance hybrid topology circuit comprises an A-phase branch, a B-phase branch, a C-phase branch, a battery positive discharge unit, a battery negative discharge unit and a bus balance unit, the A-phase branch comprises a first dual-BOOST PFC (Power Factor Correction) circuit; the C-phase branch circuit comprises a second dual-BOOST PFC circuit; the B-phase branch comprises a first change-over switch and a Vienna PFC circuit; the Vienna PFC circuit comprises a bus balance unit, and the Vienna PFC circuit is connected with the first change-over switch; the battery positive discharge unit and the battery negative discharge unit are respectively connected with the battery; and each circuit is connected with a direct-current power supply. By implementing the circuit provided by the embodiment of the invention, the midpoint cable of the battery can be removed, the voltage balance of the battery can be realized by adding the bus balancing circuit, the cable erection cost is reduced, and the increase of the design complexity and the cost of a PCB (Printed Circuit Board) can be reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of UPS systems, and in particular to a UPS system busbar balancing hybrid topology circuit. Background Art

[0002] In conventional three-phase uninterruptible power supply systems, most inverters use a three-level inverter structure, which includes a positive bus and a negative bus. In order to effectively manage the battery current, the battery discharge circuit is usually divided into a positive side battery discharge circuit and a negative side battery discharge circuit, such as Figure 1 As shown, the battery pack generally consists of two parts, namely, a positive battery pack and a negative battery pack. The battery pack is connected to the UPS system through the following three main cables, namely, a battery positive cable connected to the positive pole of the battery pack, a battery midpoint cable connected to the midpoint of the battery pack, and a battery negative cable connected to the negative pole of the battery pack.

[0003] In conventional applications, the wire diameter of the battery midpoint cable should be consistent with the wire diameter of the battery positive and negative cables to ensure balanced current distribution. However, in actual applications, especially when the power of the UPS system is large, the installation cost of the battery midpoint cable may be very high. This is because the battery midpoint cable carries almost no current under normal working conditions, and only carries current under special circumstances such as a short circuit on the UPS end. Therefore, the cost performance of the battery midpoint cable is relatively low. In order to reduce the cost of cable installation, reduce waste, and contribute to energy conservation and emission reduction, the industry hopes to remove the battery midpoint cable. To this end, one of the current technical solutions is to introduce a bus balancing circuit, such as Figure 2 As shown, inductor L3, switch elements Q3 and Q4 constitute a bus balancing circuit, which maintains the balance of the battery pack by adjusting the voltage difference between the positive and negative busbars. The introduction of this balancing circuit can effectively realize the midpoint cable function of the battery pack, thereby removing the battery midpoint cable in the design. A side effect of this solution is that it increases the size and cost of the PCB.

[0004] Therefore, it is necessary to design a new circuit that can not only remove the battery midpoint cable and achieve battery voltage balance by adding a bus balancing circuit, reduce the cable installation cost, but also reduce the increase in PCB design complexity and cost. Summary of the invention

[0005] The purpose of the present invention is to overcome the defects of the prior art and provide a UPS system busbar balancing hybrid topology circuit.

[0006] To solve the above technical problems, the objective of the present invention is achieved through the following technical solutions: providing a UPS system bus balancing hybrid topology circuit, comprising: an A-phase branch, a B-phase branch, a C-phase branch, a battery positive discharge unit, a battery negative discharge unit and a bus balancing unit; the A-phase branch comprises a first dual BOOST PFC circuit; the C-phase branch comprises a second dual BOOST PFC circuit; the B-phase branch comprises a first switching switch and a Vienna PFC circuit; the Vienna PFC circuit comprises the bus balancing unit, and the Vienna PFC circuit is connected to the first switching switch; the battery positive discharge unit and the battery negative discharge unit are respectively connected to batteries; the first dual BOOST PFC circuit, the second dual BOOST PFC circuit and the Vienna PFC circuit are respectively connected to a DC power supply.

[0007] Its further technical solution is: the DC power supply includes a positive electrode and a negative electrode; the bus balancing unit includes a second switching switch RLY2, an inductor L5, a switching element Q9 and a switching element Q10; one end of the second switching switch RLY2 is connected to one end of the inductor L5; one end of the switching element Q9 and the switching element Q10 are respectively connected to the other end of the inductor L5; the other end of the switching element Q9 is connected to the DC power supply positive discharge unit; the other end of the switching element Q10 is connected to the negative electrode of the DC power supply.

[0008] A further technical solution is as follows: the switch element Q9 and the switch element Q10 are switch tubes with integrated anti-parallel diodes respectively.

[0009] Its further technical solution is: the Vienna PFC circuit includes the inductor L5, the switching element Q9, the switching element Q10, the switching tube Q11 integrated with an anti-parallel diode and the switching tube Q12 integrated with an anti-parallel diode; one end of the switching tube Q11 integrated with an anti-parallel diode is connected to the other end of the inductor L5; the other end of the switching tube Q11 integrated with an anti-parallel diode is connected to one end of the switching tube Q12 integrated with an anti-parallel diode; the other end of the switching tube Q12 integrated with an anti-parallel diode is connected to the neutral point.

[0010] Its further technical solution is: the bus balancing unit includes a switch tube Q11 with an integrated anti-parallel diode, a switch tube Q12 with an integrated anti-parallel diode, an inductor L5, a switch element Q9 and a switch element Q10; one end of the switch element Q9 and the switch element Q10 are respectively connected to one end of the inductor L5; one end of the inductor L5 is connected to the first switching switch; the other end of the inductor L5 is connected to one end of the switch tube Q11 with an integrated anti-parallel diode; the other end of the switch tube Q11 with an integrated anti-parallel diode is connected to one end of the switch tube Q12 with an integrated anti-parallel diode; the other end of the switch tube Q12 with an integrated anti-parallel diode is connected to the neutral point.

[0011] Its further technical solution is: the Vienna PFC circuit includes the inductor L5, the switching element Q9, the switching element Q10, the diode D5 and the diode D6; one end of the diode D5 and the diode D6 are respectively connected to the other end of the inductor L5; the other end of the diode D5 is connected to the neutral point; the other end of the diode D6 is connected to the neutral point.

[0012] Its further technical solution is: the first dual BOOST PFC circuit includes a thyristor Q1, a thyristor Q2, an inductor L1, an inductor L4, a switch tube Q15 with an integrated anti-parallel diode, a switch tube Q16 with an integrated anti-parallel diode, a diode D1, and a diode D4; one end of the thyristor Q1 is connected to the neutral point, the other end of the thyristor Q1 is connected to one end of the inductor L1, the other end of the inductor L1 is connected to one end of the diode D1, and the other end of the diode D1 is connected to the positive electrode of the DC power supply; one end of the thyristor Q2 is connected to the neutral point, the other end of the thyristor Q2 is connected to one end of the inductor L4, the other end of the inductor L4 is connected to one end of the diode D4, and the other end of the diode D4 is connected to the negative electrode of the DC power supply.

[0013] Its further technical solution is: the second dual BOOST PFC circuit includes a thyristor Q3, a thyristor Q4, an inductor L2, an inductor L3, a switch tube Q13 with an integrated anti-parallel diode, a switch tube Q14 with an integrated anti-parallel diode, a diode D2, and a diode D3; one end of the thyristor Q3 is connected to the neutral point, the other end of the thyristor Q3 is connected to one end of the inductor L2, the other end of the inductor L2 is connected to one end of the diode D2, and the other end of the diode D2 is connected to the positive electrode of the DC power supply; one end of the thyristor Q4 is connected to the neutral point, the other end of the thyristor Q4 is connected to one end of the inductor L3, the other end of the inductor L3 is connected to one end of the diode D3, and the other end of the diode D3 is connected to the negative electrode of the DC power supply.

[0014] Its further technical solution is: the battery includes a positive electrode and a negative electrode, the battery positive discharge unit includes a thyristor Q5, a thyristor Q7, the inductor L1, the inductor L2, the switch tube Q13 integrated with an anti-parallel diode, the switch tube Q15 integrated with an anti-parallel diode, the diode D1 and the diode D2; one end of the thyristor Q5 and the thyristor Q7 are respectively connected to the positive electrode of the battery; the other end of the thyristor Q5 is connected to one end of the inductor L2, and the other end of the thyristor Q7 is connected to one end of the inductor L1.

[0015] The further technical solution is as follows: the battery negative discharge unit comprises a thyristor Q6, a thyristor Q8, the inductor L3, the inductor L4, the switch tube Q14 with integrated anti-parallel diode, the switch tube Q16 with integrated anti-parallel diode, a diode D3 and a diode D4; one end of the thyristor Q6 and the thyristor Q8 are respectively connected to the negative electrode of the battery; the other end of the thyristor Q6 is connected to one end of the inductor L3, and the other end of the thyristor Q8 is connected to one end of the inductor L4. The beneficial effects of the present invention compared with the prior art are as follows: the present invention sets A-phase, B-phase and C-phase branches, as well as a battery discharge unit and a bus balancing unit. The A-phase branch and the C-phase branch each include a dual BOOST PFC circuit, and the B-phase branch is equipped with a Vienna PFC circuit and a first switching switch. All these circuit units are connected to a DC power supply and a battery. The Vienna PFC circuit includes a bus balancing unit. By reusing the rectifier power device of the Vienna PFC, a balanced circuit structure is formed. The battery midpoint cable can be removed and the battery voltage balance can be achieved by adding a bus balancing circuit, thereby reducing the cable installation cost and reducing the increase in PCB design complexity and cost.

[0016] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.

[0018] Figure 1 A circuit schematic diagram of a battery discharge circuit in the prior art; Figure 2 It is a circuit schematic diagram of a bus balancing circuit in the prior art; Figure 3 A schematic diagram showing a bus balancing hybrid topology circuit of a UPS system provided by an embodiment of the present invention; Figure 4 A schematic diagram of current flow direction of the A-phase branch of a UPS system bus balancing hybrid topology circuit in the positive half-cycle inductor L1 energy storage stage provided by an embodiment of the present invention; Figure 5 A schematic diagram of current flow direction of a phase A branch of a UPS system busbar balancing hybrid topology circuit in a positive half-cycle inductor L1 energy release stage provided by an embodiment of the present invention; Figure 6 A schematic diagram of current flow direction of the A-phase branch of a UPS system bus balancing hybrid topology circuit in the negative half-cycle inductor L4 energy storage stage provided by an embodiment of the present invention; Figure 7 A schematic diagram of current flow direction of a phase A branch of a UPS system bus balancing hybrid topology circuit in a negative half-cycle inductor L4 energy release stage provided by an embodiment of the present invention; Figure 8 A schematic diagram of current flow direction of a B-phase branch of a UPS system bus balancing hybrid topology circuit in a positive half-cycle inductor L5 energy storage stage provided by an embodiment of the present invention; Fig. 9 A schematic diagram of current flow direction of a B-phase branch of a UPS system bus balancing hybrid topology circuit in a positive half-cycle inductor L5 energy release stage provided by an embodiment of the present invention; Fig.10 A schematic diagram of current flow direction of a B-phase branch of a UPS system bus balancing hybrid topology circuit in a negative half-cycle inductor L5 energy storage stage provided by an embodiment of the present invention; Fig.11 A schematic diagram of current flow direction of a B-phase branch of a UPS system bus balancing hybrid topology circuit in a negative half-cycle inductor L5 energy release stage provided by an embodiment of the present invention; Fig.12 A schematic diagram of current flow during the energy storage phase of the A-phase branch battery positive electrode discharge inductor L1 of a UPS system busbar balancing hybrid topology circuit provided by an embodiment of the present invention; Fig.13 A schematic diagram of current flow during the energy storage and release phase of the A-phase branch battery positive electrode discharge inductor L1 of a UPS system busbar balancing hybrid topology circuit provided by an embodiment of the present invention; Fig.14 A schematic diagram of current flow during the energy storage phase of the C-phase branch battery positive electrode discharge inductor L2 of a UPS system bus balancing hybrid topology circuit provided by an embodiment of the present invention; Fig.15 A schematic diagram of current flow during the energy release phase of the C-phase branch battery positive electrode discharge inductor L2 of a UPS system busbar balancing hybrid topology circuit provided by an embodiment of the present invention; Fig.16A schematic diagram of current flow during the energy storage phase of the A-phase branch battery negative electrode discharge inductor L4 of a UPS system bus balancing hybrid topology circuit provided by an embodiment of the present invention; Fig.17 A schematic diagram of current flow during the energy storage and release phase of the A-phase branch battery negative electrode discharge inductor L4 of a UPS system bus balancing hybrid topology circuit provided by an embodiment of the present invention; Fig.18 A schematic diagram of current flow during the energy storage phase of the C-phase branch battery negative electrode discharge inductor L3 of a UPS system bus balancing hybrid topology circuit provided by an embodiment of the present invention; Fig.19 A schematic diagram of current flow during the energy release phase of the C-phase branch battery negative electrode discharge inductor L3 of a UPS system busbar balancing hybrid topology circuit provided by an embodiment of the present invention; Fig. 20 A schematic diagram of current flow during the energy storage stage of the inductor L5 transferring energy from the positive bus to the negative bus of a UPS system bus balancing hybrid topology circuit provided by an embodiment of the present invention; Fig.21 A schematic diagram of current flow during the energy release stage of the inductor L5 transferring energy from the positive bus to the negative bus of a UPS system bus balancing hybrid topology circuit provided by an embodiment of the present invention; Fig. 22 A schematic diagram of current flow during the energy storage stage of the inductor L5 transferring energy from the negative bus of the B-phase branch to the positive bus of a UPS system bus balancing hybrid topology circuit provided by an embodiment of the present invention; Fig.23 A schematic diagram of current flow during the energy release stage of the inductor L5 transferring energy from the negative bus of the B-phase branch to the positive bus of a UPS system bus balancing hybrid topology circuit provided by an embodiment of the present invention; Fig.24 A specific circuit schematic diagram of a UPS system bus balancing hybrid topology circuit provided by another embodiment of the present invention; Fig.25 A schematic diagram of current flow during the energy storage stage of the inductor L5 transferring energy from the positive bus to the negative bus of a UPS system bus balancing hybrid topology circuit provided by another embodiment of the present invention; Fig.26 A schematic diagram of current flow during the energy release stage of the inductor L5 transferring energy from the positive bus to the negative bus of a UPS system bus balancing hybrid topology circuit provided by another embodiment of the present invention; Fig. 27A schematic diagram of current flow during the energy storage stage of the inductor L5 transferring energy from the negative bus of the B-phase branch to the positive bus of a UPS system bus balancing hybrid topology circuit provided by another embodiment of the present invention; Fig.28 A schematic diagram of current flow during the energy release stage of the inductor L5 when the negative bus of the B-phase branch of a UPS system bus balancing hybrid topology circuit transfers energy to the positive bus in accordance with another embodiment of the present invention. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0020] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0021] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0022] It should be further understood that the term "and / or" used in the present description and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0023] The introduction of the existing balancing circuit can effectively realize the midpoint cable function of the battery pack, thereby removing the battery midpoint cable in the design. A side effect of this solution is that it increases the size and cost of the PCB.

[0024] To this end, an embodiment of the present invention proposes a UPS system bus balanced hybrid topology circuit, wherein the A / C two-phase is a dual BOOST PFC circuit, and the B phase is a Vienna PFC circuit. By reusing the rectifier power devices of the Vienna PFC, a balanced circuit structure is formed, thereby reducing system cost and PCB size.

[0025] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0026] See also Figures 3 to 23 A UPS system bus balancing hybrid topology circuit includes: an A-phase branch, a B-phase branch, a C-phase branch, a battery positive discharge unit, a battery negative discharge unit and a bus balancing unit; the A-phase branch includes a first dual BOOST PFC circuit; the C-phase branch includes a second dual BOOST PFC circuit; the B-phase branch includes a first switching switch and a Vienna PFC circuit; the Vienna PFC circuit includes a bus balancing unit, and the Vienna PFC circuit is connected to the first switching switch; the battery positive discharge unit and the battery negative discharge unit are respectively connected to the battery; the first dual BOOST PFC circuit, the second dual BOOST PFC circuit and the Vienna PFC circuit are respectively connected to a DC power supply.

[0027] The A phase branch, the B phase branch and the C phase branch are connected to the mains respectively.

[0028] Dual BOOST PFC circuit (Phase A and Phase C): Improves the power factor and increases the input voltage to the required voltage level; Vienna PFC circuit (Phase B): Improves the power factor and has a built-in bus balancing unit, which maintains bus voltage stability by balancing current distribution, reducing the need for additional cables.

[0029] By reusing the rectifier power devices of the Vienna PFC circuit, the bus balancing function is achieved, avoiding additional cable wiring, thereby reducing the PCB size and overall system cost; reducing the midpoint cable, reducing the wiring complexity and possible failure points; the hybrid topology is used to optimize the circuit design, making the system more integrated; and optimizing the balancing circuit in the traditional UPS system.

[0030] In one embodiment, see Figure 3 The above-mentioned DC power supply includes a positive electrode and a negative electrode; the bus balancing unit includes a second switching switch RLY2, an inductor L5, a switching element Q9 and a switching element Q10; one end of the second switching switch RLY2 is connected to one end of the inductor L5; one end of the switching element Q9 and the switching element Q10 are respectively connected to the other end of the inductor L5; the other end of the switching element Q9 is connected to the DC power supply positive discharge unit; the other end of the switching element Q10 is connected to the negative electrode of the DC power supply.

[0031] In one embodiment, see Figure 3 The above-mentioned switch element Q9 and switch element Q10 are switch tubes with integrated anti-parallel diodes.

[0032] In one embodiment, see Figure 3The above-mentioned Vienna PFC circuit includes an inductor L5, a switching element Q9, a switching element Q10, a switching tube Q11 integrated with an anti-parallel diode, and a switching tube Q12 integrated with an anti-parallel diode; one end of the switching tube Q11 integrated with an anti-parallel diode is connected to the other end of the inductor L5; the other end of the switching tube Q11 integrated with an anti-parallel diode is connected to one end of the switching tube Q12 integrated with an anti-parallel diode; the other end of the switching tube Q12 integrated with an anti-parallel diode is connected to the neutral point.

[0033] In one embodiment, see Figure 3 The first dual BOOST PFC circuit includes a thyristor Q1, a thyristor Q2, an inductor L1, an inductor L4, a switch tube Q15 with an integrated anti-parallel diode, a switch tube Q16 with an integrated anti-parallel diode, a diode D1, and a diode D4; one end of the thyristor Q1 is connected to the neutral point, the other end of the thyristor Q1 is connected to one end of the inductor L1, the other end of the inductor L1 is connected to one end of the diode D1, and the other end of the diode D1 is connected to the positive electrode of the DC power supply; one end of the thyristor Q2 is connected to the neutral point, the other end of the thyristor Q2 is connected to one end of the inductor L4, the other end of the inductor L4 is connected to one end of the diode D4, and the other end of the diode D4 is connected to the negative electrode of the DC power supply.

[0034] In one embodiment, see Figure 3 The above-mentioned second dual BOOST PFC circuit includes a thyristor Q3, a thyristor Q4, an inductor L2, an inductor L3, a switch tube Q13 with an integrated anti-parallel diode, a switch tube Q14 with an integrated anti-parallel diode, a diode D2, and a diode D3; one end of the thyristor Q3 is connected to the neutral point, the other end of the thyristor Q3 is connected to one end of the inductor L2, the other end of the inductor L2 is connected to one end of the diode D2, and the other end of the diode D2 is connected to the positive electrode of the DC power supply; one end of the thyristor Q4 is connected to the neutral point, the other end of the thyristor Q4 is connected to one end of the inductor L3, the other end of the inductor L3 is connected to one end of the diode D3, and the other end of the diode D3 is connected to the negative electrode of the DC power supply.

[0035] In one embodiment, see Figure 3 The above-mentioned battery includes a positive electrode and a negative electrode, and the battery positive discharge unit includes a thyristor Q5, a thyristor Q7, an inductor L1, an inductor L2, a switch tube Q13 integrated with an anti-parallel diode, a switch tube Q15 integrated with an anti-parallel diode, a diode D1 and a diode D2; one end of the thyristor Q5 and the thyristor Q7 are respectively connected to the positive electrode of the battery; the other end of the thyristor Q5 is connected to one end of the inductor L2, and the other end of the thyristor Q7 is connected to one end of the inductor L1.

[0036] The battery positive discharge unit includes two paths, and the two paths are staggered in parallel.

[0037] In one embodiment, see Figure 3 The above-mentioned battery negative discharge unit includes a thyristor Q6, a thyristor Q8, an inductor L3, an inductor L4, a switch tube Q14 integrated with an anti-parallel diode, a switch tube Q16 integrated with an anti-parallel diode, a diode D3 and a diode D4; one end of the thyristor Q6 and the thyristor Q8 are respectively connected to the negative electrode of the battery; the other end of the thyristor Q6 is connected to one end of the inductor L3, and the other end of the thyristor Q8 is connected to one end of the inductor L4.

[0038] The negative discharge unit of the battery includes two paths, and the two paths are staggered in parallel.

[0039] In one embodiment, a capacitor C1 is connected between the positive electrode of the DC power supply and the neutral point, and a capacitor C2 is connected between the neutral point and the negative electrode of the DC power supply.

[0040] When the UPS works in the main mode, the first switch (in this embodiment, the relay RLY1) of the B phase branch is closed, the second switch RLY2 is opened, the switch element Q9 and the switch element Q10 are not driven, and only the switch element Q9 and the anti-parallel diode in the switch element Q10 are involved in the work, and the circuit mainly realizes the PFC function. The energy flow in the main mode specifically includes the following: See also Figure 4 When the A-phase branch is in the positive half cycle, the switch tube Q15 with integrated anti-parallel diode is turned on. At this time, the current starts from the neutral point, passes through the thyristor Q1, the inductor L1, the switch tube Q15 with integrated anti-parallel diode in sequence, and then returns to the neutral point. During the whole process, the inductor L1 is in the energy storage state; See also Figure 5 When the A-phase branch is in the positive half cycle, the switch tube Q15 with integrated anti-parallel diode is turned off. At this time, the current starts from the neutral point, passes through the thyristor Q1, inductor L1, diode D1, capacitor C1 in sequence, and then returns to the neutral point. During the whole process, the inductor L1 is in the state of releasing energy; See also Figure 6 When the A-phase branch is in the negative half cycle, the switch tube Q16 with integrated anti-parallel diode is turned on. At this time, the current starts from the neutral point, passes through the switch tube Q16 with integrated anti-parallel diode, inductor L4, thyristor Q2 in sequence, and then returns to the neutral point. During the whole process, the inductor L4 is in the energy storage state; See also Figure 7 When the A-phase branch is in the negative half cycle, the switch tube Q16 with integrated anti-parallel diode is turned off. At this time, the current starts from the neutral point, passes through the capacitor C2, the diode D4, the inductor L4, the thyristor Q2 in sequence, and then returns to the neutral point. During the whole process, the inductor L4 is in the energy release state; See also Figure 8When the B-phase branch is in the positive half cycle, the switch tube Q11 with integrated anti-parallel diode and the switch tube Q12 with integrated anti-parallel diode are turned on. At this time, the current starts from the neutral point and passes through the first switching switch, the inductor L5, the switch tube Q11 with integrated anti-parallel diode, and the switch tube Q12 with integrated anti-parallel diode in sequence before returning to the neutral point. During the whole process, the inductor L5 is in the energy storage state; See also Fig. 9 When the B-phase branch is in the positive half cycle, the switch tube Q11 with integrated anti-parallel diode and the switch tube Q12 with integrated anti-parallel diode are turned off. At this time, the current starts from the neutral point and returns to the neutral point after passing through the first switching switch, inductor L5, switch element Q9, capacitor C1 in sequence. During the whole process, the inductor L5 is in the energy release state; See also Fig.10 When the B-phase branch is in the negative half cycle, the switch tube Q14 with integrated anti-parallel diode is turned on, and the current starts from the neutral point, passes through the switch tube Q12 with integrated anti-parallel diode, the switch tube Q11 with integrated anti-parallel diode, the inductor L5 and the first switching switch in sequence, and then returns to the neutral point. During the whole process, the inductor L5 is in the energy storage state; See also Fig.11 When the B-phase branch is in the negative half cycle, the switch tube Q14 with the integrated anti-parallel diode is turned off, and the current starts from the neutral point and passes through the capacitor C2, the switch element Q10, the inductor L5 and the first switching switch in sequence before returning to the neutral point. During the whole process, the inductor L5 is in the energy release state;

[0041] When the C phase branch is in the positive half cycle, the switch tube Q13 with integrated anti-parallel diode is turned on. At this time, the current starts from the neutral point, passes through the thyristor Q3, the inductor L2, the switch tube Q13 with integrated anti-parallel diode in sequence, and then returns to the neutral point. During the whole process, the inductor L2 is in an energy storage state.

[0042] When the C phase branch is in the positive half cycle, the switch tube Q13 with integrated anti-parallel diode is turned off. At this time, the current starts from the neutral point, passes through the thyristor Q3, inductor L2, diode D2, capacitor C1 in sequence, and then returns to the neutral point. During the whole process, the inductor L2 is in a state of releasing energy.

[0043] When the C phase branch is in the negative half cycle, the switch tube Q14 with integrated anti-parallel diode is turned on. At this time, the current starts from the neutral point, passes through the switch tube Q14 with integrated anti-parallel diode, inductor L3, thyristor Q4 in sequence, and then returns to the neutral point. During the whole process, the inductor L3 is in an energy storage state.

[0044] When the C phase branch is in the negative half cycle, the switch tube Q14 with integrated anti-parallel diode is turned off. At this time, the current starts from the neutral point, passes through capacitor C2, diode D3, inductor L3, thyristor Q4 in sequence, and then returns to the neutral point. During the whole process, the inductor L3 is in a state of releasing energy.

[0045] When the UPS works in battery mode, the positive circuit of the A / C phase branch of the PFC realizes the positive discharge function of the battery, the negative circuit of the A / C phase branch realizes the negative discharge function of the battery, and the B phase branch realizes the balancing bridge function. The specific energy flows include the following: See also Fig.12 For the A-phase branch, when the positive electrode of the battery is discharged, when the switch tube Q15 with integrated anti-parallel diode is turned on, the current starts from the positive electrode of the battery, passes through the thyristor Q7, the inductor L1, and the switch tube Q15 with integrated anti-parallel diode in sequence, and then returns to the neutral point. During the whole process, the inductor L1 is in the energy storage state; See also Fig.13 For the A-phase branch, when the positive electrode of the battery is discharged, when the switch tube Q15 with integrated anti-parallel diode is turned off, the current starts from the positive electrode of the battery, passes through the thyristor Q7, inductor L1, diode D1, capacitor C1 in sequence, and then returns to the neutral point. During the whole process, the inductor L1 is in the state of releasing energy; See also Fig.14 For the C phase branch, when the positive electrode of the battery is discharged, when the switch tube Q13 with integrated anti-parallel diode is turned on, the current starts from the positive electrode of the battery, passes through the thyristor Q5, the inductor L1, the switch tube Q13 with integrated anti-parallel diode in sequence, and then returns to the neutral point. During the whole process, the inductor L2 is in the energy storage state; See also Fig.15 For the C phase branch, when the positive electrode of the battery is discharged, when the switch tube Q13 with integrated anti-parallel diode is turned off, the current starts from the positive electrode of the battery, passes through the thyristor Q5, inductor L2, diode D2, capacitor C1 in sequence, and then returns to the neutral point. During the whole process, the inductor L2 is in the state of releasing energy; See also Fig.16 For the A-phase branch, when the negative electrode of the battery is discharged, when the switch tube Q16 with integrated anti-parallel diode is turned on, the current starts from the neutral point, passes through the switch tube Q16 with integrated anti-parallel diode, inductor L4, thyristor Q8 in sequence, and then returns to the negative electrode of the battery. During the whole process, the inductor L4 is in the energy storage state; See also Fig.17 For the A-phase branch, when the negative electrode of the battery is discharged, when the switch tube Q16 with integrated anti-parallel diode is turned off, the current starts from the neutral point and returns to the negative electrode of the battery through the capacitor C2, the diode D4, the inductor L4, and the thyristor Q8 in sequence. During the whole process, the inductor L4 is in the state of releasing energy; See also Fig.18 For the C phase branch, when the negative electrode of the battery is discharged, when the switch tube Q14 with integrated anti-parallel diode is turned on, the current starts from the neutral point, passes through the switch tube Q14 with integrated anti-parallel diode, inductor L3, thyristor Q6 in sequence, and then returns to the negative electrode of the battery. During the whole process, the inductor L3 is in the energy storage state; See also Fig.19 For the C phase branch, when the negative electrode of the battery is discharged, when the switch tube Q13 with integrated anti-parallel diode is turned off, the current starts from the neutral point and passes through the capacitor C2, diode D3, inductor L3, and thyristor Q6 in sequence back to the negative electrode of the battery. During the whole process, the inductor L3 is in a state of releasing energy.

[0046] Among them, the discharge work of the positive electrode of the battery in the A / C phase branch is staggered in parallel, and the discharge work of the negative electrode of the battery in the A / C phase branch is staggered in parallel.

[0047] In the B phase branch, the relay RLY1, i.e. the first switch, is disconnected, the second switch RLY2 is closed, and the switch elements Q9, Q10, and the inductor L5 form a balanced circuit. The working energy flow diagram is as follows: See also Fig. 20 , the positive busbar transfers energy to the negative busbar, and the switch element Q9 is turned on. At this time, the current starts from the neutral point, passes through the capacitor C1, the switch element Q9, the inductor L5 in sequence, and then returns to the neutral point through the second switch. During the whole process, the inductor L5 is in the energy storage state; See also Fig.21 , the positive busbar transfers energy to the negative busbar, and the switch element Q9 is turned off. At this time, the current starts from the neutral point, passes through the capacitor C2, the switch element Q10, the inductor L5 in sequence, and then returns to the neutral point through the second switch. During the whole process, the inductor L5 is in a state of releasing energy; See also Fig. 22 , the negative busbar transfers energy to the positive busbar, and the switch element Q10 is turned on. At this time, the current starts from the neutral point, passes through the second switch, the inductor L5, the switch element Q10, and the capacitor C2 in sequence, and then returns to the neutral point. During the whole process, the inductor L5 is in the energy storage state; See also Fig.23 , the negative bus transfers energy to the positive bus, and the switch element Q10 is turned off. At this time, the current starts from the neutral point, passes through the second switching switch, inductor L5, switch element Q9, capacitor C1 in sequence, and then returns to the neutral point. During the whole process, the inductor L5 is in a state of releasing energy.

[0048] In another embodiment, see Fig.24 The above-mentioned bus balancing unit includes a switch tube Q11 with an integrated anti-parallel diode, a switch tube Q12 with an integrated anti-parallel diode, an inductor L5, a switch element Q9 and a switch element Q10; one end of the switch element Q9 and the switch element Q10 are respectively connected to one end of the inductor L5; one end of the inductor L5 is connected to the first switching switch; the other end of the inductor L5 is connected to one end of the switch tube Q11 with an integrated anti-parallel diode; the other end of the switch tube Q11 with an integrated anti-parallel diode is connected to one end of the switch tube Q12 with an integrated anti-parallel diode; the other end of the switch tube Q12 with an integrated anti-parallel diode is connected to the neutral point.

[0049] In one embodiment, see Fig.24 The Vienna PFC circuit includes an inductor L5, a switching element Q9, a switching element Q10, a diode D5 and a diode D6; one end of the diode D5 and the diode D6 are respectively connected to the other end of the inductor L5; the other end of the diode D5 is connected to the neutral point; the other end of the diode D6 is connected to the neutral point.

[0050] This embodiment can save the number of tubes and realize the PFC and balanced bridge functions. This variant topology places the bridge arm of the balanced bridge separately, that is, diodes D5 and D6 do not work, and the switch element Q9, the switch element Q10, the inductor L5, the switch tube Q11 with integrated anti-parallel diode, and the switch tube Q12 with integrated anti-parallel diode form a balanced bridge. The switch tube Q11 with integrated anti-parallel diode and the switch tube Q12 with integrated anti-parallel diode form a balanced bridge to realize the function of the second switching switch in the first embodiment. In battery mode, the first switching switch is disconnected, the switch tube Q11 with integrated anti-parallel diode and the switch tube Q12 with integrated anti-parallel diode are always on, and the switch element Q9, the switch element Q10, and the inductor L5 form a balanced bridge topology. Its energy flow diagram is shown below: See also Fig.25 , the positive busbar transfers energy to the negative busbar, the switch element Q9 is turned on, and the current starts from one end of the capacitor C1, passes through the switch element Q9, the inductor L5, the switch tube Q11 with integrated anti-parallel diode, and the switch tube Q12 with integrated anti-parallel diode, and then returns to the other end of the capacitor C1. During the whole process, the inductor L5 is in the energy storage state; See also Fig.26 , the positive busbar transfers energy to the negative busbar, the switch element Q9 is turned off, and the current starts from one end of the capacitor C2, passes through the switch element Q10, the inductor L5, the switch tube Q11 with integrated anti-parallel diode, and the switch tube Q12 with integrated anti-parallel diode, and then returns to the other end of the capacitor C2. During the whole process, the inductor L5 is in the energy storage state; See also Fig. 27 , the negative busbar transfers energy to the positive busbar, the switch element Q10 is turned on, and the current starts from one end of the capacitor C2, passes through the switch tube Q12 with integrated anti-parallel diode, the switch tube Q11 with integrated anti-parallel diode, the inductor L5, the switch element Q10, and then returns to the other end of the capacitor C2. During the whole process, the inductor L5 is in the energy storage state; See also Fig.28, the negative bus transfers energy to the positive bus, the switch element Q10 is turned off, and the current starts from one end of the capacitor C1, passes through the switch tube Q12 with integrated anti-parallel diode, the switch tube Q11 with integrated anti-parallel diode, the inductor L5, the switch element Q9 and then returns to the other end of the capacitor C1. During the whole process, the inductor L5 is in the energy storage state.

[0051] The above-mentioned UPS system bus balancing hybrid topology circuit is provided with A-phase, B-phase and C-phase branches, as well as a battery discharge unit and a bus balancing unit. The A-phase branch and the C-phase branch each contain a dual BOOST PFC circuit, while the B-phase branch is equipped with a Vienna PFC circuit and a first switching switch. All these circuit units are connected to a DC power supply and a battery. The Vienna PFC circuit includes a bus balancing unit, and a balancing circuit structure is formed by reusing the rectifier power device of the Vienna PFC. This can remove the battery midpoint cable and achieve battery voltage balance by adding a bus balancing circuit, thereby reducing the cable installation cost and reducing the increase in PCB design complexity and cost.

[0052] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A UPS system busbar balancing hybrid topology circuit, characterized in that: include: A phase branch, B phase branch, C phase branch, a battery positive discharge unit, a battery negative discharge unit and a bus balancing unit; the A phase branch includes a first dual BOOST PFC circuit; the C phase branch includes a second dual BOOST PFC circuit; the B phase branch includes a first switching switch and a Vienna PFC circuit; the Vienna PFC circuit includes the bus balancing unit, and the Vienna PFC circuit is connected to the first switching switch; the battery positive discharge unit and the battery negative discharge unit are respectively connected to the battery; the first dual BOOST PFC circuit, the second dual BOOST PFC circuit and the Vienna PFC circuit are respectively connected to a DC power supply.

2. A UPS system bus balancing hybrid topology circuit according to claim 1, characterized in that: The DC power supply includes a positive electrode and a negative electrode; the bus balancing unit includes a second switching switch RLY2, an inductor L5, a switching element Q9 and a switching element Q10; one end of the second switching switch RLY2 is connected to one end of the inductor L5; one end of the switching element Q9 and the switching element Q10 are respectively connected to the other end of the inductor L5; the other end of the switching element Q9 is connected to the DC power supply positive discharge unit; the other end of the switching element Q10 is connected to the negative electrode of the DC power supply.

3. A UPS system bus balancing hybrid topology circuit according to claim 2, characterized in that: The switch element Q9 and the switch element Q10 are switch tubes with integrated anti-parallel diodes.

4. A UPS system bus balancing hybrid topology circuit according to claim 3, characterized in that: The Vienna PFC circuit includes the inductor L5, the switching element Q9, the switching element Q10, the switching tube Q11 integrated with an anti-parallel diode, and the switching tube Q12 integrated with an anti-parallel diode; one end of the switching tube Q11 integrated with an anti-parallel diode is connected to the other end of the inductor L5; the other end of the switching tube Q11 integrated with an anti-parallel diode is connected to one end of the switching tube Q12 integrated with an anti-parallel diode; the other end of the switching tube Q12 integrated with an anti-parallel diode is connected to the neutral point.

5. A UPS system bus balancing hybrid topology circuit according to claim 3, characterized in that: The bus balancing unit includes a switch tube Q11 with an integrated anti-parallel diode, a switch tube Q12 with an integrated anti-parallel diode, an inductor L5, a switch element Q9 and a switch element Q10; one end of the switch element Q9 and the switch element Q10 are respectively connected to one end of the inductor L5; one end of the inductor L5 is connected to the first switching switch; the other end of the inductor L5 is connected to one end of the switch tube Q11 with an integrated anti-parallel diode; the other end of the switch tube Q11 with an integrated anti-parallel diode is connected to one end of the switch tube Q12 with an integrated anti-parallel diode; the other end of the switch tube Q12 with an integrated anti-parallel diode is connected to the neutral point.

6. A UPS system bus balancing hybrid topology circuit according to claim 5, characterized in that: The Vienna PFC circuit includes the inductor L5, the switching element Q9, the switching element Q10, the diode D5 and the diode D6; one end of the diode D5 and the diode D6 are respectively connected to the other end of the inductor L5; the other end of the diode D5 is connected to the neutral point; the other end of the diode D6 is connected to the neutral point.

7. A UPS system bus balancing hybrid topology circuit according to any one of claims 1 to 6, characterized in that: The first dual BOOST PFC circuit includes a thyristor Q1, a thyristor Q2, an inductor L1, an inductor L4, a switch tube Q15 with an integrated anti-parallel diode, a switch tube Q16 with an integrated anti-parallel diode, a diode D1, and a diode D4; one end of the thyristor Q1 is connected to the neutral point, the other end of the thyristor Q1 is connected to one end of the inductor L1, the other end of the inductor L1 is connected to one end of the diode D1, and the other end of the diode D1 is connected to the positive electrode of the DC power supply; one end of the thyristor Q2 is connected to the neutral point, the other end of the thyristor Q2 is connected to one end of the inductor L4, the other end of the inductor L4 is connected to one end of the diode D4, and the other end of the diode D4 is connected to the negative electrode of the DC power supply.

8. A UPS system bus balancing hybrid topology circuit according to claim 7, characterized in that: The second dual BOOST PFC circuit includes a thyristor Q3, a thyristor Q4, an inductor L2, an inductor L3, a switch tube Q13 with an integrated anti-parallel diode, a switch tube Q14 with an integrated anti-parallel diode, a diode D2, and a diode D3; one end of the thyristor Q3 is connected to the neutral point, the other end of the thyristor Q3 is connected to one end of the inductor L2, the other end of the inductor L2 is connected to one end of the diode D2, and the other end of the diode D2 is connected to the positive electrode of the DC power supply; one end of the thyristor Q4 is connected to the neutral point, the other end of the thyristor Q4 is connected to one end of the inductor L3, the other end of the inductor L3 is connected to one end of the diode D3, and the other end of the diode D3 is connected to the negative electrode of the DC power supply.

9. A UPS system bus balancing hybrid topology circuit according to claim 8, characterized in that: The battery includes a positive electrode and a negative electrode, and the battery positive and discharge unit includes a thyristor Q5, a thyristor Q7, the inductor L1, the inductor L2, the switch tube Q13 integrated with an anti-parallel diode, the switch tube Q15 integrated with an anti-parallel diode, the diode D1 and the diode D2; one end of the thyristor Q5 and the thyristor Q7 are respectively connected to the positive electrode of the battery; the other end of the thyristor Q5 is connected to one end of the inductor L2, and the other end of the thyristor Q7 is connected to one end of the inductor L1.

10. A UPS system bus balancing hybrid topology circuit according to claim 9, characterized in that: The battery negative discharge unit includes a thyristor Q6, a thyristor Q8, the inductor L3, the inductor L4, the switch tube Q14 with an integrated anti-parallel diode, the switch tube Q16 with an integrated anti-parallel diode, a diode D3 and a diode D4; one end of the thyristor Q6 and the thyristor Q8 are respectively connected to the negative electrode of the battery; the other end of the thyristor Q6 is connected to one end of the inductor L3, and the other end of the thyristor Q8 is connected to one end of the inductor L4.

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