Control circuit, control method and chip for switching power supply

Abstract

The invention relates to the technical field of switching power supplies, in particular to a control circuit, a control method and a chip for a switching power supply. The control circuit comprises a current sampling circuit, an inductive current ripple sampling circuit, a compensation current selection circuit, a current compensation circuit, a first comparator, an inductive current sampling circuit and a logic control circuit. And the compensation current selection circuit and the current compensation circuit are used for adaptively compensating the loop current in different working modes so as to obtain the loop control current. According to the compensation current selection circuit and the current compensation circuit, when the mode of the switching power supply is switched, the output loop control current can be adaptively adjusted, and then loop control is carried out on the switching power supply according to the loop control current; the voltage center values of the output voltages output by the switching power supply before and after mode switching can be basically consistent, the output voltages are prevented from generating large ripples, and the working stability of the switching power supply is guaranteed.

Description

Technical Field

[0001] The present application relates to the technical field of switching power supplies, and in particular to a control circuit, a control method and a chip for a switching power supply. Background Art

[0002] The working modes of the switching power supply can be divided into forced continuous conduction mode (FCCM) and discontinuous current mode (DCM). The continuous working mode can reduce the ripple of the switching power supply and is suitable for heavy loads. The discontinuous current mode is usually used in light loads, which can improve the conversion efficiency of the switching power supply under light loads, but the ripple will increase as the switching cycle increases.

[0003] Under light load conditions, when the continuous conduction mode and the discontinuous conduction mode are forced to switch, the output voltage at the output end of the switching power supply will produce a large switching ripple due to the different working points of the two working modes; or when the input voltage of the switching power supply changes, the working mode of the switching power supply may also be switched, resulting in a large switching ripple in the output voltage at the output end of the switching power supply. The ripple will affect the output voltage of the switching power supply to jump, that is, affect the stability of the output voltage of the switching power supply, resulting in poor working performance of the switching power supply. Summary of the invention

[0004] The present application provides a control circuit, a control method and a chip for a switching power supply to solve the technical problem in the above-mentioned related art that the output voltage stability of the output end of the switching power supply is poor when mode switching occurs.

[0005] In a first aspect, the present application provides a control circuit for a switching power supply, the switching power supply comprising a first transistor, a second transistor and a first inductor, the first transistor, the second transistor and the first inductor forming a boost converter, a buck converter or a buck-boost converter; an input end of the switching power supply is used to receive an input voltage, and an output end of the switching power supply is used to output an output voltage;

[0006] The control circuit includes a current sampling circuit, an inductor current ripple sampling circuit, a compensation current selection circuit, a current compensation circuit, a first resistor, a second resistor, a first comparator, an inductor current sampling circuit and a logic control circuit;

[0007] The current sampling circuit is used to sample the output voltage of the output end of the switching power supply, and obtain the loop compensation current according to the output voltage; the inductor current ripple sampling circuit is used to sample the input voltage and the output voltage, and calculate the inductor current ripple value of the switching power supply according to the input voltage and the output voltage, and generate the half-ripple control current according to the inductor current ripple value; the compensation current selection circuit is used to determine the larger current value of the loop compensation current and the half-ripple control current as the target control current;

[0008] The current compensation circuit is used to output the half-ripple control current and add it to the target control current to obtain the loop control current when the switching power supply operates in the peak current control mode; or to obtain the loop control current according to the difference between the target control current and the half-ripple control current when the switching power supply operates in the valley current control mode;

[0009] The inductor current sampling circuit is used to sample the inductor current of the branch where the first inductor is located, and convert the inductor current into a first voltage through the first resistor; the second resistor is used to convert the loop control current into a second voltage; the first comparator is used to output a first control signal when the first voltage is equal to the second voltage;

[0010] The logic control circuit is used to output a corresponding driving signal according to the first control signal, and the driving signal is used to drive the first transistor and / or the second transistor to be turned on and off.

[0011] In one possible design, when the switching power supply is a boost converter or a buck-boost converter, the control circuit further includes a first current output circuit, the first current output circuit being configured to generate a first current according to the loop compensation current, the input voltage, and the output voltage;

[0012] The compensation current selection circuit is further used to determine, when the switching power supply is a boost converter or a buck-boost converter, that the larger current value between the first current and the half-ripple control current is the target control current.

[0013] In a possible design, the input end of the current sampling circuit is connected to the output end of the switching power supply, and the output end of the current sampling circuit is connected to the input end of the compensation current selection circuit; the sampling end of the inductor current ripple sampling circuit is respectively connected to the input end and the output end of the switching power supply, and the output end of the inductor current ripple sampling circuit is connected to the input end of the compensation current selection circuit;

[0014] The output end of the compensation current selection circuit is connected to the input end of the current compensation circuit, and the output end of the current compensation circuit is connected to the inverting input end of the first comparator through a second resistor; the sampling end of the inductor current sampling circuit is connected to the branch where the first inductor is located, and the output end of the inductor current sampling circuit is connected to the non-inverting input end of the first comparator through the first resistor; the output end of the first comparator is connected to the first input end of the logic control circuit, the first output end of the logic control circuit is connected to the control electrode of the first transistor, and the second output end of the logic control circuit is connected to the control electrode of the second transistor.

[0015] In one possible design, the control circuit further includes a first timer circuit, wherein the first timer circuit includes a second comparator, a third resistor, and a first capacitor;

[0016] When the switching power supply is a step-down converter, the first pole of the first transistor is the input end of the switching power supply, and the input end of the switching power supply is used to receive an input voltage. The second pole of the first transistor is connected to the first pole of the second transistor, and the second pole of the second transistor is grounded. The second pole of the first transistor is connected to the first end of the first inductor, and the second end of the first inductor is the output end of the switching power supply, and the output end of the switching power supply is used to output an output voltage. The first end of the third resistor is connected to the input end of the switching power supply for sampling the input voltage. The second end of the third resistor is connected to the first end of the first capacitor, and the second end of the first capacitor is grounded. The first end of the first capacitor is connected to the non-inverting input end of the second comparator, and the non-inverting input end of the second comparator is used to sample the third voltage on the first capacitor. The inverting end of the second comparator an input terminal, for receiving the output voltage in a peak current control mode, or for receiving a first difference voltage in a valley current control mode, wherein the first difference voltage is the difference between the input voltage and the output voltage; a second comparator, for outputting a first clock signal when the third voltage and the output voltage are equal, or for outputting a first clock signal when the third voltage and the first difference voltage are equal; the logic control circuit, for generating a first drive signal according to the first clock signal in a peak current control mode, wherein the first drive signal is used to drive the second transistor to be turned off; or, the logic control circuit, for generating a second drive signal and a third drive signal according to the first clock signal in a valley current control mode, wherein the second drive signal is used to drive the first transistor to be turned off, and the third drive signal is used to drive the second transistor to be turned on;

[0017] Alternatively, when the switching power supply is a boost converter, the second pole of the first transistor is the output end of the switching power supply, the second pole of the first transistor is connected to the first end of the first inductor and the second pole of the second transistor, the second end of the first inductor is the input end of the switching power supply, and is used to receive the input voltage; the first pole of the second transistor is grounded; the first end of the third resistor is connected to the output end of the switching power supply, and is used to sample the output voltage; the second end of the third resistor is connected to the first end of the first capacitor, the second end of the first capacitor is grounded, the first end of the first capacitor is connected to the non-inverting input end of the second comparator, and the non-inverting input end of the second comparator is used to sample the third voltage on the first capacitor; the inverting input end of the second comparator is used to receive the third voltage on the first capacitor in the peak current control mode. a second difference voltage, wherein the second difference voltage is the difference between the output voltage and the input voltage, or is used to receive the input voltage in a valley current control mode; the second comparator is used to output a first clock signal when the third voltage and the second difference voltage are equal, or to output a first clock signal when the third voltage and the input voltage are equal; the logic control circuit is used to generate a first drive signal according to the first clock signal in a peak current control mode, wherein the first drive signal is used to drive the first transistor to be turned off; or the logic control circuit is used to generate a second drive signal and a third drive signal according to the first clock signal in a valley current control mode, wherein the second drive signal is used to drive the second transistor to be turned off, and the third drive signal is used to drive the first transistor to be turned on;

[0018] Alternatively, when the switching power supply is a buck-boost converter, the first pole of the first transistor is the input end of the switching power supply, used to receive the input voltage, the second pole of the first transistor is connected to the first end of the first inductor and the first pole of the second transistor, and the second end of the first inductor is grounded; the second pole of the second transistor is the output end of the switching power supply, used to output the output voltage; the first end of the third resistor is connected to the output end of the switching power supply, used to sample the sixth voltage; the second end of the third resistor is connected to the first end of the first capacitor, the second end of the first capacitor is grounded, the first end of the first capacitor is connected to the non-inverting input end of the second comparator, and the non-inverting input end of the second comparator is used to sample the third voltage on the first capacitor; the inverting input end of the second comparator is used to receive the output voltage in the peak current control mode, or to receive the input voltage in the valley current control mode; the second comparator is used to output a first clock signal when the third voltage is equal to the output voltage, or to output the first clock signal when the third voltage is equal to the input voltage.

[0019] In one possible design, the control circuit further includes a second timer circuit, wherein the second timer circuit includes a second capacitor, a fourth resistor, and a third comparator;

[0020] When the switching power supply is a buck converter, the first end of the second capacitor is connected to the output end of the current sampling circuit, the second end of the second capacitor is grounded, and the first end of the second capacitor is connected to the non-inverting input end of the third comparator; the first end of the fourth resistor is connected to the output end of the inductor current ripple sampling circuit, the second end of the fourth resistor is grounded, the first end of the fourth resistor is also connected to the inverting input end of the third comparator, and the output end of the third comparator is connected to the logic control circuit; the non-inverting input end of the third comparator is used to sample the fourth voltage on the second capacitor, the inverting input end of the third comparator is used to sample the fifth voltage on the fourth resistor, and the third comparator is used to output a second clock signal when the fourth voltage is equal to the fifth voltage; the logic control circuit is used to generate a fourth drive signal according to the second clock signal in a peak current control mode or a valley current control mode, and the fourth drive signal is used to drive the first transistor to be turned on;

[0021] Alternatively, when the switching power supply is a boost converter or a buck-boost converter, the first end of the second capacitor is connected to the output end of the first current output circuit, the second end of the second capacitor is grounded, and the first end of the second capacitor is connected to the non-inverting input end of the third comparator; the first end of the fourth resistor is connected to the output end of the inductor current ripple sampling circuit, the second end of the fourth resistor is grounded, the first end of the fourth resistor is also connected to the inverting input end of the third comparator, and the output end of the third comparator is connected to the logic control circuit; the non-inverting input end of the third comparator is used to sample the fourth voltage on the second capacitor, the inverting input end of the third comparator is used to sample the fifth voltage on the fourth resistor, and the third comparator is used to output a second clock signal when the fourth voltage is equal to the fifth voltage.

[0022] In a possible design, the third resistor and the fourth resistor have the same resistance value; the first capacitor and the second capacitor have the same capacitance value.

[0023] In one possible design, the current sampling circuit includes a voltage divider circuit, an error amplifier, and a transconductance amplifier;

[0024] The sampling end of the voltage divider circuit is connected to the output end of the switching power supply, and the output end of the voltage divider circuit is connected to the inverting input end of the error amplifier; the inverting input end of the error amplifier is used to receive the first divided voltage collected by the voltage divider circuit, and the non-inverting input end of the error amplifier is used to receive the reference voltage; the error amplifier is used to calculate the error voltage between the first divided voltage and the reference voltage, and amplify the error voltage to obtain a loop compensation voltage;

[0025] The output end of the error amplifier is connected to the input end of the transconductance amplifier, and the transconductance amplifier is used to convert the loop compensation voltage into the loop compensation current.

[0026] In one possible design, the voltage divider circuit includes a fifth resistor and a sixth resistor, the first end of the fifth resistor is the sampling end of the voltage divider circuit, the second end of the fifth resistor is connected to the first end of the sixth resistor, and the second end of the sixth resistor is grounded; the first end of the sixth resistor is the output end of the voltage divider circuit.

[0027] In one possible design, the current sampling circuit also includes a seventh resistor and a third capacitor, the output end of the error amplifier is connected to the first end of the seventh resistor, the second end of the seventh resistor is connected to the first end of the third capacitor, and the second end of the third capacitor is grounded.

[0028] In a possible design, calculating the inductor current ripple value of the switching power supply according to the input voltage and the output voltage includes:

[0029] The inductance value of the first inductor and the switching frequency of the switching power supply are obtained, and the inductor current ripple value of the switching power supply is calculated according to the following formula:

[0030]

[0031] In the above formula, Ipp is the inductor current ripple value, VIN is the input voltage of the switching power supply, VOUT is the output voltage of the switching power supply, L is the inductance value of the first inductor, Fsw is the switching frequency of the switching power supply, Ri is the resistance value of the first resistor, and Rsns is the resistance value of the second resistor.

[0032] In a possible design, the logic control circuit is further used to receive a mode switching signal, and the mode switching signal is used to control the switching power supply to switch between a continuous conduction mode and a discontinuous conduction mode.

[0033] In one possible design, the logic control circuit is also used to determine whether the switching power supply is operating in the intermittent conduction mode after the second transistor is turned off. If so, it monitors whether the second clock signal is received; if not, it outputs an eighth drive signal, and the eighth drive signal is used to drive the first transistor to turn on.

[0034] In a possible design, the logic control circuit is used to output a fifth drive signal and a sixth drive signal according to the first control signal in a peak current control mode, wherein the fifth drive signal is used to drive the first transistor to be turned off, and the sixth drive signal is used to drive the second transistor to be turned on;

[0035] Alternatively, the logic control circuit is used to output a seventh drive signal according to the first control signal in a valley current control mode, and the seventh drive signal is used to drive the second transistor to be turned off.

[0036] In a second aspect, the present application further provides a control method for a switching power supply, which is applied to a control circuit as described in any one of the above items. When the switching power supply operates in a constant on-time valley current control mode, the control method includes:

[0037] detecting whether the second clock signal is received, and if so, outputting a fourth drive signal to the first transistor, wherein the fourth drive signal is used to drive the first transistor to turn on;

[0038] Detecting whether a first clock signal is received, and if so, outputting a second drive signal to the first transistor and a third drive signal to the second transistor; the second drive signal is used to drive the first transistor to be turned off, and the third drive signal is used to drive the second transistor to be turned on;

[0039] It is detected whether the first control signal is received, and if so, a seventh driving signal is output to the second transistor, where the seventh driving signal is used to drive the second transistor to be turned off.

[0040] In a possible design, after turning off the second transistor, the control method further includes:

[0041] Determine whether the switching power supply operates in the intermittent conduction mode. If so, monitor whether the second clock signal is received. If not, output an eighth drive signal, and the eighth drive signal is used to drive the first transistor to turn on.

[0042] In a third aspect, the present application further provides a control method for a switching power supply, which is applied to a control circuit as described in any one of the above items. When the switching power supply operates in a constant off-time peak current control mode, the control method includes:

[0043] detecting whether the second clock signal is received, and if so, outputting a fourth drive signal to the first transistor, wherein the fourth drive signal is used to drive the first transistor to turn on;

[0044] detecting whether a first control signal is received, and if so, outputting a fifth drive signal to the first transistor and outputting a sixth drive signal to the second transistor; the fifth drive signal is used to drive the first transistor to be turned off, and the sixth drive signal is used to drive the second transistor to be turned on;

[0045] Detect whether the first clock signal is received, and if so, output a first drive signal to the second transistor, wherein the first drive signal is used to drive the second transistor to turn off.

[0046] In a possible design, after turning off the second transistor, the control method further includes:

[0047] Determine whether the switching power supply operates in the intermittent conduction mode. If so, monitor whether the second clock signal is received. If not, output an eighth drive signal, and the eighth drive signal is used to drive the first transistor to turn on.

[0048] In a fourth aspect, the present application further provides a chip, comprising a control circuit for a switching power supply as described in any one of the above items.

[0049] In a fifth aspect, the present application also provides an electronic device, which includes a control circuit for a switching power supply as described in any one of the above items; or the electronic device includes a chip as described above.

[0050] The control circuit for the switching power supply provided by the first aspect above includes a current sampling circuit, an inductor current ripple sampling circuit, a compensation current selection circuit, a current compensation circuit, a first comparator, an inductor current sampling circuit and a logic control circuit. Among them, the current sampling circuit is used to sample the output voltage of the output end of the switching power supply, and obtain the loop compensation current according to the output voltage; the inductor current ripple sampling circuit is used to sample the input voltage and the output voltage, and calculate the inductor current ripple value of the switching power supply according to the input voltage and the output voltage, and generate a half-ripple control current according to the inductor current ripple value; the compensation current selection circuit is used to determine the larger current value between the loop compensation current and the half-ripple control current as the target control current; the current compensation circuit is used to output the half-ripple control current superimposed on the target control current when the switching power supply operates in the peak current control mode to obtain the loop control current; or When the switching power supply operates in the valley current control mode, the loop control current is obtained according to the difference between the target control current and the half-ripple control current; the inductor current sampling circuit is used to sample the inductor current of the branch where the first inductor is located, and convert the inductor current into a first voltage through a first resistor; the second resistor is used to convert the loop control current into a second voltage; the first comparator is used to output a first control signal when the first voltage is equal to the second voltage; the logic control circuit is used to output a first drive signal and a second drive signal according to the first control signal, the first drive signal is used to drive the first transistor to be turned on, and the second drive signal is used to drive the second transistor to be turned off. It can be seen that in the present application, according to the compensation current selection circuit and the current compensation circuit, the switching power supply can adaptively adjust the output loop control current when the mode is switched, and then the switching power supply is loop-controlled according to the loop control current, so that the voltage center value of the output voltage output by the switching power supply before and after the mode switching is basically the same, thereby avoiding the output voltage from generating a large ripple and ensuring the stability of the switching power supply.

[0051] The beneficial effects provided in the above-mentioned other aspects and the possible designs of the above-mentioned other aspects can be referred to the beneficial effects brought about by the above-mentioned first aspect and the possible implementation methods of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other embodiments can also be obtained based on these drawings.

[0053] Figure 1 A circuit diagram of a switching power supply provided in an embodiment of the present application;

[0054] Figure 2 A schematic diagram of the structure of a control circuit for a switching power supply provided in an embodiment of the present application;

[0055] Figure 3 One of the structural schematic diagrams of the first timer circuit provided in the embodiment of the present application;

[0056] Figure 4 A second structural diagram of a first timer circuit provided in an embodiment of the present application;

[0057] Figure 5 A schematic diagram of the structure of a second timer circuit provided in an embodiment of the present application;

[0058] Figure 6 A schematic diagram of the structure of a current sampling circuit provided in an embodiment of the present application;

[0059] Figure 7 A schematic diagram of the structure of a current compensation circuit provided in an embodiment of the present application;

[0060] Figure 8 A schematic diagram of the overall structure of a control circuit for a switching power supply provided in an embodiment of the present application;

[0061] Fig. 9 A flowchart of the constant on-time valley current control mode provided in an embodiment of the present application;

[0062] Fig.10 A flowchart of the constant off-time peak current control mode provided in an embodiment of the present application;

[0063] Fig.11 Schematic diagram of the working waveform of the inductor current in the FCCM mode and the PFM mode in the embodiment of the present application;

[0064] Fig.12 A schematic diagram of the working waveform of the control circuit provided in the embodiment of the present application;

[0065] Fig.13 One of the flow charts of the control method provided in the embodiment of the present application;

[0066] Fig.14 The second flowchart of the control method provided in the embodiment of the present application;

[0067] Fig.15 A schematic diagram of the structure of a control circuit for a boost converter provided in an embodiment of the present application;

[0068] Fig.16 A flowchart of the working process of the boost converter provided in this embodiment under the constant on-time valley current control mode;

[0069] Fig.17 A flowchart of the working process of the boost converter provided in the embodiment of the present application in the constant off-time peak current mode;

[0070] Fig.18 A schematic diagram of the structure of a control circuit for a buck-boost converter provided in an embodiment of the present application. DETAILED DESCRIPTION

[0071] In this application, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c alone can represent: a, b, c, a and b, a and c, or a, b, and c, where a, b, and c can be single or multiple. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0072] The directions or positional relationships indicated by terms such as "center", "longitudinal", "lateral", "up", "down", "left", "right", "front", and "back" are based on the directions or positional relationships shown in the accompanying drawings and are only for the convenience of describing the present application and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present application.

[0073] The terms "connected" and "connected" should be understood in a broad sense. For example, the "connected" or "connected" of a circuit structure can refer to not only physical connection, but also electrical connection or signal connection. For example, it can be directly connected, that is, physically connected, or indirectly connected through at least one intermediate element, as long as the circuit is connected, or it can be the internal connection of two elements; signal connection can refer to signal connection through a circuit or through a media medium, such as radio waves. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0074] The transistor in the present application is a three-terminal transistor, and its three terminals are a control electrode, a first electrode, and a second electrode. The transistor can be a bipolar transistor or a field effect transistor, etc. For example, when the transistor is a bipolar transistor, its control electrode refers to the base of the bipolar transistor, the first electrode can be the collector or emitter of the bipolar transistor, and the corresponding second electrode can be the emitter or collector of the bipolar transistor; when the transistor is a field effect transistor, its control electrode refers to the gate of the field effect transistor, the first electrode can be the drain or source of the field effect transistor, and the corresponding second electrode can be the source or drain of the field effect transistor.

[0075] The working mode of the switching power supply can be divided into a forced continuous conduction mode and a discontinuous conduction mode. The continuous working mode can reduce the ripple of the switching power supply and is suitable for heavy loads. The discontinuous conduction mode is usually used in light loads, which can improve the conversion efficiency of the switching power supply under light loads, but the ripple will increase as the switching cycle is extended. Under light load conditions, when the continuous conduction mode and the discontinuous conduction mode are forced to switch, since the working points of the two working modes are different, the working point mainly refers to the working point of the power control loop, which can be specifically the loop compensation voltage Vcmp or the loop compensation current Icmp. Therefore, when the working mode of the switching power supply is switched, the output voltage at the output end of the switching power supply will generate a large switching ripple, and the ripple will affect the output voltage of the switching power supply to jump, that is, affect the stability of the output voltage of the switching power supply, thereby resulting in poor working performance of the switching power supply. Alternatively, in another application scenario, when the input voltage of the switching power supply input changes, it may also cause the working mode of the switching power supply to switch adaptively, thereby causing the output voltage at the output end of the switching power supply to generate a large switching ripple, thereby resulting in poor working performance of the switching power supply.

[0076] For the control of the switching power supply, pulse frequency modulation (PFM) is usually used. Pulse frequency modulation is a conversion method that is usually applied to DC-DC converters to improve light load efficiency. In the field of switching power supplies, PFM is also called "power saving" mode. The switching power supply working in power saving mode uses PFM mode under light load current conditions and uses pulse width modulation (PWM) mode under heavier load current conditions. This working mode enables the converter to maintain extremely high efficiency over a wide current output range. Among them, the above-mentioned forced continuous conduction mode and discontinuous conduction mode are two working modes under the pulse frequency modulation method. When the switching power supply loop works under the same load and different control modes, different circuit working points will be generated, that is, the loop compensation voltage VCOMP is different under the same load. When the working mode is forced to switch or the input voltage jumps, the switching circuit loop will be readjusted. Due to the bandwidth limitation of the switching circuit loop, the loop adjustment takes time, which causes the output voltage to jitter. The amplitude of the output voltage change depends on the difference between the two working points. The larger the gap, the greater the jitter voltage will be, that is, the greater the ripple generated.

[0077] In order to overcome the defects in the above-mentioned related technologies, the present application analyzes the key factors that generate ripples. Under the same load conditions, when the mode is forced to switch or the input voltage jumps, causing the working mode to change, the output voltage of the switching power supply will jitter because the loop needs to be re-stabilized to a new working point. The present application sets the working points of the two modes to the same, thereby ensuring the stability of the output ripple when the mode is forced to switch or the input voltage jumps.

[0078] In order to realize the above-mentioned inventive concept, on the basis of the control circuit provided by the related art, the control circuit of the present application designs an inductor current ripple sampling circuit, a compensation current selection circuit and a current compensation circuit. Among them, the inductor current ripple sampling circuit is used to sample the input voltage and the output voltage, and calculate the inductor current ripple value of the switching power supply according to the input voltage and the output voltage, and generate a half-ripple control current according to the inductor current ripple value. The current sampling circuit is used to sample the output voltage of the output end of the switching power supply, and obtain the loop compensation current according to the output voltage. The compensation current selection circuit is used to determine the larger current value of the loop compensation current and the half-ripple control current as the target control current. Then, the current compensation circuit is used to output the half-ripple control current and superimpose it on the target control current when the switching power supply works in the peak current control mode to obtain the loop control current; or to obtain the loop control current according to the difference between the target control current and the half-ripple control current when the switching power supply works in the valley current control mode. In this way, it is ensured that the obtained loop control current is always within a preset threshold range, that is, it is ensured that the peak current of the loop control current is not too high, and at the same time, it is ensured that the valley current of the loop control current is not too low. In this way, when the switching power supply is controlled according to the loop control current and the collected inductor current in the loop, it can be ensured that the voltage center value of the output voltage of the switching power supply before and after the mode switching is basically consistent, thereby avoiding large ripples in the output voltage and ensuring the stability of the switching power supply.

[0079] In order to more clearly describe the structure and working principle of the control circuit for the switching power supply provided by the present application, the present application provides a circuit structure of a commonly used switching power supply. Figure 1 The circuit diagram of the switching power supply provided in the embodiment of the present application needs to be explained as follows: Figure 1 The circuit structure of the switching power supply 10 shown is only a circuit structure of a switching power supply commonly used in the art, and does not mean that the control circuit provided by the present application can only be applied to this specific switching power supply. In fact, the control circuit provided by the present application can be applied to Figure 1 In the switching power supply circuit 10 shown and its related variant switching power supply circuits, for example, the switching power supply circuit 10 can be any one of a boost converter (i.e., a BOOST converter), a buck converter (i.e., a BUCK converter), or a buck-boost converter (BUCK-BOOST converter).

[0080] See also Figure 1As shown, when the switching power supply 10 provided in the embodiment of the present application is a buck converter, the switching power supply 10 includes a first transistor Q1, a second transistor Q2 and a first inductor L1, the first pole of the first transistor Q1 is the input end of the switching power supply, the input end of the switching power supply is used to receive the input voltage VIN, the second pole of the first transistor Q1 is connected to the first pole of the second transistor Q2, the second pole of the second transistor Q2 is grounded GND, the second pole of the first transistor Q1 is connected to the first end of the first inductor L1, the second end of the first inductor L1 is the output end of the switching power supply, and the output end of the switching power supply is used to output the output voltage VOUT.

[0081] Based on this application Figure 1 In the switching power supply circuit shown, in one working cycle, the logic control circuit 20 is used to output a corresponding driving signal to drive the first transistor Q1 and the second transistor Q2 to operate, thereby controlling the switching power supply 10 to switch between charging and discharging states. It can be understood that in one working cycle, the logic control circuit 20 first controls the first transistor Q1 to turn on, and at the same time controls the second transistor Q2 to turn off, so that the input voltage VIN charges the first inductor L1, so that the first inductor L1 completes energy storage. After the first inductor L1 completes energy storage, the logic control circuit 20 controls the second transistor Q2 to turn on, and after the second transistor Q2 is turned on, the first inductor L1 discharges to the outside to output the output voltage VOUT.

[0082] In some embodiments, see Figure 1 As shown, an output capacitor Cout is also provided at the output end, a first end of the output capacitor Cout is connected to a second end of the first inductor L1, and a second end of the output capacitor Cout is grounded GND. The output capacitor Cout mainly plays the role of filtering and voltage stabilization.

[0083] In addition, when the switch power supply is controlled to work in the intermittent conduction mode, two control modes can be specifically adopted, the first is a constant off-time peak current control mode, and the second is a constant on-time valley current control mode. Among them, when the constant off-time peak current control mode is adopted, the off-time of the second transistor Q2 is constant in each working cycle, and when it is detected that the inductor current value of the branch where the first inductor L1 is located reaches a peak value, the first transistor Q1 is turned off to stop the charging process, and the second transistor Q2 is turned on at the same time to achieve external discharge. Among them, when the constant on-time valley current control mode is adopted, in each working cycle, the charging time is constant, that is, the first transistor Q1 is first turned on, and after a constant charging time, the first transistor Q1 is turned off to end the charging process, and the second transistor Q2 is turned on at the same time to discharge to the outside; when it is detected that the inductor current value of the branch where the first inductor L1 is located reaches a valley value, the second transistor Q2 is turned off to end the discharge.

[0084] In this embodiment, the first transistor Q1 and the second transistor Q2 can both be N-type MOS tubes, that is, NMOS (N-Metal-Oxide-Semiconductor) tubes. In other embodiments, the first transistor Q1 and the second transistor Q2 can also be PMOS (P-Metal-Oxide-Semiconductor) tubes. For example, when the first transistor Q1 and the second transistor Q2 are NMOS tubes, their first pole is the drain, their second pole is the source, and their control pole is the gate.

[0085] The control circuit provided in the present application is further described below in combination with the above-mentioned switching power supply 10 circuit and two specific control modes of the switching power supply 10 in the intermittent conduction working mode.

[0086] Figure 2 For a schematic diagram of the structure of the control circuit for the switching power supply provided in the embodiment of the present application, see Figure 2 As shown, the control circuit includes a current sampling circuit 21, an inductor current ripple sampling circuit 22, a compensation current selection circuit 23, a current compensation circuit 24, a first resistor Ri, a second resistor Rsns, a first comparator COMP1, an inductor current sampling circuit 25 and a logic control circuit 20.

[0087] Among them, the current sampling circuit 21 is used to sample the output voltage VOUT of the output end of the switching power supply 10, and obtain the loop compensation current Icmp according to the output voltage VOUT. Specifically, the sampled output voltage VOUT can be converted into the corresponding loop compensation current Icmp through the voltage-to-current conversion circuit; the inductor current ripple sampling circuit 22 is used to sample the input voltage VIN and the output voltage VOUT, and calculate the inductor current ripple value Ipp of the switching power supply according to the input voltage VIN and the output voltage VOUT, and generate a half-ripple control current Ipp1 according to the inductor current ripple value Ipp, which is equivalent to a current value of the half-ripple control current Ipp1 being half of the inductor current ripple value Ipp, that is, Ipp1=0.5Ipp. The compensation current selection circuit 23 is used to determine the larger current value between the loop compensation current Icmp and the half-ripple control current Ipp1 as the target control current Ipp2; in other words, the compensation current selection circuit 23 can be understood as a current selection module, which is used to compare the current magnitudes of the loop compensation current Icmp and the half-ripple control current Ipp1, and select the larger current value between the two as the target control current Ipp2.

[0088] The current compensation circuit 24 is used to output the half-ripple control current Ipp1 and add it to the target control current Ipp2 to obtain the loop control current Iloop when the switching power supply 10 operates in the peak current control mode; or to obtain the loop control current Iloop according to the difference between the target control current Iloop and the half-ripple control current Ipp1 when the switching power supply 10 operates in the valley current control mode. The peak current control mode in this embodiment specifically refers to the constant off-time peak current control mode, and the valley current control mode in this embodiment specifically refers to the constant on-time valley current control mode. Please refer to the above description for the specific working processes of the constant off-time peak current control mode and the constant off-time peak current control mode, which will not be repeated here.

[0089] The inductor current sampling circuit 25 is used to sample the inductor current IL of the branch where the first inductor L1 is located, and convert the inductor current IL into a first voltage V1 through the first resistor Ri; the second resistor Rsns is used to convert the loop control current Iloop output by the current compensation circuit 24 into a second voltage V2; the first comparator COMP1 is used to output a first control signal Cmpo when the first voltage V1 is equal to the second voltage V2. The logic control circuit 20 is used to output a corresponding drive signal according to the first control signal Cmpo, and the drive signal is used to drive the first transistor Q1 and / or the second transistor Q2 to operate.

[0090] It can be seen that according to the present embodiment, a control circuit for a switching power supply is provided, wherein the inductor current ripple sampling circuit 22 can calculate the inductor current ripple value Ipp of the switching power supply according to the input voltage VIN and the output voltage VOUT, and generate a half-ripple control current Ipp1 according to the inductor current ripple value Ipp. The half-ripple control current Ipp1 obtained in this way is equivalent to the center value of the inductor current ripple. When the switching power supply 10 performs mode switching and the ripple of the output voltage VOUT output by the switching power supply 10 is large, the center value of the inductor current ripple IL before and after the mode switching is not much different, that is, the intermediate value between the maximum current value and the minimum current value is not much different. Then, the compensation current selection circuit 23 determines the larger current value of the loop compensation current Icmp and the half-ripple control current Ipp1 as the target control current Ipp2, which is equivalent to determining the loop compensation current Icmp as the target control current Ipp2 when the loop compensation current Icmp is greater than the half-ripple control current Ipp1, and determining the half-ripple control current Ipp1 as the target control current Ipp2 when the loop compensation current Icmp is less than the half-ripple control current Ipp1, so that the minimum value of the target control current Ipp2 determined in this way will not be less than the half-ripple control current Ipp1. Finally, the current compensation circuit 24 is used to output the half-ripple control current Ipp1 and superimpose it on the target control current Ipp2 when the switching power supply 10 operates in the peak current control mode, so as to obtain the loop control current Iloop, so that the loop control current Iloop obtained is equivalent to the target control current Ipp2 plus the half-ripple control current Ipp1, which is the current peak value. When the switching power supply 10 operates in the valley current control mode, the loop control current Iloop is obtained according to the difference between the target control current Iloop and the half-ripple control current Ipp1. In this way, the difference between the target control current Iloop and the half-ripple control current Ipp1 is taken as the loop control current Iloop, which is the valley value of the current. Since the minimum value of the target control current Iloop is the half-ripple control current Ipp1, the minimum valley value of the loop control current Iloop is zero. It can be seen that the maximum difference between the peak and valley values ​​of the loop control current Iloop obtained according to this method is small, that is, the peak and valley values ​​are obtained before and after the working mode is switched, and the center value of the inductor current IL is consistently maintained near the half-ripple control current Ipp1.

[0091] Therefore, when the control circuit provided in this embodiment controls the switching power supply according to the loop control current Iloop, the switching power supply can adaptively adjust the output loop control current Iloop when the mode is switched, and then perform loop control on the switching power supply according to the loop control current, so that the voltage center value of the output voltage output by the switching power supply before and after the mode switching is basically consistent, thereby avoiding large ripples in the output voltage and ensuring the stability of the switching power supply.

[0092] Please continue to see Figure 2 As shown, the input end of the current sampling circuit 21 is connected to the output end of the switching power supply 10 to sample the output voltage VOUT of the output end of the switching power supply 10, and the output end of the current sampling circuit 21 is connected to the input end of the compensation current selection circuit 23 to output the sampled loop compensation current Icmp to the compensation current selection circuit 23. The sampling ends of the inductor current ripple sampling circuit 22 are respectively connected to the input end and the output end of the switching power supply 10 to sample the input voltage VIN and the output voltage VOUT of the switching power supply 10, and the output end of the inductor current ripple sampling circuit 22 is connected to the input end of the compensation current selection circuit 23 to output the generated half-ripple control current Ipp to the compensation current selection circuit 23.

[0093] The output end of the compensation current selection circuit 23 is connected to the input end of the current compensation circuit 24 to output the selected target control current Ipp2 to the current compensation circuit 24. The output end of the current compensation circuit 24 is connected to the inverting input end of the first comparator COMP1 through the second resistor Rsns; the sampling end of the inductor current sampling circuit 25 is connected to the branch where the first inductor L1 is located, and the output end of the inductor current sampling circuit 25 is connected to the non-inverting input end of the first comparator COMP1 through the first resistor Ri; the output end of the first comparator COMP1 is connected to the first input end of the logic control circuit 20, the first output end of the logic control circuit is connected to the control electrode of the first transistor Q1, and the second output end of the logic control circuit 20 is connected to the control electrode of the second transistor Q2.

[0094] Please continue to see Figure 2 As shown, in some embodiments, the control circuit of the switching power supply also includes a first timer circuit 26 and a second timer circuit 27. The first timer circuit 26 and the second timer circuit 27 are respectively used to generate corresponding clock trigger signals in different control modes, so that the logic control circuit 20 generates a corresponding drive signal according to the clock trigger signal to drive the corresponding transistor to operate.

[0095] Figure 3 One of the structural diagrams of the first timer circuit provided in the embodiment of the present application is shown in FIG. Figure 3 As shown, the first timer circuit 26 includes a second comparator COMP2, a third resistor Rcot and a first capacitor Ccot.

[0096] Among them, the first end of the third resistor Rcot is connected to the input end of the switching power supply 10, and is used to sample the input voltage VIN input by the switching power supply 10, the second end of the third resistor Rcot is connected to the first end of the first capacitor Ccot, the second end of the first capacitor Ccot is grounded, the first end of the first capacitor Ccot is connected to the non-inverting input end of the second comparator COMP2, and the non-inverting input end of the second comparator COMP2 is used to sample the third voltage on the first capacitor Ccot; the inverting input end of the second comparator COMP2 is used to sample the reference voltage.

[0097] Figure 4 For the second structural diagram of the first timer circuit provided in the embodiment of the present application, please refer to Figure 4 As shown, the input end of the first timer circuit 26 receives the input voltage VIN, which is then multiplied by 1 / Rcot through a multiplier, equivalent to forming a current source Icot. The current source Icot charges the first capacitor Ccot, and then samples the third voltage on the first capacitor Ccot.

[0098] It is understandable that when the switching power supply 10 operates in different modes, the corresponding reference voltages are different, that is, when the switching power supply 10 operates in the peak current control mode and the valley current control mode, the reference voltages received by the inverting input terminal of the second comparator COMP2 are different.

[0099] Specifically, in one application scenario, the inverting input terminal of the second comparator COMP2 is used to receive the output voltage VOUT in the peak current control mode, that is, the output voltage VOUT is used as the reference voltage in the peak current control mode. In another application scenario, the inverting input terminal of the second comparator COMP2 is used to receive the first difference voltage in the valley current control mode, and the first difference voltage is the difference between the input voltage VIN and the output voltage VOUT, that is, the first difference voltage can be expressed as (VIN-VOUT). When the switching power supply 10 operates in the peak current control mode, the second comparator COMP2 is used to output the first clock signal Tcot when it is detected that the third voltage on the first capacitor Ccot is equal to the output voltage VOUT; or, when the switching power supply 10 operates in the valley current control mode, the second comparator COMP2 is used to output the first clock signal Tcot when the third voltage is equal to the first difference voltage.

[0100] Among them, the logic control circuit 20 is used to generate a first drive signal according to the first clock signal Tcot in the peak current control mode, and the first drive signal is used to drive the second transistor Q2 to be turned off; or, the logic control circuit 20 is used to generate a second drive signal and a third drive signal according to the first clock signal Tcot in the valley current control mode, and the second drive signal is used to drive the first transistor Q1 to be turned off, and the third drive signal is used to drive the second transistor Q2 to be turned on.

[0101] Figure 5 For a structural diagram of the second timer circuit provided in the embodiment of the present application, see Figure 5 As shown, the second timer circuit 27 provided in this embodiment includes a second capacitor Cpfm, a fourth resistor Rpfm and a third comparator COMP3.

[0102] Among them, the first end of the second capacitor Cpfm is connected to the output end of the current sampling circuit 21, the second end of the second capacitor Cpfm is grounded GND, and the first end of the second capacitor Cpfm is connected to the non-inverting input end of the third comparator COMP3; the first end of the fourth resistor Rpfm is connected to the output end of the inductor current ripple sampling circuit 22, the second end of the fourth resistor Rpfm is grounded GND, the first end of the fourth resistor Rpfm is also connected to the inverting input end of the third comparator COMP3, and the output end of the third comparator COMP3 is connected to the logic control circuit 20.

[0103] The non-inverting input terminal of the third comparator COMP3 is used to sample the fourth voltage on the second capacitor Cpfm, the inverting input terminal of the third comparator COMP3 is used to sample the fifth voltage on the fourth resistor Rpfm, and the third comparator COMP3 is used to output the second clock signal Tpfm when the fourth voltage is equal to the fifth voltage. The logic control circuit 20 is used to generate a fourth drive signal according to the second clock signal Tpfm in the peak current control mode or the valley current control mode, and the fourth drive signal is used to drive the first transistor Q1 to turn on.

[0104] The second timer circuit 27 in this embodiment is mainly used to record the discharge time. When the discharge time of the switching power supply 10 reaches a preset value, the first transistor Q1 needs to be turned on for charging.

[0105] It can be understood that the loop compensation current Icmp output by the current sampling circuit 21 can charge the second capacitor Cpfm to obtain the fourth voltage on the second capacitor Cpfm, and at the same time, the half-ripple control current Ipp1 output by the inductor current ripple sampling circuit 22 is divided on the fourth resistor Rpfm to obtain the fifth voltage on the fourth resistor Rpfm. The size of the loop compensation current Icmp determines the charging speed of the second capacitor Cpfm. The larger the loop compensation current Icmp, the faster the charging speed. When the fourth voltage is equal to the fifth voltage, it means that the discharge is completed, and the first transistor Q1 can be triggered to be turned on for charging.

[0106] In this embodiment, the resistance values ​​of the third resistor Rcot and the fourth resistor Rpfm are the same; the capacitance values ​​of the first capacitor Ccot and the second capacitor Cpfm are the same, which can ensure the consistency of the parameters of each device, thereby ensuring that the voltage center value of the output voltage output by the switching power supply before and after the mode switching is basically consistent.

[0107] Figure 6 For a schematic diagram of the structure of the current sampling circuit provided in the embodiment of the present application, please refer to Figure 6 As shown, the current sampling circuit 21 includes a voltage divider circuit 211 , an error amplifier EA and a transconductance amplifier OTA.

[0108] Among them, the sampling end of the voltage divider circuit 211 is connected to the output end of the switching power supply 10 to sample the output voltage VOUT, and the output end of the voltage divider circuit is connected to the inverting input end of the error amplifier EA; the inverting input end of the error amplifier EA is used to receive the first divided voltage VFB collected by the voltage divider circuit, and the non-inverting input end of the error amplifier EA is used to receive the reference voltage VREF; the error amplifier EA is used to calculate the error voltage between the first divided voltage VFB and the reference voltage VREF, and amplify the error voltage to obtain the loop compensation voltage Vcmp. The output end of the error amplifier EA is connected to the input end of the transconductance amplifier OTA, and the transconductance amplifier OTA is used to convert the loop compensation voltage Vcmp into the loop compensation current Icmp.

[0109] Please continue to see Figure 6 As shown, the voltage divider circuit 211 of this embodiment includes a fifth resistor RT and a sixth resistor RB. The first end of the fifth resistor RT is a sampling end of the voltage divider circuit 211, which is used to sample the output voltage VOUT output by the switching power supply 10. The second end of the fifth resistor RT is connected to the first end of the sixth resistor RB, and the second end of the sixth resistor RB is grounded GND; the first end of the sixth resistor RB is the output end of the voltage divider circuit 211 to output the collected first divided voltage VFB.

[0110] Please continue to see Figure 6As shown, in some embodiments, the current sampling circuit 21 further includes a seventh resistor Rcmp and a third capacitor Ccmp, the output end of the error amplifier EA is connected to the first end of the seventh resistor Rcmp, the second end of the seventh resistor Rcmp is connected to the first end of the third capacitor Ccmp, and the second end of the third capacitor Ccmp is grounded GND. The seventh resistor Rcmp and the third capacitor Ccmp of this embodiment form an RC filter circuit to filter out interference signals, so that the collected loop compensation voltage Vcmp is more accurate.

[0111] Figure 7 For a schematic diagram of the structure of the current compensation circuit provided in the embodiment of the present application, please refer to Figure 7 As shown, the current compensation circuit 24 of this embodiment may specifically include an adder, a subtractor, and a selection switch. The compensation current selection circuit 23 outputs the target control current Ipp2 to the current compensation circuit 24, and then processes the target control current Ipp2 in two ways. The first way is: when the adder is in the peak current control mode, the half-ripple control current Ipp1 (i.e., 0.5Ipp) is superimposed on the target control current Ipp2 to obtain the loop control current Iloop; the second way is: when the subtractor is in the valley current control mode, the target control current Iloop is subtracted from the half-ripple control current Ipp1 to obtain the loop control current Iloop. Finally, by selecting the corresponding output terminal connection according to the current working mode of the switching power supply 10, the target control current Ipp2 can be compensated to obtain the loop control current Iloop.

[0112] In this embodiment, the inductor current ripple value of the switching power supply is calculated according to the input voltage and the output voltage, specifically including:

[0113] The inductor current ripple sampling circuit 22 obtains the inductance value of the first inductor and the switching frequency of the switching power supply, and calculates the inductor current ripple value of the switching power supply according to the following formula:

[0114]

[0115] In the above formula (1), Ipp represents the inductor current ripple value, VIN is the input voltage of the switching power supply, VOUT is the output voltage of the switching power supply, L is the inductance value of the first inductor, Fsw is the switching frequency of the switching power supply, Ri is the resistance value of the first resistor, and Rsns is the resistance value of the second resistor.

[0116] It can be understood that the inductor current ripple sampling circuit 22 can design a specific logic operation circuit according to the above formula (1) to implement the operation process of the above formula (1), thereby outputting the inductor current ripple value Ipp, and further outputting the half-ripple control current Ipp1, so that Ipp1=0.5Ipp, so that Ipp1 can represent half of the inductor current ripple value.

[0117] Figure 8 For a schematic diagram of the overall structure of the control circuit for the switching power supply provided in the embodiment of the present application, see Figure 8 As shown, in a specific embodiment, the control circuit includes a current sampling circuit 21, an inductor current ripple sampling circuit 22, a compensation current selection circuit 23, a current compensation circuit 24, a first resistor Ri, a second resistor Rsns, a first comparator COMP1, an inductor current sampling circuit 25, a first timer circuit 26, a second timer circuit 27 and a logic control circuit 20.

[0118] Among them, the logic control circuit 20 is specifically used to output a fifth drive signal and a sixth drive signal according to the first control signal in the peak current control mode, the fifth drive signal is used to drive the first transistor Q1 to be turned off, and the sixth drive signal is used to drive the second transistor Q2 to be turned on; or, the logic control circuit 20 is used to output a seventh drive signal according to the first control signal in the valley current control mode, and the seventh drive signal is used to drive the second transistor Q2 to be turned off.

[0119] In some embodiments, the logic control circuit 20 is further used to receive a mode switching signal, where the mode switching signal is used to control the switching power supply to switch between a continuous conduction mode and a discontinuous conduction mode.

[0120] It is understandable that if the logic control circuit 20 determines that the switching power supply is currently operating in the continuous conduction mode according to the received mode switching signal, the first transistor Q1 will be turned on immediately after the second transistor Q2 is turned off to charge and store energy.

[0121] In one embodiment, if the switching power supply is currently operating in the intermittent conduction mode, the logic control circuit 20 is further used to determine whether the switching power supply 10 is operating in the intermittent conduction mode after the second transistor is turned off. If so, monitor whether the second clock signal Tpfm is received; if not, output an eighth drive signal, and the eighth drive signal is used to drive the first transistor Q1 to turn on so that the circuit starts charging and storing energy.

[0122] Fig. 9 For a flowchart of the constant on-time valley current control mode provided in the embodiment of the present application, please refer to Fig. 9As shown, in the constant on-time valley current control mode, in one working cycle, firstly, it is detected whether the second clock signal Tpfm is received. If so, the fourth drive signal is output to the first transistor Q1 to drive the first transistor Q1 to turn on. Then, it is detected whether the first clock signal Tcot is received. If so, the second drive signal is output to the first transistor Q1 to drive the first transistor Q1 to turn on, and the third drive signal is output to the second transistor Q2 to drive the second transistor Q2 to turn on. Finally, it is detected whether the inductor current reaches the bottom. If so, the seventh drive signal is output to the second transistor Q2 to drive the second transistor Q2 to turn off. It is determined whether the switching power supply 10 operates in the PFM mode. If so, it is determined whether the second clock signal Tpfm is received; if not, the first transistor Q1 is immediately controlled to turn on. Among them, if it is detected that the first control signal is received, it is determined that the inductor current reaches the bottom.

[0123] Fig.10 For a flowchart of the constant off-time peak current control mode provided in the embodiment of the present application, please refer to Fig.10 As shown, when the switching power supply operates in the constant off-time peak current control mode, in one working cycle, firstly, it is detected whether the second clock signal Tpfm is received. If so, the fourth drive signal is output to the first transistor Q1 to drive the first transistor Q1 to be turned on. Then, it is detected whether the inductor current reaches the peak value. If so, the first transistor Q1 is turned off and the second transistor Q2 is turned on at the same time. If the first control signal is received, it is determined that the inductor current reaches the peak current. Finally, it is detected whether the first clock signal Tcot is received. If so, the first drive signal is output to the second transistor Q2 to drive the second transistor Q2 to be turned off. After the second transistor Q2 is turned off, it is determined whether the switching power supply 10 operates in the PFM mode. If so, it is determined whether the second clock signal Tpfm is received; if not, the first transistor Q1 is immediately controlled to be turned on.

[0124] It can be seen from the above description that in this embodiment, based on the above-mentioned first timer circuit 26 and second timer circuit 27, the on-time and the off-time can be adaptively generated. Specifically, the on-time and the off-time will be adjusted with the changes of the input voltage VIN and the output voltage VOUT, thereby adjusting the switching frequency FSW of the switching power supply 10.

[0125] When the adaptive on-time is generated, the switching power supply adopts the peak control mode, and the input of the inverting input terminal of the second comparator COMP2 is the output voltage VOUT. When the adaptive off-time is generated, the switching power supply adopts the valley control mode, and the input of the inverting input terminal of the second comparator COMP2 is VIN-VOUT. After calculation, a stable switching cycle can be obtained, which can be expressed as:

[0126] Tsw=Rcot·Ccot (2)

[0127] Wherein, Tsw is the switching period, Rcot is the third resistor, and Ccot is the first capacitor.

[0128] It can be seen from the above description that the half-ripple control current Ipp1 output by the inductor current ripple sampling circuit 22, in the peak current or valley current control mode, obtains the final loop control current Iloop according to the half-ripple control current Ipp1 and the current compensation circuit 24. The loop control current Iloop input by the first comparator COMP1 determines the peak value or valley value of the inductor current, and the peak value or valley value of the inductor current ripple IL can be expressed as:

[0129]

[0130] Therefore, the half-ripple control current Ipp1 represents the half-ripple of the inductor current, and the loop compensation current Icmp represents the center value of the inductor current. For the BUCK switching power supply, the center value of the inductor current is equal to the load current. Therefore, the loop compensation current Icmp represents the load current in the switching power supply. When the switching power supply operates in the FCCM mode, the compensation current selection circuit 23 does not work, and the loop compensation current Icmp continuously adjusts the inductor current. At this time, the relationship between the loop compensation current Icmp and the load current Iload is:

[0131]

[0132] When the switching power supply switches to PFM mode, the compensation current selection circuit 23 starts to work. Under heavy load conditions, the working state is the same as that under FCCM. When the load gradually decreases and the inductor current ripple bottoms out to zero, the loop compensation current Icmp is just equal to the half-ripple control current Ipp1, that is, equal to 0.5Ipp. If the load continues to decrease, the loop control current Iloop will not decrease any more, and eventually the inductor current will not decrease after the bottom reaches zero. And the inductor current ripple after entering the DCM mode is equal to the inductor current ripple size under FCCM. At this time, the control of the loop is adjusted by the second timer circuit 27.

[0133] Fig.11 For a schematic diagram of the working waveform of the inductor current in the FCCM mode and the PFM mode in the embodiment of the present application, please refer to Fig.11As shown, Iload1 represents the light load mode, and Iload2 represents the heavy load mode. It can be seen that, with the control circuit provided in this embodiment, whether in FCCM mode or PFM mode, the ripple size Iripple of the inductor current remains unchanged in the light load and heavy load modes. At the same time, it can be seen that in FCCM mode, in the heavy load mode and in the light load mode, the switching period Tsw also remains unchanged. In the PFM mode, the switching period Tpfm in the light load mode is longer than the switching period Tsw in the heavy load mode.

[0134] According to the control circuit provided in this embodiment, after the switching power supply switches to the DCM mode, the relationship between the loop compensation current Icmp and the load current Iload remains unchanged, that is, the above formula (4) is still satisfied.

[0135] In this embodiment, Cpfm=Ccot, Rpfm=Rcot.

[0136] When Icmp=0.5Ipp, the timing of the second timer circuit 27 is exactly equal to one switching cycle Tsw. That is, when the inductor current reaches zero at the bottom, the second timer circuit 27 has just completed the timing and can start the next switching cycle. If the load continues to decrease, the loop compensation current Icmp will continue to decrease. At this time, the timing of the second timer circuit 27 will be extended, thereby extending the switching cycle and ensuring that the loop continues to output stably when the inductor current peak value does not continue to decrease. And under this control circuit, the relationship between the load current Iload and the loop compensation current Icmp remains unchanged in FCCM and PFM modes. Under PFM, the relationship between the loop compensation current Icmp and the load current Iload satisfies the following formula:

[0137]

[0138] After simplifying the above formula (5), the relationship between the loop compensation current Icmp and the load current Iload is still the same as the relationship between the two in the FCCM mode.

[0139] Therefore, in this embodiment, under the same light load, the loop compensation current Icmp is equal, that is, the loop compensation voltage Vcmp is the same. At this time, the mode is forced to switch or the input voltage jumps. Ideally, the loop compensation current Icmp does not need to be adjusted, ensuring that the output voltage does not jitter.

[0140] Fig.12 For a schematic diagram of the working waveform of the control circuit provided in the embodiment of the present application, please refer to Fig.12As shown, when FCCM is high, it indicates that the switching power supply operates in FCCM mode, and when FCCM is switched to low, it indicates that the switching power supply operates in DCM mode. Among them, IL represents the waveform of the inductor current, Vcmp represents the waveform of the loop compensation voltage, and VOUT represents the waveform of the output voltage output by the switching power supply. Among them, the dotted line represents the waveform diagram of the control scheme in the related art, and the solid line represents the waveform diagram when the control circuit of this embodiment is adopted.

[0141] Please combine Fig.12 As shown, by comparing the waveform diagram of the loop compensation voltage Vcmp, it can be seen that, by using the control circuit provided by this embodiment, when the switching power supply switches from the forced continuous conduction mode to the discontinuous conduction mode, the loop compensation voltage Vcmp has smaller fluctuations than in the related art. In addition, by comparing the waveform diagram of the output voltage output by the switching power supply, it can be seen that, by using the control circuit provided by this embodiment, when the switching power supply switches from the forced continuous conduction mode to the discontinuous conduction mode, the output voltage VOUT output by the switching power supply has smaller fluctuations than in the related art, and the center value of the output voltage VOUT has almost no change compared with the related art.

[0142] It can be seen that through Fig.12 The waveform diagram shown can intuitively reflect that the use of the control circuit provided in this embodiment can ensure that the voltage center value of the output voltage output by the switching power supply before and after the mode switching is basically consistent, thereby avoiding the output voltage from generating large ripples and ensuring the stability of the switching power supply.

[0143] This embodiment further provides a control method for a switching power supply, which is applied to the control circuits described in the above embodiments. The control method provided in this embodiment can correspond to the control circuits provided in the above embodiments.

[0144] Fig.13 One of the flow charts of the control method provided in the embodiment of the present application is shown in Fig.13 As shown, in one embodiment, when the switching power supply operates in a constant on-time valley current control mode, the control method includes:

[0145] S101, detecting whether a second clock signal is received, and if so, outputting a fourth driving signal to the first transistor, where the fourth driving signal is used to drive the first transistor to turn on.

[0146] Specifically, in this embodiment, at the beginning of a working cycle, when the switching power supply 10 operates in the constant on-time valley current control mode, when the logic control circuit 20 receives the second clock signal Tpfm output by the second timer circuit 27, it can be determined that the discharge process is completed, and a fourth drive signal is output to the first transistor Q1. The fourth drive signal is used to drive the first transistor Q1 to turn on, so that the switching power supply 10 starts the charging process. Specifically, the charging voltage VIN input by the switching power supply 10 charges and stores energy for the first inductor L1, so that the inductor current value on the first inductor L1 gradually increases.

[0147] S102, detecting whether the first clock signal is received, and if so, outputting a second drive signal to the first transistor and a third drive signal to the second transistor; the second drive signal is used to drive the first transistor to be turned off, and the third drive signal is used to drive the second transistor to be turned on.

[0148] Specifically, in this embodiment, when the logic control circuit 20 receives the first clock signal Tcot output by the first timer circuit 26, it is determined that the charging is completed, and the logic control circuit 20 outputs a second drive signal to the first transistor Q1, and outputs a third drive signal to the second transistor Q2. The second drive signal is used to drive the first transistor Q1 to be turned off, and the third drive signal is used to drive the second transistor Q2 to be turned on. In this way, the switching power supply 10 ends the charging process and starts the discharging process, so that the inductor current on the first inductor L1 gradually decreases.

[0149] S103, detecting whether the first control signal is received, and if so, outputting a seventh driving signal to the second transistor, wherein the seventh driving signal is used to drive the second transistor to turn off.

[0150] Specifically, in the present embodiment, in the process of turning on the second transistor Q2 to allow the first inductor L1 to discharge to the outside, the logic control circuit 20 detects in real time whether the first control signal Cmpo output by the first comparator COMP is received. If the first control signal Cmpo output by the first comparator COMP is received, the logic control circuit 20 outputs a seventh drive signal to the second transistor Q2, and the seventh drive signal is used to drive the second transistor Q2 to be turned off.

[0151] In some embodiments, after driving the second transistor Q2 to turn off, the logic control circuit 20 further determines the current working mode of the switching power supply 10 according to the received mode switching signal. For example, when the logic control circuit 20 determines that the current working mode of the switching power supply 10 is the forced continuous conduction mode according to the received mode switching signal, the first transistor Q1 is immediately driven to turn on after driving the second transistor Q2 to turn off.

[0152] In some embodiments, after driving the second transistor Q2 to turn off, the logic control circuit 20 also determines whether the switching power supply 10 is operating in the intermittent conduction mode based on the received mode switching signal. If so, it further monitors whether the second clock signal Tpfm output by the second timer circuit 27 is received. If so, a fourth drive signal is output to the first transistor Q1, and the fourth drive signal is used to drive the first transistor Q1 to turn on, so that the switching power supply 10 starts the charging process to start the next working cycle; if not, it is determined that the current working mode of the switching power supply 10 is the forced continuous conduction mode, and an eighth drive signal is output to the first transistor Q1, and the eighth drive signal is used to drive the first transistor Q1 to turn on.

[0153] Fig.14 For the second flow chart of the control method provided in the embodiment of the present application, please refer to Fig.14 As shown, in one embodiment, when the switching power supply operates in a constant off-time peak current control mode, the control method includes:

[0154] S201, detecting whether a second clock signal is received, and if so, outputting a fourth driving signal to the first transistor, wherein the fourth driving signal is used to drive the first transistor to turn on.

[0155] Specifically, in this embodiment, at the beginning of a working cycle, when the switching power supply 10 operates in the constant off-time peak current control mode, when the logic control circuit 20 receives the second clock signal Tpfm output by the second timer circuit 27, it is determined that the switching power supply 10 has completed the discharge process, and then a fourth drive signal is output to the first transistor Q1, and the fourth drive signal is used to drive the first transistor Q1 to turn on, so that the switching power supply 10 starts charging. Specifically, the charging voltage VIN input by the switching power supply 10 charges and stores energy for the first inductor L1, so that the inductor current on the first inductor L1 gradually increases.

[0156] S202, detecting whether the first control signal is received, and if so, outputting a fifth drive signal to the first transistor and a sixth drive signal to the second transistor; the fifth drive signal is used to drive the first transistor to be turned off, and the sixth drive signal is used to drive the second transistor to be turned on.

[0157] Specifically, in this embodiment, during the process of charging and storing energy in the first inductor L1 so that the inductor current on the first inductor L1 gradually increases, the logic control circuit 20 also detects in real time whether the first control signal Cmpo output by the first comparator COMP is received. If the first control signal Cmpo output by the first comparator COMP is received, the fifth drive signal is output to the first transistor Q1, and the sixth drive signal is output to the second transistor Q2. The fifth drive signal is used to drive the first transistor Q1 to be turned off to end the charging process; the sixth drive signal is used to drive the second transistor Q2 to be turned on so that the switching power supply 10 starts the external discharge process.

[0158] S203, detecting whether the first clock signal is received, and if so, outputting a first driving signal to the second transistor, wherein the first driving signal is used to drive the second transistor to be turned off.

[0159] Specifically, in the present embodiment, when the second transistor Q2 is turned on to allow the first inductor L1 to discharge to the outside, the logic control circuit 20 also detects in real time whether the first clock signal Tcot output by the first timer circuit 26 is received. If the first clock signal Tcot output by the first timer circuit 26 is received, the logic control circuit 20 outputs a first drive signal to the second transistor Q2, and the first drive signal is used to drive the second transistor Q2 to be turned off.

[0160] In some embodiments, after driving the second transistor Q2 to turn off, the logic control circuit 20 further determines the current working mode of the switching power supply 10 according to the received mode switching signal. For example, when the logic control circuit 20 determines that the current working mode of the switching power supply 10 is the forced continuous conduction mode according to the received mode switching signal, the first transistor Q1 is immediately driven to turn on after driving the second transistor Q2 to turn off.

[0161] In some embodiments, after driving the second transistor Q2 to turn off, the logic control circuit 20 also determines whether the switching power supply 10 is operating in the intermittent conduction mode based on the received mode switching signal. If so, it further monitors whether the second clock signal Tpfm output by the second timer circuit 27 is received. If so, a driving signal is output to the first transistor Q1, and the driving signal is used to drive the first transistor Q1 to turn on, so that the switching power supply 10 starts the charging process to start the next working cycle; if not, it is determined that the current working mode of the switching power supply 10 is the forced continuous conduction mode, and an eighth driving signal is output to the first transistor Q1, and the eighth driving signal is used to drive the first transistor Q1 to turn on.

[0162] It can be understood that the control methods provided in the above embodiments can be applied to the logic control circuit 20. The logic control circuit 20 can be a logic control chip integrated with various driving circuits to realize the control of the switching power supply according to the control methods provided in the above embodiments.

[0163] According to the control method for a switching power supply provided in this embodiment, based on the first timer circuit 26 and the second timer circuit 27 mentioned above, the on-time and the off-time can be adaptively generated. Specifically, the on-time and the off-time will be adjusted with the changes of the input voltage VIN and the output voltage VOUT, thereby stabilizing the switching frequency FSW of the switching power supply 10, so that the inductor current ripple value can be calculated according to the above formula (1).

[0164] Fig.15 For a schematic diagram of the structure of the control circuit for the boost converter provided in the embodiment of the present application, see Fig.15 As shown, when the switching power supply is a boost converter, the second electrode of the first transistor Q1 is the output end of the switching power supply, the second electrode of the first transistor Q1 is connected to the first end of the first inductor L1 and the second electrode of the second transistor Q2, the second end of the first inductor L1 is the input end of the switching power supply, and is used to receive the input voltage VIN; the first electrode of the second transistor Q2 is grounded GND; the first end of the third resistor R3 is connected to the output end of the switching power supply, and is used to sample the output voltage VOUT.

[0165] This embodiment provides Fig.15 Taking the boost converter provided as an example, this embodiment provides a control circuit using the boost converter, see Fig.15 As shown, the control circuit includes a current sampling circuit 21, an inductor current ripple sampling circuit 22, a compensation current selection circuit 23, a current compensation circuit 24, a first resistor Ri, a second resistor Rsns, a first comparator COMP1, an inductor current sampling circuit 25, a first current output circuit 28, a first timer circuit 26, a second timer circuit 27 and a logic control circuit 20.

[0166] Among them, the circuit structures and technical effects of the current sampling circuit 21, the inductor current ripple sampling circuit 22, the compensation current selection circuit 23, the current compensation circuit 24, the first resistor Ri, the second resistor Rsns, the first comparator COMP1 and the inductor current sampling circuit 25 are the same as those in the above embodiments, and are not repeated here. Different from the technical solutions of the control circuit for the buck converter provided in the above embodiments, when the switching power supply is a boost converter, the control circuit also includes a first current output circuit 28, and the first current output circuit 28 is used to generate a first current Imult according to the loop compensation current Icmp, the input voltage VIN and the output voltage VOUT; then the compensation current selection circuit 23 is also used to determine the larger current value between the first current Imult and the half-ripple control current Ipp1 as the target control current Ipp2 when the switching power supply is a boost voltage or boost-buck circuit.

[0167] In one embodiment, the first current output circuit 28 may be a logic operation circuit. For example, in this embodiment, the first current output circuit 28 may be a multiplier. The first input terminal of the multiplier is used to access the loop compensation current Icmp, the second input terminal of the multiplier is used to access the output voltage VOUT, the third input terminal of the multiplier is used to access the input voltage VIN, and the output terminal of the multiplier is electrically connected to the input terminal of the compensation current selection circuit 23. The multiplier is used to determine the ratio of the output voltage VOUT to the power input voltage VIN, and determine that the product of the ratio and the loop compensation current Icmp is the first current Imult. Then the compensation current selection circuit 23 is also used to determine the larger current value between the first current Imult and the half-ripple control current Ipp1 as the target control current Ipp2 when the switching power supply is a boost voltage or a boost-buck circuit.

[0168] When the switching power supply is a boost converter, the inductor current ripple sampling circuit 22 obtains the inductance value of the first inductor and the switching frequency of the switching power supply, and calculates the inductor current ripple value of the switching power supply according to the following formula:

[0169]

[0170] Wherein, the half-ripple control current Ipp1 = 0.5Ipp.

[0171] In the above formula (6), Ipp represents the inductor current ripple value, VIN is the input voltage of the switching power supply, VOUT is the output voltage of the switching power supply, L is the inductance value of the first inductor, Fsw is the switching frequency of the switching power supply, Ri is the resistance value of the first resistor, and Rsns is the resistance value of the second resistor.

[0172] Different from the control circuit technical solutions for the buck converter provided in the above embodiments, in this embodiment, when the switching power supply is a boost converter, the first timer circuit 26 includes a second comparator COMP2, a third resistor Rcot and a first capacitor Ccot; the second end of the third resistor R3 is connected to the first end of the first capacitor C1, the second end of the first capacitor C1 is grounded GND, the first end of the first capacitor C1 is connected to the non-inverting input end of the second comparator COMP2, and the non-inverting input end of the second comparator COMP2 is used to sample the third voltage on the first capacitor C1; the inverting input end of the second comparator COMP2 is used to receive a second difference voltage in the peak current control mode, and the second difference voltage is the output voltage VOUT and the input voltage VIN, or for receiving the input voltage VIN in the valley current control mode; a second comparator COMP2, for outputting the first clock signal when the third voltage and the second difference voltage are equal, or for outputting the first clock signal when the third voltage and the input voltage are equal; a logic control circuit 20, for generating a first drive signal according to the first clock signal Tcot in the peak current control mode, the first drive signal being used to drive the first transistor Q1 to be turned off; or, the logic control circuit 20, for generating a second drive signal and a third drive signal according to the first clock signal Tcot in the valley current control mode, the second drive signal being used to drive the second transistor Q2 to be turned off, and the third drive signal being used to drive the first transistor Q1 to be turned on.

[0173] Different from the control circuit technical solutions for the buck converter provided in the above embodiments, in this embodiment, when the switching power supply is a boost converter, the second timer circuit 27 provided in this embodiment includes a second capacitor Cpfm, a fourth resistor Rpfm and a third comparator COMP3. Among them, the first end of the second capacitor Cpfm is connected to the output end of the first current output circuit 28, the second end of the second capacitor Cpfm is grounded GND, and the first end of the second capacitor Cpfm is connected to the non-inverting input end of the third comparator COMP3; the first end of the fourth resistor Rpfm is connected to the output end of the inductor current ripple sampling circuit 22, the second end of the fourth resistor Rpfm is grounded GND, the first end of the fourth resistor Rpfm is also connected to the inverting input end of the third comparator COMP3, and the output end of the third comparator COMP3 is connected to the logic control circuit 20. Among them, the non-inverting input terminal of the third comparator COMP3 is used to sample the fourth voltage on the second capacitor Cpfm, the inverting input terminal of the third comparator COMP3 is used to sample the fifth voltage on the fourth resistor Rpfm, and the third comparator COMP3 is used to output the second clock signal Tpfm when the fourth voltage is equal to the fifth voltage.

[0174] Fig.16For a flowchart of the boost converter provided in this embodiment under the constant on-time valley current control mode, see Fig.16 As shown, when the boost converter operates in the constant on-time valley current control mode, in one working cycle, it is first detected whether the second clock signal Tpfm is received, and if so, the logic control circuit 20 controls the second transistor Q2 to be turned on. Then it is detected whether the first clock signal Tcot is received, and if so, the second transistor Q2 is controlled to be turned off, and the first transistor Q1 is controlled to be turned on; then it is detected whether the inductor current reaches the valley value, and if so, the first transistor Q1 is controlled to be turned off.

[0175] Fig.17 For a flowchart of the boost converter in the constant off-time peak current mode provided in the embodiment of the present application, please refer to Fig.17 As shown, when the switching power supply operates in the constant off-time peak current control mode, in one working cycle, firstly, it is detected whether the second clock signal Tpfm is received. If so, the second transistor Q2 is controlled to be turned on, and then it is detected whether the inductor current reaches the peak value. If so, the second transistor Q2 is controlled to be turned off, and the first transistor Q1 is turned on at the same time. If the first control signal is received, it is determined that the inductor current reaches the peak current. Finally, it is detected whether the first clock signal Tcot is received. If so, the first transistor Q1 is controlled to be turned off. After the first transistor Q1 is turned off, it is determined whether the boost converter operates in the PFM mode. If so, it is determined whether the second clock signal Tpfm is received; if not, the second transistor Q2 is immediately controlled to be turned on.

[0176] It can be understood that, according to the control circuit for the boost converter provided in this embodiment, when the loop control current Iloop controls the switching power supply, the switching power supply can adaptively adjust the output loop control current Iloop when the mode is switched, and then the switching power supply is loop-controlled according to the loop control current, so that the voltage center value of the output voltage output by the switching power supply before and after the mode switching is basically consistent, thereby avoiding large ripples in the output voltage and ensuring the stability of the switching power supply.

[0177] Fig.18 For a schematic diagram of the structure of the control circuit for the buck-boost converter provided in the embodiment of the present application, see Fig.18 As shown, when the switching power supply is a buck-boost converter, the first pole of the first transistor Q1 is the input end of the switching power supply, used to receive the input voltage VIN, the second pole of the first transistor Q1 is connected to the first end of the first inductor L1 and the first pole of the second transistor Q2, and the second end of the first inductor L1 is grounded GND; the second pole of the second transistor Q2 is the output end of the switching power supply, used to output the output voltage VOUT.

[0178] This embodiment provides Fig.18 Taking the buck-boost converter provided as an example, this embodiment provides a control circuit using the buck-boost converter, see Fig.18 As shown, the control circuit includes a current sampling circuit 21, an inductor current ripple sampling circuit 22, a compensation current selection circuit 23, a current compensation circuit 24, a first resistor Ri, a second resistor Rsns, a first comparator COMP1, an inductor current sampling circuit 25, a first current output circuit 28, a first timer circuit 26, a second timer circuit 27 and a logic control circuit 20.

[0179] Among them, the circuit structures and technical effects of the current sampling circuit 21, the inductor current ripple sampling circuit 22, the compensation current selection circuit 23, the current compensation circuit 24, the first resistor Ri, the second resistor Rsns, the first comparator COMP1 and the inductor current sampling circuit 25 are the same as those in the above embodiments, and are not repeated here. Different from the technical solutions of the control circuit for the buck converter provided in the above embodiments, when the switching power supply is a buck-boost converter, the control circuit also includes a first current output circuit 28, and the first current output circuit 28 is used to generate a first current Imult according to the loop compensation current Icmp, the input voltage VIN and the output voltage VOUT; then the compensation current selection circuit 23 is also used to determine the larger current value between the first current Imult and the half-ripple control current Ipp1 as the target control current Ipp2 when the switching power supply is a boost voltage or boost-buck circuit.

[0180] In one embodiment, the first current output circuit 28 may be a logic operation circuit. For example, in this embodiment, the first current output circuit 28 may be a multiplier. The first input terminal of the multiplier is used to access the loop compensation current Icmp, the second input terminal of the multiplier is used to access the output voltage VOUT, the third input terminal of the multiplier is used to access the input voltage VIN, and the output terminal of the multiplier is electrically connected to the input terminal of the compensation current selection circuit 23. The multiplier is used to determine the ratio of the output voltage VOUT to the power input voltage VIN, and determine that the product of the ratio and the loop compensation current Icmp is the first current Imult. Then the compensation current selection circuit 23 is also used to determine the larger current value between the first current Imult and the half-ripple control current Ipp1 as the target control current Ipp2 when the switching power supply is a boost voltage or a boost-buck circuit.

[0181] Different from the technical solutions of the control circuit for the buck converter provided in the above embodiments, in this embodiment, when the switching power supply is a buck-boost converter, the first timer circuit 26 includes a second comparator COMP2, a third resistor Rcot and a first capacitor Ccot; a first end of the third resistor is connected to the input end and the output end of the switching power supply, and is used to sample a sixth voltage, which is the sum of the input voltage and the output voltage; a second end of the third resistor R3 is connected to the first end of the first capacitor C1, a second end of the first capacitor C1 is grounded GND, a first end of the first capacitor C1 is connected to the non-inverting input end of the second comparator COMP2, and the non-inverting input end of the second comparator COMP2 is used to sample the third voltage on the first capacitor C1; an inverting input end of the second comparator COMP2 is used to receive the output voltage VOUT in the peak current control mode, or to receive the input voltage VIN in the valley current control mode; the second comparator COMP2 is used to output the first clock signal Tcot when the third voltage is equal to the output voltage, or to output the first clock signal Tcot when the third voltage is equal to the input voltage VIN.

[0182] Different from the control circuit technical solutions for buck converters provided in the above embodiments, in this embodiment, when the switching power supply is a buck-boost converter, the second timer circuit 27 provided in this embodiment includes a second capacitor Cpfm, a fourth resistor Rpfm and a third comparator COMP3. Among them, the first end of the second capacitor Cpfm is connected to the output end of the first current output circuit 28, the second end of the second capacitor Cpfm is grounded GND, and the first end of the second capacitor Cpfm is connected to the non-inverting input end of the third comparator COMP3; the first end of the fourth resistor Rpfm is connected to the output end of the inductor current ripple sampling circuit 22, the second end of the fourth resistor Rpfm is grounded GND, the first end of the fourth resistor Rpfm is also connected to the inverting input end of the third comparator COMP3, and the output end of the third comparator COMP3 is connected to the logic control circuit 20. Among them, the non-inverting input terminal of the third comparator COMP3 is used to sample the fourth voltage on the second capacitor Cpfm, the inverting input terminal of the third comparator COMP3 is used to sample the fifth voltage on the fourth resistor Rpfm, and the third comparator COMP3 is used to output the second clock signal Tpfm when the fourth voltage is equal to the fifth voltage.

[0183] The working principle and working process of the buck-boost converter of this embodiment can refer to the above embodiments, which will not be repeated here.

[0184] It can be understood that, according to the control circuit for the buck-boost converter provided in this embodiment, when the loop control current Iloop controls the switching power supply, the switching power supply can adaptively adjust the output loop control current Iloop when the mode is switched, and then the switching power supply is loop-controlled according to the loop control current, so that the voltage center value of the output voltage output by the switching power supply before and after the mode switching is basically consistent, thereby avoiding large ripples in the output voltage and ensuring the stability of the switching power supply.

[0185] Based on the control circuit for a switching power supply provided in the above embodiments, an embodiment of the present application further provides a chip, which includes the control circuit for a switching power supply as described above.

[0186] It should be noted that the functions and technical effects of the chip provided in this embodiment can correspond to the control circuits provided in the above embodiments, and will not be repeated here.

[0187] Based on the control circuit for the switching power supply provided in the above embodiments, the embodiment of the present application further provides an electronic device, which includes the control circuit for the switching power supply as described above; or includes the chip as described above. Specifically, the electronic device can be a switching power supply.

[0188] It should be noted that the functions and technical effects of the electronic device provided in this embodiment can correspond to the control circuits provided in the above embodiments, and will not be repeated here.

[0189] Finally, it should be noted that the above embodiments are only specific implementation methods of the present application, but the protection scope of the present application is not limited thereto, and any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A control circuit for a switching power supply, the switching power supply comprising a first transistor, a second transistor and a first inductor, the first transistor, the second transistor and the first inductor forming a boost converter, a buck converter or a buck-boost converter; the input end of the switching power supply is used to receive an input voltage, and the output end of the switching power supply is used to output an output voltage; characterized in that: The control circuit includes a current sampling circuit, an inductor current ripple sampling circuit, a compensation current selection circuit, a current compensation circuit, a first resistor, a second resistor, a first comparator, an inductor current sampling circuit and a logic control circuit; The current sampling circuit is used to sample the output voltage of the output end of the switching power supply, and obtain the loop compensation current according to the output voltage; the inductor current ripple sampling circuit is used to sample the input voltage and the output voltage, and calculate the inductor current ripple value of the switching power supply according to the input voltage and the output voltage, and generate a half-ripple control current according to the inductor current ripple value; The compensation current selection circuit is used to determine the larger current value between the loop compensation current and the half-ripple control current as the target control current; The current compensation circuit is used to output the half-ripple control current and add it to the target control current to obtain the loop control current when the switching power supply operates in the peak current control mode; or to obtain the loop control current according to the difference between the target control current and the half-ripple control current when the switching power supply operates in the valley current control mode; The inductor current sampling circuit is used to sample the inductor current of the branch where the first inductor is located, and convert the inductor current into a first voltage through the first resistor; the second resistor is used to convert the loop control current into a second voltage; the first comparator is used to output a first control signal when the first voltage is equal to the second voltage; The logic control circuit is used to output a corresponding driving signal according to the first control signal, and the driving signal is used to drive the first transistor and / or the second transistor to be turned on and off.

2. The control circuit for a switching power supply according to claim 1, characterized in that: When the switching power supply is a boost converter or a buck-boost converter, the control circuit further includes a first current output circuit, the first current output circuit being configured to generate a first current according to the loop compensation current, the input voltage and the output voltage; The compensation current selection circuit is further used to determine, when the switching power supply is a boost converter or a buck-boost converter, that the larger current value between the first current and the half-ripple control current is the target control current.

3. The control circuit for a switching power supply according to claim 1 or 2, characterized in that: The input end of the current sampling circuit is connected to the output end of the switching power supply, and the output end of the current sampling circuit is connected to the input end of the compensation current selection circuit; the sampling end of the inductor current ripple sampling circuit is respectively connected to the input end and the output end of the switching power supply, and the output end of the inductor current ripple sampling circuit is connected to the input end of the compensation current selection circuit; The output end of the compensation current selection circuit is connected to the input end of the current compensation circuit, and the output end of the current compensation circuit is connected to the inverting input end of the first comparator through a second resistor; The sampling end of the inductor current sampling circuit is connected to the branch where the first inductor is located, and the output end of the inductor current sampling circuit is connected to the non-inverting input end of the first comparator through the first resistor; the output end of the first comparator is connected to the first input end of the logic control circuit, the first output end of the logic control circuit is connected to the control electrode of the first transistor, and the second output end of the logic control circuit is connected to the control electrode of the second transistor.

4. The control circuit for a switching power supply according to claim 2, characterized in that: The control circuit further includes a first timer circuit, wherein the first timer circuit includes a second comparator, a third resistor and a first capacitor; When the switching power supply is a buck converter, the first electrode of the first transistor is the input end of the switching power supply, and the input end of the switching power supply is used to receive an input voltage. The second electrode of the first transistor is connected to the first electrode of the second transistor, and the second electrode of the second transistor is grounded. The second electrode of the first transistor is connected to the first end of the first inductor, and the second end of the first inductor is the output end of the switching power supply, and the output end of the switching power supply is used to output an output voltage. The first end of the third resistor is connected to the input end of the switching power supply and is used to sample the input voltage. The second end of the third resistor is connected to the first end of the first capacitor, and the second end of the first capacitor is grounded. The first end of the first capacitor is connected to the non-inverting input end of the second comparator, and the non-inverting input end of the second comparator is used to sample the third voltage on the first capacitor. The inverting input end of the second comparator is used to receive the output voltage in the peak current control mode, or to receive the first difference voltage in the valley current control mode, and the first difference voltage is the difference between the input voltage and the output voltage. The second comparator is configured to output a first clock signal when the third voltage is equal to the output voltage, or to output the first clock signal when the third voltage is equal to the first difference voltage; The logic control circuit is used to generate a first drive signal according to the first clock signal when in a peak current control mode, and the first drive signal is used to drive the second transistor to be turned off; or the logic control circuit is used to generate a second drive signal and a third drive signal according to the first clock signal when in a valley current control mode, and the second drive signal is used to drive the first transistor to be turned off, and the third drive signal is used to drive the second transistor to be turned on; Alternatively, when the switching power supply is a boost converter, the second pole of the first transistor is the output end of the switching power supply, the second pole of the first transistor is connected to the first end of the first inductor and the second pole of the second transistor, the second end of the first inductor is the input end of the switching power supply, and is used to receive the input voltage; the first pole of the second transistor is grounded; the first end of the third resistor is connected to the output end of the switching power supply, and is used to sample the output voltage; the second end of the third resistor is connected to the first end of the first capacitor, the second end of the first capacitor is grounded, the first end of the first capacitor is connected to the non-inverting input end of the second comparator, and the non-inverting input end of the second comparator is used to sample the third voltage on the first capacitor; the inverting input end of the second comparator is used to receive a second difference voltage in a peak current control mode, the second difference voltage being the difference between the output voltage and the input voltage, or to receive the input voltage in a valley current control mode; The second comparator is configured to output a first clock signal when the third voltage is equal to the second difference voltage, or to output the first clock signal when the third voltage is equal to the input voltage; The logic control circuit is used to generate a first drive signal according to the first clock signal when in a peak current control mode, and the first drive signal is used to drive the first transistor to be turned off; or the logic control circuit is used to generate a second drive signal and a third drive signal according to the first clock signal when in a valley current control mode, and the second drive signal is used to drive the second transistor to be turned off, and the third drive signal is used to drive the first transistor to be turned on; Alternatively, when the switching power supply is a buck-boost converter, the first pole of the first transistor is the input end of the switching power supply, used to receive the input voltage, the second pole of the first transistor is connected to the first end of the first inductor and the first pole of the second transistor, and the second end of the first inductor is grounded; the second pole of the second transistor is the output end of the switching power supply, used to output the output voltage; the first end of the third resistor is connected to the output end of the switching power supply, used to sample the sixth voltage; the second end of the third resistor is connected to the first end of the first capacitor, the second end of the first capacitor is grounded, the first end of the first capacitor is connected to the non-inverting input end of the second comparator, and the non-inverting input end of the second comparator is used to sample the third voltage on the first capacitor; the inverting input end of the second comparator is used to receive the output voltage in the peak current control mode, or to receive the input voltage in the valley current control mode; The second comparator is used to output the first clock signal when the third voltage is equal to the output voltage, or to output the first clock signal when the third voltage is equal to the input voltage.

5. The control circuit for a switching power supply according to claim 4, characterized in that: Also included is a second timer circuit, the second timer circuit comprising a second capacitor, a fourth resistor, and a third comparator; When the switching power supply is a buck converter, the first end of the second capacitor is connected to the output end of the current sampling circuit, the second end of the second capacitor is grounded, and the first end of the second capacitor is connected to the non-inverting input end of the third comparator; the first end of the fourth resistor is connected to the output end of the inductor current ripple sampling circuit, the second end of the fourth resistor is grounded, the first end of the fourth resistor is also connected to the inverting input end of the third comparator, and the output end of the third comparator is connected to the logic control circuit; the non-inverting input end of the third comparator is used to sample the fourth voltage on the second capacitor, the inverting input end of the third comparator is used to sample the fifth voltage on the fourth resistor, and the third comparator is used to output a second clock signal when the fourth voltage is equal to the fifth voltage; the logic control circuit is used to generate a fourth drive signal according to the second clock signal in a peak current control mode or a valley current control mode, and the fourth drive signal is used to drive the first transistor to be turned on; Alternatively, when the switching power supply is a boost converter or a buck-boost converter, the first end of the second capacitor is connected to the output end of the first current output circuit, the second end of the second capacitor is grounded, and the first end of the second capacitor is connected to the non-inverting input end of the third comparator; the first end of the fourth resistor is connected to the output end of the inductor current ripple sampling circuit, the second end of the fourth resistor is grounded, the first end of the fourth resistor is also connected to the inverting input end of the third comparator, and the output end of the third comparator is connected to the logic control circuit; the non-inverting input end of the third comparator is used to sample the fourth voltage on the second capacitor, the inverting input end of the third comparator is used to sample the fifth voltage on the fourth resistor, and the third comparator is used to output a second clock signal when the fourth voltage is equal to the fifth voltage.

6. The control circuit for a switching power supply according to claim 5, characterized in that: The resistance values ​​of the third resistor and the fourth resistor are the same; the capacitance values ​​of the first capacitor and the second capacitor are the same.

7. The control circuit for a switching power supply according to claim 5, characterized in that: The current sampling circuit includes a voltage divider circuit, an error amplifier and a transconductance amplifier; The sampling end of the voltage divider circuit is connected to the output end of the switching power supply, and the output end of the voltage divider circuit is connected to the inverting input end of the error amplifier; the inverting input end of the error amplifier is used to receive the first divided voltage collected by the voltage divider circuit, and the non-inverting input end of the error amplifier is used to receive the reference voltage; The error amplifier is used to calculate the error voltage between the first divided voltage and the reference voltage, and amplify the error voltage to obtain a loop compensation voltage; The output end of the error amplifier is connected to the input end of the transconductance amplifier, and the transconductance amplifier is used to convert the loop compensation voltage into the loop compensation current.

8. The control circuit for a switching power supply according to claim 7, characterized in that: The voltage divider circuit includes a fifth resistor and a sixth resistor, the first end of the fifth resistor is a sampling end of the voltage divider circuit, the second end of the fifth resistor is connected to the first end of the sixth resistor, and the second end of the sixth resistor is grounded; the first end of the sixth resistor is the output end of the voltage divider circuit.

9. The control circuit for a switching power supply according to claim 7, characterized in that: The current sampling circuit also includes a seventh resistor and a third capacitor. The output end of the error amplifier is connected to the first end of the seventh resistor, the second end of the seventh resistor is connected to the first end of the third capacitor, and the second end of the third capacitor is grounded.

10. The control circuit for a switching power supply according to claim 1 or 2, characterized in that: The calculating the inductor current ripple value of the switching power supply according to the input voltage and the output voltage includes: The inductance value of the first inductor and the switching frequency of the switching power supply are obtained, and the inductor current ripple value of the switching power supply is calculated according to the following formula: In the above formula, Ipp is the inductor current ripple value, VIN is the input voltage of the switching power supply, VOUT is the output voltage of the switching power supply, L is the inductance value of the first inductor, Fsw is the switching frequency of the switching power supply, Ri is the resistance value of the first resistor, and Rsns is the resistance value of the second resistor.

11. The control circuit for a switching power supply according to claim 5, characterized in that: The logic control circuit is further used to receive a mode switching signal, and the mode switching signal is used to control the switching power supply to switch between a continuous conduction mode and a discontinuous conduction mode.

12. The control circuit for a switching power supply according to claim 11, characterized in that: The logic control circuit is also used to determine whether the switching power supply operates in the intermittent conduction mode after the second transistor is turned off. If so, monitor whether the second clock signal is received; if not, output an eighth drive signal, and the eighth drive signal is used to drive the first transistor to turn on.

13. The control circuit for a switching power supply according to claim 1 or 2, characterized in that: The logic control circuit is used to output a fifth drive signal and a sixth drive signal according to the first control signal in a peak current control mode, wherein the fifth drive signal is used to drive the first transistor to be turned off, and the sixth drive signal is used to drive the second transistor to be turned on; Alternatively, the logic control circuit is used to output a seventh drive signal according to the first control signal in a valley current control mode, and the seventh drive signal is used to drive the second transistor to be turned off.

14. A method for controlling a switching power supply, applied to the control circuit according to any one of claims 1 to 11, characterized in that: When the switching power supply operates in a constant on-time valley current control mode, the control method includes: detecting whether the second clock signal is received, and if so, outputting a fourth drive signal to the first transistor, wherein the fourth drive signal is used to drive the first transistor to turn on; Detecting whether a first clock signal is received, and if so, outputting a second drive signal to the first transistor and a third drive signal to the second transistor; the second drive signal is used to drive the first transistor to be turned off, and the third drive signal is used to drive the second transistor to be turned on; It is detected whether the first control signal is received, and if so, a seventh driving signal is output to the second transistor, where the seventh driving signal is used to drive the second transistor to be turned off.

15. The control method of the switching power supply according to claim 14, characterized in that: After turning off the second transistor, the method further comprises: Determine whether the switching power supply operates in the intermittent conduction mode. If so, monitor whether the second clock signal is received. If not, output an eighth drive signal, and the eighth drive signal is used to drive the first transistor to turn on.

16. The control method of the switching power supply according to claim 14 or 15, characterized in that: When the switching power supply operates in a constant off-time peak current control mode, the control method further includes: detecting whether the second clock signal is received, and if so, outputting a fourth drive signal to the first transistor, wherein the fourth drive signal is used to drive the first transistor to turn on; detecting whether a first control signal is received, and if so, outputting a fifth drive signal to the first transistor and outputting a sixth drive signal to the second transistor; the fifth drive signal is used to drive the first transistor to be turned off, and the sixth drive signal is used to drive the second transistor to be turned on; It is detected whether the first clock signal is received, and if so, a first driving signal is output to the second transistor, wherein the first driving signal is used to drive the second transistor to be turned off.

17. The control method of the switching power supply according to claim 16, characterized in that: After turning off the second transistor, the method further comprises: Determine whether the switching power supply operates in the intermittent conduction mode. If so, monitor whether the second clock signal is received. If not, output an eighth drive signal, and the eighth drive signal is used to drive the first transistor to turn on.

18. A chip, characterized in that: The invention comprises a control circuit for a switching power supply as claimed in any one of claims 1 to 13.

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