Multi-level mixed step-down circuit, control method, chip and electronic equipment

By designing multi-level hybrid buck circuits, integrated switching capacitance mode and hybrid buck mode, the problems of limited voltage conversion ratio range and low efficiency of BUCK converters in the prior art are solved, and a larger range of voltage conversion ratios and higher power management efficiency are achieved.

CN119945139APending Publication Date: 2025-05-06ZHUHAI NANXIN SEMICON TECH CO LTD
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Patent Information

Application Number
CN202510102495.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-22
Publication Date
2025-05-06

AI Technical Summary

Technical Problem

The prior art is difficult to achieve a larger range of voltage conversion ratios, and the traditional BUCK converters are inefficient, resulting in short standby time for electronic devices.

Method used

A multi-level hybrid buck circuit is designed, integrating switching capacitance mode and hybrid buck mode. By controlling the switching capacitance conversion circuit, a larger range of voltage conversion ratio is achieved, and the inductor current is shunted through the switching capacitance conversion circuit, reducing the inductor current and reducing the inductor size.

Benefits of technology

A larger range of voltage conversion ratios is achieved, power management efficiency is improved, standby time for electronic devices is extended, and inductance size is reduced.

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Abstract

The invention provides a multi-level mixed step-down circuit, a control method, a chip and electronic equipment, the circuit comprises a switched capacitor conversion circuit and a step-down circuit, the switched capacitor conversion circuit comprises an input end, a first output end, a second output end, a first end and a second end, and the step-down circuit comprises a first switching tube, a second switching tube and an inductor; when the first switching tube and the second switching tube are both switched off, the multi-level mixed step-down circuit works in a switched capacitor mode, and the switched capacitor conversion circuit is used for converting an input voltage accessed by the input end into an output voltage according to a conversion proportion and outputting the output voltage based on the first output end; when the first switch tube and the second switch tube are both switched on, the multi-level mixed voltage reduction circuit works in a mixed voltage reduction mode, and the multi-level mixed voltage reduction circuit is used for converting input voltage accessed by the input end into output voltage according to a preset voltage conversion ratio interval and outputting the output voltage based on the first output end. Therefore, the voltage conversion ratio in a larger range is obtained, and the standby time is prolonged.
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Description

Technical Field

[0001] The present application relates to the technical field of power management chips, and in particular to a multi-level hybrid buck circuit, a control method, a chip and an electronic device. Background Art

[0002] The structure of multiple battery strings can greatly save the charging time of mobile phones, drones, etc. This technology has gradually become the standard for high-end mobile phones and drones. The switched capacitor voltage converter is widely used in the field of mobile phone fast charging and power supply voltage conversion due to its high conversion efficiency.

[0003] At present, the battery capacity of consumer electronics is getting larger and larger to meet the needs of high-energy consumption applications such as 5G and AI. With the rise of new material batteries such as silicon-oxygen negative electrode batteries, the specific capacity of batteries has been effectively increased, but the battery voltage is no longer limited to the traditional voltage range. After the topology of the traditional switched capacitor voltage converter is determined, the corresponding voltage conversion ratio between input and output cannot be changed; the traditional BUCK (step-down) converter can achieve the voltage regulation function, but its conversion efficiency is low, which is not conducive to extending the standby time of the mobile phone.

[0004] Therefore, how to obtain a wider range of voltage conversion ratios and effectively extend the standby time of electronic devices becomes a technical problem that needs to be solved. Summary of the invention

[0005] The present application provides a multi-level hybrid buck circuit, a control method, a chip and an electronic device to obtain a wider range of voltage conversion ratios and effectively extend the standby time of the electronic device.

[0006] In a first aspect, the present application provides a multi-level hybrid buck circuit, the multi-level hybrid buck circuit comprising: a switch capacitor conversion circuit and a buck circuit, the switch capacitor conversion circuit comprising: an input end, a first output end, a second output end, a first end and a second end, the buck circuit comprising: a first switch tube, a second switch tube and an inductor;

[0007] The first end of the first switch tube is electrically connected to the first end, the second end of the first switch tube is electrically connected to the first end of the second switch tube and the first end of the inductor respectively; the second end of the second switch tube is electrically connected to the second end; the second end of the inductor is electrically connected to the first output end or the second output end;

[0008] When both the first switch tube and the second switch tube are turned off, the multi-level hybrid buck circuit operates in a switched capacitor mode, and the switched capacitor conversion circuit is used to convert the input voltage connected to the input end into an output voltage according to a conversion ratio, and output it based on the first output end;

[0009] When both the first switch tube and the second switch tube are turned on, the multi-level hybrid buck circuit operates in a hybrid buck mode, and the multi-level hybrid buck circuit is used to convert the input voltage connected to the input end into an output voltage according to a preset voltage conversion ratio range, and output it based on the first output end.

[0010] In a possible design, the switched capacitor conversion circuit further includes: a third switch tube, a fourth switch tube, a fifth switch tube, a sixth switch tube, a seventh switch tube, an eighth switch tube, a ninth switch tube, a tenth switch tube, an eleventh switch tube, a twelfth switch tube, a thirteenth switch tube, a fourteenth switch tube, a fifteenth switch tube, a sixteenth switch tube, a seventeenth switch tube, an eighteenth switch tube, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and an output load;

[0011] The first end of the third switch tube is electrically connected to the first end of the fifth capacitor and the first end of the eleventh switch tube respectively, and the second end of the third switch tube is electrically connected to the first end of the fourth switch tube and the first end of the first capacitor respectively;

[0012] The second end of the fourth switch tube is electrically connected to the first end of the tenth switch tube, the first end of the sixth capacitor, the first end of the eighteenth switch tube, the second end of the twelfth switch tube and the second output end respectively;

[0013] The first end of the fifth switch tube is electrically connected to the first end of the second capacitor, the first end of the seventh switch tube, the second end of the tenth switch tube, and the first end respectively, and the second end of the fifth switch tube is electrically connected to the second end of the first capacitor and the first end of the sixth switch tube respectively;

[0014] The second end of the sixth switch tube is grounded;

[0015] The second end of the seventh switch tube is electrically connected to the first end of the eighth switch tube, the first end of the seventh capacitor, the first output end, the first end of the sixteenth switch tube, and the second end of the fifteenth switch tube respectively;

[0016] The second end of the eighth switch tube is electrically connected to the second end of the second capacitor and the first end of the ninth switch tube respectively;

[0017] The second end of the ninth switch tube is grounded;

[0018] The second end of the eleventh switch tube is electrically connected to the first end of the twelfth switch tube and the first end of the third capacitor respectively;

[0019] The first end of the thirteenth switch tube is electrically connected to the first end of the fourth capacitor, the first end of the fifteenth switch tube, the second end of the eighteenth switch tube, and the second end, respectively; the second end of the thirteenth switch tube is electrically connected to the second end of the third capacitor and the first end of the fourteenth switch tube;

[0020] The second end of the fourteenth switch tube is grounded;

[0021] The second end of the sixteenth switch tube is electrically connected to the second end of the fourth capacitor and the first end of the seventeenth switch tube respectively;

[0022] The second end of the seventeenth switch tube is grounded;

[0023] The second end of the fifth capacitor, the second end of the sixth capacitor, and the second end of the seventh capacitor are all grounded;

[0024] A first end of the output load is electrically connected to the first output end, and a second end of the output load is grounded.

[0025] In a possible design, when the second end of the inductor is electrically connected to the first output end, the preset voltage conversion ratio range is 1 / 2 to 1 / 4.

[0026] In a possible design, when the second end of the inductor is electrically connected to the second output end, the preset voltage conversion ratio range is 1 / 4 to 1 / 3.

[0027] In a possible design, the type of the switch tube is any one of a gallium nitride transistor, a bipolar junction transistor, an insulated gate bipolar transistor, a metal-oxide-semiconductor field effect transistor, a field-controlled thyristor, a gate turn-off thyristor and a transmission gate.

[0028] In a second aspect, the present application provides a multi-level hybrid buck circuit control method, the method being applied to the multi-level hybrid buck circuit as described in the first aspect, the method comprising:

[0029] Controlling the multi-level hybrid buck circuit to work in a switched capacitor mode, controlling the switched capacitor conversion circuit to convert an input voltage connected to the input end into an output voltage according to a conversion ratio, and outputting the output voltage based on the first output end;

[0030] The multi-level hybrid buck circuit is controlled to operate in a hybrid buck mode, and the multi-level hybrid buck circuit is controlled to convert an input voltage connected to the input terminal into an output voltage according to a preset voltage conversion ratio interval, and output the output voltage based on the first output terminal.

[0031] In one possible design, the method includes:

[0032] Controlling the first switch tube and the second switch tube to be turned off, so that the multi-level hybrid buck circuit operates in a switched capacitor mode:

[0033] In the first stage, the third switch tube, the fifth switch tube, the eighth switch tube, the tenth switch tube, the twelfth switch tube, the fourteenth switch tube, the fifteenth switch tube, and the seventeenth switch tube are all controlled to be turned on, and the fourth switch tube, the sixth switch tube, the seventh switch tube, the ninth switch tube, the eleventh switch tube, the thirteenth switch tube, the sixteenth switch tube, and the eighteenth switch tube are all controlled to be turned off;

[0034] In the second stage, the fourth switch tube, the sixth switch tube, the seventh switch tube, the ninth switch tube, the eleventh switch tube, the thirteenth switch tube, the sixteenth switch tube, and the eighteenth switch tube are all controlled to be turned on, and the third switch tube, the fifth switch tube, the eighth switch tube, the tenth switch tube, the twelfth switch tube, the fourteenth switch tube, the fifteenth switch tube, and the seventeenth switch tube are all controlled to be turned off, so that the switched capacitor conversion circuit converts the input voltage connected to the input end into the output voltage according to 4:1, and outputs it based on the first output end;

[0035] Controlling the first switch tube and the second switch tube to be turned on, so that the multi-level hybrid buck circuit operates in a hybrid buck mode:

[0036] In the Ton phase, the third switch tube, the eleventh switch tube, the fifth switch tube, the thirteenth switch tube, the eighth switch tube, the sixteenth switch tube, the tenth switch tube, and the eighteenth switch tube are all controlled to be turned on, and the fourth switch tube, the twelfth switch tube, the sixth switch tube, the fourteenth switch tube, the seventh switch tube, the fifteenth switch tube, the ninth switch tube, and the seventeenth switch tube are all controlled to be turned off;

[0037] In the Toff stage, the fourth switch tube, the twelfth switch tube, the sixth switch tube, the fourteenth switch tube, the ninth switch tube, and the seventeenth switch tube are all controlled to be turned on; the third switch tube, the eleventh switch tube, the fifth switch tube, the thirteenth switch tube, the seventh switch tube, the fifteenth switch tube, the eighth switch tube, the sixteenth switch tube, the tenth switch tube, and the eighteenth switch tube are all controlled to be turned off, so that the multi-level hybrid buck circuit converts the input voltage connected to the input end into the output voltage according to the preset voltage conversion ratio range, and outputs it based on the first output end.

[0038] In one possible design, the method includes:

[0039] Controlling the first switch tube and the second switch tube to be turned off, so that the multi-level hybrid buck circuit operates in a switched capacitor mode:

[0040] In the first stage, the third switch tube, the fifth switch tube, the eighth switch tube, the tenth switch tube, the twelfth switch tube, the fourteenth switch tube, the fifteenth switch tube, and the seventeenth switch tube are all controlled to be turned on, and the fourth switch tube, the sixth switch tube, the seventh switch tube, the ninth switch tube, the eleventh switch tube, the thirteenth switch tube, the sixteenth switch tube, and the eighteenth switch tube are all controlled to be turned off;

[0041] In the second stage, the fourth switch tube, the sixth switch tube, the seventh switch tube, the ninth switch tube, the eleventh switch tube, the thirteenth switch tube, the sixteenth switch tube, and the eighteenth switch tube are all controlled to be turned on, and the third switch tube, the fifth switch tube, the eighth switch tube, the tenth switch tube, the twelfth switch tube, the fourteenth switch tube, the fifteenth switch tube, and the seventeenth switch tube are all controlled to be turned off, so that the switched capacitor conversion circuit converts the input voltage connected to the input end into the output voltage according to 4:1, and outputs it based on the first output end;

[0042] Controlling the first switch tube and the second switch tube to be turned on, so that the multi-level hybrid buck circuit operates in a hybrid buck mode:

[0043] In the Ton phase, the fourth switch tube, the twelfth switch tube, the sixth switch tube, the fourteenth switch tube, the seventh switch tube, the fifteenth switch tube, the ninth switch tube, and the seventeenth switch tube are all controlled to be turned on, and the third switch tube, the eleventh switch tube, the fifth switch tube, the thirteenth switch tube, the eighth switch tube, the sixteenth switch tube, the tenth switch tube, and the eighteenth switch tube are all controlled to be turned off;

[0044] In the Toff stage, the third switch tube, the eleventh switch tube, the fifth switch tube, the thirteenth switch tube, the eighth switch tube, and the sixteenth switch tube are all controlled to be turned on, and the fourth switch tube, the twelfth switch tube, the sixth switch tube, the fourteenth switch tube, the seventh switch tube, the fifteenth switch tube, the ninth switch tube, the seventeenth switch tube, the tenth switch tube, and the eighteenth switch tube are all controlled to be turned off, so that the multi-level hybrid buck circuit converts the input voltage connected to the input end into the output voltage according to the preset voltage conversion ratio interval, and outputs it based on the first output end.

[0045] In a third aspect, the present application provides a chip, comprising: a multi-level hybrid buck circuit as described in the first aspect above.

[0046] In a fourth aspect, the present application provides an electronic device, comprising: a chip as described in the third aspect above.

[0047] Beneficial effects of the embodiments of the present application:

[0048] In the embodiment of the present application, the multi-level hybrid buck circuit integrates two different working modes: a switch capacitor mode and a hybrid buck mode. In the hybrid buck mode, the output voltage Vout can be adjusted in a preset voltage conversion ratio range. At the same time, it is also compatible with the switch capacitor mode. In the switch capacitor mode, the input voltage and the output voltage can be converted efficiently according to the conversion ratio. According to different voltage conversion intervals, the two modes work separately, and the requirements of different voltage conversion ratios are met by controlling the switch capacitor conversion circuit to obtain a wider range of voltage conversion ratios. In addition, compared with the traditional BUCK converter circuit, the scheme of the present application makes the multi-level hybrid buck circuit in the present application more efficient due to the presence of the switch capacitor conversion circuit, which can effectively extend the standby time of the electronic device. The switch capacitor conversion circuit will shunt the current of the inductor, so that the inductor current is reduced, thereby reducing the size of the inductor in the multi-level hybrid buck circuit in the present application. Compared with the staggered cascade switch capacitor converter, the output voltage can be adjusted, which is suitable for scenarios with a wider range of voltage conversion ratio requirements.

[0049] The beneficial effects provided in the above-mentioned second aspect and various possible designs of the above-mentioned second aspect can refer to the beneficial effects brought about by the above-mentioned first aspect and various possible implementation methods of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other embodiments can also be obtained based on these drawings.

[0051] Figure 1 A conventional BUCK converter circuit is provided for related art;

[0052] FIG. 2( a ) is a schematic diagram of a Ton phase of a conventional BUCK converter circuit in the related art;

[0053] FIG2( b ) is a schematic diagram of the Toff phase of a conventional BUCK converter circuit in the related art;

[0054] Figure 3 A staggered cascade switched capacitor converter circuit is provided for related technology;

[0055] FIG4( a ) is a schematic diagram of an interleaved cascade switched capacitor converter circuit in Phase 1 in the related art;

[0056] FIG4( b ) is a schematic diagram of an interleaved cascade switched capacitor converter circuit in Phase 2 in the related art;

[0057] Figure 5 A schematic diagram of a multi-level hybrid buck circuit structure provided in an embodiment of the present application;

[0058] FIG6( a ) is a schematic diagram of a voltage reduction application scenario of an embodiment of the present application;

[0059] FIG6( b ) is a schematic diagram of a boost application scenario of an embodiment of the present application;

[0060] Figure 7 A multi-level hybrid buck circuit provided in an embodiment of the present application;

[0061] FIG8( a ) is a circuit diagram corresponding to the first stage of the multi-level hybrid buck circuit operating in the switched capacitor mode according to the first embodiment of the present application;

[0062] FIG8( b ) is a circuit diagram corresponding to the second stage of the multi-level hybrid buck circuit operating in the switched capacitor mode according to the first embodiment of the present application;

[0063] FIG9( a ) is a circuit diagram corresponding to a circuit diagram of a multi-level hybrid buck circuit according to an embodiment of the present application working in a hybrid buck mode in a Ton phase;

[0064] FIG9( b ) is a circuit diagram corresponding to a circuit diagram of a multi-level hybrid buck circuit according to an embodiment of the present application working in a Toff phase of a hybrid buck mode;

[0065] Fig.10 This is a waveform diagram of each node when the multi-level hybrid buck circuit according to the first embodiment of the present application works in the hybrid buck mode;

[0066] Fig.11 Another multi-level hybrid buck circuit provided in an embodiment of the present application;

[0067] FIG12( a ) is a circuit diagram corresponding to the first stage of the multi-level hybrid buck circuit operating in the switched capacitor mode according to the second embodiment of the present application;

[0068] FIG12( b ) is a circuit diagram corresponding to the second stage of the multi-level hybrid buck circuit operating in the switched capacitor mode according to the second embodiment of the present application;

[0069] FIG13( a ) is a circuit diagram corresponding to the Ton phase of the multi-level hybrid buck circuit according to the second embodiment of the present application working in the hybrid buck mode;

[0070] FIG13( b ) is a circuit diagram corresponding to the Toff phase of the multi-level hybrid buck circuit of the second embodiment of the present application working in the hybrid buck mode;

[0071] Fig.14 This is a waveform diagram of each node when the multi-level hybrid buck circuit according to the second embodiment of the present application works in the hybrid buck mode. DETAILED DESCRIPTION

[0072] In this application, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c alone can represent: a, b, c, a and b, a and c, or a, b, and c, where a, b, and c can be single or multiple. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0073] The directions or positional relationships indicated by terms such as "center", "longitudinal", "lateral", "up", "down", "left", "right", "front", and "back" are based on the directions or positional relationships shown in the accompanying drawings and are only for the convenience of describing the present application and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present application.

[0074] The terms "connected" and "connected" should be understood in a broad sense. For example, the "connected" or "connected" of a circuit structure can refer to not only physical connection, but also electrical connection or signal connection. For example, it can be directly connected, that is, physically connected, or indirectly connected through at least one intermediate element, as long as the circuit is connected, or it can be the internal connection of two elements; signal connection can refer to signal connection through a circuit or through a media medium, such as radio waves. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0075] See also Figure 1 , Figure 1 A conventional BUCK converter circuit is provided for related technologies, such as Figure 1As shown, the conventional BUCK converter circuit includes two switches (i.e., S1 and S2), an inductor L0, an input power supply VIN, an input capacitor CIN, an output capacitor COUT, and a load. By controlling the different switching states of the switches, the converter can achieve the function of output voltage step-down. The specific working process is shown in FIG2(a) and FIG2(b). FIG2(a) and FIG2(b) are schematic diagrams of the working process of the conventional BUCK converter circuit, wherein FIG2(a) is the Ton stage of the conventional BUCK converter circuit, and FIG2(b) is the Toff stage of the conventional BUCK converter circuit.

[0076] As shown in FIG2(a), in the Ton stage, the switch S1 is turned on, the switch S2 is turned off, and the current is provided from the input power supply VIN to the output VOUT through the switch S1 and the inductor L0. During this process, the inductor L0 is magnetized, and the magnetization voltage is VIN-VOUT; as shown in FIG2(b), in the Toff stage, the switch S1 is turned off, the switch S2 is turned on, and the current is provided from the ground to the output VOUT through the switch S2 and the inductor L0. During this process, the inductor L0 is demagnetized, and the demagnetization voltage is -VOUT; the duty cycle of the Ton stage is defined as D. According to the volt-second balance principle, VOUT=D*VIN can be achieved, where 0 <D<1。

[0077] The above-mentioned traditional BUCK converter circuit can achieve a voltage conversion ratio of 0 to 1 by adjusting the value of the duty cycle D. In the traditional BUCK converter circuit, the current flowing through the inductor is equal to the load current. Under the condition of large load current, a larger inductor is required. In addition, the DCR (inductor DC resistance) of the inductor and the body diode freewheeling of the switch will bring additional losses, resulting in low efficiency of the traditional BUCK converter circuit.

[0078] See also Figure 3 , Figure 3 A staggered cascade switched capacitor converter circuit is provided for the related technology, such as Figure 3 As shown, the circuit includes 16 switches: a first switch Q1A_1, a second switch Q2A_1, a third switch Q3A_1, a fourth switch Q4A_1, a fifth switch Q5A_1, a sixth switch Q6A_1, a seventh switch Q7A_1, an eighth switch Q8A_1, a ninth switch Q1B_1, a tenth switch Q2B_1, an eleventh switch Q3B_1, a twelfth switch Q4B_1, a thirteenth switch Q5B_1, a fourteenth switch Q6B_1, a fifteenth switch Q7B_1, and a sixteenth switch Q8B_1; four flying capacitors: a first flying capacitor C1A_1, a second flying capacitor C2A_1, a third flying capacitor C1B_1, and a fourth flying capacitor C2B_1; an input power supply VIN_1, an input capacitor C IN _1. Intermediate voltage capacitor C PMID _1. Output capacitor COUT By controlling the switching state of each switch, the interleaved cascade switched capacitor converter can achieve the function of reducing the output voltage to 1 / 4 of the input voltage and quadrupling the output current.

[0079] The specific working process is shown in Figures 4(a) and 4(b), which are schematic diagrams of the working process of the interleaved cascaded switched capacitor converter circuit, wherein Figure 4(a) is a schematic diagram of the interleaved cascaded switched capacitor converter circuit in Phase 1, and Figure 4(b) is a schematic diagram of the interleaved cascaded switched capacitor converter circuit in Phase 2.

[0080] As shown in FIG4(a), in Phase 1, the first switch Q1A_1, the third switch Q3A_1, the fifth switch Q5A_1, the seventh switch Q7A_1, the tenth switch Q2B_1, the twelfth switch Q4B_1, the fourteenth switch Q6B_1, and the sixteenth switch Q8B_1 are all turned on, and the second switch Q2A_1, the fourth switch Q4A_1, the sixth switch Q6A_1, the eighth switch Q8A_1, the ninth switch Q1B_1, the eleventh switch Q3B_1, the thirteenth switch Q5B_1, and the fifteenth switch Q7B_1 are all turned off. By controlling the switching state of each switch, the series or parallel relationship between the first flying capacitor C1A_1, the second flying capacitor C2A_1, the third flying capacitor C1B_1, and the fourth flying capacitor C2B_1 can be controlled. In this stage, the input power supply VIN_1 charges the output voltage VOUT_1 through the first flying capacitor C1A_1, the third flying capacitor C1B_1, and the second flying capacitor C2A_1, wherein the first flying capacitor C1A_1 and the second flying capacitor C2A_1 are charged, and the third flying capacitor C1B_1 is discharged. At the same time, the fourth flying capacitor C2B_1 charges the output voltage VOUT_1, and the fourth flying capacitor C2B_1 is discharged.

[0081] As shown in FIG4(b), in Phase 2, the second switch Q2A_1, the fourth switch Q4A_1, the sixth switch Q6A_1, the eighth switch Q8A_1, the ninth switch Q1B_1, the eleventh switch Q3B_1, the thirteenth switch Q5B_1, and the fifteenth switch Q7B_1 are all turned on, and the first switch Q1A_1, the third switch Q3A_1, the fifth switch Q5A_1, the seventh switch Q7A_1, the tenth switch Q2B_1, the twelfth switch Q4B_1, the fourteenth switch Q6B_1, and the sixteenth switch Q8B_1 are all turned off. By controlling the switching state of each switch, the series or parallel relationship between the first flying capacitor C1A_1, the second flying capacitor C2A_1, the third flying capacitor C1B_1, and the fourth flying capacitor C2B_1 can be controlled. In this stage, the input power source VIN_1 charges the output voltage VOUT_1 through the third flying capacitor C1B_1, the first flying capacitor C1A_1, and the fourth flying capacitor C2B_1, wherein the third flying capacitor C1B_1 and the fourth flying capacitor C2B_1 are charged, and the first flying capacitor C1A_1 is discharged. At the same time, the second flying capacitor C2A_1 charges the output voltage VOUT_1, and the second flying capacitor C2A_1 is discharged.

[0082] In the above-mentioned staggered cascade switched capacitor converter circuit, the duty cycle of each phase stage is 50%, VOUT_1=VC2A_1=VC2B_1=VC1A_1 / 2=VC1B_1 / 2=VPMID_1 / 2=VIN_1 / 4, wherein VC2A_1 represents the voltage of the second flying capacitor C2A_1, VC2B_1 represents the voltage of the fourth flying capacitor C2B_1, VC1A_1 represents the voltage of the first flying capacitor C1A_1, VC1B_1 represents the voltage of the third flying capacitor C1B_1, and VPMID_1 represents the voltage of the node PMID_1.

[0083] The above-mentioned staggered cascade switch capacitor converter circuit can control the series or parallel relationship between the first flying capacitor C1A_1, the second flying capacitor C2A_1, the third flying capacitor C1B_1, and the fourth flying capacitor C2B_1 by controlling the switching state of each switch, and utilizes the capacitor to transfer energy, so as to realize the function of converting the output voltage to 1 / 4 of the input voltage and quadrupling the output current. The staggered cascade switch capacitor converter is a commonly used topology structure in high-efficiency voltage converters at present. However, during the operation of the converter, once the topology structure is determined, only a fixed voltage conversion ratio can be achieved, and the voltage conversion ratio cannot be flexibly changed. It is not suitable for some application scenarios that require voltage conversion ratios.

[0084] In order to solve the problems of low efficiency, large inductance size and long standby time of electronic equipment in the traditional BUCK converter circuit in the related art, and the problem that the voltage conversion ratio of the interleaved cascade switched capacitor converter circuit cannot be changed.

[0085] To this end, the embodiments of the present application provide a multi-level hybrid buck circuit, a control method, a chip, and an electronic device to obtain a wider range of voltage conversion ratios and effectively extend the standby time of the electronic device.

[0086] The multi-level hybrid buck circuit may be a chip or a circuit module.

[0087] Among them, the chip may include a multi-level hybrid buck circuit.

[0088] In this application, electronic devices may include, but are not limited to: adapters, chargers, tablet computers, smart home devices, vehicles, and wearable devices.

[0089] See also Figure 5 , Figure 5 A schematic diagram of a multi-level hybrid buck circuit structure provided in an embodiment of the present application is shown in FIG. Figure 5 As shown, the multi-level hybrid buck circuit 1000 includes: a switched capacitor conversion circuit 100 and a buck circuit 200, the switched capacitor conversion circuit 100 includes: an input terminal IN, a first output terminal OUT, a second output terminal PMID, a first terminal P1 and a second terminal P2, and the buck circuit 200 includes: a first switch tube Q8, a second switch tube Q9 and an inductor L.

[0090] The first end of the first switch tube Q8 is electrically connected to the first end, and the second end of the first switch tube Q8 is electrically connected to the first end of the second switch tube Q9 and the first end of the inductor L respectively; the second end of the second switch tube Q9 is electrically connected to the second end; the second end of the inductor L is electrically connected to the first output end OUT or the second output end PMID.

[0091] When the first switch tube Q8 and the second switch tube Q9 are both turned off, the multi-level hybrid buck circuit 1000 operates in the switched capacitor mode, and the switched capacitor conversion circuit 100 is used to convert the input voltage Vin connected to the input terminal IN into the output voltage Vout according to the conversion ratio, and output it based on the first output terminal OUT.

[0092] When the first switch tube Q8 and the second switch tube Q9 are both turned on, the multi-level hybrid buck circuit 1000 operates in a hybrid buck mode. The multi-level hybrid buck circuit 1000 is used to convert the input voltage Vin connected to the input terminal IN into the output voltage Vout according to a preset voltage conversion ratio interval, and output it based on the first output terminal OUT.

[0093] The multi-level hybrid buck circuit in the present application can be applied to various switching power supplies such as charging chips, DC-DC (direct current-direct current) converters, and application scenarios with voltage conversion requirements. Referring to Figures 6(a) and 6(b), Figure 6(a) is a schematic diagram of a buck application scenario of an embodiment of the present application. As shown in Figure 6(a), when port 1 (port1) is input and port 2 (port2) is output, the function of bucking can be achieved through the circuit topology structure; Figure 6(b) is a schematic diagram of a boost application scenario of an embodiment of the present application. As shown in Figure 6(b), when port 2 (port2) is input and port 1 (port1) is output, the function of boosting can be achieved through the circuit topology structure. It can be understood that Figures (a) and 6(b) are only for illustrating that the multi-level hybrid buck circuit in the embodiment of the present application can achieve the functions of boosting and bucking, and the various devices and corresponding connection relationships in the schematic diagram do not correspond one to one with the various devices in the multi-level hybrid buck circuit.

[0094] The multi-level hybrid buck circuit in the embodiment of the present application integrates the switch capacitor conversion circuit and the buck circuit, and integrates two different working modes: the switch capacitor mode and the hybrid buck mode. By controlling the working state of the first switch tube Q8 and the second switch tube Q9, the multi-level hybrid buck circuit can select the corresponding working mode to work according to different voltage conversion intervals, and can meet the needs of different voltage conversion ratios.

[0095] When the first switch tube Q8 and the second switch tube Q9 are both turned off, the multi-level hybrid buck circuit 1000 operates in the switched capacitor mode; when the first switch tube Q8 and the second switch tube Q9 are both turned on, the multi-level hybrid buck circuit 1000 operates in the hybrid buck mode. Then, by controlling the switched capacitor conversion circuit, the input voltage Vin connected to the input terminal IN is converted into the output voltage Vout according to the conversion ratio, and output based on the first output terminal OUT, or the input voltage Vin connected to the input terminal IN is converted into the output voltage Vout according to the preset voltage conversion ratio interval, and output based on the first output terminal OUT.

[0096] The switched capacitor conversion circuit can realize multiple conversion ratios between the input voltage Vin and the output voltage Vout according to the conversion ratio. For example, the input voltage is twice the output voltage, and Vin=2Vout is realized, that is, the conversion ratio is 2:1; the input voltage is four times the output voltage, and Vin=4Vout is realized, that is, the conversion ratio is 4:1; the input voltage is eight times the output voltage, and Vin=8Vout is realized, that is, the conversion ratio is 8:1. This application does not specifically limit the conversion ratio that can be realized by the switched capacitor conversion circuit.

[0097] Among them, the switched capacitor conversion circuit may include a first output terminal OUT and a second output terminal PMID. In this field, the second output terminal PMID refers to power middle, that is, an intermediate power supply, which is an intermediate power supply node in the process of converting the input voltage Vin into the output voltage Vout. Normally, the voltage of the second output terminal PMID is higher than the voltage of the first output terminal OUT. For example, for a 4:1 switched capacitor conversion circuit, the voltage of the second output terminal PMID is twice the voltage of the first output terminal OUT.

[0098] The preset voltage conversion ratio interval in the present application is related to the electrical connection relationship of the second end of the inductor. The preset voltage conversion ratio interval corresponding to the second end of the inductor being electrically connected to the first output terminal or electrically connected to the second output terminal is different, and a detailed derivation will be performed here later.

[0099] In the embodiment of the present application, the multi-level hybrid buck circuit integrates two different working modes: a switch capacitor mode and a hybrid buck mode. In the hybrid buck mode, the output voltage Vout can be adjusted in a preset voltage conversion ratio range. At the same time, it is also compatible with the switch capacitor mode. In the switch capacitor mode, the input voltage and the output voltage can be converted efficiently according to the conversion ratio. According to different voltage conversion intervals, the two modes work separately, and the requirements of different voltage conversion ratios are met by controlling the switch capacitor conversion circuit to obtain a wider range of voltage conversion ratios. In addition, compared with the traditional BUCK converter circuit, the scheme of the present application makes the multi-level hybrid buck circuit in the present application more efficient due to the presence of the switch capacitor conversion circuit, which can effectively extend the standby time of the electronic device. The switch capacitor conversion circuit will shunt the current of the inductor, so that the inductor current is reduced, thereby reducing the size of the inductor in the multi-level hybrid buck circuit in the present application. Compared with the staggered cascade switch capacitor converter, the output voltage can be adjusted, which is suitable for scenarios with a wider range of voltage conversion ratio requirements.

[0100] In one possible embodiment, see Figure 7 , Figure 7 A multi-level hybrid buck circuit 1000 provided in an embodiment of the present application is as follows: Figure 7 As shown, the switched capacitor conversion circuit 100 further includes: a third switch tube Q1A, a fourth switch tube Q2A, a fifth switch tube Q3A, a sixth switch tube Q4A, a seventh switch tube Q5A, an eighth switch tube Q6A, a ninth switch tube Q7A, a tenth switch tube Q10A, an eleventh switch tube Q1B, a twelfth switch tube Q2B, a thirteenth switch tube Q3B, a fourteenth switch tube Q4B, a fifteenth switch tube Q5B, a sixteenth switch tube Q6B, a seventeenth switch tube Q7B, an eighteenth switch tube Q10B, a first capacitor C1A, a second capacitor C2A, a third capacitor C1B, a fourth capacitor C2B, a fifth capacitor CIN , the sixth capacitor C PMID , the seventh capacitor C OUT and output load.

[0101] The first end of the third switch tube Q1A is respectively connected to the fifth capacitor C IN The first end of the first switch tube Q1A is electrically connected to the first end of the fourth switch tube Q2A and the first end of the first capacitor C1A.

[0102] The second end of the fourth switch tube Q2A is respectively connected to the first end of the tenth switch tube Q10A and the sixth capacitor C PMID The first end of the eighteenth switch tube Q10B, the second end of the twelfth switch tube Q2B and the second output end PMID are electrically connected.

[0103] The first end of the fifth switch tube Q3A is electrically connected to the first end of the second capacitor C2A, the first end of the seventh switch tube Q5A, the second end of the tenth switch tube Q10A, and the first end P1 respectively, and the second end of the fifth switch tube Q3A is electrically connected to the second end of the first capacitor C1A and the first end of the sixth switch tube Q4A respectively.

[0104] A second terminal of the sixth switch tube Q4A is grounded.

[0105] The second end of the seventh switch tube Q5A is respectively connected to the first end of the eighth switch tube Q6A and the seventh capacitor C OUT The first end of the sixteenth switch tube Q6B, the first output end OUT, the first end of the sixteenth switch tube Q6B, and the second end of the fifteenth switch tube Q5B are electrically connected.

[0106] The second end of the eighth switch tube Q6A is electrically connected to the second end of the second capacitor C2A and the first end of the ninth switch tube Q7A respectively.

[0107] A second terminal of the ninth switch tube Q7A is grounded.

[0108] The second end of the eleventh switch tube Q1B is electrically connected to the first end of the twelfth switch tube Q2B and the first end of the third capacitor C1B respectively.

[0109] The first end of the thirteenth switch tube Q3B is electrically connected to the first end of the fourth capacitor C2B, the first end of the fifteenth switch tube Q5B, the second end of the eighteenth switch tube Q10B, and the second end P2 respectively, and the second end of the thirteenth switch tube Q3B is electrically connected to the second end of the third capacitor C1B and the first end of the fourteenth switch tube Q4B respectively.

[0110] A second terminal of the fourteenth switch tube Q4B is grounded.

[0111] The second end of the sixteenth switch tube Q6B is electrically connected to the second end of the fourth capacitor C2B and the first end of the seventeenth switch tube Q7B respectively.

[0112] A second terminal of the seventeenth switch tube Q7B is grounded.

[0113] The fifth capacitor C IN The second end of the sixth capacitor C PMID The second end of the seventh capacitor C OUT The second ends of are grounded.

[0114] A first end of the output load is electrically connected to the first output end OUT, and a second end of the output load is grounded.

[0115] In a possible embodiment, the type of the switch tube may be any one of a gallium nitride transistor, a bipolar junction transistor, an insulated gate bipolar transistor, a metal-oxide-semiconductor field effect transistor, a field-controlled thyristor, a gate turn-off thyristor, and a transmission gate.

[0116] In one example, when the switch tube is a bipolar transistor, the control end of the switch tube refers to the base of the bipolar transistor, the first end of the switch tube can be the collector or emitter of the bipolar transistor, and correspondingly, the second end of the switch tube can be the emitter or collector of the bipolar transistor; when the switch tube is a metal-oxide-semiconductor field-effect transistor, the control end of the switch tube refers to the gate of the metal-oxide-semiconductor field-effect transistor, the first end of the switch tube can be the drain or source of the metal-oxide-semiconductor field-effect transistor, and correspondingly, the second end of the switch tube can be the source or drain of the metal-oxide-semiconductor field-effect transistor.

[0117] The transistors in this application may be N-type transistors or P-type transistors, and this application does not make any specific restrictions on this. However, in actual project applications, N-type transistors are usually selected because of their smaller on-resistance.

[0118] In a possible embodiment, when the second end of the inductor L is electrically connected to the first output end OUT, the preset voltage conversion ratio range is 1 / 2 to 1 / 4.

[0119] In the embodiment of the present application, different preset voltage conversion ratio intervals are obtained according to the electrical connection relationship of the second end of the inductor L. When the second end of the inductor L is electrically connected to the first output terminal OUT, the multi-level hybrid buck circuit of the topology structure can obtain a preset voltage conversion ratio interval of 1 / 2 to 1 / 4 by controlling the switching state of each switch tube.

[0120] In a possible embodiment, when the second end of the inductor L is electrically connected to the second output end PMID, the preset voltage conversion ratio range is 1 / 4 to 1 / 3.

[0121] In the embodiment of the present application, different preset voltage conversion ratio intervals are obtained according to the electrical connection relationship of the second end of the inductor L. When the second end of the inductor L is electrically connected to the second output terminal PMID, the multi-level hybrid buck circuit of the topology structure can obtain a preset voltage conversion ratio interval of 1 / 4 to 1 / 3 by controlling the switching state of each switch tube.

[0122] The preset voltage conversion ratio interval is related to the electrical connection relationship of the second end of the inductor, and different electrical connection relationships of the second end of the inductor correspond to different preset voltage conversion ratio intervals. In subsequent specific embodiments, the value of the preset voltage conversion ratio interval will be derived and explained in detail according to the electrical connection of the second end of the inductor and the switching state of the switch tube in the multi-level hybrid buck circuit.

[0123] The embodiment of the present application also provides a multi-level hybrid buck circuit control method, which is applied to the multi-level hybrid buck circuit, and the method includes:

[0124] S1, controlling the multi-level hybrid buck circuit to work in a switched capacitor mode, controlling the switched capacitor conversion circuit to convert an input voltage connected to an input terminal into an output voltage according to a conversion ratio, and outputting the output voltage based on a first output terminal.

[0125] S2, controlling the multi-level hybrid buck circuit to operate in a hybrid buck mode, controlling the multi-level hybrid buck circuit to convert an input voltage connected to the input terminal into an output voltage according to a preset voltage conversion ratio interval, and outputting the output voltage based on the first output terminal.

[0126] Based on the above-mentioned multi-level hybrid buck circuit control method and level hybrid buck circuit, according to the different electrical connection relationships between the second end of the inductor and the first output end or the second output end in the multi-level hybrid buck circuit, the present application will provide two specific embodiments (i.e., Embodiment 1 and Embodiment 2) for illustration:

[0127] Example 1: See Figure 7The multi-level hybrid buck circuit 1000 in the first embodiment includes 18 switch tubes: a third switch tube Q1A, a fourth switch tube Q2A, a fifth switch tube Q3A, a sixth switch tube Q4A, a seventh switch tube Q5A, an eighth switch tube Q6A, a ninth switch tube Q7A, a tenth switch tube Q10A, an eleventh switch tube Q1B, a twelfth switch tube Q2B, a thirteenth switch tube Q3B, a fourteenth switch tube Q4B, a fifteenth switch tube Q5B, a sixteenth switch tube Q6B, a seventeenth switch tube Q7B, an eighteenth switch tube Q10B, a first switch tube Q8, a second switch tube Q9, four flying capacitors: a first capacitor C1A, a second capacitor C2A, a third capacitor C1B, a fourth capacitor C2B, an inductor L, an input voltage Vin, a fifth capacitor CIN, a sixth capacitor CPMID, a seventh capacitor COUT and an output load. In the first embodiment, the second end of the inductor L is electrically connected to the first output end OUT.

[0128] Referring to FIG8(a) and FIG8(b), FIG8(a) and FIG8(b) are circuit diagrams corresponding to the multi-level hybrid buck circuit of the first embodiment of the present application working in the switch capacitor mode. As shown in FIG8(a) and FIG8(b), the first switch tube Q8 and the second switch tube Q9 are both controlled to be turned off so that the multi-level hybrid buck circuit works in the switch capacitor mode. Among them, FIG8(a) is a circuit diagram corresponding to the first stage of the multi-level hybrid buck circuit of the first embodiment of the present application working in the switch capacitor mode, and FIG8(b) is a circuit diagram corresponding to the second stage of the multi-level hybrid buck circuit of the first embodiment of the present application working in the switch capacitor mode.

[0129] When the multi-level hybrid buck circuit operates in the switched capacitor mode, the series or parallel relationship among the first capacitor C1A, the second capacitor C2A, the third capacitor C1B, and the fourth capacitor C2B can be controlled by controlling the switching state of each switch in the first stage and the second stage, and the input voltage can be converted into the output voltage according to a 4:1 ratio by utilizing capacitor transfer energy.

[0130] Specifically, referring to FIG8(a), in the first stage, the third switch tube Q1A, the fifth switch tube Q3A, the eighth switch tube Q6A, the tenth switch tube Q10A, the twelfth switch tube Q2B, the fourteenth switch tube Q4B, the fifteenth switch tube Q5B, and the seventeenth switch tube Q7B are all turned on, and the fourth switch tube Q2A, the sixth switch tube Q4A, the seventh switch tube Q5A, the ninth switch tube Q7A, the eleventh switch tube Q1B, the thirteenth switch tube Q3B, the sixteenth switch tube Q6B, and the eighteenth switch tube Q10B are all turned off. In this stage, the input voltage Vin charges the output voltage Vout through the first capacitor C1A, the third capacitor C1B, and the second capacitor C2A, wherein the first capacitor C1A and the second capacitor C2A are charged, and the third capacitor C1B is discharged. At the same time, the fourth capacitor C2B charges the output voltage Vout, and the fourth capacitor C2B is discharged.

[0131] Referring to FIG8(b), in the second stage, the fourth switch tube Q2A, the sixth switch tube Q4A, the seventh switch tube Q5A, the ninth switch tube Q7A, the eleventh switch tube Q1B, the thirteenth switch tube Q3B, the sixteenth switch tube Q6B, and the eighteenth switch tube Q10B are all turned on, and the third switch tube Q1A, the fifth switch tube Q3A, the eighth switch tube Q6A, the tenth switch tube Q10A, the twelfth switch tube Q2B, the fourteenth switch tube Q4B, the fifteenth switch tube Q5B, and the seventeenth switch tube Q7B are all turned off, so that the switch capacitor conversion circuit converts the input voltage connected to the input end into the output voltage according to 4:1, and outputs it based on the first output end; in this stage, the input voltage Vin charges the output voltage Vout through the third capacitor C1B, the first capacitor C1A, and the fourth capacitor C2B, wherein the third capacitor C1B and the fourth capacitor C2B are charged, and the first capacitor C1A is discharged. At the same time, the second capacitor C2A charges the output voltage Vout, and the second capacitor C2A is discharged.

[0132] When the multi-level hybrid buck circuit works in the switched capacitor mode, since the first switch tube Q8 and the second switch tube Q9 are both turned off, the inductor L is disconnected, so that the inductor L does not participate in the work. At this time, the multi-level hybrid buck circuit is the same as the interleaved cascade switched capacitor converter circuit in the related art, and can achieve the function of the output voltage becoming 1 / 4 of the input voltage and the output current quadrupling.

[0133] Specifically, the multi-level hybrid buck circuit operates in the switched capacitor mode, with a duty cycle of 50% in each stage, Vout=VC2A=VC2B=VC1A / 2=VC1B / 2=VPMID / 2=Vin / 4, wherein VC2A represents the voltage of the second capacitor C2A, VC2B represents the voltage of the fourth capacitor C2B, VC1A represents the voltage of the first capacitor C1A, VC1B represents the voltage of the third capacitor C1B, and VPMID represents the voltage of the second output terminal PMID.

[0134] Referring to FIG. 9(a) and FIG. 9(b), FIG. 9(a) and FIG. 9(b) are circuit diagrams corresponding to the multi-level hybrid buck circuit of the first embodiment of the present application working in the hybrid buck mode. As shown in FIG. 9(a) and FIG. 9(b), the first switch tube Q8 and the second switch tube Q9 are both controlled to be turned on so that the multi-level hybrid buck circuit works in the hybrid buck mode. Among them, FIG. 9(a) is a circuit diagram corresponding to the Ton stage of the multi-level hybrid buck circuit of the first embodiment of the present application working in the hybrid buck mode, and FIG. 9(b) is a circuit diagram corresponding to the Toff stage of the multi-level hybrid buck circuit of the first embodiment of the present application working in the hybrid buck mode.

[0135] When the multi-level hybrid buck circuit operates in the hybrid buck mode, the series or parallel relationship among the first capacitor C1A, the second capacitor C2A, the third capacitor C1B, and the fourth capacitor C2B can be controlled by controlling the switching state of each switch in the Ton stage and the Toff stage. By utilizing capacitor transfer energy, the input voltage can be converted into an output voltage according to a preset voltage conversion ratio range.

[0136] Specifically, referring to FIG. 9( a ), in the Ton stage, the third switch tube Q1A, the eleventh switch tube Q1B, the fifth switch tube Q3A, the thirteenth switch tube Q3B, the eighth switch tube Q6A, the sixteenth switch tube Q6B, the tenth switch tube Q10A, and the eighteenth switch tube Q10B are all turned on, and the fourth switch tube Q2A, the twelfth switch tube Q2B, the sixth switch tube Q4A, the fourteenth switch tube Q4B, the seventh switch tube Q5A, the fifteenth switch tube Q5B, the ninth switch tube Q7A, and the seventeenth switch tube Q7B are all turned off. In this stage, the first capacitor C1A, the third capacitor C1B, the second capacitor C2A, and the fourth capacitor C2B are charged, and the inductor L is excited.

[0137] Referring to FIG. 9(b), in the Toff stage, the fourth switch tube Q2A, the twelfth switch tube Q2B, the sixth switch tube Q4A, the fourteenth switch tube Q4B, the ninth switch tube Q7A, and the seventeenth switch tube Q7B are all turned on; the third switch tube Q1A, the eleventh switch tube Q1B, the fifth switch tube Q3A, the thirteenth switch tube Q3B, the seventh switch tube Q5A, the fifteenth switch tube Q5B, the eighth switch tube Q6A, the sixteenth switch tube Q6B, the tenth switch tube Q10A, and the eighteenth switch tube Q10B are all turned off, so that the multi-level hybrid buck circuit converts the input voltage connected to the input terminal into the output voltage according to the preset voltage conversion ratio interval, and outputs it based on the first output terminal. In this stage, the first capacitor C1A, the third capacitor C1B, the second capacitor C2A, and the fourth capacitor C2B are discharged, and the inductor L is demagnetized.

[0138] See also Fig.10 , Fig.10 This is a waveform diagram of each node when the multi-level hybrid buck circuit of the first embodiment of the present application works in the hybrid buck mode, such as Fig.10 As shown, in the Ton stage, the third switch tube Q1A, the eleventh switch tube Q1B, the fifth switch tube Q3A, the thirteenth switch tube Q3B, the eighth switch tube Q6A, the sixteenth switch tube Q6B, the tenth switch tube Q10A, and the eighteenth switch tube Q10B are all turned on, and the fourth switch tube Q2A, the twelfth switch tube Q2B, the sixth switch tube Q4A, the fourteenth switch tube Q4B, the seventh switch tube Q5A, the fifteenth switch tube Q5B, the ninth switch tube Q7A, and the seventeenth switch tube Q7B are all turned off. The first switch tube Q8 and the second switch tube Q9 are all turned on. In this stage, the first capacitor C1A, the third capacitor C1B, the second capacitor C2A, and the fourth capacitor C2B are charged, the inductor L is excited, and the inductor current rises. At this time, the voltage at the node SW is equal to Vin / 2, the voltage at the first output terminal OUT is Vout, and the inductor excitation voltage is Vin / 2-Vout.

[0139] See also Fig.10, during the Toff stage, the fourth switch tube Q2A, the twelfth switch tube Q2B, the sixth switch tube Q4A, the fourteenth switch tube Q4B, the ninth switch tube Q7A, and the seventeenth switch tube Q7B are all turned on; the third switch tube Q1A, the eleventh switch tube Q1B, the fifth switch tube Q3A, the thirteenth switch tube Q3B, the seventh switch tube Q5A, the fifteenth switch tube Q5B, the eighth switch tube Q6A, the sixteenth switch tube Q6B, the tenth switch tube Q10A, and the eighteenth switch tube Q10B are all turned off. The first switch tube Q8 and the second switch tube Q9 are both turned on. During this stage, the first capacitor C1A, the third capacitor C1B, the second capacitor C2A, and the fourth capacitor C2B discharge, the inductor L demagnetizes, and the inductor current decreases. At this time, the voltage at the node SW is equal to Vin / 2 - Vout, and the voltage at the first output terminal OUT is Vout. Then, the demagnetization voltage of the inductor is -(Vin / 2 - Vout - Vout).

[0140] Let the time of one period be Ts, the conduction time be Ton, the turn-off time be Toff, and the duty cycle be D (0 < D < 1). Then:

[0141] Ton + Toff = Ts, D×Ts = Ton (1)

[0142] According to the volt-second balance principle, we can get:

[0143] Ton×(Vin / 2 - Vout) = Toff×(2Vout - Vin / 2) (2)

[0144] It can be deduced that the duty cycle D is equal to:

[0145]

[0146] The voltage conversion ratio is:

[0147]

[0148] According to formula (4), it can be known that different voltage conversion ratios can be obtained by adjusting the duty cycle D. Since 0 < D < 1, the corresponding preset voltage conversion ratio range in Embodiment 1 is 1 / 2 to 1 / 4, that is, Vout = Vin / 2 to Vin / 4.

[0149] In the first embodiment, by controlling each switch tube, the multi-level hybrid buck circuit works in two different working modes: the switch capacitor mode and the hybrid buck mode. In the hybrid buck mode, by adjusting the value of the duty cycle, the output voltage Vout can be adjusted between Vin / 2 and Vin / 4. At the same time, the multi-level hybrid buck circuit in the first embodiment is also compatible with the switch capacitor mode. In the switch capacitor mode, the high-efficiency conversion of Vout=Vin / 4 can be achieved. According to different voltage conversion intervals, the two modes work separately. By controlling the switch capacitor conversion circuit, the requirements of different voltage conversion ratios are met to obtain a wider range of voltage conversion ratios. In addition, compared with the traditional BUCK converter circuit, the scheme of the first embodiment makes the multi-level hybrid buck circuit in the present application more efficient due to the presence of the switch capacitor conversion circuit, which can effectively extend the standby time of the electronic device. The switch capacitor conversion circuit will shunt the current of the inductor, so that the inductor current is reduced, thereby reducing the size of the inductor in the multi-level hybrid buck circuit in the present application. Compared with the interleaved cascade switched capacitor converter, the solution of the first embodiment can achieve adjustable output voltage and is applicable to scenarios with a wider range of voltage conversion ratio requirements.

[0150] Example 2: See Fig.11 , Fig.11 Another multi-level hybrid buck circuit provided in the embodiment of the present application is as follows: Fig.11 As shown, the multi-level hybrid buck circuit 1000 in the second embodiment includes 18 switch tubes: a third switch tube Q1A, a fourth switch tube Q2A, a fifth switch tube Q3A, a sixth switch tube Q4A, a seventh switch tube Q5A, an eighth switch tube Q6A, a ninth switch tube Q7A, a tenth switch tube Q10A, an eleventh switch tube Q1B, a twelfth switch tube Q2B, a thirteenth switch tube Q3B, a fourteenth switch tube Q4B, a fifteenth switch tube Q5B, a sixteenth switch tube Q6B, a seventeenth switch tube Q7B, an eighteenth switch tube Q10B, a first switch tube Q8, a second switch tube Q9, four flying capacitors: a first capacitor C1A, a second capacitor C2A, a third capacitor C1B, a fourth capacitor C2B, an inductor L, an input voltage Vin, a fifth capacitor CIN, a sixth capacitor CPMID, a seventh capacitor COUT and an output load. Embodiment 2 is a variant structure obtained by changing the position of the inductor on the basis of Embodiment 1, that is, the inductor is placed between the node SW and the first output terminal OUT instead of between the node SW and the second output terminal PMID. In Embodiment 2, the second end of the inductor L is electrically connected to the second output terminal PMID.

[0151] Referring to FIG. 12(a) and FIG. 12(b), FIG. 12(a) and FIG. 12(b) are circuit diagrams corresponding to the multi-level hybrid buck circuit of the second embodiment of the present application working in the switch capacitor mode. As shown in FIG. 12(a) and FIG. 12(b), the first switch tube Q8 and the second switch tube Q9 are both controlled to be turned off so that the multi-level hybrid buck circuit works in the switch capacitor mode. Among them, FIG. 12(a) is a circuit diagram corresponding to the first stage of the multi-level hybrid buck circuit of the second embodiment of the present application working in the switch capacitor mode, and FIG. 12(b) is a circuit diagram corresponding to the second stage of the multi-level hybrid buck circuit of the second embodiment of the present application working in the switch capacitor mode.

[0152] When the multi-level hybrid buck circuit operates in the switched capacitor mode, the series or parallel relationship among the first capacitor C1A, the second capacitor C2A, the third capacitor C1B, and the fourth capacitor C2B can be controlled by controlling the switching state of each switch in the first stage and the second stage, and the input voltage can be converted into the output voltage according to a 4:1 ratio by utilizing capacitor transfer energy.

[0153] Specifically, referring to FIG. 12(a), in the first stage, the third switch tube Q1A, the fifth switch tube Q3A, the eighth switch tube Q6A, the tenth switch tube Q10A, the twelfth switch tube Q2B, the fourteenth switch tube Q4B, the fifteenth switch tube Q5B, and the seventeenth switch tube Q7B are all turned on, and the fourth switch tube Q2A, the sixth switch tube Q4A, the seventh switch tube Q5A, the ninth switch tube Q7A, the eleventh switch tube Q1B, the thirteenth switch tube Q3B, the sixteenth switch tube Q6B, and the eighteenth switch tube Q10B are all turned off. In this stage, the input voltage Vin charges the output voltage Vout through the first capacitor C1A, the third capacitor C1B, and the second capacitor C2A, wherein the first capacitor C1A and the second capacitor C2A are charged, and the third capacitor C1B is discharged. At the same time, the fourth capacitor C2B charges the output voltage Vout, and the fourth capacitor C2B is discharged.

[0154] Referring to FIG. 12( b ), in the second stage, the fourth switch tube Q2A, the sixth switch tube Q4A, the seventh switch tube Q5A, the ninth switch tube Q7A, the eleventh switch tube Q1B, the thirteenth switch tube Q3B, the sixteenth switch tube Q6B, and the eighteenth switch tube Q10B are all turned on, and the third switch tube Q1A, the fifth switch tube Q3A, the eighth switch tube Q6A, the tenth switch tube Q10A, the twelfth switch tube Q2B, the fourteenth switch tube Q4B, the fifteenth switch tube Q5B, and the seventeenth switch tube Q7B are all turned off, so that the switch capacitor conversion circuit converts the input voltage connected to the input end into the output voltage according to 4:1, and outputs it based on the first output end; in this stage, the input voltage Vin charges the output voltage Vout through the third capacitor C1B, the first capacitor C1A, and the fourth capacitor C2B, wherein the third capacitor C1B and the fourth capacitor C2B are charged, and the first capacitor C1A is discharged. At the same time, the second capacitor C2A charges the output voltage Vout, and the second capacitor C2A is discharged.

[0155] When the multi-level hybrid buck circuit works in the switched capacitor mode, since the first switch tube Q8 and the second switch tube Q9 are both turned off, the inductor L is disconnected, so that the inductor L does not participate in the work. At this time, the multi-level hybrid buck circuit is the same as the interleaved cascade switched capacitor converter circuit in the related art, and can achieve the function of the output voltage becoming 1 / 4 of the input voltage and the output current quadrupling.

[0156] Specifically, the multi-level hybrid buck circuit operates in the switched capacitor mode, with a duty cycle of 50% in each stage, Vout=VC2A=VC2B=VC1A / 2=VC1B / 2=VPMID / 2=Vin / 4, wherein VC2A represents the voltage of the second capacitor C2A, VC2B represents the voltage of the fourth capacitor C2B, VC1A represents the voltage of the first capacitor C1A, VC1B represents the voltage of the third capacitor C1B, and VPMID represents the voltage of the second output terminal PMID.

[0157] Referring to FIG. 13(a) and FIG. 13(b), FIG. 13(a) and FIG. 13(b) are circuit diagrams corresponding to the multi-level hybrid buck circuit of the second embodiment of the present application working in the hybrid buck mode. As shown in FIG. 13(a) and FIG. 13(b), the first switch tube Q8 and the second switch tube Q9 are both controlled to be turned on so that the multi-level hybrid buck circuit works in the hybrid buck mode. Among them, FIG. 13(a) is a circuit diagram corresponding to the Ton stage of the multi-level hybrid buck circuit of the second embodiment of the present application working in the hybrid buck mode, and FIG. 13(b) is a circuit diagram corresponding to the Toff stage of the multi-level hybrid buck circuit of the second embodiment of the present application working in the hybrid buck mode.

[0158] When the multi-level hybrid buck circuit operates in the hybrid buck mode, the series or parallel relationship among the first capacitor C1A, the second capacitor C2A, the third capacitor C1B, and the fourth capacitor C2B can be controlled by controlling the switching state of each switch in the Ton stage and the Toff stage. By utilizing capacitor transfer energy, the input voltage can be converted into an output voltage according to a preset voltage conversion ratio range.

[0159] Specifically, referring to FIG. 13( a ), in the Ton stage, the fourth switch tube Q2A, the twelfth switch tube Q2B, the sixth switch tube Q4A, the fourteenth switch tube Q4B, the seventh switch tube Q5A, the fifteenth switch tube Q5B, the ninth switch tube Q7A, and the seventeenth switch tube Q7B are all turned on, and the third switch tube Q1A, the eleventh switch tube Q1B, the fifth switch tube Q3A, the thirteenth switch tube Q3B, the eighth switch tube Q6A, the sixteenth switch tube Q6B, the tenth switch tube Q10A, and the eighteenth switch tube Q10B are all turned off. In this stage, the first capacitor C1A, the third capacitor C1B, the second capacitor C2A, and the fourth capacitor C2B are discharged, and the inductor L is excited.

[0160] Referring to FIG. 13( b ), in the Toff stage, the third switch tube Q1A, the eleventh switch tube Q1B, the fifth switch tube Q3A, the thirteenth switch tube Q3B, the eighth switch tube Q6A, and the sixteenth switch tube Q6B are all turned on, and the fourth switch tube Q2A, the twelfth switch tube Q2B, the sixth switch tube Q4A, the fourteenth switch tube Q4B, the seventh switch tube Q5A, the fifteenth switch tube Q5B, the ninth switch tube Q7A, the seventeenth switch tube Q7B, the tenth switch tube Q10A, and the eighteenth switch tube Q10B are all turned off, so that the multi-level hybrid buck circuit converts the input voltage connected to the input terminal into the output voltage according to the preset voltage conversion ratio interval, and outputs it based on the first output terminal. In this stage, the first capacitor C1A, the third capacitor C1B, the second capacitor C2A, and the fourth capacitor C2B are charged, and the inductor L is demagnetized.

[0161] See also Fig.14 , Fig.14 : This is a waveform diagram of each node when the multi-level hybrid buck circuit of the second embodiment of the present application works in the hybrid buck mode, such as Fig.14As shown, during the Ton stage, the fourth switch Q2A, the twelfth switch Q2B, the sixth switch Q4A, the fourteenth switch Q4B, the seventh switch Q5A, the fifteenth switch Q5B, the ninth switch Q7A, and the seventeenth switch Q7B are all turned on, while the third switch Q1A, the eleventh switch Q1B, the fifth switch Q3A, the thirteenth switch Q3B, the eighth switch Q6A, the sixteenth switch Q6B, the tenth switch Q10A, and the eighteenth switch Q10B are all turned off. The first switch Q8 and the second switch Q9 are both turned on. During this stage, the first capacitor C1A, the third capacitor C1B, the second capacitor C2A, and the fourth capacitor C2B discharge, the inductor L is magnetized, and the inductor current rises. At this time, the voltage at the node SW is equal to Vout, the voltage of the second output terminal PMID is Vin - 2Vout, and the magnetizing voltage of the inductor is Vin - 3Vout.

[0162] See Fig.14 , during the Toff stage, the third switch Q1A, the eleventh switch Q1B, the fifth switch Q3A, the thirteenth switch Q3B, the eighth switch Q6A, and the sixteenth switch Q6B are all turned on, while the fourth switch Q2A, the twelfth switch Q2B, the sixth switch Q4A, the fourteenth switch Q4B, the seventh switch Q5A, the fifteenth switch Q5B, the ninth switch Q7A, the seventeenth switch Q7B, the tenth switch Q10A, and the eighteenth switch Q10B are all turned off. The first switch Q8 and the second switch Q9 are both turned on. During this stage, the first capacitor C1A, the third capacitor C1B, the second capacitor C2A, and the fourth capacitor C2B are charged, the inductor L is demagnetized, and the inductor current drops. At this time, the voltage at the node SW is equal to 2Vout, the voltage of the second output terminal PMID is Vin - 2Vout, and the magnetizing voltage of the inductor is 4Vout - Vin.

[0163] Let the time of one cycle be Ts, the conduction time be Ton, the turn-off time be Toff, and the duty cycle be D (0 < D < 1). Then:

[0164] Ton + Toff = Ts, D×Ts = Ton (5)

[0165] According to the volt-second balance principle, we can get:

[0166] Ton×(Vin - 3Vout) = Toff×(4Vout - Vin) (6)

[0167] It can be deduced that the duty cycle D is equal to:

[0168]

[0169] The voltage conversion ratio is:

[0170]

[0171] According to formula (8), different voltage conversion ratios can be obtained by adjusting the duty cycle D. Since 0 < D < 1, the corresponding preset voltage conversion ratio range in the second embodiment is 1 / 4 to 1 / 3, that is, Vout = Vin / 4 to Vin / 3.

[0172] In the second embodiment, by controlling each switch tube, the multi-level hybrid buck circuit operates in two different operating modes: the switched-capacitor mode and the hybrid buck mode. In the hybrid buck mode, by adjusting the value of the duty cycle, the output voltage Vout can be adjusted between Vin / 4 and Vin / 3. At the same time, the multi-level hybrid buck circuit in the second embodiment also incorporates the switched-capacitor mode, and a high-efficiency conversion of Vout = Vin / 4 can be achieved in the switched-capacitor mode. According to different voltage conversion intervals, the two modes operate separately, and by controlling the switched-capacitor conversion circuit, the requirements for different voltage conversion ratios are met to obtain a wider range of voltage conversion ratios. In addition, compared with the traditional BUCK converter circuit, due to the presence of the switched-capacitor conversion circuit, the efficiency of the multi-level hybrid buck circuit in this application is higher, which can effectively extend the standby time of the electronic device. The switched-capacitor conversion circuit shunts the current of the inductor, reducing the inductor current, and thus reducing the size of the inductor in the multi-level hybrid buck circuit of this application. The solution of the second embodiment can achieve an adjustable output voltage compared with the interleaved cascaded switched-capacitor converter and is applicable to scenarios with a wider range of voltage conversion ratio requirements.

[0173] The embodiment of the present application also provides a chip, including: the multi-level hybrid buck circuit as described above.

[0174] The embodiment of the present application also provides an electronic device, including: the chip as described above.

[0175] Finally, it should be noted that: the above embodiments are only specific implementation manners of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A multi-level hybrid buck circuit, characterized in that: The multi-level hybrid buck circuit comprises: a switch capacitor conversion circuit and a buck circuit, the switch capacitor conversion circuit comprises: an input end, a first output end, a second output end, a first end and a second end, the buck circuit comprises: a first switch tube, a second switch tube and an inductor; The first end of the first switch tube is electrically connected to the first end, the second end of the first switch tube is electrically connected to the first end of the second switch tube and the first end of the inductor respectively; the second end of the second switch tube is electrically connected to the second end; the second end of the inductor is electrically connected to the first output end or the second output end; When both the first switch tube and the second switch tube are turned off, the multi-level hybrid buck circuit operates in a switched capacitor mode, and the switched capacitor conversion circuit is used to convert the input voltage connected to the input end into an output voltage according to a conversion ratio, and output it based on the first output end; When both the first switch tube and the second switch tube are turned on, the multi-level hybrid buck circuit operates in a hybrid buck mode, and the multi-level hybrid buck circuit is used to convert the input voltage connected to the input end into an output voltage according to a preset voltage conversion ratio range, and output it based on the first output end.

2. The multi-level hybrid buck circuit according to claim 1, characterized in that: The switch capacitor conversion circuit further includes: a third switch tube, a fourth switch tube, a fifth switch tube, a sixth switch tube, a seventh switch tube, an eighth switch tube, a ninth switch tube, a tenth switch tube, an eleventh switch tube, a twelfth switch tube, a thirteenth switch tube, a fourteenth switch tube, a fifteenth switch tube, a sixteenth switch tube, a seventeenth switch tube, an eighteenth switch tube, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor and an output load; The first end of the third switch tube is electrically connected to the first end of the fifth capacitor and the first end of the eleventh switch tube respectively, and the second end of the third switch tube is electrically connected to the first end of the fourth switch tube and the first end of the first capacitor respectively; The second end of the fourth switch tube is electrically connected to the first end of the tenth switch tube, the first end of the sixth capacitor, the first end of the eighteenth switch tube, the second end of the twelfth switch tube and the second output end respectively; The first end of the fifth switch tube is electrically connected to the first end of the second capacitor, the first end of the seventh switch tube, the second end of the tenth switch tube, and the first end respectively, and the second end of the fifth switch tube is electrically connected to the second end of the first capacitor and the first end of the sixth switch tube respectively; The second end of the sixth switch tube is grounded; The second end of the seventh switch tube is electrically connected to the first end of the eighth switch tube, the first end of the seventh capacitor, the first output end, the first end of the sixteenth switch tube, and the second end of the fifteenth switch tube respectively; The second end of the eighth switch tube is electrically connected to the second end of the second capacitor and the first end of the ninth switch tube respectively; The second end of the ninth switch tube is grounded; The second end of the eleventh switch tube is electrically connected to the first end of the twelfth switch tube and the first end of the third capacitor respectively; The first end of the thirteenth switch tube is electrically connected to the first end of the fourth capacitor, the first end of the fifteenth switch tube, the second end of the eighteenth switch tube, and the second end, respectively; the second end of the thirteenth switch tube is electrically connected to the second end of the third capacitor and the first end of the fourteenth switch tube; The second end of the fourteenth switch tube is grounded; The second end of the sixteenth switch tube is electrically connected to the second end of the fourth capacitor and the first end of the seventeenth switch tube respectively; The second end of the seventeenth switch tube is grounded; The second end of the fifth capacitor, the second end of the sixth capacitor, and the second end of the seventh capacitor are all grounded; A first end of the output load is electrically connected to the first output end, and a second end of the output load is grounded.

3. The multi-level hybrid buck circuit according to claim 2, characterized in that: When the second end of the inductor is electrically connected to the first output end, the preset voltage conversion ratio range is 1 / 2 to 1 / 4.

4. The multi-level hybrid buck circuit according to claim 2, characterized in that: When the second end of the inductor is electrically connected to the second output end, the preset voltage conversion ratio range is 1 / 4 to 1 / 3.

5. The multi-level hybrid buck circuit according to claim 2, characterized in that: The type of the switch tube is any one of a gallium nitride transistor, a bipolar junction transistor, an insulated gate bipolar transistor, a metal-oxide-semiconductor field effect transistor, a field-controlled thyristor, a gate turn-off thyristor and a transmission gate.

6. A multi-level hybrid buck circuit control method, characterized in that: The method is applied to the multi-level hybrid buck circuit according to claim 2, and the method comprises: Controlling the multi-level hybrid buck circuit to work in a switched capacitor mode, controlling the switched capacitor conversion circuit to convert an input voltage connected to the input end into an output voltage according to a conversion ratio, and outputting the output voltage based on the first output end; The multi-level hybrid buck circuit is controlled to operate in a hybrid buck mode, and the multi-level hybrid buck circuit is controlled to convert an input voltage connected to the input terminal into an output voltage according to a preset voltage conversion ratio interval, and output the output voltage based on the first output terminal.

7. The multi-level hybrid buck circuit control method according to claim 6, characterized in that: The method is applied to the multi-level hybrid buck circuit according to claim 3, and the method comprises: Controlling the first switch tube and the second switch tube to be turned off, so that the multi-level hybrid buck circuit operates in a switched capacitor mode: In the first stage, the third switch tube, the fifth switch tube, the eighth switch tube, the tenth switch tube, the twelfth switch tube, the fourteenth switch tube, the fifteenth switch tube, and the seventeenth switch tube are all controlled to be turned on, and the fourth switch tube, the sixth switch tube, the seventh switch tube, the ninth switch tube, the eleventh switch tube, the thirteenth switch tube, the sixteenth switch tube, and the eighteenth switch tube are all controlled to be turned off; In the second stage, the fourth switch tube, the sixth switch tube, the seventh switch tube, the ninth switch tube, the eleventh switch tube, the thirteenth switch tube, the sixteenth switch tube, and the eighteenth switch tube are all controlled to be turned on, and the third switch tube, the fifth switch tube, the eighth switch tube, the tenth switch tube, the twelfth switch tube, the fourteenth switch tube, the fifteenth switch tube, and the seventeenth switch tube are all controlled to be turned off, so that the switched capacitor conversion circuit converts the input voltage connected to the input end into the output voltage according to 4:1, and outputs it based on the first output end; Controlling the first switch tube and the second switch tube to be turned on, so that the multi-level hybrid buck circuit operates in a hybrid buck mode: In the Ton phase, the third switch tube, the eleventh switch tube, the fifth switch tube, the thirteenth switch tube, the eighth switch tube, the sixteenth switch tube, the tenth switch tube, and the eighteenth switch tube are all controlled to be turned on, and the fourth switch tube, the twelfth switch tube, the sixth switch tube, the fourteenth switch tube, the seventh switch tube, the fifteenth switch tube, the ninth switch tube, and the seventeenth switch tube are all controlled to be turned off; In the Toff stage, the fourth switch tube, the twelfth switch tube, the sixth switch tube, the fourteenth switch tube, the ninth switch tube, and the seventeenth switch tube are all controlled to be turned on; the third switch tube, the eleventh switch tube, the fifth switch tube, the thirteenth switch tube, the seventh switch tube, the fifteenth switch tube, the eighth switch tube, the sixteenth switch tube, the tenth switch tube, and the eighteenth switch tube are all controlled to be turned off, so that the multi-level hybrid buck circuit converts the input voltage connected to the input end into the output voltage according to the preset voltage conversion ratio range, and outputs it based on the first output end.

8. The multi-level hybrid buck circuit control method according to claim 6, characterized in that: The method is applied to the multi-level hybrid buck circuit according to claim 4, and the method comprises: Controlling the first switch tube and the second switch tube to be turned off, so that the multi-level hybrid buck circuit operates in a switched capacitor mode: In the first stage, the third switch tube, the fifth switch tube, the eighth switch tube, the tenth switch tube, the twelfth switch tube, the fourteenth switch tube, the fifteenth switch tube, and the seventeenth switch tube are all controlled to be turned on, and the fourth switch tube, the sixth switch tube, the seventh switch tube, the ninth switch tube, the eleventh switch tube, the thirteenth switch tube, the sixteenth switch tube, and the eighteenth switch tube are all controlled to be turned off; In the second stage, the fourth switch tube, the sixth switch tube, the seventh switch tube, the ninth switch tube, the eleventh switch tube, the thirteenth switch tube, the sixteenth switch tube, and the eighteenth switch tube are all controlled to be turned on, and the third switch tube, the fifth switch tube, the eighth switch tube, the tenth switch tube, the twelfth switch tube, the fourteenth switch tube, the fifteenth switch tube, and the seventeenth switch tube are all controlled to be turned off, so that the switched capacitor conversion circuit converts the input voltage connected to the input end into the output voltage according to 4:1, and outputs it based on the first output end; Controlling the first switch tube and the second switch tube to be turned on, so that the multi-level hybrid buck circuit operates in a hybrid buck mode: In the Ton phase, the fourth switch tube, the twelfth switch tube, the sixth switch tube, the fourteenth switch tube, the seventh switch tube, the fifteenth switch tube, the ninth switch tube, and the seventeenth switch tube are all controlled to be turned on, and the third switch tube, the eleventh switch tube, the fifth switch tube, the thirteenth switch tube, the eighth switch tube, the sixteenth switch tube, the tenth switch tube, and the eighteenth switch tube are all controlled to be turned off; In the Toff stage, the third switch tube, the eleventh switch tube, the fifth switch tube, the thirteenth switch tube, the eighth switch tube, and the sixteenth switch tube are all controlled to be turned on, and the fourth switch tube, the twelfth switch tube, the sixth switch tube, the fourteenth switch tube, the seventh switch tube, the fifteenth switch tube, the ninth switch tube, the seventeenth switch tube, the tenth switch tube, and the eighteenth switch tube are all controlled to be turned off, so that the multi-level hybrid buck circuit converts the input voltage connected to the input end into the output voltage according to the preset voltage conversion ratio interval, and outputs it based on the first output end.

9. A chip, characterized in that: include: A multi-level hybrid buck circuit as claimed in any one of claims 1 to 5.

10. An electronic device, characterized in that: include: The chip as claimed in claim 9.