Control circuit and control method of constant current power supply

Abstract

The invention provides a control circuit and a control method of a constant-current power supply. Accurate control of output current and output voltage is realized by utilizing hardware characteristics of an MOS (Metal Oxide Semiconductor) tube. According to an accurate load V-I curve, a required output voltage is fitted through a set output current, the required output voltage is output through a controller DA to serve as a control quantity of a voltage outer loop, the control quantity is compared with an actual sampling voltage, conduction of a preceding-stage MOS tube is controlled, and closed-loop control over the output voltage is achieved. Through comparison of the set current and the sampling current, conduction of a post-stage MOS tube is controlled, and closed-loop control of the output current is realized. By comparing the set terminal voltage threshold of the back-stage MOS tube with the voltage of the MOS tube, the conduction of the front-stage MOS tube is controlled, so that the terminal voltage of the back-stage MOS tube is within a certain threshold range, and the output power consumption is reduced. According to the circuit structure and the control strategy, the output current response is faster, the stability is higher, and the overall power consumption is smaller.

Description

Technical Field

[0001] The present application relates to the technical field of power electronic power supply control, and in particular to a control circuit and a control method for a constant current power supply. Background Art

[0002] With the continuous development of digital chips, digital control technology has been more and more widely used in the control of power electronic converters. Compared with analog control, the use of digital control technology can simplify the hardware control circuit and improve the reliability and anti-interference ability of the control circuit. However, digital control has the problem of control delay, which will affect the dynamic performance of the converter. The digital control delay includes calculation delay and modulation delay. The traditional current sampling plus controller processing control strategy to adjust the PWM duty cycle has many shortcomings in realizing the closed-loop control of the output current, which makes the output current slow to respond, poor stability, large ripple, and high power consumption. In the design of constant current power supply, the control idea mostly adopted for the steady current output is to use the PID control (proportional integral differential control) strategy to achieve continuous adjustable output current. However, due to the shortcomings of long response time, large overshoot, steady-state error, and dependence of calculation parameters on empirical data and expert experience of PID control, the experimental debugging is cumbersome and lengthy.

[0003] Using the hardware characteristics of MOS tubes to achieve precise control of output voltage and output current can effectively avoid the above-mentioned shortcomings, making the output current response faster, more stable, with smaller ripple and stronger anti-interference ability. Summary of the invention

[0004] In order to solve the above technical problems, the present invention proposes a control circuit and a control method of a constant current power supply, which utilize the hardware characteristics of the MOS tube to achieve precise control of the output voltage and current, and to achieve fast and stable current output.

[0005] In a first aspect, the present invention provides a control circuit for a constant current power supply.

[0006] The control circuit includes an output current control unit, an output voltage control unit and a Buck circuit, wherein the output current control unit includes a first emitter follower circuit, a first comparison circuit, a class B complementary power amplifier circuit, and a current control circuit at the end of the rear-stage MOS tube VT2; the output voltage control unit includes a second emitter follower circuit, a second comparison circuit, a voltage sampling circuit at the end of the rear-stage MOS tube VT2, a voltage stabilization protection circuit, a voltage comparison circuit at the end of the rear-stage MOS tube VT2, and a conduction control circuit for the front-stage MOS tube VT1;

[0007] Among them, the control circuit controls the conduction of the front-stage MOS tube VT1 after comparing the control amount of the voltage outer loop with the actual sampled voltage value according to the load VI curve, thereby realizing the output voltage closed-loop control, and controls the conduction of the rear-stage MOS tube VT2 after comparing the set current with the sampled current, thereby realizing the output current closed-loop control. In the Buck circuit, the gate control voltage of the front-stage MOS tube VT1 is jointly controlled by the voltage comparison circuit at the terminal of the rear-stage MOS tube VT2 and the second comparison circuit.

[0008] As a further optimized technical solution of the present invention, the current control circuit at the end of the post-stage MOS tube VT2 includes a sampling resistor R8. The output current forms a voltage signal through the sampling resistor R8 in the current control circuit at the end of the post-stage MOS tube VT2, and after amplification, it serves as a reference voltage of the comparator in the first comparison circuit.

[0009] As a further optimized technical solution of the present invention, the first emitter-follower circuit, the first comparison circuit, the second emitter-follower circuit, the second comparison circuit, the voltage sampling circuit at the terminal of the subsequent MOS tube VT2, the voltage comparison circuit at the terminal of the subsequent MOS tube VT2, and the conduction control circuit of the preceding MOS tube VT1 all include operational amplifier modules, and all adopt LM324, wherein the power supplies of the first emitter-follower circuit, the first comparison circuit, the second emitter-follower circuit, and the second comparison circuit are connected to positive 12V and ground, and the power supplies of the voltage sampling circuit at the terminal of the subsequent MOS tube VT2 and the voltage comparison circuit at the terminal of the subsequent MOS tube VT2 are connected to positive 6V and negative 6V.

[0010] As a further optimized technical solution of the present invention, the output of the second comparison circuit is divided by a voltage-dividing resistor and enters the non-inverting input terminal of the comparator in the conduction control circuit of the preceding MOS tube VT1, and the output of the voltage comparison circuit at the end of the succeeding MOS tube VT2 is connected to the inverting input terminal of the comparator in the conduction control circuit of the preceding MOS tube VT1.

[0011] In a second aspect, the present invention proposes a control method, which includes a pre-charging control stage, a current stabilization control stage, and a stage of fine-tuning the output voltage to reduce power loss, and specifically includes the following steps:

[0012] In the pre-charging stage, based on the set current value, the output voltage is calculated according to the accurate load VI curve and the corresponding digital signal is given to the DAC-Vref value. After the second emitter-follower circuit is electrically isolated, it passes through the second comparison circuit and is compared with the load terminal voltage to form a pre-charging MOS tube control signal α. After the front-stage MOS tube VT1 is turned on by the control circuit, a high level is output to turn on the MOS tube VT1. When the load terminal voltage reaches and exceeds the voltage calculated according to the VI curve, it indicates that the pre-charging is completed. At this time, the α signal is 0v and the β signal is 6v. After the circuit 10 outputs a low level, VT1 is turned off, and the pre-charging operation is realized through the above cycle.

[0013] In the steady current control stage, based on the set current value, the corresponding digital signal DAC-Iref value is electrically isolated by the first emitter-follower circuit, and then compared with the sampling current by the first comparison circuit, and the output controls the base voltages of the two transistors to realize the conduction control of the MOS tube VT2, so that the output current is stabilized at the set current;

[0014] In the stage of fine-tuning the output voltage to reduce power loss, in this stage, the output voltage is stabilized at the voltage value calculated according to the VI curve, and the output current is stabilized at the set current value. If the MOS tube terminal voltage Vmos signal is higher than the set MOS tube terminal voltage threshold signal, the duty cycle of the MOS tube VT1 is reduced, so that the previous stage MOS tube VT1 conduction control circuit outputs a low level, the MOS tube VT1 is turned off, and the output voltage decreases. If the MOS tube terminal voltage Vmos signal is lower than the set MOS tube terminal voltage threshold signal, the duty cycle of the MOS tube VT1 is increased, so that the previous stage MOS tube VT1 conduction control circuit outputs a high level, the MOS tube VT1 is turned on, and the output voltage increases.

[0015] As a further optimized technical solution of the present invention, the process of realizing the output voltage closed-loop control also includes: the output of the second comparison circuit is used as the non-inverting input terminal of the comparator in the conduction control circuit of the front-stage MOS tube VT1; after the output of the voltage sampling circuit at the terminal of the rear-stage MOS tube VT2, the voltage at the terminal of VT2 is compared with the set threshold through the voltage comparison circuit at the terminal of the rear-stage MOS tube VT2, and the output enters the inverting input terminal of the comparator in the conduction control circuit of the front-stage MOS tube VT1; if the voltage value at the terminal of the MOS tube VT2 is higher than the terminal voltage threshold, the MOS tube VT1 is controlled to be cut off, so that the output voltage drops, thereby forming a closed-loop control of the output voltage.

[0016] As a further optimized technical solution of the present invention, the process of realizing the output current closed-loop control also includes setting a control voltage corresponding to the current signal output through the DA of the controller, inputting the control voltage into the non-inverting input terminal of the first comparison circuit after passing through the first emitter-follower circuit, inputting the voltage of the sampling resistor into the inverting input terminal of the first comparison circuit, performing comparison and output, connecting the gate G pin of the control current circuit at the end of the post-stage MOS tube VT2 through the class-B complementary power amplifier circuit, and controlling the on and off of the MOS tube VT2 in real time.

[0017] As a further optimized technical solution of the present invention, if the control voltage is less than the reference voltage, the MOS tube VT2 is controlled in real time to conduct the output current.

[0018] As a further optimized technical solution of the present invention, after the terminal voltage threshold of the set rear-stage MOS tube VT2 is compared with the MOS tube terminal voltage after voltage division through the rear-stage MOS tube VT2 terminal voltage comparison circuit, the step of controlling the conduction of the front-stage MOS tube VT1 includes sampling the terminal voltage of the rear-stage MOS tube VT2, subtracting the voltage values ​​at both ends of the rear-stage MOS tube VT2 through the differential amplifier of the rear-stage MOS tube VT2 terminal voltage sampling circuit, and entering the non-inverting input terminal of the comparator through the voltage stabilizing protection circuit, and comparing with the set MOS tube threshold terminal voltage, thereby adjusting the conduction of the front-stage MOS tube VT1 in real time.

[0019] As a further optimized technical solution of the present invention, the gate control voltage of the switch MOS tube VT1 in the Buck circuit is jointly controlled by the voltage comparison circuit at the terminal of the subsequent MOS tube VT2 and the second comparison circuit. The output of the second comparison circuit enters the comparator non-inverting input terminal in the conduction control circuit of the preceding MOS tube VT1 through voltage division by a voltage divider resistor. The output of the voltage comparison circuit at the terminal of the subsequent MOS tube VT2 enters the comparator inverting input terminal in the conduction control circuit of the preceding MOS tube VT1 through the comparator inverting input terminal. When the terminal voltage of the subsequent MOS tube VT2 is greater than the terminal voltage threshold of the subsequent MOS tube VT2 and the actual output voltage is greater than the set voltage corresponding to the set current, the preceding MOS tube VT1 will be cut off.

[0020] The beneficial effects of the present invention are: through the dual closed-loop control of voltage and current, the output voltage and output current can be accurately matched to reduce power loss. At the same time, it does not involve the method of using PWM to control the conduction duty cycle of the MOS tube in traditional digital control, but adopts a design built with hardware circuits to avoid digital control delay and ensure the rapidity and stability of the output voltage and output current. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A block diagram of a steady current output circuit of a control circuit of a constant current power supply proposed by the present invention.

[0022] Figure 2 It is the steady flow control logic diagram of the present invention.

[0023] Figure 3 This is the Buck converter circuit diagram.

[0024] Figure 4 This is a circuit diagram of the MOS tube accurately controlling the output current of the present invention.

[0025] Figure 5 This is the output voltage closed-loop control circuit diagram of the present invention.

[0026] In the figure: 1. First emitter-follower circuit 1; 2. First comparison circuit; 3. Class-B complementary power amplifier circuit; 4. Current control circuit of post-stage MOS tube VT2; 5. Second emitter-follower circuit; 6. Second comparison circuit; 7. Voltage sampling circuit of post-stage MOS tube VT2 terminal; 8. Voltage stabilization protection circuit; 9. Voltage comparison circuit of post-stage MOS tube VT2 terminal; 10. Turn-on control circuit of front-stage MOS tube VT1. DETAILED DESCRIPTION

[0027] For ease of understanding, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0029] Figure 1 The block diagram of the steady current output circuit of the control circuit of the constant current power supply proposed by the present invention is as follows: Figure 1 As shown, the control circuit includes an output current control unit, an output voltage control unit and a Buck circuit, wherein the output current control unit includes a first emitter follower circuit 1, a first comparison circuit 2, a class B complementary power amplifier circuit 3, and a current control circuit 4 at the end of the rear-stage MOS tube VT2; the output voltage control unit includes a second emitter follower circuit 5, a second comparison circuit 6, a voltage sampling circuit 7 at the end of the rear-stage MOS tube VT2, a voltage stabilization protection circuit 8, a voltage comparison circuit 9 at the end of the rear-stage MOS tube VT2, and a conduction control circuit 10 for the front-stage MOS tube VT1;

[0030] The controller's DA outputs the set current signal, which is input to the non-inverting input terminal of the first comparison circuit 2 after passing through the first emitter-follower circuit 1. The voltage of the sampling resistor is input to the inverting input terminal of the first comparison circuit 2 for comparison and output. The current signal is then connected to the gate G pin of the current control circuit 4 at the end of the subsequent MOS tube VT2 through the class-B complementary power amplifier circuit 3 to control the on and off of the MOS tube VT2 in real time.

[0031] Based on the load VI curve, the current value is set to fit the voltage required by the load, and the DA output DAC-Vref of the controller is input into the non-inverting input terminal of the second comparison circuit 6 after passing through the second emitter-follower circuit 5. The actual output voltage signal is input into the inverting input terminal of the second comparison circuit, and the comparison output is performed to control the on-off of the MOS tube VT1 in real time, so as to realize the closed-loop control of the output voltage; after comparing the set current with the sampling current, the conduction of the subsequent MOS tube VT2 is controlled, so as to realize the closed-loop control of the output current.

[0032] The gate control voltage of the switch MOS tube VT1 of the Buck circuit is jointly controlled by the voltage comparison circuit 9 at the terminal of the subsequent MOS tube VT2 and the second comparison circuit 6 .

[0033] The output of the comparator of the second comparison circuit 6 (the power supply of the comparator is connected to positive 12V and ground, such as LM324 as a comparator) is used as the non-inverting input terminal of the comparator in the conduction control circuit 10 of the front-stage MOS tube VT1. After the output of the voltage sampling circuit 7 of the rear-stage MOS tube VT2, the voltage of the VT2 terminal is compared with the set threshold through the voltage comparison circuit 9 of the rear-stage MOS tube VT2 terminal and the output enters the inverting input terminal of the comparator in the conduction control circuit 10 of the front-stage MOS tube VT1. The output of the conduction control circuit 10 of the front-stage MOS tube VT1 is connected to the gate G pin of the conduction control circuit of the front-stage MOS tube VT1. The current control circuit 4 of the rear-stage MOS tube VT2 terminal includes a sampling resistor R8. The output current forms a voltage signal through the sampling resistor, and after amplification, it is used as the reference voltage of the comparator in the first comparison circuit 2. The first emitter-follower circuit 1 includes an operational amplifier, which is used to isolate the controller from the power device. If the voltage of the MOS tube VT2 terminal is higher than the threshold voltage, the MOS tube VT1 is controlled to be cut off, so that the output voltage drops, and the power loss is reduced under the premise of ensuring the stability of the output voltage.

[0034] In this embodiment, the current control circuit at the end of the rear-stage MOS tube VT2 includes a sampling resistor R8. The output current forms a voltage signal through the sampling resistor R8 in the current control circuit at the end of the rear-stage MOS tube VT2, and is used as a reference voltage of the comparator in the first comparison circuit after amplification.

[0035] The first emitter follower circuit, the first comparison circuit, the second emitter follower circuit, the second comparison circuit, the voltage sampling circuit at the end of the rear-stage MOS tube VT2, the voltage comparison circuit at the end of the rear-stage MOS tube VT2, and the conduction control circuit of the front-stage MOS tube VT1 all include operational amplifier modules, and all use LM324, wherein the power supplies of the first emitter follower circuit, the first comparison circuit, the second emitter follower circuit, and the second comparison circuit are connected to positive 12V and ground, and the power supplies of the voltage sampling circuit at the end of the rear-stage MOS tube VT2 and the voltage comparison circuit at the end of the rear-stage MOS tube VT2 are connected to positive 6V and negative 6V. The output of the second comparison circuit enters the non-inverting input terminal of the comparator in the conduction control circuit of the front-stage MOS tube VT1 through voltage dividing resistors, and the output of the voltage comparison circuit at the end of the rear-stage MOS tube VT2 is connected to the inverting input terminal of the comparator in the conduction control circuit of the front-stage MOS tube VT1. In the voltage fine-tuning stage, when the terminal voltage of the rear-stage MOS tube is greater than the threshold voltage and the actual output voltage in the pre-charging stage is greater than the calculated voltage corresponding to the set current, the front-stage MOS tube will be cut off. Since the terminal voltage of the rear-stage MOS tube VT2 will be divided only when the output voltage is higher than the actual load voltage, the terminal voltage will increase.

[0036] like Figure 1-2 As shown, the control method of the present invention includes a pre-charging control stage, a current stabilization control stage, and a stage of fine-tuning the output voltage to reduce power loss, and specifically includes the following steps:

[0037] In the pre-charging stage, based on the set current value, the output voltage is calculated according to the accurate load VI curve and the corresponding digital signal is given to the DAC-Vref value. After the second emitter-follower circuit is electrically isolated, it passes through the second comparison circuit and is compared with the load terminal voltage to form a pre-charging MOS tube control signal α. After the front-stage MOS tube VT1 is turned on by the control circuit, a high level is output to turn on the MOS tube VT1. When the load terminal voltage reaches and exceeds the voltage calculated according to the VI curve, it indicates that the pre-charging is completed. At this time, the α signal is 0v and the β signal is 6v. After the circuit 10 outputs a low level, VT1 is turned off, and the pre-charging operation is realized through the above cycle.

[0038] In the steady current control stage, based on the set current value, the corresponding digital signal DAC-Iref value is electrically isolated by the first emitter-follower circuit, and then compared with the sampling current by the first comparison circuit, and the output controls the base voltages of the two transistors to realize the conduction control of the MOS tube VT2, so that the output current is stabilized at the set current;

[0039] In the stage of fine-tuning the output voltage to reduce power loss, in this stage, the output voltage is stabilized at the voltage value calculated according to the VI curve, and the output current is stabilized at the set current value. If the MOS tube terminal voltage Vmos signal is higher than the set MOS tube terminal voltage threshold signal, the duty cycle of the MOS tube VT1 is reduced, so that the previous stage MOS tube VT1 conduction control circuit outputs a low level, the MOS tube VT1 is turned off, and the output voltage decreases. If the MOS tube terminal voltage Vmos signal is lower than the set MOS tube terminal voltage threshold signal, the duty cycle of the MOS tube VT1 is increased, so that the previous stage MOS tube VT1 conduction control circuit outputs a high level, the MOS tube VT1 is turned on, and the output voltage increases.

[0040] Figure 4 The circuit diagram of the MOS tube of the present invention for accurately controlling the output current is shown in FIG. Figure 4 As shown, the MOS tube control current part is composed of a control voltage in the second comparison circuit (DAC-Iref, i.e., a voltage signal corresponding to the set current) at the same-phase input end of the comparator and a sampling resistor voltage at the inverting input end of the comparator, and enters the second comparison circuit (the comparator power supply is connected to positive 12V and ground, such as LM324 as a comparator) at the same time, and the output is connected to the gate G pin in the subsequent MOS tube through the class B complementary power amplifier circuit. If the control voltage is lower than the reference voltage, the MOS tube VT2 is controlled to conduct the output current.

[0041] The gate control voltage of the switch MOS tube VT1 in the Buck circuit is jointly controlled by the voltage comparison circuit at the end of the subsequent MOS tube VT2 and the second comparison circuit. The output of the second comparison circuit enters the non-inverting input terminal of the comparator in the conduction control circuit of the preceding MOS tube VT1 through voltage division by a voltage-dividing resistor. The output of the voltage comparison circuit at the end of the subsequent MOS tube VT2 enters the inverting input terminal of the comparator in the conduction control circuit of the preceding MOS tube VT1 through the voltage-dividing resistor. When the terminal voltage of the subsequent MOS tube VT2 is greater than the terminal voltage threshold of the subsequent MOS tube VT2 and the actual output voltage is greater than the set voltage corresponding to the set current, the preceding MOS tube VT1 will be cut off.

[0042] In this design, the output voltage closed-loop control is performed according to the relatively accurate VI curve of the load. The voltage value required by the load is calculated by setting the output current. The strict accuracy of the VI curve is not required in this calculation process, because the calculated voltage can be appropriately higher than the actual required voltage, which can not only play a pre-charging role but also ensure that the output voltage value meets the load power supply demand. Later, the voltage at the end of the rear-stage MOS tube VT2 is compared with the threshold voltage to control the front-stage MOS tube VT1 to cut off, and then reduce the output voltage to form a closed loop.

[0043] In the closed-loop control of the output current, the output current passes through the sampling resistor R8 in the current control circuit 4 of the subsequent MOS tube VT2 to form a voltage signal, which is amplified and processed as the reference voltage of the comparator. The control voltage comes from a voltage parameter obtained by the controller through proportional calculation of the set current value. After the D / A output and the first emitter-follower circuit 1, it enters the comparator of the first comparison circuit 2. The first emitter-follower circuit 1 uses the relatively high common-mode rejection ratio of the operational amplifier to achieve isolation and isolate the controller from the power device. At the beginning, the current is very small, so the control voltage is higher than the output voltage. At this time, 12V is basically added to the G pin, which can make the tube turn on quickly. After a short time, when the current increases and gradually reaches a certain value, the output voltage rises rapidly. When it approaches and exceeds the control voltage, the comparator outputs a low level (close to 0V) to cut off the tube and reduce the current. Then after the current decreases, the reference voltage drops, the tube turns on again, and the current increases again. This cycle repeats to achieve current inner loop control.

[0044] like Figure 3 and 5 As shown, in the Buck circuit, the gate control voltage of the switch MOS tube VT1 is jointly controlled by the voltage comparison circuit 9 at the end of the subsequent MOS tube VT2 and the second comparison circuit 6. All operational amplifier modules use LM324, the power supply is connected to positive 12V and ground, the output of the output second comparison circuit 6 is divided by the voltage-dividing resistor and enters the non-inverting input end of the comparator in the conduction control circuit 10 of the previous MOS tube VT1, and the output of the voltage comparison circuit 9 at the end of the subsequent MOS tube VT2 is connected to the inverting input end of the comparator in the conduction control circuit 10 of the previous MOS tube VT1. When the terminal voltage of the subsequent MOS tube is greater than the threshold voltage and the actual output voltage is greater than the set voltage corresponding to the set current, the previous MOS tube will be cut off. Since the terminal voltage of the subsequent MOS tube VT2 will be divided only when the output voltage is higher than the actual load voltage, the terminal voltage of the MOS tube VT2 will increase. In this way, it can be ensured that the output voltage can reach the preset voltage value, and the preset voltage can be matched with the actual load voltage, thereby reducing power loss.

[0045] The current signal is set to pass through the DA output of the controller, and then output to the non-inverting input terminal of the comparator of the second comparison circuit 2 after passing through the first emitter-follower circuit 1. The voltage idcs of the sampling resistor enters the inverting input terminal of the comparator of the second comparison circuit 2, and the comparison output is connected to the gate G pin of the subsequent MOS tube 4 through the class-B complementary power amplifier circuit 3, so as to control the on and off of the MOS tube VT2 in real time.

[0046] According to the load VI curve, the voltage required by the load is fitted by setting the current value, and the DA output DAC-Vref of the controller is output to the non-inverting input terminal of the comparator of the second comparison circuit 6 after passing through the second emitter-follower circuit 5. The actual output voltage signal is input to the inverting input terminal of the comparator of the second comparison circuit 6, and the comparison output is performed to control the on and off of the MOS tube VT1 in real time.

[0047] The terminal voltage of VT2 is sampled, and the voltage values ​​at both ends of VT2 are subtracted through the differential amplifier (subtractor) of the voltage sampling circuit 7 of the rear-stage MOS tube VT2 end, and enter the non-inverting input terminal of the comparator through the voltage stabilizing protection circuit 8, and are compared with the set MOS tube threshold terminal voltage, thereby adjusting the conduction of the front-stage MOS tube VT1 in real time, realizing voltage adaptive output, and reducing energy consumption.

[0048] Embodiment 1:

[0049] In this embodiment, a step-down DC-DC power supply module with large load current output is designed, with a design size of 50mm*50mm*25mm, and parameter requirements; input voltage 48V, output current 20A continuously adjustable, and output voltage adaptive. All comparators use LM324 operational amplifiers, the front-stage MOS tube VT1 uses CSD19531Q5A, the rear-stage MOS tube VT2 uses IPB020N10N5, and the terminal voltage threshold of VT2 is set to 0.05v. The above control method and circuit design are used to design and experiment the power supply module. Finally, accurate and stable current control and low-power design are achieved. At the same time, the output current of the power supply module has fast response speed, good stability, small ripple, strong anti-interference ability, lower overall power consumption, and higher efficiency.

[0050] This design uses dual closed-loop control of voltage and current to accurately match the output voltage and output current, reducing power loss. At the same time, the design built with hardware circuits avoids digital control delays and ensures the rapidity and stability of the output voltage and output current. This design has a higher application prospect and better economic benefits, and has certain promotion value.

[0051] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0052] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, a disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods of each embodiment of the present application.

[0053] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A control circuit for a constant current power supply, characterized in that: The control circuit includes an output current control unit, an output voltage control unit, and a Buck circuit, wherein the output current control unit includes a first emitter follower circuit, a first comparison circuit, a Class-B complementary power amplifier circuit, and a current control circuit at the end of the subsequent MOS tube VT2; the output voltage control unit includes a second emitter follower circuit, a second comparison circuit, a voltage sampling circuit at the end of the subsequent MOS tube VT2, a voltage stabilization protection circuit, a voltage comparison circuit at the end of the subsequent MOS tube VT2, and a conduction control circuit for the preceding MOS tube VT1; Specifically, the control circuit compares the control quantity of the voltage outer loop with the actual sampled voltage value based on the load VI curve, and then controls the conduction of the front-stage MOS tube VT1 to achieve closed-loop control of the output voltage. The control circuit compares the set current with the sampled current and then controls the conduction of the rear-stage MOS tube VT2 to achieve closed-loop control of the output current. In the Buck circuit, the gate control voltage of the front-stage MOS tube VT1 is jointly controlled by the voltage comparison circuit at the terminal of the rear-stage MOS tube VT2 and the second comparison circuit.

2. The control circuit according to claim 1, wherein: The current control circuit at the end of the post-stage MOS tube VT2 includes a sampling resistor R8. The output current forms a voltage signal through the sampling resistor R8 in the current control circuit at the end of the post-stage MOS tube VT2, and after amplification, serves as a reference voltage for the comparator in the first comparison circuit.

3. The control circuit according to claim 1, wherein: The first emitter follower circuit, the first comparison circuit, the second emitter follower circuit, the second comparison circuit, the voltage sampling circuit at the terminal of the subsequent MOS tube VT2, the voltage comparison circuit at the terminal of the subsequent MOS tube VT2, and the conduction control circuit of the preceding MOS tube VT1 all include operational amplifier modules, and all adopt LM324. Specifically, the power supplies of the first emitter follower circuit, the first comparison circuit, the second emitter follower circuit, and the second comparison circuit are connected to positive 12V and ground, and the power supplies of the voltage sampling circuit at the terminal of the subsequent MOS tube VT2 and the voltage comparison circuit at the terminal of the subsequent MOS tube VT2 are connected to positive 6V and negative 6V.

4. The control circuit according to claim 1, wherein: The output of the second comparison circuit is divided by a voltage divider resistor and enters the non-inverting input terminal of the comparator in the conduction control circuit of the front-stage MOS tube VT1. The output of the voltage comparison circuit at the rear-stage MOS tube VT2 is connected to the inverting input terminal of the comparator in the conduction control circuit of the front-stage MOS tube VT1.

5. A control method for a control circuit according to any one of claims 1 to 4, characterized in that: The method includes a pre-charge control stage, a current stabilization control stage, and a stage of fine-tuning the output voltage to reduce power loss, and specifically includes the following steps: In the pre-charging stage, based on the set current value, the output voltage is calculated according to the precise load VI curve and the corresponding digital signal is given to the DAC-Vref value. After being electrically isolated by the second emitter-follower circuit, it passes through the second comparison circuit and is compared with the load terminal voltage to form a pre-charging MOS transistor control signal α. After passing through the preceding stage MOS transistor VT1 conduction control circuit, a high level is output to turn on the MOS transistor VT1, thereby realizing closed-loop control of the output voltage. When the load terminal voltage reaches and exceeds the voltage calculated according to the VI curve, it indicates that the pre-charging is completed. At this time, the α signal is 0V and the β signal is 6V. The circuit 10 outputs a low level to turn off VT1, and the pre-charging operation is realized through the above cycle. In the steady current control stage, based on the set current value, its corresponding digital signal DAC-Iref value is electrically isolated by the first emitter-follower circuit, and then compared with the sampled current by the first comparison circuit. The output controls the base voltages of the two transistors, realizes the conduction control of the MOS tube VT2, and realizes the output current closed-loop control, so that the output current is stable at the set current; In the stage of fine-tuning the output voltage to reduce power loss, in this stage, the output voltage is stabilized at the voltage value calculated according to the VI curve, and the output current is stabilized at the set current value. If the MOS tube terminal voltage Vmos signal is higher than the set MOS tube terminal voltage threshold signal, the duty cycle of the MOS tube VT1 is reduced to make the preceding MOS tube VT1 conduction control circuit output a low level, the MOS tube VT1 is turned off, and the output voltage drops. If the MOS tube terminal voltage Vmos signal is lower than the set MOS tube terminal voltage threshold signal, the duty cycle of the MOS tube VT1 is increased to make the preceding MOS tube VT1 conduction control circuit output a high level, the MOS tube VT1 is turned on, and the output voltage increases.

6. The control method according to claim 5, characterized in that: The process of implementing the output voltage closed-loop control further includes: the output of the second comparison circuit serves as a non-inverting input terminal of a comparator in the conduction control circuit of the front-stage MOS transistor VT1; after the output of the voltage sampling circuit of the rear-stage MOS transistor VT2, the voltage at the VT2 terminal is compared with a set threshold value through the rear-stage MOS transistor VT2 terminal voltage comparison circuit, and the output enters the inverting input terminal of the comparator in the conduction control circuit of the front-stage MOS transistor VT1; if the voltage value at the MOS transistor VT2 terminal is higher than the terminal voltage threshold value, the MOS transistor VT1 is controlled to be cut off, so that the output voltage decreases, thereby forming the output voltage closed-loop control.

7. The control method according to claim 5, characterized in that: The process of implementing the output current closed-loop control also includes setting a control voltage corresponding to the current signal outputted by the DA of the controller, inputting the control voltage into the non-inverting input terminal of the first comparison circuit after passing through the first emitter-follower circuit, inputting the voltage of the sampling resistor into the inverting input terminal of the first comparison circuit, performing comparison and outputting the control voltage, and then connecting the control voltage to the gate G pin of the current control circuit at the end of the subsequent-stage MOS transistor VT2 through the Class-B complementary power amplifier circuit to control the on / off of the MOS transistor VT2 in real time.

8. The control method according to claim 7, characterized in that: If the control voltage is less than the reference voltage, the MOS tube VT2 is controlled in real time to conduct the output current.

9. The control method according to claim 5, characterized in that: The step of controlling the conduction of the front-stage MOS transistor VT1 comprises: sampling the terminal voltage of the rear-stage MOS transistor VT2, performing a subtraction operation on the voltage value between the two terminals of the rear-stage MOS transistor VT2 through a differential amplifier of the rear-stage MOS transistor VT2 terminal voltage sampling circuit, and entering the non-inverting input terminal of the comparator through the voltage stabilizing protection circuit to compare with the set MOS transistor threshold terminal voltage, thereby adjusting the conduction of the front-stage MOS transistor VT1 in real time.

10. The control method according to claim 5, characterized in that: The gate control voltage of the switching MOS transistor VT1 in the Buck circuit is jointly controlled by the voltage comparison circuit at the terminal of the subsequent-stage MOS transistor VT2 and the second comparison circuit. The output of the second comparison circuit is divided by a voltage divider resistor and enters the non-inverting input terminal of the comparator in the conduction control circuit of the preceding-stage MOS transistor VT1. The output of the voltage comparison circuit at the terminal of the subsequent-stage MOS transistor VT2 enters the inverting input terminal of the comparator in the conduction control circuit of the preceding-stage MOS transistor VT1. When the terminal voltage of the subsequent-stage MOS transistor VT2 is greater than the terminal voltage threshold of the subsequent-stage MOS transistor VT2 and the actual output voltage is greater than the set voltage corresponding to the set current, the preceding-stage MOS transistor VT1 is turned off.

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