ESD protection device with SCR structure

Abstract

This application provides an ESD protection device with an SCR structure. In this ESD protection device, floating heavily doped regions one and two are introduced between the two sides of the well region one and the substrate, respectively, and floating heavily doped regions three and four are introduced between the inner edge of the well region two and the substrate, respectively. Floating heavily doped regions one and three, together with a first silicide barrier layer connected to the power cathode, form a parasitic diode. Similarly, floating heavily doped regions two and four, together with a second silicide barrier layer connected to the power cathode, form a parasitic diode. The introduced floating heavily doped regions three and four are each part of the base of a parasitic PNP transistor; floating heavily doped regions one and two are each part of the base of an NPN transistor, resulting in heavy doping of its base, which can reduce the common-emitter amplification factor β of the BJT (bipolar transistor), thereby effectively improving the sustaining voltage of the SCR structure.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, and specifically to an ESD protection device with an SCR structure. Background Technology

[0002] In the field of high-voltage electrostatic protection, PNP transistors, diodes, LDMOS devices, or SCR (Silicon Controlled Rectifier) ​​devices are commonly used. Among them, PNP transistors, diodes, and LDMOS devices have high sustaining voltages, but their ESD protection per unit area is weak. On the other hand, SCR devices have strong ESD protection per unit area, but their sustaining voltage (Vh) is low and they are prone to latch-up, which severely limits the application of SCR devices in the field of high-voltage electrostatic protection. Summary of the Invention

[0003] This application provides an ESD protection device with an SCR structure, which can solve the problem that traditional ESD protection devices with SCR structures have low maintenance voltage and are prone to latch-up.

[0004] This application provides an ESD protection device with an SCR structure, including:

[0005] Substrate;

[0006] A first conductivity type well region is located in the substrate;

[0007] A second well region of a second conductivity type is located in the substrate and is disposed around the first well region;

[0008] The three internal heavily doped regions are of the first conductivity type: an internal heavily doped region 1, an internal heavily doped region 2, and an internal heavily doped region 3. The internal heavily doped region 1 is located in the well region 1, and the internal heavily doped region 2 and the internal heavily doped region 3 are located on both sides of the internal heavily doped region 1 and are both located in the well region 2.

[0009] The second conductivity type includes three heavily doped internal regions: internal heavy doping region four, internal heavy doping region five, and internal heavy doping region six. Internal heavy doping region four and internal heavy doping region five are located on both sides of internal heavy doping region one and are both located in well region one. Internal heavy doping region six is ​​located in well region two and is arranged around internal heavy doping region two and internal heavy doping region three.

[0010] The first type of conductivity includes two floating heavily doped regions: a first floating heavily doped region and a second floating heavily doped region. The first floating heavily doped region is located on the four sides of the inner heavily doped region, away from the first inner heavily doped region, and spans the left edge of the well region and the substrate. The second floating heavily doped region is located on the five sides of the inner heavily doped region, away from the first inner heavily doped region, and spans the right edge of the well region and the substrate.

[0011] The second conductivity type has two floating heavily doped regions, namely, region three and region four. Region three is located on the side of the inner heavily doped region two, away from the inner heavily doped region six, and it spans the inner edge of the well region two and the substrate. Region four is located on the side of the inner heavily doped region three, away from the inner heavily doped region six, and it spans the inner edge of the well region two and the substrate.

[0012] Multiple shallow trench isolation structures are provided, some of which are located in the first well region and are used to isolate different internal heavily doped regions and / or floating heavily doped regions respectively; the remaining shallow trench isolation structures are located in the second well region and are used to isolate different internal heavily doped regions and / or floating heavily doped regions respectively.

[0013] A first silicide barrier layer covers the substrate between the first floating heavily doped region and the third floating heavily doped region;

[0014] A second silicide barrier layer covers the substrate between the second and fourth floating heavily doped regions;

[0015] Among them, the second, third and sixth heavily doped internal regions are all connected to the anode of the external power supply; the first, fourth and fifth heavily doped internal regions, the first silicide barrier layer and the second silicide barrier layer are all connected to the cathode of the external power supply.

[0016] Optionally, in the ESD protection device with the SCR structure, the substrate includes: a base and an epitaxial layer located on the base, well region one and well region two are both located in the epitaxial layer, floating heavily doped region one spans the left edge of well region one and the epitaxial layer, floating heavily doped region two spans the right edge of well region one and the epitaxial layer, floating heavily doped region three spans the inner edge of well region two and the epitaxial layer, and floating heavily doped region four spans the inner edge of well region two and the epitaxial layer.

[0017] Optionally, in the ESD protection device with SCR structure, the ESD protection device with SCR structure further includes: a buried layer of a second conductivity type, the buried layer being located in the substrate and the front side of the buried layer contacting the back side of the epitaxial layer.

[0018] Optionally, in the ESD protection device with the SCR structure, the ESD protection device with the SCR structure further includes: a deep well of a second conductivity type, the deep well being located at the bottom of the epitaxial layer and the back side of the deep well being in contact with the front side of the substrate.

[0019] Optionally, in the ESD protection device with SCR structure, the ESD protection device with SCR structure further includes: a buried layer of a second conductivity type and a deep well of a second conductivity type, the buried layer being located in the substrate and the front side of the buried layer contacting the back side of the epitaxial layer, and the deep well being located in the epitaxial layer and at the bottom of the second well region.

[0020] Optionally, in the ESD protection device with the SCR structure, the conductivity type of the doped ions in the substrate is a first conductivity type, and the conductivity type of the doped ions in the epitaxial layer is a first conductivity type.

[0021] Optionally, in the ESD protection device with the SCR structure, both the first silicide barrier layer and the second silicide barrier layer are made of polycrystalline silicon.

[0022] Optionally, in the ESD protection device with the SCR structure, the first conductivity type is P-type; the second conductivity type is N-type.

[0023] The technical solution of this application has at least the following advantages:

[0024] This application introduces two floating heavily doped regions, namely, region 1 and region 2, between the two sides of well region 1 and the substrate, and two floating heavily doped regions, namely, region 3 and region 4, between the inner edge of well region 2 and the substrate. A first silicide barrier layer between region 1 and region 3 is connected to the power cathode, and a second silicide barrier layer between region 2 and region 4 is connected to the power cathode. In this case, region 1, region 3, and the first silicide barrier layer form a parasitic diode. Similarly, region 2... The floating heavily doped region four and the second silicide barrier layer form a parasitic diode. The SCR structure is formed by coupling a PNP transistor (P+ / NW / PW) and an NPN transistor (NW / PW / N+). The introduced floating heavily doped region three (N+) is part of the base of the parasitic PNP transistor, and the introduced floating heavily doped region one (P+) is part of the base of the NPN transistor. This results in heavy doping of the bases of the PNP and NPN transistors, reducing the common-emitter amplification factor β of the BJT (bipolar transistor), thereby effectively improving the sustaining voltage of the SCR structure. Since the ESD protection device provided in this application has an axisymmetric structure (the center line of the first heavily doped region is the axis of symmetry), similarly, the floating heavily doped region four (N+) introduced on the right is part of the base of the parasitic PNP transistor; the floating heavily doped region two (P+) introduced is part of the base of the NPN transistor, which respectively cause the base of the PNP and NPN transistors to be heavily doped, reducing the common-emitter amplification factor β of the BJT (bipolar transistor), thereby effectively improving the sustaining voltage of the SCR structure.

[0025] Furthermore, in advanced processes, the first silicide barrier layer and the second silicide barrier layer can prevent short circuits in floating heavily doped region 1 and floating heavily doped region 3 (floating heavily doped region 2 and floating heavily doped region 4) caused by the metal silicide process. At the same time, the breakdown voltage of the SCR device can be controlled by adjusting the lateral width of the first silicide barrier layer between floating heavily doped region 1 and floating heavily doped region 3 and the lateral width of the second silicide barrier layer between floating heavily doped region 2 and floating heavily doped region 4. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram of the structure of an ESD protection device with an SCR structure according to Embodiment 1 of the present invention;

[0028] Figure 2 This is a schematic diagram illustrating the working principle of the ESD protection device according to Embodiment 1 of the present invention;

[0029] Figure 3 This is a schematic diagram showing the relationship between the breakdown voltage and the lateral width of the first / second silicide barrier layer in Embodiment 1 of the present invention;

[0030] Figure 4 This is a schematic diagram of the TLP test curve of the SCR structure inside the ESD protection device when the lateral width of the first silicide barrier layer and the second silicide barrier layer are both 0.2 μm in Embodiment 1 of the present invention.

[0031] Figure 5 This is a schematic diagram of the structure of the ESD protection device with an SCR structure according to Embodiment 2 of the present invention;

[0032] Figure 6 This is a schematic diagram of the structure of the ESD protection device with an SCR structure according to Embodiment 3 of the present invention;

[0033] Figure 7 This is a schematic diagram of the structure of the ESD protection device with an SCR structure according to Embodiment 4 of the present invention;

[0034] The reference numerals in the attached figures are explained as follows:

[0035] 10-Substrate, 11-Trap region one, 12-Trap region two, 13-Base, 14-Epipolar layer, 15-Buried layer, 16-Deep trap;

[0036] 21-Heavy internal doped region one, 22-Heavy internal doped region two, 23-Heavy internal doped region three, 24-Heavy internal doped region four, 25-Heavy internal doped region five, 26-Heavy internal doped region six;

[0037] 31-Floating heavily doped region one, 32-Floating heavily doped region two, 33-Floating heavily doped region three, 34-Floating heavily doped region four;

[0038] 40 - Shallow trench isolation structure;

[0039] 51-First silicide barrier layer, 52-Second silicide barrier layer. Detailed Implementation

[0040] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0041] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0042] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0043] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other. Example 1

[0044] Embodiment 1 of this application provides an ESD protection device with an SCR structure, see reference. Figure 1 , Figure 1 This is a schematic diagram of an ESD protection device with an SCR structure according to Embodiment 1 of the present invention. The ESD protection device with an SCR structure includes:

[0045] Substrate 10;

[0046] A first conductivity type well region 11, the well region 11 being strip-shaped, the well region 11 being located in the substrate 10;

[0047] A second conductivity type well region 12, the well region 12 being annular, the well region 12 being located in the substrate 10 and surrounding the first well region 11;

[0048] The first conductivity type includes an internal heavily doped region 21, an internal heavily doped region 22, and an internal heavily doped region 23. The internal heavily doped region 21 is located in the well region 11. The internal heavily doped region 22 and the internal heavily doped region 23 are located on both sides of the internal heavily doped region 21 (the internal heavily doped region 22 and the internal heavily doped region 23 are located on both sides of the well region 11) and are both located in the well region 12.

[0049] The second conductivity type includes three heavily doped internal regions: 24 (fourth), 25 (fifth), and 26 (sixth). The heavy doped internal regions 24 and 25 are located on either side of the first heavy doped internal region 21 and are both within the first well region 11. The heavy doped internal region 26 is located within the second well region 12 and surrounds the second and third heavy doped internal regions 22 and 3. Each of the heavy doped internal regions 21, 22, 3, 23, 24, 25, and 26 is strip-shaped.

[0050] The first type of floating heavily doped region 31 and floating heavily doped region 32 are located on the side of the inner heavily doped region 24, away from the inner heavily doped region 21, and the floating heavily doped region 31 spans the left edge of the well region 11 and the substrate 10; the floating heavily doped region 32 is located on the side of the inner heavily doped region 25, away from the inner heavily doped region 21, and the floating heavily doped region 32 spans the right edge of the well region 11 and the substrate 10.

[0051] The second conductivity type includes floating heavily doped regions 33 and 34. Floating heavily doped region 33 is located on the side of the inner heavily doped region 22, away from the inner heavily doped region 6 26, and spans the inner edge of the well region 2 12 and the substrate 10. Floating heavily doped region 34 is located on the side of the inner heavily doped region 23, away from the inner heavily doped region 6 26, and spans the inner edge of the well region 2 12 and the substrate 10. Floating heavily doped regions 31, 32, 33, and 34 are all strip-shaped.

[0052] Multiple shallow trench isolation structures 40, a portion of which are located in the first well region 11, and are used for isolation between the first floating heavily doped region 31, the fourth internal heavily doped region 24, the first internal heavily doped region 21, the fifth internal heavily doped region 25 and the second floating heavily doped region 32; the remaining portion of the shallow trench isolation structures 40 are located in the second well region 12, and are used for isolation between the sixth internal heavily doped region 26, the second internal heavily doped region 22 and the third floating heavily doped region 33, as well as for isolation between the sixth internal heavily doped region 26, the third internal heavily doped region 23 and the fourth floating heavily doped region 34;

[0053] A first silicide barrier layer 51 covers the substrate 10 between the first floating heavily doped region 31 and the third floating heavily doped region 33.

[0054] The second silicide barrier layer 52 covers the substrate 10 between the second floating heavily doped region 32 and the fourth floating heavily doped region 34.

[0055] Among them, the second internal heavily doped region 22, the third internal heavily doped region 23 and the sixth internal heavily doped region 26 are all connected to the anode (High) of the external power supply; the first internal heavily doped region 21, the fourth internal heavily doped region 24, the fifth internal heavily doped region 25, the first silicide barrier layer 51 and the second silicide barrier layer 52 are all connected to the cathode (Low) of the external power supply.

[0056] It is worth noting that the ESD protection device provided in this application has an axisymmetric structure, wherein the center line of the internal heavily doped region -21 is the axis of symmetry.

[0057] In this embodiment, the first conductivity type is P-type; the second conductivity type is N-type.

[0058] Furthermore, the conductivity type of the doped ions in the substrate 10 is the first conductivity type (P-type).

[0059] In this embodiment, the substrate 10 can be simply referred to as PSUB;

[0060] Trap region 11 can be abbreviated as PW;

[0061] Trap region 2.12 can be abbreviated as NW;

[0062] The heavily doped internal region 1 (21), the heavily doped internal region 22, and the heavily doped internal region 3 (23) can be simply referred to as P+.

[0063] The heavily doped internal region 424, the heavily doped internal region 525, and the heavily doped internal region 626 can be simply referred to as N+.

[0064] The first and second floating heavily doped regions 31 and 32 can be referred to as P+.

[0065] The floating heavy doped region 33 and the floating heavy doped region 434 can be simply referred to as N+.

[0066] In this application, floating heavily doped regions one and two are introduced between the two side edges of well region one and the substrate, respectively, and floating heavily doped regions three and four are introduced between the inner edge of well region two and the substrate, respectively. A first silicide barrier layer between floating heavily doped regions one and three is connected to the power cathode, and a second silicide barrier layer between floating heavily doped regions two and four is connected to the power cathode. At this time, reference... Figure 2 , Figure 2This is a schematic diagram of the working principle of the ESD protection device according to Embodiment 1 of the present invention. The first floating heavily doped region, the third floating heavily doped region, and the first silicide barrier layer form a parasitic diode. Similarly, the second floating heavily doped region, the fourth floating heavily doped region, and the second silicide barrier layer form a parasitic diode. The SCR structure is formed by coupling PNP transistors (P+ / NW / PW) and NPN transistors (NW / PW / N+). The introduced third floating heavily doped region (N+) is part of the base of the parasitic PNP transistor; the introduced first floating heavily doped region (P+) is part of the base of the NPN transistor. This results in heavy doping of the bases of the PNP and NPN transistors, reducing the common-emitter amplification factor β of the BJT (bipolar transistor), thereby effectively improving the sustaining voltage of the SCR structure. Since the ESD protection device provided in this application has an axisymmetric structure (the center line of the first heavily doped region is the axis of symmetry), similarly, the floating heavily doped region four (N+) introduced on the right is part of the base of the parasitic PNP transistor; the floating heavily doped region two (P+) introduced is part of the base of the NPN transistor, which respectively cause the base of the PNP and NPN transistors to be heavily doped, reducing the common-emitter amplification factor β of the BJT (bipolar transistor), thereby effectively improving the sustaining voltage of the SCR structure.

[0067] Preferably, both the first silicide barrier layer 51 and the second silicide barrier layer 52 are made of polycrystalline silicon.

[0068] In advanced processes, the first silicide barrier layer and the second silicide barrier layer can prevent short circuits in floating heavily doped region 1 and floating heavily doped region 3 (floating heavily doped region 2 and floating heavily doped region 4) caused by the metal silicide process. At the same time, the breakdown voltage of the SCR device can be controlled by adjusting the lateral width S of the first silicide barrier layer between floating heavily doped region 1 and floating heavily doped region 3 and the lateral width of the second silicide barrier layer between floating heavily doped region 2 and floating heavily doped region 4.

[0069] refer to Figure 3 and Figure 4 , Figure 3 This is a schematic diagram illustrating the relationship between the breakdown voltage and the lateral width of the first / second silicide barrier layer in Embodiment 1 of the present invention. Figure 4 This is a schematic diagram of the TLP test curves of the SCR structure inside the ESD protection device when the lateral widths of the first and second silicide barrier layers are both 0.2 μm, according to Embodiment 1 of the present invention. The TLP test (Transmission Line Pulse) is a conventional research and testing method for integrated circuit electrostatic discharge protection technology. The DC (direct current) test and TLP test data show that... Figure 3The diagram illustrates voltage breakdown tests with lateral widths S of 0.2 μm, 0.3 μm, 0.4 μm, and 0.5 μm for the first and second silicide barrier layers, respectively. The ESD protection device structure provided in this application allows for flexible control of the device's breakdown voltage by adjusting the lateral width S of the first silicide barrier layer between floating heavily doped region one and floating heavily doped region three, and the lateral width of the second silicide barrier layer between floating heavily doped region two and floating heavily doped region four. Further, refer to... Figure 4 When the lateral width S of the first / second silicide barrier layer is 0.2μm, its sustaining voltage Vh is greater than 15.6V and close to the turn-on voltage (also known as the ESD trigger voltage) Vt1, where the turn-on voltage Vt1 is 17.4V. The ESD protection device structure provided in this application can be used as ESD protection for 7V~12V and there is basically no risk of latch-up.

[0070] Furthermore, the ESD protection device with the SCR structure may further include: a substrate lead-out doped region (not shown), the substrate lead-out doped region surrounding the periphery of the inner heavily doped region 26, the conductivity type of the doped ions in the substrate lead-out doped region being the same as the doping type of the substrate, and the substrate lead-out doped region being used to lead out the bottom substrate (PSUB). Example 2

[0071] Embodiment 2 of this application provides an ESD protection device with an SCR structure, see reference. Figure 5 , Figure 5 This is a schematic diagram of the structure of an ESD protection device with an SCR structure according to Embodiment 2 of the present invention. The ESD protection device with an SCR structure includes: a substrate 10, a first-type well region 11 of a first conductivity type, a second-type well region 12 of a second conductivity type, an internal heavily doped region 21 of a first conductivity type, an internal heavily doped region 22 and an internal heavily doped region 33 of a first conductivity type, an internal heavily doped region 44 of a second conductivity type, an internal heavily doped region 55 and an internal heavily doped region 6 of a second conductivity type, a first-type floating heavily doped region 31 and a floating heavily doped region 22 of a first conductivity type, a floating heavily doped region 33 and a floating heavily doped region 44 of a second conductivity type, multiple shallow trench isolation structures 40, a first silicide barrier layer 51 and a second silicide barrier layer 52.

[0072] in,

[0073] The well region 11 is strip-shaped and is located in the substrate 10;

[0074] The second well region 12 is annular, and the second well region 12 is located in the substrate 10 and is disposed around the first well region 11;

[0075] The first internal heavily doped region 21 is located in the first well region 11, and the second internal heavily doped region 22 and the third internal heavily doped region 23 are located on both sides of the first internal heavily doped region 21 (the second internal heavily doped region 22 and the third internal heavily doped region 23 are located on both sides of the first well region 11) and are both located in the second well region 12.

[0076] The internal heavily doped region 4 24 and the internal heavily doped region 5 25 are located on both sides of the internal heavily doped region 1 21 and are both located in the well region 11. The internal heavily doped region 6 26 is located in the well region 2 12 and is arranged around the internal heavily doped region 2 22 and the internal heavily doped region 3 23. The internal heavily doped regions 1 21, 2 22, 3 23, 4 24, 5 25 and 6 26 are all strip-shaped.

[0077] The first floating heavily doped region 31 is located on the side of the fourth internal heavily doped region 24, away from the first internal heavily doped region 21, and the first floating heavily doped region 31 spans the left edge of the first well region 11 and the substrate 10; the second floating heavily doped region 32 is located on the side of the fifth internal heavily doped region 25, away from the first internal heavily doped region 21, and the second floating heavily doped region 32 spans the right edge of the first well region 11 and the substrate 10.

[0078] The floating heavy doped region three 33 is located on the side of the internal heavy doped region two 22 away from the internal heavy doped region six 26, and the floating heavy doped region three 33 spans the inner edge of the well region two 12 and the substrate 10; the floating heavy doped region four 34 is located on the side of the internal heavy doped region three 23 away from the internal heavy doped region six 26, and the floating heavy doped region four 34 spans the inner edge of the well region two 12 and the substrate 10; wherein, the floating heavy doped region one 31, the floating heavy doped region two 32, the floating heavy doped region three 33 and the floating heavy doped region four 34 are all strip-shaped;

[0079] A portion of the shallow trench isolation structures 40 are located in the first well region 11, and are used for isolation between the first floating heavily doped region 31, the fourth internal heavily doped region 24, the first internal heavily doped region 21, the fifth internal heavily doped region 25, and the second floating heavily doped region 32, respectively; the remaining portion of the shallow trench isolation structures 40 are located in the second well region 12, and are used for isolation between the sixth internal heavily doped region 26, the second internal heavily doped region 22, and the third floating heavily doped region 33, as well as for isolation between the sixth internal heavily doped region 26, the third internal heavily doped region 23, and the fourth floating heavily doped region 34, respectively.

[0080] The first silicide barrier layer 51 covers the substrate 10 between the first floating heavily doped region 31 and the third floating heavily doped region 33;

[0081] The second silicide barrier layer 52 covers the substrate 10 between the second floating heavily doped region 32 and the fourth floating heavily doped region 34;

[0082] Among them, the second internal heavily doped region 22, the third internal heavily doped region 23 and the sixth internal heavily doped region 26 are all connected to the anode (High) of the external power supply; the first internal heavily doped region 21, the fourth internal heavily doped region 24, the fifth internal heavily doped region 25, the first silicide barrier layer 51 and the second silicide barrier layer 52 are all connected to the cathode (Low) of the external power supply.

[0083] In this embodiment, the first conductivity type is P-type; the second conductivity type is N-type.

[0084] Furthermore, the substrate 10 includes: a base 13 and an epitaxial layer 14 located on the base 13, wherein well region one 11 and well region two 12 are both located in the epitaxial layer 14, floating heavily doped region one 31 spans the left edge of well region one 11 and the epitaxial layer 14, floating heavily doped region two 32 spans the right edge of well region one 11 and the epitaxial layer 14, floating heavily doped region three 33 spans the inner edge of well region two 12 and the epitaxial layer 14, and floating heavily doped region four 34 spans the inner edge of well region two 12 and the epitaxial layer 14.

[0085] In this embodiment, the conductivity type of the doped ions in the substrate 13 is a first conductivity type, and the conductivity type of the doped ions in the epitaxial layer 14 is a first conductivity type.

[0086] Preferably, the ESD protection device with an SCR structure may further include: a buried layer (NBL) 15 of a second conductivity type, the buried layer 15 being located in the substrate 13 and the front side of the buried layer 15 contacting the back side of the epitaxial layer 14.

[0087] In this application, the working principle of the ESD protection device in Embodiment 2 is the same as that of the ESD protection device in Embodiment 1. Floating heavily doped regions 1 and 2 are introduced between the two sides of the well region 1 and the substrate, respectively, and floating heavily doped regions 3 and 4 are introduced between the inner edge of the well region 2 and the substrate, respectively. The first silicide barrier layer between floating heavily doped regions 1 and 3 is connected to the power cathode, and the second silicide barrier layer between floating heavily doped regions 2 and 4 is connected to the power cathode. At this time, floating heavily doped regions 1, 3, and the first silicide barrier layer... The barrier layer forms a parasitic diode. Similarly, the floating heavily doped region II, the floating heavily doped region IV, and the second silicide barrier layer form a parasitic diode. The SCR structure is formed by the coupling of PNP transistors (P+ / NW / PW) and NPN transistors (NW / PW / N+). The introduced floating heavily doped region III (N+) is part of the base of the parasitic PNP transistor; the introduced floating heavily doped region I (P+) is part of the base of the NPN transistor. This leads to heavy doping of the bases of the PNP and NPN transistors, respectively, reducing the common-emitter amplification factor β of the BJT (bipolar transistor), thereby effectively improving the sustaining voltage of the SCR structure. Since the ESD protection device provided in this application has an axisymmetric structure (the center line of the first heavily doped region is the axis of symmetry), similarly, the floating heavily doped region four (N+) introduced on the right is part of the base of the parasitic PNP transistor; the floating heavily doped region two (P+) introduced is part of the base of the NPN transistor, which respectively cause the base of the PNP and NPN transistors to be heavily doped, reducing the common-emitter amplification factor β of the BJT (bipolar transistor), thereby effectively improving the sustaining voltage of the SCR structure.

[0088] Furthermore, in advanced processes, the first silicide barrier layer and the second silicide barrier layer can prevent short circuits in floating heavily doped region 1 and floating heavily doped region 3 (floating heavily doped region 2 and floating heavily doped region 4) caused by the metal silicide process. At the same time, the breakdown voltage of the SCR device can be controlled by adjusting the lateral width of the first silicide barrier layer between floating heavily doped region 1 and floating heavily doped region 3 and the lateral width of the second silicide barrier layer between floating heavily doped region 2 and floating heavily doped region 4.

[0089] For any parts not described in this second embodiment, please refer to the first embodiment accordingly. This second embodiment will not be repeated here. Example 3

[0090] Embodiment 3 of this application provides an ESD protection device with an SCR structure, see reference. Figure 6 , Figure 6This is a schematic diagram of the structure of an ESD protection device with an SCR structure according to Embodiment 3 of the present invention. The ESD protection device with an SCR structure includes: a substrate 10, a first-type well region 11 of a first conductivity type, a second-type well region 12 of a second conductivity type, an internal heavily doped region 21 of a first conductivity type, an internal heavily doped region 22 and an internal heavily doped region 23 of a second conductivity type, an internal heavily doped region 44 of a second conductivity type, an internal heavily doped region 55 and an internal heavily doped region 6 of a second conductivity type, a first-type floating heavily doped region 31 and a floating heavily doped region 22 of a first conductivity type, a floating heavily doped region 33 and a floating heavily doped region 44 of a second conductivity type, multiple shallow trench isolation structures 40, a first silicide barrier layer 51 and a second silicide barrier layer 52.

[0091] in,

[0092] The well region 11 is strip-shaped and is located in the substrate 10;

[0093] The second well region 12 is annular, and the second well region 12 is located in the substrate 10 and is disposed around the first well region 11;

[0094] The first internal heavily doped region 21 is located in the first well region 11, and the second internal heavily doped region 22 and the third internal heavily doped region 23 are located on both sides of the first internal heavily doped region 21 (the second internal heavily doped region 22 and the third internal heavily doped region 23 are located on both sides of the first well region 11) and are both located in the second well region 12.

[0095] The internal heavily doped region 4 24 and the internal heavily doped region 5 25 are located on both sides of the internal heavily doped region 1 21 and are both located in the well region 11. The internal heavily doped region 6 26 is located in the well region 2 12 and is arranged around the internal heavily doped region 2 22 and the internal heavily doped region 3 23. The internal heavily doped regions 1 21, 2 22, 3 23, 4 24, 5 25 and 6 26 are all strip-shaped.

[0096] The first floating heavily doped region 31 is located on the side of the fourth internal heavily doped region 24, away from the first internal heavily doped region 21, and the first floating heavily doped region 31 spans the left edge of the first well region 11 and the substrate 10; the second floating heavily doped region 32 is located on the side of the fifth internal heavily doped region 25, away from the first internal heavily doped region 21, and the second floating heavily doped region 32 spans the right edge of the first well region 11 and the substrate 10.

[0097] The floating heavy doped region three 33 is located on the side of the internal heavy doped region two 22 away from the internal heavy doped region six 26, and the floating heavy doped region three 33 spans the inner edge of the well region two 12 and the substrate 10; the floating heavy doped region four 34 is located on the side of the internal heavy doped region three 23 away from the internal heavy doped region six 26, and the floating heavy doped region four 34 spans the inner edge of the well region two 12 and the substrate 10; wherein, the floating heavy doped region one 31, the floating heavy doped region two 32, the floating heavy doped region three 33 and the floating heavy doped region four 34 are all strip-shaped;

[0098] A portion of the shallow trench isolation structures 40 are located in the first well region 11, and are used for isolation between the first floating heavily doped region 31, the fourth internal heavily doped region 24, the first internal heavily doped region 21, the fifth internal heavily doped region 25, and the second floating heavily doped region 32, respectively; the remaining portion of the shallow trench isolation structures 40 are located in the second well region 12, and are used for isolation between the sixth internal heavily doped region 26, the second internal heavily doped region 22, and the third floating heavily doped region 33, as well as for isolation between the sixth internal heavily doped region 26, the third internal heavily doped region 23, and the fourth floating heavily doped region 34, respectively.

[0099] The first silicide barrier layer 51 covers the substrate 10 between the first floating heavily doped region 31 and the third floating heavily doped region 33;

[0100] The second silicide barrier layer 52 covers the substrate 10 between the second floating heavily doped region 32 and the fourth floating heavily doped region 34;

[0101] Among them, the second internal heavily doped region 22, the third internal heavily doped region 23 and the sixth internal heavily doped region 26 are all connected to the anode (High) of the external power supply; the first internal heavily doped region 21, the fourth internal heavily doped region 24, the fifth internal heavily doped region 25, the first silicide barrier layer 51 and the second silicide barrier layer 52 are all connected to the cathode (Low) of the external power supply.

[0102] In this embodiment, the first conductivity type is P-type; the second conductivity type is N-type.

[0103] Furthermore, the substrate 10 includes: a base 13 and an epitaxial layer 14 located on the base 13, wherein well region one 11 and well region two 12 are both located in the epitaxial layer 14, floating heavily doped region one 31 spans the left edge of well region one 11 and the epitaxial layer 14, floating heavily doped region two 32 spans the right edge of well region one 11 and the epitaxial layer 14, floating heavily doped region three 33 spans the inner edge of well region two 12 and the epitaxial layer 14, and floating heavily doped region four 34 spans the inner edge of well region two 12 and the epitaxial layer 14.

[0104] In this embodiment, the conductivity type of the doped ions in the substrate 13 is a first conductivity type, and the conductivity type of the doped ions in the epitaxial layer 14 is a first conductivity type.

[0105] Furthermore, the ESD protection device with the SCR structure may also include a deep well (DNW) 16 of a second conductivity type, the deep well 16 being located at the bottom of the epitaxial layer 14 and the back side of the deep well 16 being in contact with the front side of the substrate 13.

[0106] In this application, the working principle of the ESD protection device in Embodiment 3 is the same as that of the ESD protection device in Embodiment 1. Floating heavily doped regions 1 and 2 are introduced between the two side edges of the well region 1 and the substrate, respectively, and floating heavily doped regions 3 and 4 are introduced between the inner edge of the well region 2 and the substrate, respectively. The first silicide barrier layer between floating heavily doped regions 1 and 3 is connected to the power cathode, and the second silicide barrier layer between floating heavily doped regions 2 and 4 is connected to the power cathode. At this time, floating heavily doped regions 1, 3, and the first silicide barrier layer... The barrier layer forms a parasitic diode. Similarly, the floating heavily doped region II, the floating heavily doped region IV, and the second silicide barrier layer form a parasitic diode. The SCR structure is formed by the coupling of PNP transistors (P+ / NW / PW) and NPN transistors (NW / PW / N+). The introduced floating heavily doped region III (N+) is part of the base of the parasitic PNP transistor; the introduced floating heavily doped region I (P+) is part of the base of the NPN transistor. This leads to heavy doping of the bases of the PNP and NPN transistors, respectively, reducing the common-emitter amplification factor β of the BJT (bipolar transistor), thereby effectively improving the sustaining voltage of the SCR structure. Since the ESD protection device provided in this application has an axisymmetric structure (the center line of the first heavily doped region is the axis of symmetry), similarly, the floating heavily doped region four (N+) introduced on the right is part of the base of the parasitic PNP transistor; the floating heavily doped region two (P+) introduced is part of the base of the NPN transistor, which respectively cause the base of the PNP and NPN transistors to be heavily doped, reducing the common-emitter amplification factor β of the BJT (bipolar transistor), thereby effectively improving the sustaining voltage of the SCR structure.

[0107] Furthermore, in advanced processes, the first silicide barrier layer and the second silicide barrier layer can prevent short circuits in floating heavily doped region 1 and floating heavily doped region 3 (floating heavily doped region 2 and floating heavily doped region 4) caused by the metal silicide process. At the same time, the breakdown voltage of the SCR device can be controlled by adjusting the lateral width of the first silicide barrier layer between floating heavily doped region 1 and floating heavily doped region 3 and the lateral width of the second silicide barrier layer between floating heavily doped region 2 and floating heavily doped region 4.

[0108] For any parts not described in this embodiment three, please refer to the corresponding embodiment one. This embodiment three will not repeat them here. Example 4

[0109] Embodiment 4 of this application provides an ESD protection device with an SCR structure, see reference. Figure 7 , Figure 7 This is a schematic diagram of the structure of an ESD protection device with an SCR structure according to Embodiment 4 of the present invention. The ESD protection device with an SCR structure includes: a substrate 10, a first-type well region 11 of a first conductivity type, a second-type well region 12 of a second conductivity type, an internal heavily doped region 21 of a first conductivity type, an internal heavily doped region 22 and an internal heavily doped region 33 of a first conductivity type, an internal heavily doped region 44 of a second conductivity type, an internal heavily doped region 55 and an internal heavily doped region 6 of a second conductivity type, a first-type floating heavily doped region 31 and a floating heavily doped region 22 of a first conductivity type, a floating heavily doped region 33 and a floating heavily doped region 44 of a second conductivity type, multiple shallow trench isolation structures 40, a first silicide barrier layer 51 and a second silicide barrier layer 52.

[0110] in,

[0111] The well region 11 is strip-shaped and is located in the substrate 10;

[0112] The second well region 12 is annular, and the second well region 12 is located in the substrate 10 and is disposed around the first well region 11;

[0113] The first internal heavily doped region 21 is located in the first well region 11, and the second internal heavily doped region 22 and the third internal heavily doped region 23 are located on both sides of the first internal heavily doped region 21 (the second internal heavily doped region 22 and the third internal heavily doped region 23 are located on both sides of the first well region 11) and are both located in the second well region 12.

[0114] The internal heavily doped region 4 24 and the internal heavily doped region 5 25 are located on both sides of the internal heavily doped region 1 21 and are both located in the well region 11. The internal heavily doped region 6 26 is located in the well region 2 12 and is arranged around the internal heavily doped region 2 22 and the internal heavily doped region 3 23. The internal heavily doped regions 1 21, 2 22, 3 23, 4 24, 5 25 and 6 26 are all strip-shaped.

[0115] The first floating heavily doped region 31 is located on the side of the fourth internal heavily doped region 24, away from the first internal heavily doped region 21, and the first floating heavily doped region 31 spans the left edge of the first well region 11 and the substrate 10; the second floating heavily doped region 32 is located on the side of the fifth internal heavily doped region 25, away from the first internal heavily doped region 21, and the second floating heavily doped region 32 spans the right edge of the first well region 11 and the substrate 10.

[0116] The floating heavy doped region three 33 is located on the side of the internal heavy doped region two 22 away from the internal heavy doped region six 26, and the floating heavy doped region three 33 spans the inner edge of the well region two 12 and the substrate 10; the floating heavy doped region four 34 is located on the side of the internal heavy doped region three 23 away from the internal heavy doped region six 26, and the floating heavy doped region four 34 spans the inner edge of the well region two 12 and the substrate 10; wherein, the floating heavy doped region one 31, the floating heavy doped region two 32, the floating heavy doped region three 33 and the floating heavy doped region four 34 are all strip-shaped;

[0117] A portion of the shallow trench isolation structures 40 are located in the first well region 11, and are used for isolation between the first floating heavily doped region 31, the fourth internal heavily doped region 24, the first internal heavily doped region 21, the fifth internal heavily doped region 25, and the second floating heavily doped region 32, respectively; the remaining portion of the shallow trench isolation structures 40 are located in the second well region 12, and are used for isolation between the sixth internal heavily doped region 26, the second internal heavily doped region 22, and the third floating heavily doped region 33, as well as for isolation between the sixth internal heavily doped region 26, the third internal heavily doped region 23, and the fourth floating heavily doped region 34, respectively.

[0118] The first silicide barrier layer 51 covers the substrate 10 between the first floating heavily doped region 31 and the third floating heavily doped region 33;

[0119] The second silicide barrier layer 52 covers the substrate 10 between the second floating heavily doped region 32 and the fourth floating heavily doped region 34;

[0120] Among them, the second internal heavily doped region 22, the third internal heavily doped region 23 and the sixth internal heavily doped region 26 are all connected to the anode (High) of the external power supply; the first internal heavily doped region 21, the fourth internal heavily doped region 24, the fifth internal heavily doped region 25, the first silicide barrier layer 51 and the second silicide barrier layer 52 are all connected to the cathode (Low) of the external power supply.

[0121] In this embodiment, the first conductivity type is P-type; the second conductivity type is N-type.

[0122] Furthermore, the substrate 10 includes: a base 13 and an epitaxial layer 14 located on the base 13, wherein well region one 11 and well region two 12 are both located in the epitaxial layer 14, floating heavily doped region one 31 spans the left edge of well region one 11 and the epitaxial layer 14, floating heavily doped region two 32 spans the right edge of well region one 11 and the epitaxial layer 14, floating heavily doped region three 33 spans the inner edge of well region two 12 and the epitaxial layer 14, and floating heavily doped region four 34 spans the inner edge of well region two 12 and the epitaxial layer 14.

[0123] In this embodiment, the conductivity type of the doped ions in the substrate 13 is a first conductivity type, and the conductivity type of the doped ions in the epitaxial layer 14 is a first conductivity type.

[0124] Furthermore, the ESD protection device with the SCR structure may also include: a buried layer 15 of a second conductivity type and a deep well 16 of a second conductivity type, wherein the buried layer 15 is located in the substrate 13 and the front side of the buried layer 15 contacts the back side of the epitaxial layer 14, and the deep well 16 is located in the epitaxial layer 14 and is located at the bottom of the second well region 12.

[0125] In this application, the working principle of the ESD protection device in Embodiment 4 is the same as that of the ESD protection device in Embodiment 1. Floating heavily doped regions 1 and 2 are introduced between the two sides of the well region 1 and the substrate, respectively, and floating heavily doped regions 3 and 4 are introduced between the inner edge of the well region 2 and the substrate, respectively. The first silicide barrier layer between floating heavily doped regions 1 and 3 is connected to the power cathode, and the second silicide barrier layer between floating heavily doped regions 2 and 4 is connected to the power cathode. At this time, floating heavily doped regions 1, 3, and the first silicide barrier layer... The barrier layer forms a parasitic diode. Similarly, the floating heavily doped region II, the floating heavily doped region IV, and the second silicide barrier layer form a parasitic diode. The SCR structure is formed by the coupling of PNP transistors (P+ / NW / PW) and NPN transistors (NW / PW / N+). The introduced floating heavily doped region III (N+) is part of the base of the parasitic PNP transistor; the introduced floating heavily doped region I (P+) is part of the base of the NPN transistor. This leads to heavy doping of the bases of the PNP and NPN transistors, respectively, reducing the common-emitter amplification factor β of the BJT (bipolar transistor), thereby effectively improving the sustaining voltage of the SCR structure. Since the ESD protection device provided in this application has an axisymmetric structure (the center line of the first heavily doped region is the axis of symmetry), similarly, the floating heavily doped region four (N+) introduced on the right is part of the base of the parasitic PNP transistor; the floating heavily doped region two (P+) introduced is part of the base of the NPN transistor, which respectively cause the base of the PNP and NPN transistors to be heavily doped, reducing the common-emitter amplification factor β of the BJT (bipolar transistor), thereby effectively improving the sustaining voltage of the SCR structure.

[0126] Furthermore, in advanced processes, the first silicide barrier layer and the second silicide barrier layer can prevent short circuits in floating heavily doped region 1 and floating heavily doped region 3 (floating heavily doped region 2 and floating heavily doped region 4) caused by the metal silicide process. At the same time, the breakdown voltage of the SCR device can be controlled by adjusting the lateral width of the first silicide barrier layer between floating heavily doped region 1 and floating heavily doped region 3 and the lateral width of the second silicide barrier layer between floating heavily doped region 2 and floating heavily doped region 4.

[0127] For any parts not described in this embodiment four, please refer to the corresponding embodiment one. This embodiment four will not be repeated here.

[0128] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. An ESD protection device with an SCR structure, characterized in that, include: Substrate; A first conductivity type well region is located in the substrate; A second well region of a second conductivity type is located in the substrate and is disposed around the first well region; The three internal heavily doped regions are of the first conductivity type: an internal heavily doped region 1, an internal heavily doped region 2, and an internal heavily doped region 3. The internal heavily doped region 1 is located in the well region 1, and the internal heavily doped region 2 and the internal heavily doped region 3 are located on both sides of the internal heavily doped region 1 and are both located in the well region 2. The second conductivity type includes three heavily doped internal regions: internal heavy doping region four, internal heavy doping region five, and internal heavy doping region six. Internal heavy doping region four and internal heavy doping region five are located on both sides of internal heavy doping region one and are both located in well region one. Internal heavy doping region six is ​​located in well region two and is arranged around internal heavy doping region two and internal heavy doping region three. The first type of conductivity includes two floating heavily doped regions: a first floating heavily doped region and a second floating heavily doped region. The first floating heavily doped region is located on the four sides of the inner heavily doped region, away from the first inner heavily doped region, and spans the left edge of the well region and the substrate. The second floating heavily doped region is located on the five sides of the inner heavily doped region, away from the first inner heavily doped region, and spans the right edge of the well region and the substrate. The second conductivity type has two floating heavily doped regions, namely, region three and region four. Region three is located on the side of the inner heavily doped region two, away from the inner heavily doped region six, and it spans the inner edge of the well region two and the substrate. Region four is located on the side of the inner heavily doped region three, away from the inner heavily doped region six, and it spans the inner edge of the well region two and the substrate. Multiple shallow trench isolation structures are provided, some of which are located in the first well region and are used to isolate different internal heavily doped regions and / or floating heavily doped regions respectively; the remaining shallow trench isolation structures are located in the second well region and are used to isolate different internal heavily doped regions and / or floating heavily doped regions respectively. A first silicide barrier layer covers the substrate between the first floating heavily doped region and the third floating heavily doped region; A second silicide barrier layer covers the substrate between the second and fourth floating heavily doped regions; Among them, the second, third and sixth heavily doped internal regions are all connected to the anode of the external power supply; the first, fourth and fifth heavily doped internal regions, the first silicide barrier layer and the second silicide barrier layer are all connected to the cathode of the external power supply.

2. The ESD protection device with an SCR structure according to claim 1, characterized in that, The substrate includes: a substrate and an epitaxial layer located on the substrate, wherein well region one and well region two are both located in the epitaxial layer, floating heavily doped region one spans the left edge of well region one and the epitaxial layer, floating heavily doped region two spans the right edge of well region one and the epitaxial layer, floating heavily doped region three spans the inner edge of well region two and the epitaxial layer, and floating heavily doped region four spans the inner edge of well region two and the epitaxial layer.

3. The ESD protection device with an SCR structure according to claim 2, characterized in that, The ESD protection device with an SCR structure further includes a buried layer of a second conductivity type, the buried layer being located in the substrate and the front side of the buried layer contacting the back side of the epitaxial layer.

4. The ESD protection device with an SCR structure according to claim 2, characterized in that, The ESD protection device with an SCR structure further includes a deep well of a second conductivity type, the deep well being located at the bottom of the epitaxial layer and the back side of the deep well being in contact with the front side of the substrate.

5. The ESD protection device with an SCR structure according to claim 2, characterized in that, The ESD protection device with an SCR structure further includes: a buried layer of a second conductivity type and a deep well of a second conductivity type, wherein the buried layer is located in the substrate and the front side of the buried layer contacts the back side of the epitaxial layer, and the deep well is located in the epitaxial layer and at the bottom of the second well region.

6. The ESD protection device with an SCR structure according to claim 2, characterized in that, The conductivity type of the doped ions in the substrate is a first conductivity type, and the conductivity type of the doped ions in the epitaxial layer is a first conductivity type.

7. The ESD protection device with an SCR structure according to claim 1, characterized in that, Both the first silicide barrier layer and the second silicide barrier layer are made of polycrystalline silicon.

8. The ESD protection device with an SCR structure according to any one of claims 1-7, characterized in that, The first conductivity type is P-type; the second conductivity type is N-type.

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