A solar cell and a photovoltaic module

Abstract

The application discloses a solar cell and a photovoltaic module. The solar cell comprises a semiconductor substrate, a first doped semiconductor layer and a second doped semiconductor layer. The first doped semiconductor layer has a first region and a second region. The first region has a first element with a doping concentration of C a1 , and the second region has the first element with a doping concentration of C a2 , C a2 >C a1 . The second doped semiconductor layer has a third region and a fourth region. The third region has a second element with a doping concentration of C b1 , and the fourth region has the second element with a doping concentration of C b2 , C b2 >C b1 , and C a2 >C b2 . The conductivity of the second region of the first doped semiconductor layer is closer to the conductivity of the fourth region of the second doped semiconductor layer, so that the current difference between the first electrode and the first doped semiconductor layer and between the second electrode and the second doped semiconductor layer is reduced, the current loss of the cell is reduced, and the performance of the cell is ensured.

Description

Technical Field

[0001] This application relates to the field of photovoltaic technology, and in particular to a solar cell and a photovoltaic module. Background Technology

[0002] Solar cells are increasingly being used as a new energy alternative. Photovoltaic solar cells, in particular, are devices that convert sunlight into electrical energy. Specifically, solar cells utilize the photovoltaic principle to generate charge carriers, which are then extracted using electrodes, thus facilitating the efficient use of electrical energy.

[0003] However, in actual use, the efficiency of solar cell electrodes in extracting charge carriers is low, resulting in significant current loss and affecting power generation efficiency. Summary of the Invention

[0004] The purpose of this application is to provide a solar cell and a photovoltaic module to improve the efficiency of carrier extraction from the electrodes of a solar cell.

[0005] To achieve the above objectives, this application provides the following technical solution:

[0006] A solar cell, comprising:

[0007] Semiconductor substrate;

[0008] The first doped semiconductor layer is disposed on the surface of the semiconductor substrate and is doped with a first element;

[0009] The second doped semiconductor layer is disposed on the surface of the semiconductor substrate and doped with a second element. The conductivity type of the second doped semiconductor layer is opposite to that of the first doped semiconductor layer.

[0010] The first doped semiconductor layer has a first region and a second region, which are arranged in a direction parallel to the surface of the semiconductor substrate; the doping concentration of the first element in the first region is C. a1 The doping concentration of the first element in the second region is C. a2 C a2 >C a1 ;

[0011] The second doped semiconductor layer has a third region and a fourth region, which are arranged in a direction parallel to the surface of the semiconductor substrate; the doping concentration of the second element in the third region is C. b1 The doping concentration of the second element in the fourth region is C. b2 C b2 >C b1 C a2 >C b2 .

[0012] In this application, when the first doped semiconductor layer 3 is N-type, the first element is a group V or group VI element, such as phosphorus, arsenic, or antimony. When the second doped semiconductor layer 3 is P-type, the first element is a group III element, such as boron or gallium. The doping concentration curves were obtained using an ECV instrument. The doping concentration mentioned in this application refers to the concentration of the activated doping element.

[0013] In practical applications, compared to the second doped semiconductor layer (P-type semiconductor layer), the first doped semiconductor layer (N-type semiconductor layer) has a higher solid solubility of P element and can be doped into the semiconductor substrate at a higher content. The first doped semiconductor layer is more conducive to the transport of charge carriers. Therefore, the thickness of the first doped semiconductor layer can be set to be smaller. This setting can reduce the amount of material used and reduce the parasitic absorption loss caused by the doped semiconductor layer.

[0014] While reducing the thickness of the first doped semiconductor layer (N-type semiconductor layer), it is necessary to ensure that the conductivity of the first doped semiconductor layer remains at a similar level as before the thinning. Therefore, this application design makes the doping concentration higher in the second region of the first doped semiconductor layer and the doping concentration higher in the fourth region of the second doped semiconductor layer to ensure current transmission efficiency.

[0015] In one implementation, in this application, C a2 >C b2 That is, the doping concentration C of the first element in the second region. a2 The doping concentration C of the second element in the fourth region is greater than that in the fourth region. b2 This configuration makes the conductivity of the thinner first doped semiconductor layer closer to that of the thicker second doped semiconductor layer. It can also be understood as balancing the conductivity difference between the first and second doped semiconductor layers, thereby further reducing the current difference between the first electrode and the first doped semiconductor layer and between the second electrode and the second doped semiconductor layer, reducing the current loss of the battery, and ensuring the performance of the battery.

[0016] In one implementation, △C a =C a2 -C a1 , △C b =C b2 -C b1 , △C a >△C b ;

[0017] And / or, K a =C a2 / C a1 K b =C b2 / C b1 Ka ≥K b .

[0018] ΔC of the first doped semiconductor layer a Larger and / or K a The larger diameter of the first doped semiconductor layer allows for a thinner first doped semiconductor layer, or fewer openings or smaller opening areas. This design offers three additional benefits: it saves material costs, improves the carrier transport capacity of the first doped semiconductor layer, reduces the carrier recombination rate, and increases the photoelectric conversion efficiency of the solar cell; and it reduces damage to the first doped semiconductor layer during fabrication.

[0019] In one implementation, K a =C a2 / C a1 ,2≤K a ≤1000; and / or, K b =C b2 / C b1 2≤K b ≤1000; and / or, △C a =C a2 -C a1 4*E21atoms / cm 3 ≤△C a ≤9*E22atoms / cm 3 ; and / or, △C b =C b2 -C b1 3*E19atoms / cm 3 ≤△C b ≤2*E21atoms / cm 3 .

[0020] In one implementation, the doping concentration of the first element in the second region gradually decreases along the direction close to the semiconductor substrate;

[0021] And / or, along the direction close to the semiconductor substrate, the doping concentration of the second element in the fourth region gradually decreases.

[0022] In one implementation, along the direction away from the semiconductor substrate, the second region includes a first sub-region and a second sub-region arranged sequentially (that is, the second sub-region is farther away from the semiconductor substrate than the first sub-region), and the doping concentration of the second sub-region is greater than that of the first sub-region.

[0023] In one implementation, along the direction away from the semiconductor substrate, the fourth region includes a third sub-region and a fourth sub-region arranged sequentially (that is, the fourth sub-region is farther away from the semiconductor substrate than the third sub-region), and the doping concentration of the fourth sub-region is greater than that of the third sub-region.

[0024] In one implementation, the second sub-region is a region extending along the direction toward the semiconductor substrate, from the surface of the second region away from the semiconductor substrate to the point where the doping concentration of the second region is equal to that of the first region.

[0025] The first sub-region is the region along the direction toward the semiconductor substrate, starting from the position where the doping concentration of the second region is equal to that of the first region, and extending to the region of the second region near the surface of the semiconductor substrate;

[0026] The fourth sub-region is the region extending along the direction towards the semiconductor substrate, from the surface of the fourth region away from the semiconductor substrate, to the point where the doping concentration of the fourth region is equal to that of the third region.

[0027] The third sub-region is the region along the direction toward the semiconductor substrate, starting from the position where the doping concentration of the fourth region is equal to that of the third region, and extending to the region of the fourth region near the surface of the semiconductor substrate.

[0028] In one implementation, along the thickness direction of the semiconductor substrate, the thickness of the second sub-region is h1, and the thickness of the fourth sub-region is h2; h1≤h2.

[0029] In one implementation, along the thickness direction of the semiconductor substrate, the thickness of the second sub-region is h1, and the thickness of the fourth sub-region is h2;

[0030] The thickness of the first doped semiconductor layer is d1, 0.1≤h1 / d1≤0.9; and / or, the thickness of the second doped semiconductor layer is d2, 0.1≤h2 / d2≤0.9.

[0031] In one implementation, along the thickness direction of the semiconductor substrate, the thickness of the second sub-region is h1, and the thickness of the fourth sub-region is h2;

[0032] 0.01μm≤h1≤0.13μm; and / or, 0.01μm≤h2≤0.15μm; and / or, the thickness of the first doped semiconductor layer is d1, 10nm≤d1≤400nm; and / or, the thickness of the second doped semiconductor layer is d2, 10nm≤d2≤400nm.

[0033] In one implementation, the rate of change of the doping concentration of the first element in the second sub-region along a direction parallel to the thickness of the semiconductor substrate is |V1|, and the rate of change of the doping concentration of the second element in the fourth sub-region is |V2|, where |V1|≥|V2|.

[0034] In one implementation, the doping concentration of the first element in the second region is 5*E21~6*E22 atoms / cm². 3 ; and / or,

[0035] The doping concentration of the second element in the fourth region is 1*E20~3*E21 atoms / cm. 3 .

[0036] In one implementation, the total area of ​​the second region projected onto the semiconductor substrate surface is less than the total area of ​​the fourth region projected onto the semiconductor substrate surface.

[0037] In one implementation, there are multiple second regions that are not contiguous; and / or, there are multiple fourth regions that are not contiguous.

[0038] In one implementation, a first electrode is disposed on the side of the second region away from the silicon substrate, and a second electrode is disposed on the side of the fourth region away from the silicon substrate.

[0039] In one implementation, the depth to which the first element is diffused inward from the surface of the semiconductor substrate is the first inward diffusion depth, and the depth to which the second element is diffused inward from the surface of the semiconductor substrate is the second inward diffusion depth, wherein the first inward diffusion depth is less than or equal to the second inward diffusion depth.

[0040] The first inner expansion depth ranges from 50 nm to 150 nm; and / or, the second inner expansion depth ranges from 50 nm to 150 nm.

[0041] In one implementation, the semiconductor substrate has a first surface and a second surface opposite to each other along its thickness direction, and a first doped semiconductor layer is disposed on the first surface;

[0042] The second doped semiconductor layer is disposed on the first surface and is spaced apart from the first doped semiconductor layer along the first direction, and there is an electrical isolation structure between the first doped semiconductor layer and the second doped semiconductor layer; or, the second doped semiconductor layer is disposed on the second surface.

[0043] In one implementation, the first region is a first non-laser-acting region; the second region is the first laser-acting region; and / or,

[0044] The third region is the second non-laser-affected region; the fourth region is the second laser-affected region.

[0045] In one implementation, the first doped semiconductor layer and / or the second doped semiconductor layer are polycrystalline silicon layers.

[0046] In one implementation, the solar cell further includes a dielectric layer covering a first doped semiconductor layer and a second doped semiconductor layer, wherein the dielectric layer has a first opening penetrating the thickness of the dielectric layer at a position corresponding to the second region, and a second opening penetrating the thickness of the dielectric layer at a position corresponding to the fourth region.

[0047] In one implementation, the solar cell further includes a first electrode and a second electrode, the first electrode passing through a first opening and electrically connected to a first doped semiconductor layer, and the second electrode passing through a second opening and electrically connected to a second doped semiconductor layer.

[0048] The first electrode includes a first seed layer and is in contact with a first doped semiconductor layer; the second electrode includes a second seed layer and is in contact with a second doped semiconductor layer; the thickness of the first seed layer is greater than the thickness of the second seed layer.

[0049] A photovoltaic module includes: an electrical connector and any of the above-mentioned solar cells; the solar cells further include a dielectric layer, a first electrode and a second electrode, the dielectric layer covering a first doped semiconductor layer and a second doped semiconductor layer, the dielectric layer having a first opening and a second opening, the first electrode passing through the first opening and being electrically connected to the first doped semiconductor layer, and the second electrode passing through the second opening and being electrically connected to the second doped semiconductor layer.

[0050] The electrical connector is electrically connected to the first electrode and / or the second electrode in the solar cell.

[0051] Compared with the prior art, the beneficial effects of the photovoltaic module provided in this application are the same as those of the solar cells described above, and will not be repeated here. Attached Figure Description

[0052] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments of this application and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0053] Figure 1 A partial cross-sectional view of a solar cell provided in an embodiment of this application;

[0054] Figure 2 Another partial cross-sectional view of a solar cell provided in an embodiment of this application;

[0055] Figure 3 A schematic diagram showing the change in concentration of the first element with depth in the first doped semiconductor layer of the first and second regions provided in the embodiments of this application;

[0056] Figure 4 A schematic diagram showing the concentration of the second element in the second doped semiconductor layer of the third and fourth regions as a function of depth, provided in an embodiment of this application.

[0057] Figure 5 A schematic diagram showing the change in concentration of the first element with depth in the first doped semiconductor layer at the edge and center of the second region provided in an embodiment of this application;

[0058] Figure 6 A schematic diagram showing the change in concentration of the second element with depth in the second doped semiconductor layer at the edge and center of the fourth region provided in an embodiment of this application;

[0059] Figure 7 Another partial cross-sectional view of a solar cell provided in an embodiment of this application.

[0060] Figure label:

[0061] 1-Semiconductor substrate, 2-First interface layer, 3-First doped semiconductor layer, 3a-First region, 3b-Second region, 3b1-First sub-region, 3b2-Second sub-region, 4-Dielectric layer, 5-First electrode, 6-Second doped semiconductor layer, 6a-Third region, 6b-Fourth region, 6b1-Third sub-region, 6b2-Fourth sub-region, 7-Second electrode, 8-First seed layer, 9-Second seed layer. Detailed Implementation

[0062] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0063] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0064] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise expressly specified. "Several" means one or more, unless otherwise expressly specified.

[0065] In the description of this application, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0066] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0067] To improve the efficiency of carrier extraction from the electrodes of a solar cell, in a first aspect, this application provides a solar cell comprising a semiconductor substrate 1, a first doped semiconductor layer 3, a second doped semiconductor layer 6, a first electrode 5, and a second electrode 7. The semiconductor substrate 1 has a first surface and a second surface opposite to each other along its thickness direction; that is, the two surfaces opposite to each other along the thickness direction of the semiconductor substrate 1 are the first surface and the second surface, respectively.

[0068] The first doped semiconductor layer 3 is disposed on the semiconductor substrate 1. Specifically, the first doped semiconductor layer 3 can be disposed on a first surface or a second surface. In this application, the first doped semiconductor layer 3 is described as being disposed on the first surface. The first doped semiconductor layer 3 can be disposed entirely on the first surface or partially on the first surface, such as in a strip shape. When the doping type of the first doped semiconductor layer 3 is N-type, the first element is a group V or group VI element, such as phosphorus, arsenic, or antimony. The first doped semiconductor layer 3 can be additionally formed on the semiconductor substrate 1 by deposition technology, or it can be formed within the semiconductor substrate 1 by diffusion, ion implantation, or other methods.

[0069] The second doped semiconductor layer 6 is disposed on the semiconductor substrate 1. Specifically, the second doped semiconductor layer 6 can be disposed on the first surface or the second surface. In the case of a bifacial solar cell, the first doped semiconductor layer 3 is disposed on the first surface, and the second doped semiconductor layer 6 is disposed on the second surface. The second doped semiconductor layer 6 can be disposed entirely on the second surface or partially, such as in a strip shape. In the case of a back-contact solar cell, both the first doped semiconductor layer 3 and the second doped semiconductor layer 6 are disposed on the first surface. The first doped semiconductor layer 3 and the second doped semiconductor layer 6 are spaced apart along a first direction, and an electrical isolation structure exists between them. The electrical isolation structure can be an isolation trench or an insulating material to prevent leakage between the first doped semiconductor layer 3 and the second doped semiconductor layer 6. Furthermore, the second doped semiconductor layer 6 is doped with a second element, and the conductivity type of the second doped semiconductor layer 6 is opposite to that of the first doped semiconductor layer 3. Specifically, when the doping type of the second doped semiconductor layer 6 is p-type, the second element is a group III element, such as boron or gallium. Of course, the first doped semiconductor layer 3 can also be P-type and the second doped semiconductor layer 3 can be N-type.

[0070] In this application, such as Figure 1 and Figure 2 As shown, Figure 1 This is a side view of one side of a bifacial battery. Figure 2 This is a side view of the back-contact battery; the electrode sections with different conductivity types are insulated. Figure 2 No insulating treatment method is shown. The first doped semiconductor layer 3 has a first region 3a and a second region 3b, wherein the first region 3a and the second region 3b can be distributed along a direction parallel to the first surface of the semiconductor substrate 1. The doping concentration of the first element in the first region 3a is C. a1 The doping concentration of the first element in the second region 3b is C. a2 C a2 >C a1 .

[0071] like Figure 3 As shown, Figure 3 The horizontal axis represents the depth along the first region 3a and the second region 3b from the side away from the semiconductor substrate 1 (i.e., from the outermost surface of the N-type doped semiconductor layer away from the silicon substrate) to the side closest to the semiconductor substrate 1. Figure 3 The vertical axis represents the doping concentration of the first element. The activated doping concentration curve was obtained using an ECV instrument. All doping concentrations mentioned in this application refer to the concentration of the activated doping element.

[0072] from Figure 3As can be seen, from the side of the first region 3a and the second region 3b away from the semiconductor substrate 1 to a certain depth, C a2 >C a1 In this design, the second region 3b can be a region electrically connected to the first electrode 5. Compared to the first region 3a, which is not electrically connected to the first electrode 5, the second region 3b, which is electrically connected to the first electrode 5, has a higher doping concentration. This results in higher conductivity in the second region 3b of the first doped semiconductor layer 3, thereby reducing the transmission resistance between the first electrode 5 and the second region 3b, which is more conducive to the transmission of charge carriers and reduces current loss. Simultaneously, it can further reduce the thickness of the doped semiconductor, or the number or area of ​​openings, saving material costs and reducing damage caused by the process.

[0073] The second doped semiconductor layer 6 has a third region 6a and a fourth region 6b, wherein the third region 6a and the fourth region 6b can be distributed along a direction parallel to the first surface of the semiconductor substrate 1. It can be understood that the distribution direction of the third region 6a and the fourth region 6b is the same as the distribution direction of the first region 3a and the second region 3b. The doping concentration of the second element in the third region 6a is C. b1 The doping concentration of the second element in region 6b is C. b2 C b2 >C b1 Furthermore, C a2 >C b2 .

[0074] like Figure 4 As shown, Figure 4 The horizontal axis represents the depth along the third region 6a and the fourth region 6b from the side away from the semiconductor substrate 1 (i.e., from the outermost surface of the P-type doped semiconductor layer away from the silicon substrate) to the side closest to the semiconductor substrate 1. Figure 4 The vertical axis represents the doping concentration of the second element. From... Figure 4 As can be seen, from the side of the third region 6a and the fourth region 6b away from the semiconductor substrate 1 to a certain depth, C b2 >C b1 .

[0075] In this design, the fourth region 6b can be electrically connected to the second electrode 7. Compared to the third region 6a, which is not electrically connected to the second electrode 7, the fourth region 6b has a higher doping concentration. This results in higher conductivity in the fourth region 6b of the second doped semiconductor layer 6, thereby reducing the transport resistance between the second electrode 7 and the fourth region 6b, which is more conducive to carrier transport and reduces current loss. Simultaneously, it can further reduce the thickness of the doped semiconductor, or the number or area of ​​openings, saving material costs and reducing process-related damage.

[0076] In this application, C a2 >C b2 That is, the doping concentration C of the first element in the second region 3b. a2 The doping concentration C of the second element in region 6b is greater than that in region 4. b2 This configuration makes the conductivity of the second region 3b of the thinner first doped semiconductor layer 3 closer to that of the fourth region 6b of the thicker second doped semiconductor layer 6, thereby reducing the current difference between the first electrode 5 and the first doped semiconductor layer 3 and between the second electrode 7 and the second doped semiconductor layer 6, reducing the current loss of the battery and ensuring the performance of the battery.

[0077] Optionally, C a2 and C b2 These refer to the doping concentrations of the second region 3b and the fourth region 6b extending into the semiconductor substrate 1 to the same depth. For example, this could be the doping concentration at the outermost surface of the doped semiconductor layer, or the doping concentration extending from the outermost surface into the semiconductor substrate to 10nm, 20nm, 25nm, 30nm, 40nm, or 50nm. To avoid unstable or missing test data for the outermost surface doping concentration, and for easier evidence collection, it is preferable to extend to 20nm, 25nm, or 30nm.

[0078] If the first region 3a, the second region 3b, the third region 6a, and the fourth region 6b are all distributed along a direction parallel to the first surface of the semiconductor substrate 1, then the first region 3a refers to the region of the first doped semiconductor layer that does not correspond to the trench region of the dielectric layer, the second region 3b refers to the region of the first doped semiconductor layer that corresponds to the trench region of the dielectric layer, the third region 6a refers to the region of the second doped semiconductor layer that does not correspond to the trench region of the dielectric layer, and the fourth region 6b refers to the region of the second doped semiconductor layer that corresponds to the trench region of the dielectric layer. The average doping concentration of several sites within the first region 3a is taken as C. a1 The average doping concentration of several sites in the third region 6a is calculated as C. b1 .

[0079] In practical applications, the first doped semiconductor layer 3 (N-type semiconductor layer) has a higher solid solubility of P element, allowing for a higher doping content into the semiconductor substrate 1. Therefore, the thickness of the first doped semiconductor layer (N-type semiconductor layer) can be reduced. This reduces material usage and parasitic absorption losses caused by the doped semiconductor layer. While reducing the thickness of the first doped semiconductor layer 3 (N-type semiconductor layer), it is necessary to maintain the conductivity of the first doped semiconductor layer 3 at a comparable level to before the thinning. Therefore, in this application, ΔC... a =C a2 -Ca1 , △C b =C b2 -C b1 , △C a >△C b In other words, the difference in doping concentration between the second region 3b and the first region 3a of the first doped semiconductor layer 3 is greater than the difference in doping concentration between the third region 6a and the fourth region 6b of the second doped semiconductor layer 6. This arrangement ensures that the current transport efficiency of the first doped semiconductor layer 3 can be maintained at a comparable level before thinning. In addition, it can also reduce the current difference between the first electrode 5 and the first doped semiconductor layer 3 and between the second electrode 7 and the second doped semiconductor layer 6, thereby reducing the current loss of the battery.

[0080] In some embodiments, if △C a If the value is too large, it increases the complexity of the process and leads to an increase in the raw material cost of the first element; if △C a If the doping concentration is too low, the doping concentration of region 3b in the second region will be low, affecting the efficiency of carrier extraction in region 3b. Therefore, in this technical solution, 4*E21atoms / cm 3 ≤△C a ≤9*E22atoms / cm 3 This ensures the efficiency of carrier extraction in the second region 3b, while reducing process complexity and raw material costs. For example, △C a It can be 4*E21 atoms / cm 3 6*E21atoms / cm 3 7*E21atoms / cm 3 8*E21atoms / cm 3 9*E21atoms / cm 3 1*E22atoms / cm 3 2*E22atoms / cm 3 4*E22atoms / cm 3 5*E22atoms / cm 3 7*E22atoms / cm 3 8*E22atoms / cm 3 Or 9*E22atoms / cm 3 wait.

[0081] In this technical solution, 3*E19 atoms / cm 3 ≤△C b ≤2*E21atoms / cm 3This ensures that the fourth region 6b has high conductivity and high efficiency in extracting charge carriers, while also reducing the complexity of the manufacturing process and lowering the raw material cost of the second element. For example, ΔC b It can be 3*E19 atoms / cm 3 5*E19atoms / cm 3 6*E19atoms / cm 3 8*E19atoms / cm 3 9*E19atoms / cm 3 9*E19atoms / cm 3 9*E19atoms / cm 3 1*E20atoms / cm 3 2*E20atoms / cm 3 4*E20atoms / cm 3 6*E20atoms / cm 3 8*E20atoms / cm 3 9*E20atoms / cm 3 1*E21atoms / cm 3 Or 2*E21atoms / cm 3 wait.

[0082] In some embodiments, K a =C a2 / C a1 K b =C b2 / C b1 K a ≥K b In other words, the ratio of the doping concentration between the second region 3b and the first region 3a of the first doped semiconductor layer 3 is greater than or equal to the difference in doping concentration between the fourth region 6b and the third region 6a of the second doped semiconductor layer 6. Using this technical solution, the doping concentrations of the second region 3b and the fourth region 6b can be adjusted according to actual conditions, thereby making the conductivity of the second region 3b and the fourth region 6b closer, balancing the extraction efficiency of holes and electrons, and thus reducing current loss.

[0083] ΔC of the first doped semiconductor layer 3 a Larger and / or K aThe larger thickness of the first doped semiconductor layer 3 allows for a thinner layer, or fewer openings or smaller opening areas. This design brings three benefits: it saves material costs, improves the carrier transport capacity of the first doped semiconductor layer 3, reduces the carrier recombination rate, improves the photoelectric conversion efficiency of the solar cell, and reduces damage to the first doped semiconductor layer 3 during fabrication.

[0084] In some embodiments, if K a If K is too small, the doping concentration of the second region 3b will be low, resulting in low conductivity of the second region 3b and affecting the efficiency of carrier extraction in the second region 3b; if K a If the value is too large, it increases the complexity of the process and leads to an increase in the raw material cost of the first element; in view of the above, in this technical solution, 2≤K a ≤1000, to ensure the efficiency of carrier extraction in the second region 3b, while reducing process difficulty and raw material costs. For example, K a The values ​​can be 2, 50, 100, 150, 200, 250, 300, 350, 400, 450, 500, 550, 600, 650, 700, 750, 800, 850, 900, 950, or 1000.

[0085] In this technical solution, 2≤K b ≤1000, to ensure that the fourth region 6b has high conductivity, the fourth region 6b has high efficiency in extracting charge carriers, and at the same time reduces the difficulty of the process and the raw material cost of the second element. For example, K b The values ​​can be 2, 50, 100, 150, 200, 250, 300, 350, 400, 450, 500, 550, 600, 650, 700, 750, 800, 850, 900, 950, or 1000.

[0086] In some embodiments, since the surface of the second region 3b of the first doped semiconductor layer 3 is in contact with the first electrode 5 or other conductive elements, the higher the doping concentration of the surface of the second region 3b of the first doped semiconductor layer 3, the higher the efficiency of carrier extraction in the second region 3b of the first doped semiconductor layer 3. In view of the above, in this technical solution, the doping concentration of the first element in the second region 3b gradually decreases along the direction close to the semiconductor substrate 1, that is, along the direction of the second region 3b away from the first electrode 5, the doping concentration of the first element in the second region 3b gradually decreases. This arrangement ensures that the doping concentration of the first element on the surface of the second region 3b in contact with the first electrode 5 or other conductive elements is the highest, thereby maximizing the conductivity between the second region 3b and the conductive elements and further reducing current loss.

[0087] In some embodiments, since the surface of the fourth region 6b of the second doped semiconductor layer 6 is in contact with the second electrode 7 or other conductive elements, the higher the doping concentration of the surface of the fourth region 6b of the second doped semiconductor layer 6, the higher the efficiency of carrier extraction in the fourth region 6b of the second doped semiconductor layer 6. In view of the above, in this technical solution, the doping concentration of the second element in the fourth region 6b gradually decreases along the direction close to the semiconductor substrate 1, that is, along the direction away from the second electrode 7, the doping concentration of the second element in the fourth region 6b gradually decreases. This arrangement ensures that the doping concentration of the second element on the surface of the fourth region 6b in contact with the second electrode 7 or other conductive elements is the highest, thereby maximizing the conductivity between the fourth region 6b and the second electrode 7 or other conductive elements, further reducing current loss.

[0088] In some embodiments, along a direction away from the semiconductor substrate 1, the second region 3b includes a first sub-region 3b1 and a second sub-region 3b2 arranged sequentially, wherein the second sub-region 3b2 is further away from the semiconductor substrate 1 than the first sub-region 3b1. For example... Figure 3 As shown, the second sub-region 3b2 is the region extending along the direction toward the semiconductor substrate, from the surface of the second region away from the semiconductor substrate, to the point where the doping concentration of the second region is equal to that of the first region. The first sub-region 3b1 is the region extending along the direction toward the semiconductor substrate, from the point where the doping concentration of the second region is equal to that of the first region, to the point where the doping concentration of the second region is close to the surface of the second region near the semiconductor substrate.

[0089] The doping concentration of the second sub-region 3b2 is greater than that of the first sub-region 3b1. The second sub-region 3b2 is the region in contact with the first electrode 5 or other conductive components. This technical solution increases the doping concentration of the first element in the second sub-region 3b2, thereby reducing the contact resistance between the second sub-region 3b2 and the first electrode 5 or other conductive components, thus reducing current loss.

[0090] In some embodiments, along a direction away from the semiconductor substrate 1, the fourth region 6b includes a third sub-region 6b1 and a fourth sub-region 6b2 arranged sequentially, wherein the fourth sub-region 6b2 is further away from the semiconductor substrate 1 than the third sub-region 6b1. Figure 4 As shown, the fourth sub-region 6b2 is the region extending along the direction toward the semiconductor substrate, from the surface of the fourth region away from the semiconductor substrate to the point where the doping concentration of the fourth region is equal to that of the third region. The third sub-region 6b1 is the region extending along the direction toward the semiconductor substrate, from the point where the doping concentration of the fourth region is equal to that of the third region to the point where the doping concentration of the fourth region is close to that of the semiconductor substrate.

[0091] The doping concentration of the fourth sub-region 6b2 is greater than that of the third sub-region 6b1. The fourth sub-region 6b2 is the region in contact with the second electrode 7 or other conductive components. In this technical solution, the doping concentration of the second element in the fourth sub-region 6b2 is increased, thereby reducing the contact resistance between the fourth sub-region 6b2 and the second electrode 7 or other conductive components, thus reducing current loss.

[0092] In some embodiments, the thickness of the second sub-region 3b2 along the thickness direction of the semiconductor substrate 1 is h1, that is, the laser activation depth within the second region is h1. Along the direction from the surface of the first doped semiconductor layer 3 away from the semiconductor substrate 1 to its interior, within a depth of h1, the doping concentration of the first element in the second region 3b is greater than the doping concentration of the first element in the first region 3a; while within a depth greater than h1, the doping concentration of the first element in the second region 3b can be equal to or less than the doping concentration of the first element in the first region 3a. This configuration ensures that the doping concentration of the first element near the location where the second region 3b connects to the first electrode 5 or other conductive components is relatively high. During manufacturing, only the doping concentration near the location where the second region 3b connects to the first electrode 5 or other conductive components needs to be increased, which not only saves raw materials for the first element but also reduces the process difficulty and facilitates manufacturing.

[0093] In other embodiments, the thickness of the fourth sub-region 6b2 along the thickness direction of the semiconductor substrate 1 is h2, meaning the laser activation depth within the fourth region is h2. Similar to the design mechanism of the first doped semiconductor layer 3, within the second doped semiconductor layer 6, along the direction close to the semiconductor substrate 1, the doping concentration of the second element in the fourth region 6b at a depth of h2 is greater than the doping concentration of the second element in the third region 6a. This is similar to the effect in the first doped semiconductor layer 3, where the doping concentration of the first element in the second region 3b at a depth of h1 is greater than the doping concentration of the first element in the first region 3a, and will not be elaborated further here.

[0094] Because the doping element, such as element B, in the second doped semiconductor layer has lower solid solubility, the conductivity of this layer is poor, which is not conducive to carrier transport. Therefore, this technical solution designs a deeper surface activation of the second doped semiconductor layer to improve its carrier transport performance and match that of the first doped semiconductor layer, so h1≤h2. With this setting, the depth h1 of the higher doping concentration of the second element in the fourth region 6b is larger, which also helps to reduce the current difference between the first electrode 5 and the first doped semiconductor layer 3 and between the second electrode 7 and the second doped semiconductor layer 6, thereby reducing the current loss of the battery.

[0095] In some embodiments, the thickness of the first doped semiconductor layer 3 is d1, and 0.1 ≤ h1 / d1 ≤ 0.9. This ensures that the thickness h1 of the second sub-region 3b2 is within a reasonable range, guaranteeing high conductivity near the contact point between the second region 3b and the first electrode 5 or other conductive components, while reducing processing difficulty and facilitating manufacturing. For example, h1 / d1 can be 0.1, 0.15, 0.2, 0.25, 0.3, 0.35, 0.4, 0.45, 0.5, 0.55, 0.6, 0.65, 0.7, 0.75, 0.8, 0.85, or 0.9, etc.

[0096] In some embodiments, the thickness of the second doped semiconductor layer 6 is d2, where 0.1 ≤ h2 / d2 ≤ 0.9. This ensures that the thickness h2 of the fourth sub-region 6b2 is within a reasonable range, guaranteeing high conductivity near the contact point between the fourth region 6b and the second electrode 7 or other conductive components, while reducing processing difficulty and facilitating manufacturing. For example, h2 / d2 can be 0.1, 0.15, 0.2, 0.25, 0.3, 0.35, 0.4, 0.45, 0.5, 0.55, 0.6, 0.65, 0.7, 0.75, 0.8, 0.85, or 0.9, etc.

[0097] In some embodiments, if h1 is too small, it cannot be guaranteed that the second region 3b has high conductivity near the contact point with the first electrode 5 or other conductive components, leading to increased current loss; if h1 is too large, it may increase the difficulty of the process and waste the raw materials of the first element. In view of the above, in this technical solution, 0.01μm≤h1≤0.13μm is used to ensure that the second sub-region 3b2 has high conductivity, while reducing the difficulty of the process, improving processing efficiency, and saving the raw materials of the first element. For example, h1 can be 0.01μm, 0.03μm, 0.05μm, 0.08μm, 0.1μm, 0.02μm, or 0.13μm, etc.

[0098] In some embodiments, if h2 is too small, it cannot be guaranteed that the fourth region 6b has high conductivity near the contact point with the second electrode 7 or other conductive components, leading to increased current loss; if h2 is too large, it may increase the difficulty of the process and waste the raw materials of the second element. In view of the above, in this technical solution, 0.01μm ≤ h2 ≤ 0.15μm is used to ensure that the fourth sub-region 6b2 has high conductivity, while reducing the difficulty of the process, improving processing efficiency, and saving the raw materials of the second element. For example, h2 can be 0.01μm, 0.03μm, 0.05μm, 0.08μm, 0.1μm, 0.02μm, or 0.15μm, etc.

[0099] Furthermore, the embodiments of the present invention do not specifically limit the thickness of the first doped semiconductor layer 3 and the second doped semiconductor layer 6, as long as they can be applied to the solar cell provided in the embodiments of the present invention. For example, the thickness of the first doped semiconductor layer 3 is d1, where 10nm ≤ d1 ≤ 400nm. For example, d1 can be 10μm, 50μm, 100μm, 150μm, 200μm, 250μm, 300μm, 350μm, or 400μm. In addition, the thickness of the second doped semiconductor layer 6 is d2, where 10nm ≤ d2 ≤ 400nm. For example, d2 can be 10μm, 50μm, 100μm, 150μm, 200μm, 250μm, 300μm, 350μm, or 400μm.

[0100] In some embodiments, from the surface of the second sub-region 3b2 along a direction parallel to the thickness of the semiconductor substrate 1, the absolute value of the rate of change of the doping concentration of the first element in the second sub-region 3b2 is V1, and the absolute value of the rate of change of the doping concentration of the second element in the fourth sub-region 6b2 is |V2|, where |V1|≥|V2|. In other words, within a depth of h1 from the surface of the first doped semiconductor layer 3 to its interior, the absolute value of the rate of decrease of the doping concentration of the first element in the second region 3b is greater than or equal to the absolute value of the rate of decrease of the doping concentration of the second element in the fourth region 6b. This technical solution makes the change in doping concentration in the second region 3b more adaptable to the carrier transport efficiency of the first doped semiconductor layer 3, and simultaneously makes the change in doping concentration in the fourth region 6b more adaptable to the carrier transport efficiency of the second doped semiconductor layer 6, thereby ensuring the overall carrier transport efficiency of the solar cell.

[0101] like Figure 3 As shown, Figure 3 The horizontal axis represents the depth from the surface of the first doped semiconductor layer 3 to its interior, and the vertical axis represents the doping concentration of the first element. For example... Figure 4 As shown, Figure 4 The horizontal axis represents the depth from the surface of the second doped semiconductor layer 6 to its interior, and the vertical axis represents the doping concentration of the second element. (Comparison) Figure 3 and Figure 4 It can be seen that the doping concentration of the first element in the second region 3b changes with depth at a significantly greater rate than the doping concentration of the second element in the fourth region 6b.

[0102] The doping concentration of the first element in the second region 3b and the doping concentration of the second element in the fourth region 6b can be any concentration applicable to the solar cell provided in this embodiment of the invention. For example, the doping concentration of the first element in the second region 3b is 5*E21~6*E22 atoms / cm². 3This approach not only prevents excessively high doping concentrations from affecting the crystal structure to meet current transport efficiency requirements, but also saves on the raw materials for the first element. For example, the doping concentration of the first element in the second region 3b is 5 * E21 atoms / cm². 3 6*E21atoms / cm 3 7*E21atoms / cm 3 8*E21atoms / cm 3 9*E21atoms / cm 3 1*E22atoms / cm 3 3*E22atoms / cm 3 4*E22atoms / cm 3 5*E22atoms / cm 3 Or 6*E22atoms / cm 3 The doping concentration of the second element in region 6b is 1*E20~3*E21 atoms / cm². 3 This approach not only prevents excessively high doping concentrations from affecting the crystal structure to meet current transport efficiency requirements, but also saves on the raw materials for the second element. For example, the doping concentration of the second element in region 6b of the fourth region is 1*E20 atoms / cm². 3 3*E20atoms / cm 3 5*E20atoms / cm 3 8*E20atoms / cm 3 1*E21atoms / cm 3 2*E21atoms / cm 3 Or 3*E21atoms / cm 3 etc. Among them, the doping concentration of the first element in the second region 3b is the average doping concentration of the first element in the second region 3b; the doping concentration of the second element in the fourth region 6b is the average doping concentration of the second element in the fourth region 6b.

[0103] In some embodiments, the total area of ​​the orthographic projection of the second region 3b onto the surface of the semiconductor substrate 1 is smaller than the total area of ​​the orthographic projection of the fourth region 6b onto the surface of the semiconductor substrate 1. During electrode fabrication, given that the activity of the fourth region 6b is lower than that of the second region 3b, the total area of ​​the fourth region 6b is made larger than the total area of ​​the second region 3b. This increases the total area of ​​the less active fourth region 6b, thereby reducing the difficulty of subsequent plating processes.

[0104] In other embodiments, such as Figure 5 As shown, Figure 5 The horizontal axis represents the depth along the second region 3b from the side away from semiconductor substrate 1 to the side closer to semiconductor substrate 1. Figure 5 The vertical axis represents the doping concentration of the first element. From... Figure 5 As can be seen, the first element at the edge of the surface of the second region 3b facing away from the semiconductor substrate 1 and the first element in the middle portion are relatively uniformly distributed. In other words, the first element on the surface of the second region 3b facing away from the semiconductor substrate 1 is uniformly distributed along a direction parallel to the first surface. Specifically, the difference in doping concentration between the first element at the edge of the second region 3b and the first element in the middle portion of the second region 3b is less than or equal to 5%. This setting makes the conductivity of the surface of the second region 3b more uniform, resulting in a more uniform current transmission when the second region 3b contacts the first electrode 5 or other conductive components, avoiding excessive local heat. Furthermore, during the laser opening process, due to different laser types and processes (parameters and / or steps), the energy distribution of the laser at the opening edge and the middle portion of the opening may be uneven. Therefore, the doping concentration of the first element at the edge of the second region 3b can also be greater than or less than the doping concentration of the first element in the middle portion of the second region 3b. For example, the difference in doping concentration between the first element at the edge of the second region 3b and the first element in the middle portion of the second region 3b is less than or equal to 100 atoms / cm². 3 For example, the difference could be 100 atoms / cm. 3 90 atoms / cm 3 80 atoms / cm 3 70 atoms / cm 3 60 atoms / cm 3 50 atoms / cm 3 40 atoms / cm 3 30 atoms / cm 3 20 atoms / cm 3 Or 10 atoms / cm 3 wait.

[0105] In other embodiments, such as Figure 6 As shown, Figure 6 The horizontal axis represents the depth along the fourth region 6b from the side away from semiconductor substrate 1 to the side closer to semiconductor substrate 1. Figure 6 The vertical axis represents the doping concentration of the second element. From... Figure 6As can be seen, the second element at the edge of the side surface of the fourth region 6b facing away from the semiconductor substrate 1 and the second element in the middle portion are relatively uniformly distributed. In other words, the second element on the side surface of the fourth region 6b facing away from the semiconductor substrate 1 is uniformly distributed along a direction parallel to the first surface. Specifically, the difference in doping concentration between the first element at the edge of the fourth region and the first element in the middle portion of the fourth region is less than or equal to 5%; in other words, the second element in the fourth region 6b is uniformly distributed along a direction parallel to the first surface. This configuration makes the conductivity of the surface of the fourth region 6b more uniform, resulting in a more uniform current transmission when the fourth region 6b contacts the second electrode 7 or other conductive components, thus avoiding excessive local heat. Similarly, the doping concentration of the second element at the edge of the fourth region 6b can also be greater than or less than the doping concentration of the second element in the middle portion of the fourth region 6b. For example, the difference in doping concentration between the second element at the edge of the fourth region 6b and the second element in the middle portion of the fourth region 6b can be 100 atoms / cm². 3 For example, the difference could be 100 atoms / cm. 3 90 atoms / cm 3 80 atoms / cm 3 70 atoms / cm 3 60 atoms / cm 3 50 atoms / cm 3 40 atoms / cm 3 30 atoms / cm 3 20 atoms / cm 3 Or 10 atoms / cm 3 wait.

[0106] In some embodiments, the doping concentration of the first element in the second region 3b near the edge of the solar cell is equal to the doping concentration of the first element in the second region 3b near the center of the solar cell. Of course, the doping concentration of the first element in the second region 3b near the edge of the solar cell can also be greater than or less than the doping concentration of the first element in the second region 3b near the center of the solar cell. Similarly, the doping concentration of the second element in the fourth region 6b near the edge of the solar cell is equal to the doping concentration of the second element in the third region 6a near the center of the solar cell. Again, the doping concentration of the second element in the fourth region 6b near the edge of the solar cell can also be greater than or less than the doping concentration of the second element in the third region 6a near the center of the solar cell.

[0107] In some embodiments, the number of second regions is multiple and the multiple second regions are not discontinuous. This discontinuous arrangement reduces the laser activation area, thereby reducing laser damage to the semiconductor substrate 1; at the same time, it ensures the carrier collection and extraction efficiency of the first doped semiconductor layer 3. Specifically, the second regions can be any shape such as circular, elliptical, rectangular, or rounded rectangle.

[0108] The fourth region is multiple and discontinuous, which reduces the laser activation area and thus reduces laser damage to the semiconductor substrate 1; at the same time, it ensures the carrier collection and extraction efficiency of the first doped semiconductor layer 3. Specifically, the fourth region can be any shape, such as circular, elliptical, rectangular, or rounded rectangle.

[0109] It is understood that during the fabrication of the first doped semiconductor layer 3, a portion of the first element diffuses into the interior of the semiconductor substrate 1, and the depth to which the first element diffuses inward from the surface of the semiconductor substrate 1 is called the first inward diffusion depth. During the fabrication of the second doped semiconductor layer 6, a portion of the second element diffuses into the interior of the semiconductor substrate 1, and the depth to which the second element diffuses inward from the surface of the semiconductor substrate 1 is called the second inward diffusion depth. The first inward diffusion depth is less than or equal to the second inward diffusion depth. This reduces the transport resistance between the semiconductor substrate 1 and the first doped semiconductor layer 3, and also reduces the contact resistance between the semiconductor substrate 1 and the second doped semiconductor layer 6. Simultaneously, it reduces the difference in carrier collection efficiency between the first doped semiconductor layer 3 and the second doped semiconductor layer 6, thereby reducing current loss.

[0110] As for the range of the first and second inner expansion depths, as long as the carrier generation efficiency of the semiconductor substrate 1 is satisfied, no specific limitation is made in this application. For example, the range of the first inner expansion depth is 50nm to 150nm, such as 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, or 150nm. The range of the second inner expansion depth is 50nm to 150nm, such as 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, or 150nm.

[0111] In some embodiments, the first region 3a can be a first non-laser-acting region, and the second region 3b can be a first laser-acting region. Specifically, the second region 3b of the first doped semiconductor layer 3 is irradiated with a laser to activate more of the first element. For example, when the first element is phosphorus, the heat of the laser is used to replace silicon atoms in the crystal lattice with phosphorus, forming more substitutional diffusion and converting it into active phosphorus.

[0112] In some embodiments, the third region 6a is a second non-laser-acting region; the fourth region 6b is a second laser-acting region. Specifically, the fourth region 6b of the second doped semiconductor layer 6 is irradiated with a laser to activate more second elements. For example, when the first element is boron, the heat from the laser is used to replace silicon atoms in the crystal lattice with boron, forming more substitutional diffusion and converting it into active boron.

[0113] In some embodiments, the material of the semiconductor substrate 1 can be selected from materials such as silicon (Si), germanium (Ge), or gallium arsenide (GaAs). Obviously, in terms of conductivity type, the semiconductor substrate 1 can be an intrinsically conductive substrate, an n-type conductive substrate, or a p-type conductive substrate. Optionally, the semiconductor substrate 1 is a p-type conductive substrate or an n-type conductive substrate. Compared with an intrinsically conductive substrate, a p-type conductive substrate or an n-type conductive substrate has better conductivity, resulting in a lower bulk resistivity in the final solar cell, thereby improving the efficiency of the solar cell.

[0114] Furthermore, the materials of the first doped semiconductor layer 3 and the second doped semiconductor layer 6 can be silicon (Si), germanium (Ge), silicon carbide (SiCx), or gallium arsenide (GaAs), etc. Taking the case where both the first doped semiconductor layer 3 and the second doped semiconductor layer 6 are made of silicon (Si) as an example, the first doped semiconductor layer 3 can be doped polycrystalline silicon, and the second semiconductor layer can also be doped polycrystalline silicon. In addition, the first doped semiconductor layer 3 can also be one or more of doped monocrystalline silicon, doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon. The second doped layer can also be one or more of doped monocrystalline silicon, doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon. In this case, the doped polycrystalline silicon layer has higher carrier transport characteristics. Therefore, when the first doped semiconductor layer 3 and / or the second doped semiconductor layer 6 are doped polycrystalline silicon layers, the carrier transport efficiency is higher, which is beneficial to improving the photoelectric conversion efficiency of the solar cell.

[0115] In some embodiments, the solar cell may further include a first interface layer 2, which is located at least between the first doped semiconductor layer 3 and the semiconductor substrate 1. In this case, the passivated contact structure formed by the first interface layer 2 and the first doped semiconductor layer 3 has excellent interface passivation effect and can achieve selective collection of charge carriers, reducing the carrier recombination rate in the region of the semiconductor substrate 1 where the first semiconductor layer is formed, and further improving the photoelectric conversion efficiency of the solar cell. The material and thickness of the first interface layer 2 can be set according to the material of the first semiconductor layer and actual needs, and are not specifically limited here.

[0116] The material of the first interface layer 2 can be determined based on the material of the first doped semiconductor layer 3. For example, if the first doped semiconductor layer 3 includes a doped polycrystalline silicon layer, the first interface layer 2 is a tunneling oxide layer. In this case, the first doped semiconductor layer 3 and the first interface layer 2 form a tunneling oxide passivation contact. The tunneling oxide passivation technology can form a tunneling film between the first electrode 5 and the semiconductor substrate 1, isolating the electrode from contact with the semiconductor substrate 1, reducing contact recombination losses, and ensuring that electrons can tunnel through the film without affecting current transmission. Simultaneously, passivation can bend the surface bandgap, reducing surface recombination losses on the silicon wafer, effectively improving the problem of front-side passivation and metal contact. Another example: if the first doped semiconductor layer 3 includes a doped amorphous silicon layer, the first interface layer 2 includes an intrinsic amorphous silicon layer. Furthermore, the embodiments of the present invention do not specifically limit the material of the first interface layer 2.

[0117] In some embodiments, the solar cell may further include a second interface layer, which is located at least between the second doped semiconductor layer 6 and the semiconductor substrate 1. The projection of the second interface layer onto the semiconductor substrate 1 may overlap with the projection of the second doped semiconductor layer 6 onto the semiconductor substrate 1. In this case, the passivated contact structure formed by the second interface layer and the second doped semiconductor layer 6 can achieve selective collection of charge carriers and reduce the carrier recombination rate in the region of the semiconductor substrate 1 where the second doped semiconductor layer 6 is formed. The material and thickness of the second interface layer can be set according to the material of the second doped semiconductor layer 6 and actual needs, and are not specifically limited here. For example, when the material of the second doped semiconductor layer 6 includes one or more of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the second interface layer includes one or more of intrinsic amorphous silicon, intrinsic microcrystalline silicon, and intrinsic nanocrystalline silicon. As another example, when the material of the second doped semiconductor layer 6 includes doped polycrystalline silicon, the second interface layer includes a tunneling oxide layer.

[0118] In some embodiments, the solar cell further includes a dielectric layer 4 covering the first doped semiconductor layer 3 and the second doped semiconductor layer 6, wherein the dielectric layer 4 is located on the side of the first doped semiconductor layer 3 and the second doped semiconductor layer 6 facing away from the semiconductor substrate 1. The dielectric layer 4 may be made of one or more of silicon nitride (SiNx, where x can be any value), silicon oxynitride, and silicon oxide, which can passivate the surface of the semiconductor substrate 1 or the doped layer, reduce its carrier recombination rate, and further improve the photoelectric conversion efficiency of the solar cell.

[0119] The dielectric layer 4 has a first opening penetrating the thickness of the dielectric layer 4 at the location corresponding to the second region 3b. The first electrode 5 passes through the first opening and is electrically connected to the first doped semiconductor layer 3. The dielectric layer 4 has a second opening penetrating the thickness of the dielectric layer 4 at the location corresponding to the fourth region 6b. The second electrode 7 passes through the second opening and is electrically connected to the second doped semiconductor layer 6. This arrangement ensures the conductivity between the first electrode 5 and the first doped semiconductor layer 3, and between the second electrode 7 and the second doped semiconductor layer 6.

[0120] In some embodiments, such as Figure 7 As shown, the first electrode 5 includes a first seed layer 8, which is in contact with the first doped semiconductor layer 3; the second electrode 7 includes a second seed layer 9, which is in contact with the second doped semiconductor layer 6. In this technical solution, the first seed layer 8 and the second seed layer 9 achieve good contact and prevent the diffusion of metal elements from the first electrode 5 and the second electrode 7 into the semiconductor substrate 1, thus reducing recombination. Simultaneously, the remaining portions of the first electrode 5 and the second electrode 7 offer more options; mature and inexpensive metals can be chosen to replace silver, reducing the cost of the electrodes and consequently, the cost of the solar cell.

[0121] In this process, the thickness of the first seed layer 8 is greater than the thickness of the second seed layer 9. Specifically, the first doped semiconductor layer 3 (e.g., phosphorus doping) is usually negatively charged, the second doped semiconductor layer (e.g., boron doping) is usually positively charged, and metal ions are usually positively charged. According to the principle that like charges repel and unlike charges attract, the first doped semiconductor layer 3 is more likely to attract and recombine positively charged metal ions than the second doped semiconductor layer. Therefore, a thicker first seed layer 8 is needed to block the penetration of metal ions into the first electrode 5, while a thinner second seed layer 9 is sufficient to effectively block metal ions in the second electrode 7.

[0122] In some embodiments, the ratio of the thickness of the first seed layer 8 to the thickness of the second seed layer 9 is greater than 1 and less than or equal to 2. The thickness ratio of the two is controlled within this range, which has a good blocking effect on the infiltration of metal ions in the first electrode 5 and the second electrode 7, and the thickness difference between the two is not too large, so as to avoid introducing mechanical property problems such as cracks during the lamination process.

[0123] For example, the ratio of the thickness of the first seed layer 8 to the thickness of the second seed layer 9 can be 1.01, 1.03, 1.05, 1.1, 1.2, 1.15, 1.3, 1.35, 1.4, 1.45, 1.5, 1.55, 1.6, 1.65, 1.7, 1.75, 1.8, 1.85, 1.9, 1.95, or 2.

[0124] The difference between the thickness of the first seed layer 8 and the thickness of the second seed layer 9 is greater than 0 and less than or equal to 200 nm. The thickness difference between the two is controlled within this range, which has a good blocking effect on the penetration of metal ions in the first electrode 5 and the second electrode 7. Moreover, the thickness difference between the two is not too large, so it will not have an adverse effect on the subsequent preparation of the first metal layer and the second metal layer, and will not introduce mechanical damage during the subsequent lamination process.

[0125] For example, the difference between the thickness of the first seed layer 8 and the thickness of the second seed layer 9 can be 1nm, 10nm, 50nm, 70nm, 30nm, 5nm, 100nm, 120nm, 150nm, 180nm, 190nm, or 200nm.

[0126] In this application, the thickness of the first seed layer 8 can be 460nm, 500nm, 550nm, 562nm, 562.2nm, 600nm, 605.4nm, 606nm, 629nm, 700nm, 754.8nm, 755nm, 843nm, 1300nm, 800nm, 900nm, 1000nm, 1100nm, 1200nm, 1400nm, or 1500nm. The thickness of the second seed layer 9 can be 260nm, 300nm, 350nm, 400nm, 448.2nm, 448nm, 504nm, 500nm, 503nm, 503.2nm, 504nm, 600nm, 743nm, 700nm, 800nm, 900nm, 1000nm, 1100nm, 1200nm, or 1300nm.

[0127] Optionally, the material of the second seed layer 9 is selected from at least one of the following: titanium (Ti), tungsten (W), chromium (Cr), nickel (Ni), cobalt (Co), molybdenum (Mo), tin (Sn), lead (Pb), palladium (Pd), copper (Cu), niobium (Nb), ruthenium (Ru), indium (In), zinc (Zn), titanium boride (TiBx), tantalum nitride (TaNx), tungsten nitride (WNx), titanium tungsten alloy (TiWx), titanium silicon compound (TiSix), titanium silicon nitride (TiSiN), tantalum silicon nitride compound (TaSiNx), nickel vanadium (NiV), and hexagonal boron nitride (WBN); And / or, the material of the first seed layer 8 is selected from at least one of the following: titanium (Ti), tungsten (W), chromium (Cr), nickel (Ni), cobalt (Co), molybdenum (Mo), tin (Sn), lead (Pb), palladium (Pd), copper (Cu), niobium (Nb), ruthenium (Ru), indium (In), zinc (Zn), titanium boride (TiBx), tantalum nitride (TaNx), tungsten nitride (WNx), titanium nitride (TiNx), titanium-tungsten alloy (TiWx), titanium silicon compound (TiSix), titanium silicon nitride (TiSiN), tantalum silicon nitride compound (TaSiNx), nickel vanadium (NiV), and hexagonal boron nitride (WBN). Specifically, the materials of the first seed layer 8 and the second seed layer 9 are selected from the above-mentioned materials, whose electrical resistance, blocking properties for metal elements, and other properties are more suitable for use as seed layers. In particular, nickel and / or zinc are chosen as the materials for the first seed layer 8 and the second seed layer 9. Firstly, both nickel and zinc have good contact properties; secondly, nickel and zinc do not penetrate into the semiconductor substrate 1, resulting in less recombination; and thirdly, nickel and zinc provide good barrier properties against the metals in the overlying metal layers, preventing metals from penetrating into the semiconductor substrate 1 and reducing recombination. Whether the materials of the first seed layer 8 and the second seed layer 9 are the same is not specifically limited; they can be the same or different. It should be noted that x in the above chemical formulas is a number greater than 0. The materials of the first seed layer 8 and the second seed layer 9 can be the same or different; this is not specifically limited.

[0128] Furthermore, embodiments of this application also provide a photovoltaic module, which includes an electrical connector and a solar cell as described above. The electrical connector can be electrically connected to a first electrode and / or a second electrode in the solar cell.

[0129] Compared with the prior art, the beneficial effects of the photovoltaic modules provided in this application are the same as those of the solar cells described above, and will not be repeated here.

[0130] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0131] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A solar cell, characterized by, The solar cell comprises: a semiconductor substrate; a first doped semiconductor layer provided on a surface of the semiconductor substrate and doped with a first element; a second doped semiconductor layer provided on the surface of the semiconductor substrate and doped with a second element, the second doped semiconductor layer being opposite in conductive type to the first doped semiconductor layer; The first doped semiconductor layer has a first region and a second region arranged along a direction parallel to the surface of the semiconductor substrate; the first region has a first element doping concentration of C a1 , and the second region has a first element doping concentration of C a2 , C a2 >C a1 . The second doped semiconductor layer has a third region and a fourth region, which are arranged along a direction parallel to the surface of the semiconductor substrate; the doping concentration of the second element in the third region is C b1 , and the doping concentration of the second element in the fourth region is C b2 , C b2 >C b1 . And, C a2 > C b2 .

2. The solar cell according to claim 1, characterized in that, ΔC a = C a2 - C a1 , ΔC b = C b2 - C b1 , ΔC a > ΔC b ; and / or, K a = C a2 / C a1 , K b = C b2 / C b1 , K a ≥ K b .

3. The solar cell of claim 1, wherein K a = C a2 / C a1 , 2 ≤ K a ≤ 1000; and / or, K b = C b2 / C b1 , 2 ≤ K b ≤ 1000; and / or, ΔC a = C a2 - C a1 , 4*E21atoms / cm 3 ≤ ΔC a ≤ 9*E22atoms / cm 3 ; and / or, ΔC b = C b2 - C b1 , 3*E19atoms / cm 3 ≤ ΔC b ≤ 2*E21atoms / cm 3 .

4. The solar cell of claim 1, wherein a first element doping concentration of the second region gradually decreases in a direction approaching the semiconductor substrate; and / or, a second element doping concentration of the fourth region gradually decreases in a direction approaching the semiconductor substrate.

5. The solar cell of claim 1, wherein In a direction away from the semiconductor substrate, the second region comprises a first sub-region and a second sub-region arranged in sequence, and a doping concentration of the second sub-region is greater than a doping concentration of the first sub-region; In a direction away from the semiconductor substrate, the fourth region comprises a third sub-region and a fourth sub-region arranged in sequence, and a doping concentration of the fourth sub-region is greater than a doping concentration of the third sub-region.

6. The solar cell according to claim 5, characterized in that, In a thickness direction of the semiconductor substrate, a depth of the second sub-region is h1, and a depth of the fourth sub-region is h2; h1≤h2.

7. The solar cell of claim 5, wherein, In a thickness direction of the semiconductor substrate, a depth of the second sub-region is h1, and a depth of the fourth sub-region is h2; A thickness of the first doped semiconductor layer is d1, and 0.1≤h1 / d1≤0.9; and / or, a thickness of the second doped semiconductor layer is d2, and 0.1≤h2 / d2≤0.

9.

8. The solar cell of claim 5, wherein, In a thickness direction of the semiconductor substrate, a depth of the second sub-region is h1, and a depth of the fourth sub-region is h2; 0.01μm≤h1≤0.13μm; and / or, 0.01μm≤h2≤0.15μm; And / or, a thickness of the first doped semiconductor layer is d1, and 10nm≤d1≤400nm; and / or, a thickness of the second doped semiconductor layer is d2, and 10nm≤d2≤400nm.

9. The solar cell of claim 5, wherein, In a direction parallel to the thickness of the semiconductor substrate from a surface of the second sub-region, an absolute value of a change rate of the first element doping concentration in the second sub-region is |V1|, and an absolute value of a change rate of the second element doping concentration in the fourth sub-region is |V2|, |V1|≥|V2|.

10. The solar cell according to any one of claims 5-9, wherein the second sub-region is a region of the second region in a direction towards the semiconductor substrate from a surface of the second region away from the semiconductor substrate to a position where a doping concentration of the second region is equal to a doping concentration of the first region; the first sub-region is a region of the second region in a direction towards the semiconductor substrate from the position where the doping concentration of the second region is equal to the doping concentration of the first region to a surface of the second region close to the semiconductor substrate; the fourth sub-region is a region of the fourth region in a direction towards the semiconductor substrate from a surface of the fourth region away from the semiconductor substrate to a position where a doping concentration of the fourth region is equal to a doping concentration of the third region, The third sub-region is a region from a position where the doping concentration of the fourth region is equal to the doping concentration of the third region to a region near the surface of the semiconductor substrate in a direction toward the semiconductor substrate.

11. The solar cell according to any one of claims 1 to 9, wherein The first element of the second region has a doping concentration of 5*E21 to 6*E22 atoms / cm3 3 ; and / or, The doping concentration of the second element of the fourth region is 1*E20~3*E21atoms / cm 3 .

12. The solar cell according to any one of claims 1 to 9, wherein, The total area of the orthographic projection of the second region on the surface of the semiconductor substrate is less than the total area of the orthographic projection of the fourth region on the surface of the semiconductor substrate.

13. The solar cell according to any one of claims 1 to 9, wherein The number of the second regions is plural and the plural second regions are discontinuously arranged, and the number of the fourth regions is plural and the plural fourth regions are discontinuously arranged, a first electrode is arranged on the side of the second region away from the semiconductor substrate, and a second electrode is arranged on the side of the fourth region away from the semiconductor substrate.

14. A photovoltaic module, characterized by Comprise: The solar cell of any one of claims 1 to 13; the solar cell further comprises a dielectric layer, a first electrode and a second electrode, the dielectric layer covers the first doped semiconductor layer and the second doped semiconductor layer, the dielectric layer is provided with a first opening and a second opening, the first electrode is electrically connected with the first doped semiconductor layer through the first opening, and the second electrode is electrically connected with the second doped semiconductor layer through the second opening; The electric connector is electrically connected with the first electrode and / or the second electrode in the solar cell.

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