Light emitting diode chip and preparation method thereof

Abstract

The invention provides a light emitting diode chip and a preparation method thereof, the chip comprises a substrate and an epitaxial layer deposited on the substrate, a nitrogen release pattern is prepared on one surface of the substrate close to the epitaxial layer, the nitrogen release pattern comprises a first sub-pattern located at the center of the substrate and a sub-pattern group arranged along the circumferential direction of the first sub-pattern, each sub-graph group is composed of a plurality of second sub-graphs at annular intervals, the multiple sub-graph groups are circumferentially arranged at intervals, the projection areas of the second sub-graphs in the multiple sub-graph groups are sequentially and linearly reduced from inside to outside, and the projection distances between the centers of the second sub-graphs in the multiple sub-graph groups are sequentially and linearly increased from inside to outside. According to the method, the nitrogen release pattern is prepared on the surface, close to the epitaxial layer, of the substrate, in the stripping process, the sapphire substrate with the stripped periphery warps upwards under the action of internal stress to open a channel for nitrogen release, and the problem that the GaN epitaxial layer is exploded and damaged due to the fact that nitrogen is not released in time in the laser stripping process is solved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a light emitting diode chip and a preparation method thereof. Background Art

[0002] Light-emitting diode chips are energy-efficient and highly efficient, and are widely used in the fields of lighting and display. Among them, vertically structured light-emitting diode chips are used in the field of automotive lighting due to their large welding area and high thermal conductivity.

[0003] In the prior art, the preparation of vertical structure light-emitting diode chips requires the application of a laser lift-off process, in which the laser lift-off process is a process in which the sapphire substrate and the GaN epitaxial layer bonding surface are irradiated with a laser, and the energy of the laser is used to decompose the GaN at part of the bonding surface to generate metal gallium and nitrogen, thereby peeling the sapphire from the GaN epitaxial layer. However, in the prior art laser lift-off process, there is a problem that there is no nitrogen release channel, the nitrogen is not released in time, and bubbles are accumulated at the bonding surface of the sapphire substrate and the GaN film layer, and then explode, damaging the GaN epitaxial layer, resulting in a low yield of vertical structure light-emitting diode chips. Summary of the invention In view of the deficiencies of the prior art, an object of the present invention is to provide a light emitting diode chip, aiming to solve the technical problems mentioned in the background technology.

[0004] In order to achieve the above object, the present invention is implemented by the following technical solutions: A light-emitting diode chip comprises a substrate and an epitaxial layer deposited on the substrate, wherein a nitrogen release pattern is prepared on a side of the substrate close to the epitaxial layer, wherein the nitrogen release pattern comprises a first sub-pattern located at the center of the substrate and a sub-pattern group arranged circumferentially along the first sub-pattern, wherein the sub-pattern group is composed of a plurality of second sub-patterns annularly spaced apart, wherein the sub-pattern groups have a plurality of groups, and the plurality of groups of sub-pattern groups are arranged circumferentially spaced apart, wherein the projection areas of the second sub-patterns in the plurality of sub-pattern groups decrease linearly from the inside to the outside, and the projection distances between the centers of the second sub-patterns in the plurality of sub-pattern groups increase linearly from the inside to the outside.

[0005] According to one aspect of the above technical solution, the ratio of the depth of the first sub-pattern and the second sub-pattern to the thickness of the substrate is 1:(2-3).

[0006] According to one aspect of the above technical solution, in the same sub-graphic group, the projection distances between the centers of adjacent second sub-graphics are consistent.

[0007] According to one aspect of the above technical solution, the distance between the center of the first sub-graph and the center of the adjacent second sub-graph is greater than or equal to 1500um, and the distance between the centers of the two closest second sub-graphs in two adjacent sub-graph groups is greater than or equal to 1500um.

[0008] According to one aspect of the above technical solution, in two adjacent sub-graphic groups, the projection distance between the centers of the second sub-graphics increases linearly from inside to outside by 500um to 2000um.

[0009] According to one aspect of the above technical solution, the maximum size of the edges of the first sub-graph and the second sub-graph is 1000um to 3000um.

[0010] According to one aspect of the above technical solution, the distance between the nearest points of adjacent second sub-patterns in the same sub-pattern group is 500um-1000um.

[0011] According to one aspect of the above technical solution, the substrate is a sapphire substrate, and the shapes of the first sub-pattern and the second sub-pattern are circular, square, or irregular.

[0012] The present invention also provides a method for preparing a light emitting diode chip, comprising the following steps: Providing a substrate, and depositing an epitaxial layer on the substrate; Etching a pattern on the epitaxial layer to expose the substrate; Prepare a nitrogen release pattern on the substrate by an etching process; The nitrogen release pattern includes a first sub-pattern located at the center of the substrate, and a sub-pattern group arranged circumferentially along the first sub-pattern, the sub-pattern group is composed of a plurality of second sub-patterns annularly spaced apart, the sub-pattern group has a plurality of groups, and the plurality of groups of sub-pattern groups are circumferentially spaced apart, the projection areas of the second sub-patterns in the plurality of sub-pattern groups decrease linearly from the inside to the outside, and the projection distances between the centers of the second sub-patterns in the plurality of sub-pattern groups increase linearly from the inside to the outside.

[0013] According to one aspect of the above technical solution, after the nitrogen release pattern is prepared on the substrate by an etching process, the method further comprises: Removing the substrate by a laser lift-off process to expose the etched epitaxial layer thereon; forming an isolation groove on the epitaxial layer by an etching process; A pad layer is prepared on the epitaxial layer to form a light emitting diode chip.

[0014] Compared with the prior art, the present invention has the following beneficial effects: By preparing a nitrogen release pattern on the side of the substrate close to the epitaxial layer, during the subsequent laser stripping process, the sapphire substrate that has been peeled off on the periphery will bend upward under the action of internal stress to open a channel for the release of nitrogen, thereby avoiding the problem of untimely release of nitrogen during the laser stripping process, which will accumulate into bubbles at the junction of the sapphire substrate and the GaN film layer, and then explode and damage the GaN epitaxial layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic structural diagram of a substrate of a light emitting diode chip in a first embodiment of the present invention; Figure 2 A schematic structural diagram of a substrate having a first sub-pattern and a second sub-pattern in a square shape; Figure 3 for Figure 1 A first partial enlarged view of the nitrogen release pattern; Figure 4 for Figure 1 A second partial enlarged view of the nitrogen release pattern; Figure 5 for Figure 1 A third partial enlarged view of the nitrogen release pattern; Description of main component symbols:

[0016] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0017] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0018] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present invention belongs. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0020] See also Figure 1 , shown is a light-emitting diode chip in a first embodiment of the present invention, comprising a substrate 1, and an epitaxial layer deposited on the substrate 1, wherein a nitrogen release pattern is prepared on a side of the substrate 1 close to the epitaxial layer, wherein the nitrogen release pattern comprises a first sub-pattern 20 located at the center of the substrate 1, and a sub-pattern group 10 arranged circumferentially along the first sub-pattern 20, wherein the sub-pattern group 10 is composed of a plurality of second sub-patterns 21 annularly spaced apart, wherein the sub-pattern group 10 comprises a plurality of groups, wherein the plurality of groups of the sub-pattern groups 10 are spaced apart circumferentially, wherein the projection areas of the second sub-patterns 21 in the plurality of the sub-pattern groups 10 decrease linearly from the inside to the outside, and the projection distances between the centers of the second sub-patterns 21 in the plurality of the sub-pattern groups 10 increase linearly from the inside to the outside.

[0021] It can be understood that the present invention prepares a nitrogen release pattern on one side of the substrate 1 close to the epitaxial layer. During the subsequent laser stripping process, the sapphire substrate 1 whose periphery has been stripped is lifted up under the action of internal stress to open a channel for the release of nitrogen, thereby avoiding the problem of untimely release of nitrogen during the laser stripping process, which causes bubbles to accumulate at the interface between the sapphire substrate 1 and the GaN film layer and then explode, thereby damaging the GaN epitaxial layer.

[0022] Specifically, the ratio of the depth of the first sub-pattern 20 and the second sub-pattern 21 to the thickness of the substrate 1 is 1:(2-3).

[0023] For further information, see Figure 3 In the same sub-pattern group 10, the projection distance between the centers of adjacent second sub-patterns 21 is consistent; in the same sub-pattern group 10, the distance between the nearest points of adjacent second sub-patterns 21 is 500um~1000um.

[0024] For further information, see Figure 4 The distance between the center of the first sub-graph 20 and the center of the adjacent second sub-graph 21 is greater than or equal to 1500um, and the distance between the centers of the two closest second sub-graphs 21 in two adjacent sub-graph groups 10 is greater than or equal to 1500um.

[0025] Furthermore, in two adjacent sub-pattern groups 10, the projection distance between the centers of the second sub-patterns 21 increases linearly from the inside to the outside by 500um to 2000um.

[0026] For further information, see Figure 5 In the first sub-graph 20 and the second sub-graph 21, the maximum edge size is 1000um~3000um.

[0027] In other embodiments, the substrate 1 is a sapphire substrate 1, and the shapes of the first sub-pattern 20 and the second sub-pattern 21 are circular, square, or irregular. Figure 2 .

[0028] A second embodiment of the present invention provides a method for preparing a light emitting diode chip, comprising the following steps: S10, providing a substrate, and depositing an epitaxial layer on the substrate; S20, etching a pattern on the epitaxial layer to expose the substrate; S30, preparing a nitrogen release pattern on the substrate by an etching process; The nitrogen release pattern includes a first sub-pattern located at the center of the substrate, and a sub-pattern group arranged circumferentially along the first sub-pattern, the sub-pattern group is composed of a plurality of second sub-patterns annularly spaced apart, the sub-pattern group has a plurality of groups, and the plurality of groups of sub-pattern groups are circumferentially spaced apart, the projection areas of the second sub-patterns in the plurality of sub-pattern groups decrease linearly from the inside to the outside, and the projection distances between the centers of the second sub-patterns in the plurality of sub-pattern groups increase linearly from the inside to the outside.

[0029] After the nitrogen release pattern is prepared on the substrate by an etching process, the method further comprises: S40, removing the substrate by a laser lift-off process to expose the epitaxial layer after being etched thereon; S50, forming an isolation groove on the epitaxial layer by an etching process; S60, preparing a pad layer on the epitaxial layer to form a light emitting diode chip.

[0030] Specifically, the step S10 specifically includes: Providing a sapphire substrate, and sequentially preparing an N-type GaN layer, an active light-emitting layer, and a P-type GaN layer from bottom to top on the sapphire substrate by using a MOCVD process; Coating a photoresist on the surface of the P-type GaN layer, and then removing a portion of the photoresist by exposure and development to expose the P-type GaN layer below the portion of the photoresist; Using an inductively coupled plasma etching process to remove a portion of the P-type GaN layer and the active light-emitting layer below the P-type GaN layer until the N-type GaN layer is exposed; The photoresist on the N-type GaN layer is removed to form a conductive step of the N-type GaN layer, and the photoresist is removed.

[0031] Specifically, the step S20 specifically includes: Depositing indium tin oxide on the surface of the conductive steps of the P-type semiconductor layer and the N-type semiconductor layer by magnetron sputtering; then coating the surface of the indium tin oxide with photoresist, then removing part of the photoresist by exposure and development to expose part of the indium tin oxide, and then removing the exposed indium tin oxide by indium tin oxide etching solution, and removing the photoresist to form a current spreading layer; Magnetron sputtering is a vacuum deposition technology that uses a magnetic field to confine and enhance plasma so that it bombards the target material, thereby sputtering the target atoms onto the substrate to form a thin film. The specific steps include generating plasma in a vacuum environment, using a magnetic field to confine the charged particles in the plasma to enhance the bombardment of the ions on the target material, and finally depositing the sputtered atoms or molecules onto the substrate to form a thin film; Magnetron sputtering uses a magnetic field to confine and enhance the plasma, thereby improving the sputtering efficiency and film quality. Compared with traditional sputtering methods, magnetron sputtering can achieve a higher deposition rate; The main function of the current extension layer is to evenly distribute the current and prevent current crowding, thereby improving the performance and reliability of the device; Depositing SiO2 as a current blocking layer on the surface of the P-type GaN layer and the N-type GaN layer conductive step by using a PECVD process, then coating the surface of the current blocking layer with a photoresist, then removing part of the photoresist by exposure and development to expose the current blocking layer under the part of the photoresist, then removing the exposed current blocking layer by using a BOE etching solution to form a current blocking layer through hole, and removing the photoresist; PECVD can achieve deposition at a lower temperature, which is particularly suitable for temperature-sensitive substrate materials, such as certain polymers and glass, avoiding material damage or deformation caused by high temperature. The resulting film has excellent optical, electrical and mechanical properties, few defects, high uniformity, and is suitable for high-demand electronic and optoelectronic devices. A negative photoresist is coated on the through hole of the current blocking layer and the surface of the current blocking layer, and then a part of the photoresist is removed by exposure and development, and then 1500-2000A of Ag metal, 300-500A of Ni metal, and 300-500A of Ti metal are sequentially evaporated by electron beam evaporation process; then the metal on the photoresist is removed by lift-off process, and the photoresist is removed to form a P-type reflective metal layer; in this embodiment, 1500A of Ag metal, 300A of Ni metal, and 300A of Ti metal are used; A negative photoresist is coated on the surface of the P-type reflective metal layer and the current blocking layer not covered by the P-type reflective metal layer, and then a part of the photoresist is removed by exposure and development, and then 200-300A of Ti metal, 1500-2000A of Pt metal, 4000-8000A of Au metal, and 200-500A of Cr metal are sequentially evaporated by an electron beam evaporation process, and then the metal located on the photoresist is removed by a Lift-Off process, and then the photoresist is removed to form a P-type conductive metal layer; in this embodiment, 200A of Ti metal, 1500A of Pt metal, 4000A of Au metal, and 200A of Cr metal are used; On the surface of the P-type conductive metal layer and the current blocking layer not covered by the P-type conductive metal layer, an Al2O3 film of 600-1200A is first deposited by an atomic layer deposition process, and then a SiO2 film of 6000-8000A is deposited by a PECVD process, and the two films together constitute a first insulating protective layer, and then a photoresist is coated on the surface of the SiO2 film, and then a part of the photoresist is removed by an exposure and development process to expose the first insulating layer under the photoresist, and then the exposed part of the first insulating layer and the current blocking layer under the first insulating layer are removed by an ICP etching process to form an N-type conductive through hole, and the N-type conductive through hole is located on the conductive step of the N-type GaN layer; then the sapphire substrate is thinned by a grinding process, and the remaining thickness after thinning is 35-250um; in this embodiment, the Al2O3 film is 600A, and the SiO2 film is 6000A; 20-50A of Cr metal, 2000-5000A of Al metal, 1500-2000A of Ti metal, and 1500-2000A of Pt metal are sequentially deposited on the first insulating protection layer and the first insulating layer through hole by electron beam evaporation process, and the above four layers of metal together constitute an N-type conductive metal layer; in this embodiment, 20A of Cr metal, 2000A of Al metal, 1500A of Ti metal, and 1500A of Pt metal are used; A doped conductive silicon wafer is provided, and then a bonding layer is evaporated on the doped conductive silicon wafer and the N-type conductive metal layer of the light-emitting diode chip by electron beam evaporation process, wherein the metal bonding layer includes metal Ti3000-4000A and 2-5 groups of Sn metal and Ni metal stacks, wherein the Sn metal thickness in each stack is 5000-10000A, and the Ni metal thickness is 2000-4000A; then the conductive silicon wafer is bonded to the light-emitting diode chip through the bonding layer by a hot pressing bonding process. In this embodiment, metal Ti3000A and 2 groups of Sn metal and Ni metal stacks are used, wherein the Sn metal thickness in each stack is 5000A, and the Ni metal thickness is 2000A.

[0032] Specifically, the step S30 specifically includes: A photoresist is coated on the surface of the thinned sapphire substrate, and then a portion of the photoresist is removed by exposure and development to expose a portion of the sapphire substrate. The exposed sapphire substrate is then removed by an ICP etching process, and then the photoresist is removed, thereby completing the preparation of the nitrogen release pattern on the sapphire substrate.

[0033] The nitrogen release pattern includes a first sub-pattern located at the center of the substrate, and a sub-pattern group arranged along the circumference of the first sub-pattern, the sub-pattern group is composed of a plurality of second sub-patterns annularly spaced, the sub-pattern group has a plurality of groups, the plurality of groups of sub-pattern groups are spaced circumferentially, the projection areas of the second sub-patterns in the plurality of sub-pattern groups decrease linearly from inside to outside, and the projection distances between the centers of the second sub-patterns in the plurality of sub-pattern groups increase linearly from inside to outside; The ratio of the depth of the first sub-pattern and the second sub-pattern to the thickness of the substrate is 1:(2-3); in this embodiment, the ratio of the depth of the first sub-pattern and the second sub-pattern to the thickness of the substrate is 1:2; In the same sub-graphic group, the projection distances between the centers of adjacent second sub-graphics are consistent; The distance between the center of the first sub-graph and the center of the adjacent second sub-graph is greater than or equal to 1500um, and the distance between the centers of the two closest second sub-graphs in two adjacent sub-graph groups is greater than or equal to 1500um; in this embodiment, both values ​​are 1500um; In two adjacent sub-pattern groups, in two adjacent sub-pattern groups, the projection distance between the centers of the second sub-patterns increases linearly from inside to outside by 500um~2000um; in this embodiment, the projection distance between the centers of the second sub-patterns increases linearly by 500um from inside to outside; In the sub-pattern group, in the first sub-pattern and the second sub-pattern, the maximum edge size is 1000um-3000um; in this embodiment, the maximum edge size is 1000um.

[0034] The distance between the closest points of the adjacent second sub-patterns in the same sub-pattern group is 500um-1000um; in this embodiment, the distance is 500um; After the above-mentioned graphic treatment, during the subsequent laser stripping process, the sapphire substrate whose outer part has been stripped can bend upward under the action of internal stress to open a channel for the release of nitrogen, thereby avoiding the problem of untimely release of nitrogen during the laser stripping process, which causes bubbles to accumulate at the interface between the sapphire substrate and the GaN film layer and then explode, thereby damaging the GaN epitaxial layer.

[0035] Specifically, the step S40 specifically includes: The patterned sapphire substrate is removed by a laser lift-off process, wherein a 266nm ultraviolet laser is used to irradiate the sapphire surface, thereby utilizing the energy of the laser to decompose the GaN at the interface between the sapphire substrate and the N-type GaN layer, generating metal gallium and nitrogen, thereby decomposing and removing the sapphire substrate. The laser spot radius of the laser lift-off process is between 12-16um, the laser moving path is from the outer periphery of the spiral sapphire to the center of the sapphire, the spot moving speed is between 2500-3000mm / s, and the laser power is between 80-100W. In this embodiment, the laser spot radius of the laser lift-off process is 12um, the spot moving speed is 2500mm / s, and the laser power is 80W.

[0036] Specifically, the step S50 specifically includes: After the sapphire substrate is removed by laser stripping, a surface of the N-type GaN layer exposed is coated with photoresist, and then a portion of the photoresist is removed by exposure and development to expose the N-type GaN layer. Then, a plasma etching process is used to remove the exposed N-type GaN layer and the active light-emitting layer and the P-type GaN layer thereunder to form an isolation groove, and then the photoresist is removed.

[0037] Specifically, the step S60 includes: A negative photoresist is coated on the isolation groove and the remaining N-type GaN, and the surface of the current blocking layer exposed after the isolation groove is formed, and then part of the photoresist is removed by exposure and development to expose part of the current blocking layer, and then the exposed current blocking layer is also etched away by BOE etching, and then Ti metal 500A, Pt metal 1000A, Au metal 5000A, Ni metal 2000A, and Au metal 10000A are sequentially evaporated by electron beam evaporation process; then, the metal on the photoresist is removed by Lift-Off process, and then the photoresist is removed, so that a P-type pad layer is formed. A layer of SiO2 film is prepared as a second insulating layer on the surface of the P-type pad layer, the N-type GaN layer, and other current blocking layers by using a PECVD process, and then a photoresist is coated on the surface of the second insulating layer, and then a portion of the photoresist is removed by exposure and development to expose a portion of the second insulating layer, and then the exposed portion of the second insulating layer is removed by an inductively coupled plasma etching process to form a second insulating layer through hole; the portion of the second insulating layer through hole exposes the N-type GaN layer, and the portion of the second insulating layer through hole exposes the P-type pad layer.

[0038] In view of the effect of the laser lift-off process, the present invention uses AOI equipment to detect the light-emitting diode after the laser lift-off process is completed to calculate the yield.

[0039] The laser stripping yield of the light-emitting diode chip prepared by the above-mentioned method for preparing the light-emitting diode chip reached 98%, which is 38% higher than that of the substrate without patterning.

[0040] This example also provides multiple sets of experimental data to verify the feasibility of the above preparation method:

[0041] It can be seen from the above table that the light emitting diode chips prepared by the above light emitting diode chip preparation method in the above experimental group have a laser peeling yield of at least 94% and at most 98%. Therefore, the preparation method in this embodiment can improve the yield of the substrate when it is laser peeled off, thereby improving the yield of the light emitting diode chip.

[0042] In summary, the light-emitting diode chip in the above-mentioned embodiment of the present invention prepares a nitrogen release pattern on the side of the substrate close to the epitaxial layer. During the subsequent laser stripping process, the sapphire substrate whose periphery has been peeled off is lifted up under the action of internal stress to open a channel for the release of nitrogen, thereby avoiding the problem of untimely release of nitrogen during the laser stripping process, which accumulates into bubbles at the junction of the sapphire substrate and the GaN film layer, and then explodes and damages the GaN epitaxial layer.

[0043] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0044] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A light emitting diode chip, characterized in that: It includes a substrate and an epitaxial layer deposited on the substrate, wherein a nitrogen release pattern is prepared on one side of the substrate close to the epitaxial layer, wherein the nitrogen release pattern includes a first sub-pattern located at the center of the substrate, and a sub-pattern group arranged circumferentially along the first sub-pattern, wherein the sub-pattern group is composed of a plurality of second sub-patterns annularly spaced apart, wherein the sub-pattern groups have a plurality of groups, and the plurality of groups of sub-pattern groups are arranged circumferentially spaced apart, wherein the projection areas of the second sub-patterns in the plurality of sub-pattern groups decrease linearly from the inside to the outside, and the projection distances between the centers of the second sub-patterns in the plurality of sub-pattern groups increase linearly from the inside to the outside.

2. The light emitting diode chip according to claim 1, characterized in that: The ratio of the depth of the first sub-pattern and the second sub-pattern to the thickness of the substrate is 1:(2-3).

3. The light emitting diode chip according to claim 1, characterized in that: In the same sub-graphic group, the projection distances between the centers of adjacent second sub-graphics are consistent.

4. The light emitting diode chip according to claim 3, characterized in that: The distance between the center of the first sub-pattern and the center of the adjacent second sub-pattern is greater than or equal to 1500um, and the distance between the centers of the two closest second sub-patterns in two adjacent sub-pattern groups is greater than or equal to 1500um.

5. The light emitting diode chip according to claim 4, characterized in that: In two adjacent sub-pattern groups, the projection distance between the centers of the second sub-patterns increases linearly from inside to outside by 500um to 2000um.

6. The light emitting diode chip according to claim 1, characterized in that: The maximum size of the edges of the first sub-graph and the second sub-graph is 1000um to 3000um.

7. The light emitting diode chip according to claim 1, characterized in that: The distance between the nearest points of adjacent second sub-patterns in the same sub-pattern group is 500um-1000um.

8. The light emitting diode chip according to claim 1, characterized in that: The substrate is a sapphire substrate, and the shapes of the first sub-pattern and the second sub-pattern are circular, square, or irregular.

9. A method for preparing a light emitting diode chip, characterized in that: The steps include: Providing a substrate, and depositing an epitaxial layer on the substrate; Etching a pattern on the epitaxial layer to expose the substrate; Prepare a nitrogen release pattern on the substrate by an etching process; The nitrogen release pattern includes a first sub-pattern located at the center of the substrate, and a sub-pattern group arranged circumferentially along the first sub-pattern, the sub-pattern group is composed of a plurality of second sub-patterns annularly spaced apart, the sub-pattern group has a plurality of groups, and the plurality of groups of sub-pattern groups are circumferentially spaced apart, the projection areas of the second sub-patterns in the plurality of sub-pattern groups decrease linearly from the inside to the outside, and the projection distances between the centers of the second sub-patterns in the plurality of sub-pattern groups increase linearly from the inside to the outside.

10. The method for preparing a light emitting diode chip according to claim 9, characterized in that: After the nitrogen release pattern is prepared on the substrate by an etching process, the method further comprises: Removing the substrate by a laser lift-off process to expose the etched epitaxial layer thereon; forming an isolation groove on the epitaxial layer by an etching process; A pad layer is prepared on the epitaxial layer to form a light emitting diode chip.

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