Display panel and preparation method thereof

Abstract

The embodiment of the invention discloses a display panel and a preparation method thereof, and the method comprises the steps: forming a patterned photoresist layer through employing a photomask, and forming a patterned first inorganic pixel definition layer and a patterned second inorganic pixel definition layer through employing the photoresist layer as a mask, according to the embodiment of the invention, the baking temperature and baking time of the conventional preparation of the photoresist layer are both lower than the heating temperature and heating time in the thermal process of preparing the organic pixel definition layer, so that the influence of the thermal process on the thin film transistor can be reduced, the risk of negative bias of the thin film transistor can be reduced, and a photomask can be saved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a method for preparing the same. Background Art

[0002] In existing OLED display panels, a pixel definition layer is usually set after the oxide thin film transistor is formed. As for the linear pixel definition structure layer, it includes two layers of organic pixel definition layers, one organic pixel definition layer includes a first retaining wall extending along the horizontal direction, and the other organic pixel definition layer includes a second retaining wall extending along the vertical direction. The first retaining wall and the second retaining wall intersect to form a pixel opening for printing ink material.

[0003] In the process of research and practice of the prior art, the inventor of the present application found that a long-term high temperature environment can cause negative bias in oxide thin film transistors. Forming the first organic pixel definition layer and the second organic pixel definition layer requires two thermal processes, which easily lead to the risk of negative bias in oxide thin film transistors. Summary of the invention

[0004] The embodiments of the present application provide a display panel and a method for manufacturing the same, which can reduce the risk of negative bias of thin film transistors and save photomasks.

[0005] The present invention provides a method for manufacturing a display panel, which comprises the following steps:

[0006] A thin film transistor structure layer, a first electrode, a first inorganic layer and a second inorganic layer are sequentially formed on a substrate, wherein the first inorganic layer and the second inorganic layer are stacked to form an inorganic stacked structure;

[0007] A patterned photoresist layer is formed on a side of the second inorganic layer away from the substrate; the photoresist layer includes a first photoresist bar and a second photoresist bar, the first photoresist bar and the second photoresist bar are cross-connected to form a plurality of openings, the thickness of the first photoresist bar is less than the thickness of the second photoresist bar, one of the openings corresponds to one of the first electrodes, and the pattern of the openings in a top view is within the region of the first electrode;

[0008] Using the photoresist layer as a mask, etching the inorganic stacked structure, and at the same time ashing the photoresist layer, so as to remove the first photoresist strip, thin the second photoresist strip, and form a groove on a side of the inorganic stacked structure away from the substrate;

[0009] Using the thinned second photoresist strip as a mask, the inorganic stack structure is etched while the second photoresist strip is removed by ashing, so that the inorganic stack structure forms a stacked first inorganic pixel definition layer and a second inorganic pixel definition layer, the first inorganic pixel definition layer includes a plurality of first pixel definition parts and a plurality of second pixel definition parts, the first pixel definition parts and the second pixel definition parts are cross-connected to form a plurality of pixel openings exposing the first electrode; the second inorganic pixel definition layer includes a plurality of third pixel definition parts, the extension direction of the third pixel definition parts is consistent with the extension direction of the first pixel definition parts, and a third pixel definition part is correspondingly arranged on a side of a first pixel definition part away from the substrate.

[0010] Optionally, in some embodiments of the present application, the step of using the thinned second photoresist strip as a mask to etch the inorganic stacked structure and remove the second photoresist strip by ashing includes:

[0011] The inorganic stacked structure is etched so that a pixel opening exposing the first electrode is formed in an area of ​​the inorganic stacked structure corresponding to the groove, the second inorganic layer is removed and the first inorganic layer is retained in an area of ​​the inorganic stacked structure corresponding to the first photoresist strip, and the first inorganic layer and the second inorganic layer are retained in an area of ​​the inorganic stacked structure corresponding to the second photoresist strip; wherein the patterned first inorganic layer forms a first inorganic pixel definition layer, and the patterned second inorganic layer forms a second inorganic pixel definition layer.

[0012] Optionally, in some embodiments of the present application, while etching the inorganic stacked structure using the photoresist layer as a mask, in the step of ashing the photoresist layer, the rate of etching the inorganic stacked structure is a first rate;

[0013] In the step of etching the inorganic stacked structure using the thinned second photoresist strip as a mask and removing the second photoresist strip by ashing, a rate of etching the inorganic stacked structure is a second rate, which is less than the first rate.

[0014] Optionally, in some embodiments of the present application, the thickness of the first photoresist strip is between 2 / 3 and 4 / 5 of the thickness of the second photoresist strip;

[0015] In the step of ashing the photoresist layer while etching the inorganic stacked structure using the photoresist layer as a mask, a thickness ratio of the first photoresist strip and the second inorganic layer is equal to an etching selection ratio of the first photoresist strip and the second inorganic layer.

[0016] Optionally, in some embodiments of the present application, while etching the inorganic stacked structure using the thinned second photoresist strip as a mask, in the step of removing the second photoresist strip by ashing, the thickness of the thinned second photoresist strip is less than or equal to the thickness of the first inorganic layer, and the etching rate of the second photoresist strip is less than the etching rate of the first inorganic layer.

[0017] Optionally, in some embodiments of the present application, in the step of forming a patterned photoresist layer, the drying temperature of the photoresist layer is between 60 degrees Celsius and 150 degrees Celsius, and the drying time of the photoresist layer is less than 25 minutes.

[0018] Optionally, in some embodiments of the present application, the first inorganic layer and the second inorganic layer are formed by chemical vapor deposition, and the ambient temperature for ashing the photoresist is between 15 degrees Celsius and 35 degrees Celsius.

[0019] Optionally, in some embodiments of the present application, forming a patterned photoresist layer on a side of the second inorganic layer away from the substrate comprises the following steps:

[0020] A first pattern of a photoresist layer is formed on a side of the second inorganic layer away from the substrate, the first pattern of the photoresist layer includes a first initial photoresist bar, a second initial photoresist bar and a third initial photoresist portion, the first pattern of the photoresist layer is further provided with an initial opening exposing the inorganic stacked structure, the third initial photoresist portion is located in the display area and is connected to the first initial photoresist bar and the second initial photoresist bar around it, the initial opening is located in the pixel redundant area and is provided with the first initial photoresist bar and the second initial photoresist bar around it, and the third initial photoresist portion and the initial opening correspond to one of the first electrodes respectively;

[0021] Using the first pattern of the photoresist layer as a mask, while etching the inorganic stacked structure, the first pattern of the photoresist layer is ashed and the third initial photoresist portion is removed to form a second pattern of the photoresist layer, wherein the second pattern of the photoresist layer includes a first photoresist bar and a second photoresist bar, wherein the first photoresist bar and the second photoresist bar are cross-connected to form a plurality of openings, wherein the thickness of the first photoresist bar is less than the thickness of the second photoresist bar, and in the display area, one of the openings corresponds to one of the first electrodes, and the pattern of the openings in a top view is within the region of the first electrode; in the pixel redundant region, a redundant recessed groove is formed in the region of the inorganic stacked structure corresponding to the initial opening;

[0022] The step of etching the inorganic stacked structure using the photoresist layer as a mask and ashing the photoresist layer at the same time also includes: forming a redundant opening exposing the first electrode in a region of the inorganic stacked structure corresponding to the redundant recessed groove in the pixel redundant region;

[0023] The step of using the thinned second photoresist strip as a mask to etch the inorganic stack structure while removing the second photoresist strip by ashing also includes: in the pixel redundant area, the redundant opening extends toward the first electrode to penetrate at least a portion of the first electrode.

[0024] Accordingly, an embodiment of the present application further provides a display panel, which includes:

[0025] substrate;

[0026] A thin film transistor structure layer, disposed on the substrate, wherein the thin film transistor structure layer includes a thin film transistor;

[0027] A first electrode is arranged on a side of the thin film transistor structure layer away from the substrate;

[0028] A first inorganic pixel definition layer is disposed on a side of the thin film transistor structure layer away from the substrate, the first inorganic pixel definition layer comprises a plurality of first pixel definition parts and a plurality of second pixel definition parts, the first pixel definition parts and the second pixel definition parts are cross-connected to form a plurality of pixel openings exposing the first electrode;

[0029] The second inorganic pixel definition layer is arranged on a side of the first inorganic pixel definition layer away from the substrate, and the second inorganic pixel definition layer includes a plurality of third pixel definition parts, and the extension direction of the third pixel definition parts is consistent with the extension direction of the first pixel definition parts, and one of the third pixel definition parts is correspondingly arranged on a side of the first pixel definition part away from the substrate.

[0030] Optionally, in some embodiments of the present application, the thickness of the third pixel definition portion is greater than the thickness of the first inorganic pixel definition layer.

[0031] Optionally, in some embodiments of the present application, the display panel includes a display area and a pixel redundancy area arranged on at least one side of the display area, and the first inorganic pixel definition layer and the second inorganic pixel definition layer are arranged in the display area and the pixel redundancy area; the pixel opening is located in the display area, and a redundant opening is also opened on the first inorganic pixel definition layer, and the redundant opening is located in the pixel redundancy area and passes through at least a portion of the first electrode.

[0032] The display panel and the preparation method thereof of the embodiment of the present application adopt a photomask to form a patterned photoresist layer, and use the photoresist layer as a mask to form a patterned first inorganic pixel definition layer and a second inorganic pixel definition layer. Since the baking temperature and baking time of the conventional preparation of the photoresist layer are lower than the heating temperature and heating time in the thermal process of preparing the organic pixel definition layer, the embodiment of the present application can reduce the impact of the thermal process on the thin film transistor, thereby reducing the risk of negative bias of the thin film transistor and saving masks. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a schematic diagram of a process for preparing a display panel provided in an embodiment of the present application;

[0034] Figure 2 is a schematic diagram of step B01 of the method for preparing a display panel provided in an embodiment of the present application;

[0035] Figure 3 is a schematic diagram of step B02 of the method for preparing a display panel provided in an embodiment of the present application;

[0036] Figure 4 is a schematic diagram of step B03 of the method for preparing a display panel provided in an embodiment of the present application;

[0037] Figure 5 is a schematic diagram of step B04 of the method for preparing a display panel provided in an embodiment of the present application;

[0038] Figure 6 is a schematic diagram of step B021 of another method for preparing a display panel provided in an embodiment of the present application;

[0039] Figure 7 is a schematic diagram of step B021 of another method for preparing a display panel provided in an embodiment of the present application;

[0040] Figure 8 is a schematic diagram of step B021 of another method for preparing a display panel provided in an embodiment of the present application;

[0041] Fig. 9 is a schematic diagram of step B021 of another method for preparing a display panel provided in an embodiment of the present application;

[0042] Fig.10 is a schematic top plan view of a display panel provided in an embodiment of the present application;

[0043] Fig.11 yes Fig.10 Schematic diagram of the cross section along line MN;

[0044] Fig.12This is another structural schematic diagram of a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0045] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, the various embodiments can be combined with each other but will not be repeated one by one, and in the absence of contrary instructions, the directional words used, such as "upper" and "lower", usually refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the drawings; while "inside" and "outside" refer to the outline of the device; the terms "first", "second", "third", etc. are used only as markings, and no numerical requirements are imposed or order is established.

[0046] The embodiments of the present application provide a display panel and a method for manufacturing the same, which are described in detail below. It should be noted that the description order of the following embodiments is not intended to limit the preferred order of the embodiments.

[0047] Please refer to Figure 1 The present invention provides a method for manufacturing a display panel, which comprises the following steps:

[0048] Step B01, forming a thin film transistor structure layer, a first electrode, a first inorganic layer and a second inorganic layer in sequence on a substrate, wherein the first inorganic layer and the second inorganic layer are stacked to form an inorganic stacked structure;

[0049] Step B02, forming a patterned photoresist layer on a side of the second inorganic layer away from the substrate; the photoresist layer includes a first photoresist bar and a second photoresist bar, the first photoresist bar and the second photoresist bar are cross-connected to form a plurality of openings, the thickness of the first photoresist bar is less than the thickness of the second photoresist bar, one of the openings corresponds to one of the first electrodes, and the pattern of the openings in a top view is within the region of the first electrode;

[0050] Step B03, using the photoresist layer as a mask, etching the inorganic stacked structure and ashing the photoresist layer at the same time, so as to remove the first photoresist strip, thin the second photoresist strip, and form a groove on a side of the inorganic stacked structure away from the substrate;

[0051] Step B04, using the thinned second photoresist strip as a mask, etching the inorganic stack structure while removing the second photoresist strip by ashing, so that the inorganic stack structure forms a stacked first inorganic pixel definition layer and a second inorganic pixel definition layer, the first inorganic pixel definition layer includes a plurality of first pixel definition parts and a plurality of second pixel definition parts, the first pixel definition parts and the second pixel definition parts are cross-connected to form a plurality of pixel openings exposing the first electrode; the second inorganic pixel definition layer includes a plurality of third pixel definition parts, the extension direction of the third pixel definition parts is consistent with the extension direction of the first pixel definition parts, and a third pixel definition part is correspondingly arranged on a side of a first pixel definition part away from the substrate.

[0052] It should be noted that the preparation process of the organic pixel definition layer in the prior art includes a thermal process, in which the required heating temperature is greater than 200 degrees Celsius and the heating time is greater than or equal to 30 minutes. Therefore, the thermal process has a greater impact on the thin film transistor, causing the stability of the thin film transistor to deteriorate and become negatively biased.

[0053] It should be understood that inorganic film layers are usually formed by chemical vapor deposition, which does not involve a thermal process. Therefore, using inorganic materials as pixel definition layers can avoid the thermal process of organic pixel definition layers.

[0054] The method for preparing a display panel in the embodiment of the present application uses a photomask to form a patterned photoresist layer, and uses the photoresist layer as a mask to form a patterned first inorganic pixel definition layer and a second inorganic pixel definition layer. Since the baking temperature and baking time of the conventional preparation of the photoresist layer are lower than the heating temperature and heating time in the thermal process of preparing the organic pixel definition layer, the embodiment of the present application can reduce the impact of the thermal process on the thin film transistor, thereby reducing the risk of negative bias of the thin film transistor and saving photomasks.

[0055] The following will describe a method for preparing a display panel according to an embodiment of the present application.

[0056] Please refer to Figure 2 Step B01, a thin film transistor structure layer 12, a first electrode 13, a first inorganic layer 14 and a second inorganic layer 15 are sequentially formed on a substrate 11. The first inorganic layer 14 and the second inorganic layer 15 are stacked to form an inorganic stacking structure w1.

[0057] Optionally, the substrate 11 may be a flexible substrate or a hard substrate. The material of the substrate 11 includes one of glass, sapphire, silicon, silicon dioxide, polyethylene, polypropylene, polystyrene, polylactic acid, polyethylene diphthalate, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyether sulfone, aromatic fluorotoluene containing polyarylate, polycyclic olefin, polyimide or polyurethane.

[0058] The thin film transistor structure layer 12 includes thin film transistors, and the channel material of the thin film transistors can be silicon semiconductor or metal oxide semiconductor. In the display panel of the embodiment of the present application, the thin film transistor is a metal oxide semiconductor thin film transistor.

[0059] The thin film transistor may be a top-gate, bottom-gate, double-gate or vertical-channel thin film transistor.

[0060] The first electrode 13 may be an anode or a cathode. The method for manufacturing a display panel in the embodiment of the present application is described by taking the first electrode 13 as an anode as an example.

[0061] Optionally, in some embodiments of the present application, the first inorganic layer 14 and the second inorganic layer 15 are formed by chemical vapor deposition. Optionally, the materials of the first inorganic layer 14 and the second inorganic layer 15 can be the same or different. Optionally, the materials of the first inorganic layer 14 and the second inorganic layer 15 can be inorganic materials such as silicon oxide, silicon nitride, aluminum oxide, zirconium oxide, etc.

[0062] Optionally, the thickness of the first inorganic layer 14 is between 1000 angstroms and 5500 angstroms, for example, 1000 angstroms, 1500 angstroms, 2000 angstroms, 2500 angstroms, 3000 angstroms, 3500 angstroms, 4000 angstroms, 4500 angstroms, 5000 angstroms or 5500 angstroms.

[0063] The thickness of the second inorganic layer 15 is between 5000 angstroms and 15000 angstroms, for example, it can be 5000 angstroms, 5500 angstroms, 6000 angstroms, 6500 angstroms, 7000 angstroms, 7500 angstroms, 8000 angstroms, 8500 angstroms, 9000 angstroms, 9500 angstroms, 10000 angstroms, 10500 angstroms, 11000 angstroms, 11500 angstroms, 12000 angstroms, 12500 angstroms, 13000 angstroms, 13500 angstroms, 14000 angstroms, 14500 angstroms or 15000 angstroms.

[0064] Among them, the second inorganic layer 15 is larger than the first inorganic layer 14, so that the thickness of the subsequent first inorganic pixel definition layer p1 is lower, and the thickness of the second inorganic pixel definition layer p2 is higher, so as to form separated pixel rows or pixel columns, which is convenient for subsequent ink to print the entire row or column.

[0065] Then go to step B02.

[0066] Please refer to Figure 3, step B02, forming a patterned photoresist layer 16 on a side of the second inorganic layer 15 away from the substrate 11. The photoresist layer 16 includes a first photoresist bar 161 and a second photoresist bar 162. The first photoresist bar 161 and the second photoresist bar 162 are cross-connected to form a plurality of openings 16a. The thickness of the first photoresist bar 161 is less than the thickness of the second photoresist bar 162. One of the openings 16a is arranged corresponding to one of the first electrodes 13. The pattern of the opening 16a in a top view is within the region of the first electrode 13.

[0067] Optionally, the drying temperature of the photoresist layer 16 is between 60 degrees Celsius and 150 degrees Celsius, for example, 60 degrees Celsius, 70 degrees Celsius, 80 degrees Celsius, 90 degrees Celsius, 100 degrees Celsius, 110 degrees Celsius, 120 degrees Celsius, 130 degrees Celsius, 140 degrees Celsius or 150 degrees Celsius.

[0068] The drying time of the photoresist layer 16 is less than or equal to 25 minutes, for example, it can be 25 minutes, 20 minutes, 15 minutes, 10 minutes or 5 minutes.

[0069] Since the drying temperature and drying time for preparing the photoresist layer 16 are lower than the heating temperature and heating time of the thermal process, a photomask is used to form a patterned photoresist layer 16, and the photoresist layer 16 is used as a mask to form the subsequent first inorganic pixel definition layer p1 and the second inorganic pixel definition layer p2. This can save two thermal processes and one photomask, thereby saving masks and reducing the risk of negative bias of thin film transistors.

[0070] Then go to step B03.

[0071] Please refer to Figure 4 In step B03, the inorganic stacked structure w1 is etched using the photoresist layer 16 as a mask while the photoresist layer 16 is ashed to remove the first photoresist strip 161, thin the second photoresist strip 162, and form a groove 15a on a side of the inorganic stacked structure w1 away from the substrate 11.

[0072] The groove 15a is formed in the area of ​​the opening 16a.

[0073] Optionally, the ambient temperature for ashing the photoresist layer 16 is between 15 degrees Celsius and 35 degrees Celsius, such as 15 degrees Celsius, 20 degrees Celsius, 25 degrees Celsius, 30 degrees Celsius or 35 degrees Celsius. That is, the photoresist layer 16 can be ashed at room temperature.

[0074] Optionally, at least one etching gas selected from fluorine-based gas, chlorine-based gas and inert gas may be used to simultaneously etch the photoresist layer 16 and the inorganic stacked structure w1 .

[0075] Optionally, the fluorine-based gas may be carbon tetrafluoride, trifluoromethane and sulfur hexafluoride. The chlorine-based gas may be chlorine. The inert gas may be argon.

[0076] Optionally, in step B03, the rate of etching the inorganic stacked structure w1 is a first rate, wherein the first rate may be a relatively fast rate, so as to quickly complete the etching of the second inorganic layer 15 and the first photoresist strip 161 and shorten the preparation time.

[0077] Optionally, in some embodiments of the present application, a thickness ratio of the first photoresist strip 161 and the second inorganic layer 15 is equal to an etching selection ratio of the first photoresist strip 161 and the second inorganic layer 15 .

[0078] For example, if the thickness ratio of the first photoresist strip 161 to the second inorganic layer 15 is 2:1, the etching selectivity ratio of the first photoresist strip 161 to the second inorganic layer 15 is also 2:1. Based on the etching selectivity ratio of the first photoresist strip 161 to the second inorganic layer 15 is also 2:1, then in the same unit time, when one unit volume of the second inorganic layer 15 is etched, two unit volumes of the first photoresist strip 161 are etched at the same time.

[0079] The thickness ratio and the etching selection ratio are set to be consistent, so that the second inorganic layer 15 is just etched through when the first photoresist strip 161 is etched, reducing the risk of over-etching and making it easier to obtain the etching condition of the second inorganic layer 15 based on the etching condition of the first photoresist strip 161.

[0080] Optionally, the etching rate of the photoresist layer 16 and the etching rate of the second inorganic layer 15 are both equal to the first rate. Based on this, it can be known that the thickness of the first photoresist strip 161 is equal to the thickness of the second inorganic layer 15, and the second inorganic layer 15 needs to form a second inorganic pixel definition layer p2 in a subsequent step to separate the pixel inks of adjacent rows or columns, so the thickness of the second inorganic layer 15 is relatively thick, which makes the thickness of the first photoresist strip 161 also should be relatively thick so that the first photoresist strip 161 and the second inorganic layer 15 can be etched through at the same time.

[0081] Therefore, the thickness of the first photoresist strip 161 is between 2 / 3 and 4 / 5 of the thickness of the second photoresist strip 162 , for example, it can be 2 / 3, 3 / 4 or 4 / 5.

[0082] Then proceed to step B04.

[0083] Please refer to Figure 5, step B04, using the thinned second photoresist bar 162 as a mask, etching the inorganic stacked structure w1 while removing the second photoresist bar 162 by ashing, so that the inorganic stacked structure w1 forms a stacked first inorganic pixel definition layer p1 and a second inorganic pixel definition layer p2. The first inorganic pixel definition layer p1 includes a plurality of first pixel definition parts p11 and a plurality of second pixel definition parts p12, and the first pixel definition parts p11 and the second pixel definition parts p12 are cross-connected to form a plurality of pixel openings pa1 exposing the first electrode. The second inorganic pixel definition layer p2 includes a plurality of third pixel definition parts p21, and the extension direction of the third pixel definition part p21 is consistent with the extension direction of the first pixel definition part p11. The third pixel definition part p21 is correspondingly arranged on a side of the first pixel definition part p11 away from the substrate 11.

[0084] Optionally, in step B04, the inorganic stacked structure w1 is etched so that the region of the inorganic stacked structure w1 corresponding to the groove 15a forms a pixel opening pa1 exposing the first electrode 13, the region of the inorganic stacked structure w1 corresponding to the first photoresist bar 161 removes the second inorganic layer 15 and retains the first inorganic layer 14, and the region of the inorganic stacked structure w1 corresponding to the second photoresist bar 162 retains the first inorganic layer 14 and the second inorganic layer 15. The patterned first inorganic layer 14 forms a first inorganic pixel definition layer p1, and the patterned second inorganic layer 15 forms a second inorganic pixel definition layer p2.

[0085] Optionally, in step B04, the etching rate of the inorganic stacked structure w1 is a second rate, and the second rate is smaller than the first rate.

[0086] It can be understood that in step B04 , the second rate that is smaller than the first rate is adopted, and a lower etching speed is adopted to reduce the risk of over-etching the first electrode 13 .

[0087] Optionally, the thickness of the second photoresist strip 162 after thinning is less than or equal to the thickness of the first inorganic layer 14 , and the etching rate of the second photoresist strip 162 is lower than the etching rate of the first inorganic layer 14 .

[0088] It can be understood that, based on the smaller thickness of the second photoresist strip 162 after thinning, by setting the etching rate of the second photoresist strip 162 to be smaller than the etching rate of the first inorganic layer 14, the thinner second photoresist strip 162 can be used as a mask to etch the thicker first inorganic layer 14, thereby achieving the effect of thinning the thickness of the photoresist layer 16.

[0089] Then go to step B05.

[0090] Step B05, forming a light-emitting layer and a second electrode on the first inorganic pixel definition layer p1 and the second inorganic pixel definition layer p2 in sequence. The second electrode is an anode or a cathode. In the embodiment of the present application, the second electrode is a cathode.

[0091] Optionally, the light-emitting layer can be formed by inkjet printing or evaporation.

[0092] This completes the preparation process of the display panel of the embodiment of the present application.

[0093] Optionally, in some embodiments of the present application, please refer to Figures 6 to 9 ,exist Figures 6 to 9 In the method for preparing the display panel of the embodiment of the present application, a photomask is used which includes not only Figures 2 to 5 The manufacturing process steps of the corresponding embodiment further form a redundant opening 15 b penetrating at least part of the first electrode 13 in the pixel redundant area DA.

[0094] Optionally, step B02 includes the following steps:

[0095] Please refer to Figure 6 , step B021, forming a first pattern of a photoresist layer 16 on a side of the second inorganic layer 15 away from the substrate 11. The first pattern of the photoresist layer 16 includes a first initial photoresist bar 061, a second initial photoresist bar 062 and a third initial photoresist portion 063. The first pattern of the photoresist layer 16 is also provided with an initial opening 06a exposing the inorganic stacked structure w1, and the third initial photoresist portion 063 is located in the display area AA and is connected to the first initial photoresist bar 061 and the second initial photoresist bar 062 around it. The initial opening 06a is located in the pixel redundant area DA and is provided with the first initial photoresist bar 061 and the second initial photoresist bar 062 around it. The third initial photoresist portion 063 and the initial opening 06a correspond to one of the first electrodes 13 respectively.

[0096] Please refer to Figure 7, step B022, using the first pattern of the photoresist layer 16 as a mask, etching the inorganic stacked structure w1, while ashing the first pattern of the photoresist layer 16 and removing the third initial photoresist portion 063, to form a second pattern of the photoresist layer 16, the second pattern of the photoresist layer 16 comprising a first photoresist bar 161 and a second photoresist bar 162, the first photoresist bar 161 and the second photoresist bar 162 are cross-connected to form a plurality of openings 16a, the thickness of the first photoresist bar 161 is less than the thickness of the second photoresist bar 162. In the display area AA, one of the openings 16a is arranged corresponding to one of the first electrodes 13. The pattern of the opening 16a in a top view is within the region of the first electrode 13. In the pixel redundant area DA, a redundant recessed groove ry1 is formed in the region of the inorganic stacked structure w1 corresponding to the initial opening 06a.

[0097] Then, go to step B03.

[0098] Please refer to Figure 8 In step B03, the inorganic stacked structure w1 is etched using the photoresist layer 16 as a mask while the photoresist layer 16 is ashed, and the method further includes: in the pixel redundant area DA, a redundant opening 15b exposing the first electrode 13 is formed in the area of ​​the inorganic stacked structure w1 corresponding to the redundant recess groove ry1.

[0099] Then, proceed to step B04.

[0100] Please refer to Fig. 9 In step B04, the inorganic stacked structure w1 is etched using the thinned second photoresist strip 162 as a mask, and the second photoresist strip 162 is removed by ashing. It also includes: in the pixel redundant area DA, the redundant opening 15b extends toward the direction of the first electrode 13 to penetrate at least a portion of the first electrode 13.

[0101] Optionally, the redundant opening 15 b may penetrate part of the first electrode 13 , or may fully penetrate the first electrode 13 to allow more ink solvent to pass through.

[0102] It should be noted that Figures 6 to 9 The corresponding method for preparing the display panel includes: Figures 1 to 5 All steps of the method for preparing a display panel of the corresponding embodiment. Figures 1 to 5 The process may correspond to the preparation process of the display area AA of the display panel.

[0103] It is understandable that in Figures 6 to 9In the steps of the preparation method, the embodiment of the present application uses a photomask to form a patterned photoresist layer 16, and uses the photoresist layer 16 as a mask to form a patterned first inorganic pixel definition layer p1 and a second inorganic pixel definition layer p2. A pixel opening pa1 is formed in the display area AA, and a redundant opening 15b that penetrates at least part of the first electrode 13 is formed in the pixel redundant area DA to deepen the depth of the redundant opening 15b. Moreover, the embodiment of the present application can also reduce the influence of the thermal process on the thin film transistor, thereby reducing the risk of negative bias of the thin film transistor and saving photomasks.

[0104] Secondly, since the redundant opening 15b penetrates at least a portion of the first electrode 13, the redundant opening 15b is deepened to increase the volume of the redundant opening 15b, so that the redundant opening 15b can accommodate more ink of the light-emitting layer material. When the printed ink is heated, the pixel redundant area DA that accommodates more ink has more solvents, which can increase the saturated vapor pressure of the edge area to balance the overall drying atmosphere, thereby improving the thickness uniformity of the light-emitting layer.

[0105] Please refer to Fig.10 and Fig.11 The embodiment of the present application further provides a display panel 100, which includes a substrate 11, a thin film transistor structure layer 12, a first electrode 13, a first inorganic pixel definition layer p1 and a second inorganic pixel definition layer p2.

[0106] The thin film transistor structure layer 12 is disposed on the substrate 11 . The thin film transistor structure layer 12 includes a thin film transistor. A first electrode 13 is disposed on a side of the thin film transistor structure layer 12 away from the substrate 11 .

[0107] The first inorganic pixel definition layer p1 is disposed on a side of the thin film transistor structure layer 12 away from the substrate 11. The first inorganic pixel definition layer p1 includes a plurality of first pixel definition portions p11 and a plurality of second pixel definition portions p12, and the first pixel definition portions p11 and the second pixel definition portions p12 are cross-connected to form a plurality of pixel openings pa1 exposing the first electrodes 13.

[0108] The second inorganic pixel definition layer p2 is disposed on a side of the first inorganic pixel definition layer p1 away from the substrate 11. The second inorganic pixel definition layer p2 includes a plurality of third pixel definition portions p21, and the extension direction of the third pixel definition portions p21 is consistent with the extension direction of the first pixel definition portion p11. One of the third pixel definition portions p21 is correspondingly disposed on a side of one of the first pixel definition portions p11 away from the substrate 11.

[0109] It should be noted that the display panel 100 of the embodiment of the present application is prepared by the display panel preparation method of any one of the above embodiments.

[0110] Optionally, the extension direction of the first pixel definition portion p11 is perpendicular to the extension direction of the second pixel definition portion p12, but the present invention is not limited thereto, for example, the two may also be non-perpendicularly intersecting.

[0111] The display panel 100 of the embodiment of the present application adopts a first inorganic pixel definition layer p1 and a second inorganic pixel definition layer p2. Compared with the organic pixel definition layer, the embodiment of the present application can reduce the impact of the thermal process of the organic pixel definition layer on the thin film transistor, thereby reducing the risk of negative bias of the thin film transistor and saving masks.

[0112] Optionally, in some embodiments of the present application, the thickness of the third pixel definition portion p21 is greater than the thickness of the first inorganic pixel definition layer p1.

[0113] The third pixel definition part p21 is disposed on the first inorganic pixel definition layer p1 and is consistent with the extension direction of the first pixel definition part p11, so that the third pixel definition parts p21 are arranged at intervals in the extension direction of the second pixel definition part p12. Two adjacent third pixel definition parts p21 define a pixel column, and the same color of luminescent material can be printed in the same pixel column. The third pixel definition part p21 can avoid mixing of inks in adjacent pixel columns.

[0114] Optionally, the thickness of the first inorganic pixel definition layer p1 is between 1000 angstroms and 5500 angstroms, for example, 1000 angstroms, 1500 angstroms, 2000 angstroms, 2500 angstroms, 3000 angstroms, 3500 angstroms, 4000 angstroms, 4500 angstroms, 5000 angstroms or 5500 angstroms. The thickness of the second inorganic pixel definition layer p2 is between 5000 angstroms and 15000 angstroms, for example, it can be 5000 angstroms, 5500 angstroms, 6000 angstroms, 6500 angstroms, 7000 angstroms, 7500 angstroms, 8000 angstroms, 8500 angstroms, 9000 angstroms, 9500 angstroms, 10000 angstroms, 10500 angstroms, 11000 angstroms, 11500 angstroms, 12000 angstroms, 12500 angstroms, 13000 angstroms, 13500 angstroms, 14000 angstroms, 14500 angstroms or 15000 angstroms.

[0115] Please refer to Fig.12 , Fig.12 FIG. 1 is another schematic diagram of the structure of the display panel 100 according to an embodiment of the present application. Fig.12 The parts of the display panel 100 that are different from those of any of the above embodiments will be described in order to avoid redundant description. Figure 10 to Figure 11 The structure of the corresponding display panel 100 is similar or the same, so it will not be described again here.

[0116] exist Fig.12In some embodiments of the present application, the display panel 100 includes a display area AA and a pixel redundancy area DA disposed on at least one side of the display area AA, and the first inorganic pixel definition layer p1 and the second inorganic pixel definition layer p2 are disposed in the display area AA and the pixel redundancy area DA. The pixel opening pa1 is located in the display area AA. A redundancy opening 15b is also provided on the first inorganic pixel definition layer p1, and the redundancy opening 15b is located in the pixel redundancy area DA and penetrates at least a portion of the first electrode 13.

[0117] Optionally, the redundant opening 15 b may penetrate part of the first electrode 13 , or may fully penetrate the first electrode 13 to allow more ink solvent to pass through.

[0118] In which, based on the redundant opening 15b penetrating at least a portion of the first electrode 13, the redundant opening 15b is deepened to increase the volume of the redundant opening 15b, so that the redundant opening 15b can accommodate more ink of the light-emitting layer material. When the printed ink is heated, the pixel redundant area DA that accommodates more ink has more solvents, which can increase the saturated vapor pressure of the edge area to balance the overall drying atmosphere, thereby improving the thickness uniformity of the light-emitting layer.

[0119] The above is a detailed introduction to a display panel and a preparation method thereof provided in an embodiment of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for preparing a display panel, characterized in that: The following steps are involved: A thin film transistor structure layer, a first electrode, a first inorganic layer and a second inorganic layer are sequentially formed on a substrate, wherein the first inorganic layer and the second inorganic layer are stacked to form an inorganic stacked structure; A patterned photoresist layer is formed on a side of the second inorganic layer away from the substrate; the photoresist layer includes a first photoresist bar and a second photoresist bar, the first photoresist bar and the second photoresist bar are cross-connected to form a plurality of openings, the thickness of the first photoresist bar is less than the thickness of the second photoresist bar, one of the openings corresponds to one of the first electrodes, and the pattern of the openings in a top view is within the region of the first electrode; Using the photoresist layer as a mask, etching the inorganic stacked structure, and at the same time ashing the photoresist layer, so as to remove the first photoresist strip, thin the second photoresist strip, and form a groove on a side of the inorganic stacked structure away from the substrate; Using the thinned second photoresist strip as a mask, the inorganic stack structure is etched while the second photoresist strip is removed by ashing, so that the inorganic stack structure forms a stacked first inorganic pixel definition layer and a second inorganic pixel definition layer, the first inorganic pixel definition layer includes a plurality of first pixel definition parts and a plurality of second pixel definition parts, the first pixel definition parts and the second pixel definition parts are cross-connected to form a plurality of pixel openings exposing the first electrode; the second inorganic pixel definition layer includes a plurality of third pixel definition parts, the extension direction of the third pixel definition parts is consistent with the extension direction of the first pixel definition parts, and a third pixel definition part is correspondingly arranged on a side of a first pixel definition part away from the substrate.

2. The method for preparing a display panel according to claim 1, characterized in that: The step of using the thinned second photoresist strip as a mask to etch the inorganic stacked structure and remove the second photoresist strip by ashing comprises: The inorganic stacked structure is etched so that a pixel opening exposing the first electrode is formed in an area of ​​the inorganic stacked structure corresponding to the groove, the second inorganic layer is removed and the first inorganic layer is retained in an area of ​​the inorganic stacked structure corresponding to the first photoresist strip, and the first inorganic layer and the second inorganic layer are retained in an area of ​​the inorganic stacked structure corresponding to the second photoresist strip; wherein the patterned first inorganic layer forms a first inorganic pixel definition layer, and the patterned second inorganic layer forms a second inorganic pixel definition layer.

3. The method for preparing a display panel according to claim 2, characterized in that: In the step of ashing the photoresist layer while etching the inorganic stacked structure using the photoresist layer as a mask, the rate of etching the inorganic stacked structure is a first rate; In the step of etching the inorganic stacked structure using the thinned second photoresist strip as a mask and removing the second photoresist strip by ashing, a rate of etching the inorganic stacked structure is a second rate, which is less than the first rate.

4. The method for preparing a display panel according to claim 3, characterized in that: The thickness of the first photoresist strip is between 2 / 3 and 4 / 5 of the thickness of the second photoresist strip; In the step of ashing the photoresist layer while etching the inorganic stacked structure using the photoresist layer as a mask, a thickness ratio of the first photoresist strip and the second inorganic layer is equal to an etching selection ratio of the first photoresist strip and the second inorganic layer.

5. The method for preparing a display panel according to claim 4, characterized in that: While etching the inorganic stacked structure using the thinned second photoresist strip as a mask, in the step of removing the second photoresist strip by ashing, the thickness of the thinned second photoresist strip is less than or equal to the thickness of the first inorganic layer, and the etching rate of the second photoresist strip is less than the etching rate of the first inorganic layer.

6. The method for preparing a display panel according to any one of claims 1 to 5, characterized in that: In the step of forming a patterned photoresist layer, the drying temperature of the photoresist layer is between 60 degrees Celsius and 150 degrees Celsius, and the drying time of the photoresist layer is less than 25 minutes.

7. The method for preparing a display panel according to any one of claims 1 to 5, characterized in that: Forming a patterned photoresist layer on a side of the second inorganic layer away from the substrate comprises the following steps: A first pattern of a photoresist layer is formed on a side of the second inorganic layer away from the substrate, the first pattern of the photoresist layer includes a first initial photoresist bar, a second initial photoresist bar and a third initial photoresist portion, the first pattern of the photoresist layer is further provided with an initial opening exposing the inorganic stacked structure, the third initial photoresist portion is located in the display area and is connected to the first initial photoresist bar and the second initial photoresist bar around it, the initial opening is located in the pixel redundant area and is provided with the first initial photoresist bar and the second initial photoresist bar around it, and the third initial photoresist portion and the initial opening correspond to one of the first electrodes respectively; Using the first pattern of the photoresist layer as a mask, while etching the inorganic stacked structure, the first pattern of the photoresist layer is ashed and the third initial photoresist portion is removed to form a second pattern of the photoresist layer, wherein the second pattern of the photoresist layer includes a first photoresist bar and a second photoresist bar, wherein the first photoresist bar and the second photoresist bar are cross-connected to form a plurality of openings, wherein the thickness of the first photoresist bar is less than the thickness of the second photoresist bar, and in the display area, one of the openings corresponds to one of the first electrodes, and the pattern of the openings in a top view is within the region of the first electrode; in the pixel redundant region, a redundant recessed groove is formed in the region of the inorganic stacked structure corresponding to the initial opening; The step of etching the inorganic stacked structure using the photoresist layer as a mask and ashing the photoresist layer at the same time also includes: forming a redundant opening exposing the first electrode in a region of the inorganic stacked structure corresponding to the redundant recessed groove in the pixel redundant region; The step of using the thinned second photoresist strip as a mask to etch the inorganic stack structure while removing the second photoresist strip by ashing also includes: in the pixel redundant area, the redundant opening extends toward the first electrode to penetrate at least a portion of the first electrode.

8. A display panel, characterized in that: include: substrate; A thin film transistor structure layer, disposed on the substrate, wherein the thin film transistor structure layer includes a thin film transistor; A first electrode is arranged on a side of the thin film transistor structure layer away from the substrate; A first inorganic pixel definition layer is disposed on a side of the thin film transistor structure layer away from the substrate, the first inorganic pixel definition layer comprises a plurality of first pixel definition parts and a plurality of second pixel definition parts, the first pixel definition parts and the second pixel definition parts are cross-connected to form a plurality of pixel openings exposing the first electrode; The second inorganic pixel definition layer is arranged on a side of the first inorganic pixel definition layer away from the substrate, and the second inorganic pixel definition layer includes a plurality of third pixel definition parts, and the extension direction of the third pixel definition parts is consistent with the extension direction of the first pixel definition parts, and one of the third pixel definition parts is correspondingly arranged on a side of the first pixel definition part away from the substrate.

9. The display panel according to claim 8, characterized in that: The thickness of the third pixel definition portion is greater than the thickness of the first inorganic pixel definition layer.

10. The display panel according to any one of claims 8 to 9, characterized in that: The display panel includes a display area and a pixel redundancy area arranged on at least one side of the display area, and the first inorganic pixel definition layer and the second inorganic pixel definition layer are arranged in the display area and the pixel redundancy area; the pixel opening is located in the display area, and a redundant opening is also opened on the first inorganic pixel definition layer, and the redundant opening is located in the pixel redundancy area and passes through at least a portion of the first electrode.

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