RRAM storage unit structure and simulation method thereof

Abstract

The invention discloses an RRAM memory cell structure and a simulation method thereof, the RRAM memory cell structure comprises a bottom electrode, a switch dielectric layer and a top electrode, the switch dielectric layer is arranged on the bottom electrode, the switch dielectric layer comprises an upper area layer and a lower area layer, the lower area layer is located above the bottom electrode, and the top electrode is located above the upper area layer. The upper region layer is arranged above the lower region layer, the top electrode is arranged on the upper region layer, the upper region layer and the lower region layer are oxide layers, and the oxygen vacancy concentration of the lower region layer is higher than that of the upper region layer. According to the RRAM storage unit structure and the simulation method thereof, the Pt / HfO2 / Ti electrothermal coupling model is established, and then the performance is improved by inserting ZnO into the dielectric layer. And meanwhile, multi-level data storage is realized.

Description

Technical Field

[0001] The present invention relates to the field of memory technology, and in particular to a RRAM storage unit structure and a simulation method thereof. Background Art

[0002] With the rapid development of information technology, the requirements for storage devices are getting higher and higher. Traditional storage technology is gradually unable to meet the needs of modern computer systems in terms of storage density, power consumption and speed. Resistive random access memory (RRAM) is considered to be a strong candidate for new storage devices in the future due to its high-speed storage, low power consumption, non-volatility and easy integration. However, the existing RRAM technology still has some problems, such as high formation voltage, large power consumption and single-value storage, which limits its application in high-density storage and low-power devices.

[0003] In recent years, many studies have been devoted to optimizing the performance of RRAM devices by changing their structure. For example, by inserting different materials into the dielectric layer of RRAM to adjust the switching characteristics of the device, reduce the formation voltage, and increase the switching ratio. As a common RRAM dielectric material, HfO2 is widely used in RRAM devices due to its good compatibility with existing CMOS processes, high stability, and good durability. However, HfO2-based RRAM still has certain performance bottlenecks, such as higher formation voltage and lower switching ratio. Summary of the invention

[0004] In order to solve the technical problems existing in the background technology, the present invention proposes a RRAM storage unit structure and a simulation method thereof.

[0005] The present invention proposes an RRAM storage cell structure, comprising: a bottom electrode, a switching dielectric layer and a top electrode, wherein the switching dielectric layer is arranged on the bottom electrode, the switching dielectric layer comprises an upper region layer and a lower region layer, the lower region layer is located above the bottom electrode, the upper region layer is arranged above the lower region layer, the top electrode is arranged on the upper region layer, the upper region layer and the lower region layer are both oxide layers, and the oxygen vacancy concentration of the lower region layer is higher than the oxygen vacancy concentration of the upper region layer.

[0006] Preferably, the upper region layer is a ZnO layer with a thickness of 1-5 nm.

[0007] Preferably, the lower region layer is a HfOx layer obtained by direct oxygen plasma oxidation of transition metal Hf, and has a thickness of 1-10 nm.

[0008] Preferably, the top electrode is an inert metal layer with a thickness of 10-100 nm.

[0009] Preferably, the top electrode is a Pt layer with a thickness of 20 nm.

[0010] Preferably, the bottom electrode is a Ti layer with a thickness of 20 nm.

[0011] A simulation method for a RRAM memory cell structure is applied to any one of the above RRAM memory cell structures, the simulation method comprising:

[0012] Connecting the prepared RRAM memory cell structure to a test system, applying a preset positive scan voltage between the top electrode and the bottom electrode for N seconds to complete the simulation of the RRAM memory cell structure;

[0013] A test type and a scan voltage threshold corresponding to the test type are obtained, and the scan voltage threshold is applied between the top electrode and the bottom electrode to complete a corresponding test, wherein the test type specifically includes a multi-level storage test, a reset test, and a set test.

[0014] Preferably, the test type is specifically a reset test, and the test type and the scanning voltage threshold corresponding to the test type are obtained, and the scanning voltage threshold is applied between the top electrode and the bottom electrode to complete the corresponding test, specifically: a scanning voltage of -2.4V is applied to the RRAM memory cell structure to perform a reset process for 4 seconds, and the change in the oxygen vacancy concentration distribution is observed to complete the test.

[0015] Preferably, the test type is specifically a set test; the test type and the scanning voltage threshold corresponding to the test type are obtained, and the scanning voltage threshold is applied between the top electrode and the bottom electrode to complete the corresponding test, specifically: a 3.3V triangle wave voltage is applied to the RRAM storage cell structure for a setting process, which lasts for 4 seconds. When the oxygen vacancies reform the conductive filaments, the test is completed.

[0016] Preferably, the test type is specifically a multi-level storage test, and the test type and the scanning voltage threshold corresponding to the test type are obtained, and the scanning voltage threshold is applied between the top electrode and the bottom electrode to complete the corresponding test, specifically: different cutoff voltages of -2.3V to -2.8V are applied to the RRAM storage cell structure to achieve multi-level storage, and after each cutoff voltage is applied, wait for the resistance state to stabilize, and then apply a pulse voltage of 0.2V with a duration of 0.2 seconds, and read the resistance value of HRS to complete the test.

[0017] In the present invention, the proposed RRAM memory cell structure and its simulation method established an electrothermal coupling model of Pt / HfO2 / Ti, and then improved the performance by inserting ZnO in the dielectric layer. Subsequently, the two models were simulated to study the formation, reset and setting processes. The distribution of oxygen vacancy concentration, temperature and IV characteristics were analyzed. It can be seen that inserting ZnO can effectively speed up the forming and reduce the forming, resetting and setting voltages. In addition, multi-level data storage is realized, and different resistance values ​​are achieved by adjusting the cut-off voltage, thus demonstrating its great potential in high-density memory devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic diagram of the Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti device structures of an RRAM storage unit structure proposed by the present invention;

[0019] Figure 2 A graph showing the trend of oxygen vacancy concentration and current change in the forming process of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti in a RRAM memory cell structure proposed by the present invention;

[0020] Figure 3 This is a diagram of oxygen vacancy distribution of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti at different voltages for a RRAM memory cell structure proposed by the present invention;

[0021] Figure 4 A graph showing the change in oxygen vacancy concentration of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti in a RRAM memory cell structure proposed by the present invention during the reset process;

[0022] Figure 5 A graph showing the change in oxygen vacancy concentration of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti in the set process of an RRAM memory cell structure proposed by the present invention;

[0023] Figure 6 The IV characteristic diagram of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti in the switching process of an RRAM memory cell structure proposed by the present invention;

[0024] Figure 7 The IV characteristic diagram of a Pt / HfO2 / ZnO / Ti device of an RRAM storage cell structure proposed by the present invention during the set and reset processes;

[0025] Figure 8 A diagram showing the change in HRS resistance value during a multi-value storage process of an RRAM storage cell structure proposed by the present invention.

[0026] Fig. 9 A schematic diagram of the workflow of a simulation method for an RRAM storage cell structure proposed in the present invention. DETAILED DESCRIPTION

[0027] Reference Figure 1-9 The present invention proposes an RRAM storage cell structure, comprising: a bottom electrode, a switching dielectric layer and a top electrode, wherein the switching dielectric layer is arranged on the bottom electrode, the switching dielectric layer comprises an upper region layer and a lower region layer, the lower region layer is located above the bottom electrode, the upper region layer is arranged above the lower region layer, the top electrode is arranged on the upper region layer, both the upper region layer and the lower region layer are oxide layers, and the oxygen vacancy concentration of the lower region layer is higher than the oxygen vacancy concentration of the upper region layer.

[0028] In this embodiment, the upper region layer is a ZnO layer, and its thickness is 1-5 nm.

[0029] Specifically, ZnO, as a third-generation semiconductor material, has high carrier mobility, good electrical stability and low power consumption, and therefore has broad application prospects in the field of RRAM. Inserting a ZnO layer into an HfO2-based RRAM device is expected to further reduce power consumption, improve the switching ratio, and achieve multi-value storage. The present invention proposes a new structure of inserting a ZnO layer into an HfO2-based RRAM device, which can effectively improve the performance of the device.

[0030] In this embodiment, the lower region layer is a HfOx layer obtained by direct oxygen plasma oxidation of transition metal Hf, and has a thickness of 1-10 nm.

[0031] In this embodiment, the top electrode is an inert metal layer with a thickness of 10-100 nm.

[0032] In this embodiment, the top electrode is a Pt layer with a thickness of 20 nm.

[0033] In this embodiment, the bottom electrode is specifically a Ti layer with a thickness of 20 nm.

[0034] In this embodiment, for the forming of the conductive filaments inside the RRAM, a scanning voltage is applied between the top electrode (TE) and the bottom electrode (BE), and then under the influence of the electric field, oxygen vacancies will migrate from the high concentration area (HfOx) to the low concentration area (ZnO), and a large number of oxygen vacancies will move unidirectionally in a short time, and then CF is formed and connects TE and HfOx, which corresponds to the forming process of RRAM. After forming, by changing the polarity and value of the scanning voltage, CF switches between the broken and re-formed states, corresponding to the reset and set processes of the device, respectively. Specifically, forming is the forming process.

[0035] Specifically, the oxygen vacancies are expected to be uniformly distributed throughout the oxide layer. The electric field (E), temperature (T), and oxygen vacancy concentration (n D ) all affect the conductivity of the oxide as follows:

[0036]

[0037] Among them, E ac represents the activation energy required for electronic conduction, σ0 is the prefactor, and σ represents Poole–Frenkel (PF) conduction.

[0038]

[0039] The change of oxygen vacancy concentration and the expression of oxygen vacancy migration are used in establishing this model:

[0040]

[0041] Among them, J diff and J drift Denote diffusion and drift fluxes, respectively. D is the diffusion coefficient of Vo, v represents the drift velocity, and D and v are given by:

[0042]

[0043] Among them, E a represents the activation energy required for oxygen vacancies to diffuse, d represents the distance that oxygen ions jump, and ν represents the frequency with which oxygen ions attempt to escape.

[0044] After applying a voltage, the non-equilibrium concentration of Vo in the dielectric layer leads to a significant local electric field. This field destroys the covalent bonds in the HfO2 molecules, resulting in the formation of Hf and free oxygen ions. At the interface between the oxide and the metal, the oxygen ions can combine to form oxygen molecules or dissociate to form oxygen atoms. At the same time, HfO2 produces new Vo, increasing the local concentration. In addition, oxygen vacancies may also recombine. The following equation illustrates the formation and recombination of oxygen vacancies:

[0045]

[0046] Where A represents the correlation coefficient of vibration frequency; E b represents the activation energy of oxygen vacancy transition; E c represents the relaxation energy during the recombination process of oxygen vacancies, and b is the minimum lattice size. In summary, the migration equation of oxygen vacancies describes the D The rate of change over time is as follows:

[0047]

[0048] Where S is the Soret coefficient. Since the diffusion constants are different at different temperatures, Soret diffusion refers to the movement of oxygen vacancies along the temperature gradient; ψ is the potential, and σ is the conductivity. a is 0.05nm; f is 10 13 Hz; E a is 1.5eV; PF coefficient is 5.48e-4; T is 293K; E b is 1eV; b is 0.05nm; E c is 0.8eV.

[0049] In this example, the forming of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti:

[0050] First, the forming of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti was achieved by applying a positive scanning voltage. Figure 2 (a) and Figure 2 (d) shows the change of the scanning voltage applied to the two structures over time, and then the oxygen vacancy concentration in the forming Figure 2 (b) and Figure 2 (e)) and current (as shown Figure 2 (c) and Figure 2 (f) shows the changes in

[0051] Figure 2 Variation of applied voltage, oxygen vacancy concentration and current with time in Pt / HfO2 / Ti(a)-(c) and Pt / HfO2 / ZnO / Ti(d)-(f) forming.

[0052] like Figure 2 As shown in (a)-(c), the initial growth of conductive filaments was achieved by applying a positive sweep voltage of 5.8V (held for 4 seconds) on the Pt / HfO2 / Ti device. Initially, the changes in oxygen vacancy concentration and current over time were not significant. However, when the threshold voltage was reached, the current and oxygen vacancy concentration increased exponentially, indicating the formation of conductive filaments inside the device. Figure 2 (e) and Figure 2(f) It can be seen that the trend of the current and oxygen vacancy concentration in the forming of Pt / HfO2 / ZnO / Ti is similar to that of Pt / HfO2 / Ti. Figure 2 (a) and Figure 2 (d) It can be seen that after the insertion of ZnO, the applied voltage is reduced from 5.8 V to 4.4 V.

[0053] In order to further study the forming of the conductive filaments, a three-dimensional image of the change in oxygen vacancy concentration was drawn, such as Figure 3 As shown, Figure 4 It shows the relationship between temperature and z-axis in forming of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti.

[0054] Figure 3 Changes in oxygen vacancy concentration during forming: (a)-(c) changes in Pt / HfO2 / Ti at 5.1V, 5V and 4.5V; (d)-(f) changes in Pt / HfO2 / ZnO / Ti at 3.52V, 3.82V and 4.2V.

[0055] Figure 4 Temperature distribution along the z-axis of Pt / HfO2 / Ti(a) and Pt / HfO2 / ZnO / Ti(b) during forming.

[0056] like Figure 3 As shown in (a)-(c), for the Pt / HfO2 / Ti device, forming begins when the slope of the applied voltage decreases. When the voltage drops to 5.1V, oxygen vacancies begin to accumulate in the central region of the device. When the applied voltage drops to 5V, these vacancies begin to diffuse from the center to other regions with low oxygen vacancy concentration. When the voltage drops below 4.5V, complete diffusion of oxygen vacancies occurs, forming stable conductive filaments. It is worth noting that an elliptical conductive filament structure is formed in the Pt / HfO2 / Ti, while a conical conductive filament is formed in the Pt / HfO2 / ZnO / Ti device (as shown in Figure 2). Figure 3 (f)).

[0057] Reference Figure 1-9 The present invention proposes a simulation method for a RRAM memory cell structure, which is applied to the above-mentioned RRAM memory cell structure. The simulation method comprises:

[0058] Connecting the prepared RRAM memory cell structure to a test system, applying a preset positive scan voltage between the top electrode and the bottom electrode for N seconds to complete the simulation of the RRAM memory cell structure;

[0059] A test type and a scan voltage threshold corresponding to the test type are obtained, and the scan voltage threshold is applied between the top electrode and the bottom electrode to complete the corresponding test. The test type specifically includes a multi-level storage test, a reset test, and a set test.

[0060] In this embodiment, the test type is specifically a reset test. The test type and the scanning voltage threshold corresponding to the test type are obtained, and the scanning voltage threshold is applied between the top electrode and the bottom electrode to complete the corresponding test, specifically: a scanning voltage of -2.4V is applied to the RRAM memory cell structure to perform a reset process for 4 seconds, and the change in the oxygen vacancy concentration distribution is observed to complete the test.

[0061] In this embodiment, the test type is specifically a set test; the test type and the scanning voltage threshold corresponding to the test type are obtained, and the scanning voltage threshold is applied between the top electrode and the bottom electrode to complete the corresponding test, specifically: a 3.3V triangle wave voltage is applied to the RRAM storage cell structure for a setting process, which lasts for 4 seconds. When the oxygen vacancies reform the conductive filaments, the test is completed.

[0062] In this embodiment, the test type is specifically a multi-level storage test. The test type and the scanning voltage threshold corresponding to the test type are obtained, and the scanning voltage threshold is applied between the top electrode and the bottom electrode to complete the corresponding test, specifically: different cutoff voltages of -2.3V to -2.8V are applied to the RRAM storage cell structure to achieve multi-level storage. After each cutoff voltage is applied, wait for the resistance state to stabilize, and then apply a pulse voltage of 0.2V with a duration of 0.2 seconds to read the resistance value of the HRS to complete the test.

[0063] In this embodiment, the reset and set processes of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti are as follows:

[0064] After the forming process, the reset process of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti was simulated, and a scanning voltage of -4V and -2.4V was applied (duration of 4 seconds), respectively. The reset process refers to the breakage of the conductive filament. The oxygen vacancy concentration distribution of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti during the reset process is shown in Figure 2. Figure 4 As shown in (a)-(f). Figure 4 (a) shows that the oxygen vacancy concentration in the dielectric layer of Pt / HfO2 / Ti has not changed significantly, which also means that the resistance has not changed significantly. As the potential of the top electrode increases, the oxygen vacancies begin to diffuse to both sides about 1nm below the interface between the top electrode and the dielectric layer, and the fracture of the conductive filament area becomes more and more obvious. Figure 4 The faintly visible fracture area in (b) is Figure 4 (c) It develops into a complete fracture gap. Figure 4 (c) and Figure 4 (f) shows the oxygen vacancy concentration distribution of the two structures after the complete reset process. Figure 4 (c) Compared with Figure 4 The filament break position in (f) is significantly higher. This is because the filament break position of the Pt / HfO2 / ZnO / Ti RRAM device is at the HfO2 / ZnO interface, while the filament break position of the Pt / HfO2 / Ti device is at the interface between the top electrode and HfO2.

[0065] Figure 4 Changes in oxygen vacancy concentration during reset: (a)-(c) Pt / HfO2 / Ti; (d)-(f) Pt / HfO2 / ZnO / Ti.

[0066] The set process involves the reformation of conductive filaments through oxygen vacancies. Figure 5 (a)-(c) show the change diagram of Pt / HfO2 / Ti. Figure 5 (d)-(f) describe the changes of Pt / HfO2 / ZnO / Ti. A triangle wave voltage of 4V and 3.3V (duration of 4 seconds) was applied respectively. By comparison Figure 5 (b) with Figure 5 (e) and Figure 5 (c) with Figure 5 (f), it can be observed that compared with the Pt / HfO2 / Ti structure, the conductive filament formation rate of Pt / HfO2 / ZnO / Ti is faster and the set voltage is reduced by 0.7V. Figure 5 (d) and Figure 5 As shown in (e), initially, oxygen vacancies accumulate in the center to form an elongated region with high concentration, which then expands outward to form a tapered conductive filament (e.g. Figure 5 (f)).

[0067] Figure 5 Changes in oxygen vacancy concentration during the set process: (a)-(c) changes in Pt / HfO2 / Ti at 2.9V, 3.78V and 4V; (d)-(f) changes in Pt / HfO2 / ZnO / Ti at 1.18V, 2.37V and 3.2V.

[0068] Figure 6 The current-voltage (IV) diagrams of Pt / HfO2 / Ti and Pt / HfO2 / ZnO / Ti during the switching process are given. The switching ratio of Pt / HfO2 / Ti is about 1 order of magnitude, while the switching ratio of Pt / HfO2 / ZnO / Ti is about 2 orders of magnitude.

[0069] In addition, in order to visually show the difference in the conduction mechanism, the logarithmic graphs of current and voltage were plotted, e.g. Figure 7 As shown, the conduction mechanism between the reset and set processes is studied.

[0070] Figure 7 IV characteristics of Pt / HfO2 / ZnO / Ti device during (a) set process and (b) reset process

[0071] Figure 7 (a) is the double logarithmic IV curve of the Pt / HfO2 / ZnO / Ti device during the setup process. In the range of 0 to -0.8V, the slope of the curve is close to 1 (I∝V), which means that the electrons injected into the electrode are less captured by defects and the conduction mechanism is ohmic conduction. In the range of -0.8V to -2.9V, the slope of the curve is close to 2, and the electrons injected from the top and bottom electrodes increase, and the IV relationship is a square relationship (I∝V 2 ), at which point the current is hole-limited current (SCLC). In the range of -2.9V to -3.5V, the slope of the curve exceeds 2, the defects are completely filled by injected electrons, the device conductivity increases, and IV is exponential. When the applied voltage is 3.8V-4V, the slope of IV is 0.98, and the ohmic conduction mechanism is dominant.

[0072] When a positive bias is applied to the device, Figure 7 (b) shows the IV characteristics of the Pt / HfO2 / ZnO / Ti device during the reset process. When the voltage increases from 0V to 2.4V, the device is in a low resistance state and the conduction mechanism is still ohmic conduction. When the voltage reaches the reset voltage, the current jumps and the device changes from a low resistance state (LRS) to a high resistance state (HRS). When the voltage is swept back, electrons are pulled out, the number of unoccupied defects in the dielectric layer increases, and the current is mainly dominated by the drift of intrinsic carriers. At this time, the conduction mechanism of the device is a hole-limited current (SCLC) mechanism.

[0073] In this embodiment, for the RRAM device, "0" and "1" are represented by a high resistance state (HRS) and a low resistance state (LRS), respectively, and multiple stable resistance states inside the RRAM device can be used to achieve multi-level data storage with high density requirements. Different cut-off voltages of -2.3V to -2.8V were applied to Pt / HfO2 / ZnO / Ti. After the resistance state was stabilized, a pulse voltage of 0.2V (duration of 0.2 seconds) was applied for a read operation.

[0074] Figure 8 (a) IV diagram during the reset process; (b) HRS values ​​under different applied voltages in the range of -2.3 V to -2.8 V.

[0075] Figure 8(a) shows the IV diagram of the reset process of Pt / HfO2 / ZnO / Ti in the range of -2.3V to -2.8V. It can be seen that the difference between the low resistance state (LRS) is not obvious, while the high resistance state (HRS) shows a significant change. In order to further explore the change of HRS, the value of HRS is measured, such as Figure 8 As shown in (b), it can be seen that the resistance value of HRS does not change significantly at -2.5 V and -2.4 V. When the applied voltage increases to -2.4 V, the resistance value begins to change significantly and can be used for multi-level storage.

[0076] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A RRAM storage cell structure, characterized in that: include: A bottom electrode, a switching dielectric layer and a top electrode, wherein the switching dielectric layer is arranged on the bottom electrode, the switching dielectric layer includes an upper region layer and a lower region layer, the lower region layer is located above the bottom electrode, the upper region layer is arranged above the lower region layer, the top electrode is arranged on the upper region layer, the upper region layer and the lower region layer are both oxide layers, and the oxygen vacancy concentration of the lower region layer is higher than the oxygen vacancy concentration of the upper region layer.

2. The RRAM memory cell structure according to claim 1, characterized in that: The upper region layer is a ZnO layer, and the thickness thereof is 1-5 nm.

3. The RRAM memory cell structure according to claim 1, characterized in that: The lower region layer is a HfOx layer, which is obtained by direct oxygen plasma oxidation of transition metal Hf, and has a thickness of 1-10 nm.

4. The RRAM memory cell structure according to claim 1, characterized in that: The top electrode is an inert metal layer with a thickness of 10-100 nm.

5. The RRAM memory cell structure according to claim 4, characterized in that: The top electrode is a Pt layer with a thickness of 20 nm.

6. The RRAM memory cell structure according to claim 1, characterized in that: The bottom electrode is specifically a Ti layer with a thickness of 20 nm.

7. A method for simulating a RRAM storage cell structure, characterized in that: Applied to the RRAM memory cell structure according to any one of claims 1 to 6, the simulation method comprises: Connecting the prepared RRAM memory cell structure to a test system, applying a preset positive scan voltage between the top electrode and the bottom electrode for N seconds to complete the simulation of the RRAM memory cell structure; A test type and a scan voltage threshold corresponding to the test type are obtained, and the scan voltage threshold is applied between the top electrode and the bottom electrode to complete a corresponding test, wherein the test type specifically includes a multi-level storage test, a reset test, and a set test.

8. The method for simulating the RRAM storage cell structure according to claim 7, characterized in that: The test type is specifically a reset test, and the test type and the scanning voltage threshold corresponding to the test type are obtained, and the scanning voltage threshold is applied between the top electrode and the bottom electrode to complete the corresponding test, specifically: a scanning voltage of -2.4V is applied to the RRAM memory cell structure to perform a reset process for 4 seconds, and the change in the oxygen vacancy concentration distribution is observed to complete the test.

9. The simulation method of the RRAM storage cell structure according to claim 8, characterized in that: The test type is specifically a set test; the test type and the scanning voltage threshold corresponding to the test type are obtained, and the scanning voltage threshold is applied between the top electrode and the bottom electrode to complete the corresponding test, specifically: a 3.3V triangle wave voltage is applied to the RRAM storage cell structure for a setting process, which lasts for 4 seconds. When the oxygen vacancies reform the conductive filaments, the test is completed.

10. The simulation method of the RRAM storage cell structure according to claim 7, characterized in that: The test type is specifically a multi-level storage test. The test type and the scanning voltage threshold corresponding to the test type are obtained, and the scanning voltage threshold is applied between the top electrode and the bottom electrode to complete the corresponding test. Specifically, different cutoff voltages of -2.3V to -2.8V are applied to the RRAM storage cell structure to achieve multi-level storage. After each cutoff voltage is applied, wait for the resistance state to stabilize, and then apply a pulse voltage of 0.2V with a duration of 0.2 seconds to read the resistance value of HRS to complete the test.

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