Semiconductor module

By extending the gate wiring length and reducing the parasitic inductor components, the problem of high losses during the conduction process of existing semiconductor modules is solved, and lower conduction loss and higher efficiency are achieved.

CN119948629APending Publication Date: 2025-05-06FUJI ELECTRIC CO LTD
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Patent Information

Application Number
CN202480004153.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-04-12
Filing Date
2024-03-04
Publication Date
2025-05-06

AI Technical Summary

Technical Problem

The existing semiconductor modules have high losses during the conduction of switching elements, especially due to the increase in conduction loss due to the generation of resonance.

Method used

The generation of resonance is suppressed by extending the gate wiring length in the semiconductor module and reducing the parasitic inductor component between the second auxiliary terminal and the emission electrode of the second switching element.

Benefits of technology

It effectively reduces the conduction loss of the switching element and reduces the generation of resonance, thereby improving the efficiency and stability of the module.

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Abstract

The invention provides a semiconductor module capable of reducing conduction loss of a switching element. A semiconductor module (10) is provided with: a terminal housing (11) in which a first input terminal and a second input terminal (11a1, 11a2) are disposed on a first short side section (11a), and a second control terminal (11d1) and a second auxiliary terminal (11d2) are disposed on a second long side section (11d); a first insulating circuit board (13a) disposed on the second short side portion (11b) side of the terminal housing (11); and a second insulating circuit board (13b) disposed on the first short side portion (11a) side. A fifth metal pattern (15b2) extending in the longitudinal direction of the terminal housing (11) is provided on the front surface of the second insulating circuit board (13b). The semiconductor module (10) also has a first wiring member (16a), one end of which is connected to a position on the fifth metal pattern (15b) that is farther from the first short side section (11a) than a half of the length of the second insulating circuit board (13b) in the longitudinal direction, and the other end of which is connected to the second auxiliary terminal (11d2).
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Description

Technical Field

[0001] The invention relates to a semiconductor module. Background Art

[0002] Semiconductor modules used in power conversion devices and the like include semiconductor modules (see, for example, Patent Documents 1 and 2) that include a gate terminal and an auxiliary terminal (such as a sense emitter terminal, a source or drain terminal, etc.) for connecting to a drive circuit that drives a switching element.

[0003] Prior art literature Patent Literature Patent Document 1: International Publication No. 2015 / 076257 Patent Document 2: Japanese Patent Application Publication No. 2004-22960 Summary of the invention

[0004] Technical issues An object of an embodiment of the present application is to reduce conduction loss of a switching element.

[0005] Technical Solution According to one aspect of the present invention, a semiconductor module is provided, comprising: a terminal housing, wherein a first input terminal and a second input terminal are arranged on a first short side portion, an output terminal is arranged on a second short side portion opposite to the first short side portion, a first control terminal and a first auxiliary terminal are arranged on a first long side portion, and a second control terminal and a second auxiliary terminal are arranged on a second long side portion opposite to the first long side portion; a first insulating circuit substrate, wherein a plurality of first switching elements having a first input electrode, a first output electrode and a first control electrode, respectively, a first metal pattern electrically connected to the first input terminal and the first input electrode, a second metal pattern electrically connected to the output terminal, the first output electrode and the first auxiliary terminal, and a third metal pattern electrically connected to the first control electrode and the first control terminal are provided on a front side, and a third metal pattern electrically connected to the second short side portion is arranged in an area surrounded by the terminal housing. side; a second insulating circuit substrate, which is provided with a plurality of second switching elements having a second input electrode, a second output electrode and a second control electrode on the front side, a fourth metal pattern electrically connected to the first input terminal and the first metal pattern, a fifth metal pattern electrically connected to the second input terminal, the second output electrode and the second auxiliary terminal and extending in the length direction of the terminal shell, a sixth metal pattern electrically connected to the second input electrode and the second metal pattern, and a seventh metal pattern electrically connected to the second control electrode and the second control terminal, and is arranged on the side of the first short side in the area surrounded by the terminal shell; and a first wiring component, one end of which is connected to a position on the fifth metal pattern that is farther away from the first short side in the length direction than a position half the length of the second insulating circuit substrate, and the other end is connected to the second auxiliary terminal.

[0006] Three of the plurality of second switching elements may be arranged in the length direction on the front side of the second insulating circuit substrate, and three connection areas for electrically connecting the three second input electrodes respectively via the second wiring component are provided in the fifth metal pattern in the length direction, and the position of the first wiring component is near any one of two connection areas of the three connection areas that are farther away from the first short side portion than the other connection area.

[0007] Three of the plurality of second switching elements may be arranged in the length direction on the front side of the second insulating circuit substrate, and three connection areas for electrically connecting the three second input electrodes respectively via the second wiring components are provided in the fifth metal pattern in the length direction, and the position of the first wiring component is near the connection area farthest from the first short side among the three connection areas.

[0008] According to one aspect of the present invention, a semiconductor module is provided, which comprises: a terminal housing, wherein a first input terminal and a second input terminal are arranged on a first short side portion, an output terminal is arranged on a second short side portion opposite to the first short side portion, a first control terminal and a first auxiliary terminal are arranged on a first long side portion, and a second control terminal and a second auxiliary terminal are arranged on a second long side portion opposite to the first long side portion; a first insulating circuit substrate, wherein a plurality of first switching elements each having a first input electrode, a first output electrode and a first control electrode, a first metal pattern electrically connected to the first input terminal and the first input electrode, a second metal pattern electrically connected to the output terminal, the first output electrode and the first auxiliary terminal, and a third metal pattern electrically connected to the first control electrode and the first control terminal are provided on a front side, and the third metal pattern is provided on a side of the second short side portion in an area surrounded by the terminal housing; and a second insulating circuit substrate, wherein a plurality of first switching elements each having a first input electrode, a first output electrode and a first control electrode, a first metal pattern electrically connected to the first input terminal and the first input electrode, a second metal pattern electrically connected to the output terminal, the first output electrode and the first auxiliary terminal, and a third metal pattern electrically connected to the first control electrode and the first control terminal are provided on a front side. a plurality of second switching elements for input electrodes, second output electrodes and second control electrodes, a fourth metal pattern electrically connected to the first input terminal and the first metal pattern, a fifth metal pattern electrically connected to the second input terminal, the second output electrode and the second auxiliary terminal and extending in the length direction of the terminal shell, a sixth metal pattern electrically connected to the second input electrode and the second metal pattern, a seventh metal pattern electrically connected to the second control electrode and the second control terminal, and arranged on the side of the first short side in the area surrounded by the terminal shell; and a first wiring component, one end of which is connected to a position on the fifth metal pattern that is closer to the first short side than a position half the length of the second insulating circuit substrate in the length direction, and the other end is connected to the second auxiliary terminal, the seventh metal pattern, or the second wiring component that electrically connects the seventh metal pattern to the second control terminal includes at least one folded portion when viewed from above.

[0009] The seventh metal pattern may include the folded portion folded in the length direction in a plan view.

[0010] The seventh metal pattern may include the folded portion folded back in the short side direction of the terminal housing in a plan view.

[0011] It should be noted that the above invention does not list all the features required for the present invention. In addition, sub-combinations of these feature groups can also constitute inventions.

[0012] Technical Effects According to the disclosed technology, the conduction loss of the switching element can be reduced.

[0013] The above and other objects, features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings which illustrate preferred embodiments as examples of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is a plan view showing an example of the semiconductor module according to the first embodiment.

[0015] Figure 2 This is a circuit diagram for explaining conduction loss when the gate wiring length is short.

[0016] Figure 3 This is a circuit diagram for explaining conduction loss when the gate wiring length is long.

[0017] Figure 4 1 is a diagram showing time changes in current and voltage at various parts of the semiconductor module of the first comparative example when the gate wiring length is short.

[0018] Figure 5 1 is a diagram showing time changes in current and voltage at various parts of the semiconductor module of the first comparative example when the gate wiring length is long.

[0019] Figure 6 This is a circuit diagram showing an example of leading out the second auxiliary terminal in the semiconductor module according to the first embodiment.

[0020] Figure 7 The diagram shows the time changes of current and voltage in each part of the semiconductor module when the second auxiliary terminal is led out from a position closer to the first short side than a position half the length of the second insulating circuit substrate in the longitudinal direction of the terminal housing.

[0021] Figure 8 The diagram shows the time changes of current and voltage in each part of the semiconductor module when the second auxiliary terminal is led out from a position farther from the first short side than a position half the length of the second insulating circuit substrate in the longitudinal direction of the terminal housing.

[0022] Fig. 9 It is a plan view showing an example of a semiconductor module according to the second embodiment.

[0023] Fig.10 This is a circuit diagram of a semiconductor module according to a second embodiment.

[0024] Fig.11 It is a plan view of a first modified example of the semiconductor module according to the second embodiment.

[0025] Fig.12 It is a plan view of a second modified example of the semiconductor module according to the second embodiment.

[0026] Explanation of symbols 10, 10a, 40a, 40b, 40c Semiconductor modules 11 Terminal housing 11a First short side 11a1 First input terminal 11a2 Second input terminal 11b Second short side 11b1, 11b2 output terminals 11c First long side 11c1 First control terminal 11c2 First auxiliary terminal 11c3 Third auxiliary terminal 11c4, 11c5 Temperature detection terminals 11d Second longest side 11d1 Second control terminal 11d2 Second auxiliary terminal 12 Metal substrate 13a First insulating circuit substrate 13b Second insulating circuit substrate 14a, 14a1 to 14a3 first switching element 14b, 14b1 to 14b3 second switch element 14c, 14c1~14c3, 14d, 14d1~14d3 diodes 15a1 First metal pattern 15a2 Second metal pattern 15a3 Third Metal Pattern 15b1 Fourth Metal Pattern 15b2 Fifth Metal Pattern 15b3 Sixth Metal Pattern 15b4, 41a, 41b, 41c Seventh metal pattern 15a4 Eighth Metal Pattern 16a First wiring member 16b Second wiring member 17 Thermistor 20a~20d position 21a~21c Connection area 31 DC power supply 32 Capacitor 33 Load 34 Gate drive circuit 41a1, 41a2, 41b1, 41c1, 41c2 Folded back parts 42a Third wiring member 42b Fourth wiring member 42c Fifth wiring member DETAILED DESCRIPTION

[0027] Hereinafter, specific embodiments will be described with reference to the drawings.

[0028] It should be noted that in the following description, "front surface" and "upper surface" refer to Figure 1 The XY plane facing upward (+Z direction) in the semiconductor module 10 or the like. Similarly, "upper" means Figure 1 The "back surface" and "lower surface" refer to the direction of the upper side (+Z direction) of the semiconductor module 10, etc. Figure 1 The XY plane facing downward (-Z direction) in the semiconductor module 10 or the like. Similarly, "downward" means Figure 1 The direction of the lower side (-Z direction) of the semiconductor module 10, etc. The same directionality is also indicated in other drawings as needed. "Front", "upper surface", "upper", "back", "lower surface", "lower", and "side" are just convenient expressions for determining relative positional relationships and do not limit the technical concept of the present invention. For example, "upper" and "lower" do not necessarily refer to the vertical direction relative to the ground. That is, the directions of "upper" and "lower" are not limited to the direction of gravity.

[0029] [First embodiment] Figure 1 This is a plan view showing an example of the semiconductor module according to the first embodiment.

[0030] The semiconductor module 10 includes a terminal housing 11 , a metal base 12 , a first insulating circuit substrate 13 a , and a second insulating circuit substrate 13 b .

[0031] The terminal housing 11 includes a first short side 11a, a second short side 11b opposite to the first short side 11a, a first long side 11c, and a second long side 11d opposite to the first long side 11c. The first short side 11a is provided with a first input terminal 11a1 and a second input terminal 11a2. The first input terminal 11a1 and the second input terminal 11a2 are external connection terminals for main current to which different potentials are applied. In the following description, it is assumed that the positive terminal of a DC power supply is connected to the first input terminal 11a1, and the negative terminal of the DC power supply is connected to the second input terminal 11a2.

[0032] The second short side 11b is provided with output terminals 11b1 and 11b2. The first long side 11c is provided with a first control terminal 11c1 and a first auxiliary terminal 11c2, and the second long side 11d is provided with a second control terminal 11d1 and a second auxiliary terminal 11d2. The first auxiliary terminal 11c2 and the second auxiliary terminal 11d2 are sometimes referred to as sense emitter terminals, auxiliary emitter terminals, sense source terminals, auxiliary source terminals, etc. Figure 1 In the example of FIG. 1 , the third auxiliary terminal 11c3 and the temperature detection terminals 11c4 and 11c5 are further arranged in the first long side 11c, but these terminals may not be provided. The third auxiliary terminal 11c3 is sometimes referred to as a sense collector terminal or a sense drain terminal.

[0033] The above-mentioned various terminals are made of a material with excellent conductivity, such as aluminum, iron, silver, copper, or an alloy containing at least one of these. The above-mentioned various terminals of the terminal housing 11 are integrally formed with a frame-shaped frame.

[0034] Such a terminal housing 11 is arranged on a metal base 12. The metal base 12 is used for heat dissipation of the semiconductor module 10, and is mainly composed of a metal with excellent thermal conductivity. Such a metal may be, for example, copper, aluminum, or an alloy containing at least one of these. In order to improve the corrosion resistance of the metal base 12, a plating treatment may also be performed. In this case, the plating material used is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy.

[0035] The first insulating circuit substrate 13a is arranged on the second short side 11b side in the area surrounded by the terminal housing 11 on the metal base 12. The second insulating circuit substrate 13b is arranged on the first short side 11a side in the area surrounded by the terminal housing 11 on the metal base 12. The first insulating circuit substrate 13a and the second insulating circuit substrate 13b are made of ceramics with excellent thermal conductivity. Such ceramics are aluminum oxide, aluminum nitride, silicon nitride, etc. with high temperature conductivity. The first insulating circuit substrate 13a and the second insulating circuit substrate 13b are fixed to the metal base 12 by solder, for example.

[0036] A plurality of first switching elements 14a1 to 14a3, a first metal pattern 15a1, a second metal pattern 15a2, and a third metal pattern 15a3 are provided on the front surface of the first insulating circuit substrate 13a. A plurality of second switching elements 14b1 to 14b3, a fourth metal pattern 15b1, a fifth metal pattern 15b2, a sixth metal pattern 15b3, and a seventh metal pattern 15b4 are provided on the front surface of the second insulating circuit substrate 13b.

[0037] The first switching elements 14a1 to 14a3 and the second switching elements 14b1 to 14b3 are, for example, power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) or IGBTs (Insulated Gate Bipolar Transistors), etc. The first switching elements 14a1 to 14a3 function as switching elements of the upper arm, and the second switching elements 14b1 to 14b3 function as switching elements of the lower arm.

[0038] exist Figure 1 In the example, three first switching elements 14a1 to 14a3 are arranged on the front side of the first insulating circuit substrate 13a in the longitudinal direction (X direction) of the terminal housing 11. In addition, three second switching elements 14b1 to 14b3 are arranged on the front side of the second insulating circuit substrate 13b in the X direction.

[0039] It should be noted that the number of switching elements of the upper arm and the number of switching elements of the lower arm are not limited to three.

[0040] The first switching elements 14a1 to 14a3 each have a first input electrode, a first output electrode, and a first control electrode. The second switching elements 14b1 to 14b3 each have a second input electrode, a second output electrode, and a second control electrode.

[0041] When each of these switching elements is an n-channel power MOSFET, the first input electrode and the second input electrode are drain electrodes provided on the back side of each switching element. The first output electrode and the second output electrode are source electrodes provided on the front side of each switching element. The first control electrode and the second control electrode are gate electrodes provided on the front side of each switching element.

[0042] When these switching elements are IGBTs, the first input electrode and the second input electrode are collector electrodes provided on the back side of each switching element. The first output electrode and the second output electrode are emitter electrodes provided on the front side of each switching element. The first control electrode and the second control electrode are gate electrodes provided on the front side of each switching element.

[0043] It should be noted that these switching elements may be power MOSFETs or the like made of silicon carbide.

[0044] In the following description, the first switching elements 14a1 to 14a3 and the second switching elements 14b1 to 14b3 are described as IGBTs. Therefore, the first input electrode and the second input electrode are called collector electrodes, the first output electrode and the second output electrode are called emitter electrodes, and the first control electrode and the second control electrode are called gate electrodes.

[0045] The first metal pattern 15a1 is electrically connected to the first input terminal 11a1 and the collector electrodes of the first switching elements 14a1 to 14a3. The collector electrodes on the back surfaces of the first switching elements 14a1 to 14a3 are bonded to the first metal pattern 15a1 by, for example, solder. Figure 1 In the example of FIG. 1 , the first metal pattern 15 a 1 is also electrically connected to the third auxiliary terminal 11 c 3 .

[0046] The second metal pattern 15 a 2 extends in the longitudinal direction (X direction) of the terminal housing 11 , and is electrically connected to the output terminals 11 b 1 and 11 b 2 , the emitter electrodes of the first switching elements 14 a 1 to 14 a 3 , and the first auxiliary terminal 11 c 2 .

[0047] The third metal pattern 15 a 3 is electrically connected to the gate electrodes of the first switching elements 14 a 1 to 14 a 3 and the first control terminal 11 c 1 .

[0048] The fourth metal pattern 15 b 1 is electrically connected to the first input terminal 11 a 1 and the first metal pattern 15 a 1 .

[0049] The fifth metal pattern 15 b 2 extends in the longitudinal direction (X direction) of the terminal housing 11 , and is electrically connected to the second input terminal 11 a 2 , emitter electrodes of the second switching elements 14 b 1 to 14 b 3 , and the second auxiliary terminal 11 d 2 .

[0050] The sixth metal pattern 15b3 is electrically connected to the collector electrodes of the second switching elements 14b1 to 14b3 and the second metal pattern 15a2. The collector electrodes on the back surfaces of the second switching elements 14b1 to 14b3 are bonded to the sixth metal pattern 15b3 by soldering, for example.

[0051] The seventh metal pattern 15b4 is electrically connected to the gate electrodes of the second switching elements 14b1 to 14b3 and the second control terminal 11d1.

[0052] The electrical connection between the emitter electrode of each switching element, each metal pattern or each terminal can be made using Figure 1 The wiring members shown by the thick black lines (for example, the first wiring member 16a, the second wiring member 16b, etc.) can be used as the wiring members. A bonding wire, a lead frame, etc. can be used.

[0053] For example, in the fifth metal pattern 15 b 2 , three connection regions 21 a to 21 c are provided along the X direction, where the three emitter electrodes of the second switching elements 14 b 1 to 14 b 3 are electrically connected via wiring members (such as the second wiring member 16 b ).

[0054] Each of the metal patterns is made of a metal having excellent electrical conductivity. Such a metal is copper or a copper alloy. As the first insulating circuit substrate 13a and the second insulating circuit substrate 13b provided with such a metal pattern, for example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazed) substrate can be used.

[0055] It should be explained, such as Figure 1 As shown, diodes 14c1, 14c2, and 14c3 are also provided on the first insulating circuit substrate 13a. Diodes 14d1, 14d2, and 14d3 are also provided on the second insulating circuit substrate 13b. These diodes are, for example, SBD (Schottky Barrier Diode), PiN (P-intrinsic-N) diodes, etc., which are provided in reverse parallel with respect to each switching element as FWD (Free Wheeling Diode). These diodes have an output electrode (cathode electrode) as a main electrode on the back side and an input electrode (anode electrode) as a main electrode on the front side.

[0056] The output electrodes on the back of the diodes 14c1 to 14c3 are joined to the front of the first metal pattern 15a1 by solder. The output electrodes on the back of the diodes 14d1 to 14d3 are joined to the front of the sixth metal pattern 15b3 by solder. The input electrodes on the front of each of the diodes 14c1 to 14c3 are electrically connected to the emitter electrodes on the front of the first switch elements 14a1 to 14a3 and the second metal pattern 15a2 by wiring components such as bonding wires. The input electrodes on the front of each of the diodes 14d1 to 14d3 are electrically connected to the emitter electrodes on the front of any of the second switch elements 14b1 to 14b3 and the fifth metal pattern 15b2 by wiring components such as bonding wires.

[0057] In addition, Figure 1 In the example of , an eighth metal pattern 15a4 is further provided on the first insulating circuit substrate 13a. The eighth metal pattern 15a4 is electrically connected to the second metal pattern 15a2 through a wiring member, and is electrically connected to the third metal pattern 15a3 through a wiring member.

[0058] In addition, Figure 1In the example of FIG. 1 , a thermistor 17 electrically connected to the temperature detection terminals 11c4 and 11c5 is provided on the second insulating circuit substrate 13b.

[0059] Although not shown in the figure, the semiconductor module 10 is further provided with a sealing member filled in a housing region surrounded by the terminal housing 11 and a cover for sealing the inside of the terminal housing 11 .

[0060] In the semiconductor module 10 described above, the first wiring member 16a that electrically connects the second auxiliary terminal 11d2 and the fifth metal pattern 15b2 has the following connection form.

[0061] One end of the first wiring member 16a is located at a position on the fifth metal pattern 15b2 that is farther from the first short side 11a than half (w / 2) of the length w of the second insulating circuit substrate 13b in the longitudinal direction (X direction) of the terminal housing 11 (at Figure 1 The other end of the first wiring member 16a is connected to the second auxiliary terminal 11d2.

[0062] Hereinafter, the reason and effect of connecting the first wiring member 16a in this way will be described.

[0063] Figure 2 2 is a circuit diagram for explaining conduction loss when the gate wiring length is short. Figure 3 is a circuit diagram illustrating the conduction loss when the gate wiring length is long. Figure 2 , Figure 3 In, with Figure 1 The same reference numerals are given to the corresponding elements of the semiconductor module 10. Figure 2 , Figure 3 In Figure 1 The equivalent circuit of the semiconductor module is obtained by connecting one end of the first wiring member 16a to a position 20a on the fifth metal pattern 15b2 closer to the first short side 11a than a position half the length w of the second insulating circuit substrate 13b in the X direction. Figure 1 The semiconductor module 10 is distinguished in Figure 2 , Figure 3 Hereinafter, the semiconductor module 10a may also be referred to as a semiconductor module of the first comparative example.

[0064] exist Figure 2 , Figure 3 middle, Figure 1 The three first switch elements 14a1 to 14a3 are shown as first switch elements 14a, and the three second switch elements 14b1 to 14b3 are shown as second switch elements 14b. Figure 2 , Figure 3 middle, Figure 1 The three diodes 14c1 to 14c3 and the three diodes 14d1 to 14d3 are shown as diodes 14c, 14d.

[0065] A DC power supply 31 and a capacitor 32 are connected between the first input terminal 11 a 1 and the second input terminal 11 a 2 , and a load 33 is connected between the first input terminal 11 a 1 and the output terminals 11 b 1 and 11 b 2 .

[0066] The gate drive circuit 34 is connected between the second control terminal 11d1 and the second auxiliary terminal 11d2. Another gate drive circuit is also connected between the first control terminal 11c1 and the first auxiliary terminal 11c2, but is not shown in the figure.

[0067] When the length of the gate wiring connecting the gate electrode of the second switching element 14 b and the gate driving circuit 34 is short, there is a possibility that the conduction loss will increase.

[0068] Figure 4 1 is a diagram showing time changes in current and voltage at various parts of the semiconductor module of the first comparative example when the gate wiring length is short. Figure 5 1 is a diagram showing the time changes of the current and voltage of each part of the semiconductor module of the first comparative example when the gate wiring length is long. Figure 4 , Figure 5 In the figure, the horizontal axis represents time and the vertical axis represents the magnitude of voltage or current. Figure 4 1 and 2 are diagrams showing examples of time changes in current and voltage when the gate drive circuit 34 is brought close to the semiconductor module 10 a and the gate wiring length is shortened. Figure 5 The diagram shows an example of time changes in current and voltage when the gate wiring length between the gate drive circuit 34 and the second control terminal 11d1 of the semiconductor module 10a is set to 30 cm.

[0069] Figure 4 , Figure 5 The voltage V between the gate electrode and the emitter electrode of the second switching element 14b is shown. GE (10V / div), the voltage between the collector electrode and the emitter electrode V CE (200V / div) time variation example. In addition, the gate current I of the second switching element 14b is shown. g (2A / div) and collector current I C Example of time variation of (200V / div).

[0070] The gate inductor component when the gate wiring length is short ( Figure 3The gate inductor component (Lg) is longer than the gate wiring length. Figure 3 Therefore, the gate current I during the period from time t1 to t2 when the second switching element 14b is turned on is g The increase rate of is faster than that of the case where the gate wiring length is long. At this time, resonance is generated by the parasitic capacitor of the second switching element 14b and the parasitic inductance component Le between the second auxiliary terminal 11d2 and the emitter electrode of the second switching element 14b. If the gate inductance component is small, the resonant current generated by this resonance becomes large. When this resonant current flows from the emitter electrode to the gate electrode, it is estimated that the voltage V CE The reduction of is hindered and the conduction loss increases.

[0071] On the other hand, the gate inductance component ( Figure 3 The gate inductor component (Lg) is shorter than the gate wiring length. Figure 3 Therefore, the gate current I during the period from time t1 to t2 is g The increase rate is slower than that of the case where the gate wiring length is short. In this case, it becomes difficult to generate the above-mentioned resonance, and the generation of the resonant current is also hindered by the gate inductor component Lg. Therefore, it is estimated that the voltage V during the period from time t1 to t2 is CE The reduction speed becomes faster and the conduction loss is small.

[0072] As described above, the generation of resonance is considered as a cause of the increase in conduction loss. In addition, in order to suppress the generation of resonance, it is considered to extend the gate wiring length as described above. On the other hand, by reducing the parasitic inductance component Le between the second auxiliary terminal 11d2 and the emitter electrode of the second switching element 14b, the generation of resonance can also be suppressed.

[0073] The semiconductor module 10 according to the first embodiment reduces the parasitic inductance component Le, thereby suppressing the occurrence of resonance and reducing the conduction loss.

[0074] Figure 6 1 is a circuit diagram showing an example of leading out the second auxiliary terminal in the semiconductor module of the first embodiment. Figure 6 In the Figure 1 to Figure 3 The same elements are indicated by the same reference numerals.

[0075] exist Figure 1 In the semiconductor module 10, one end of the first wiring member 16a connected to the second auxiliary terminal 11d2 is connected to a position 20d on the fifth metal pattern 15b2 which is farther from the first short side 11a than a position half the length w of the second insulating circuit substrate 13b in the X direction. Figure 6 As shown, from Figure 2 , Figure 3 The semiconductor module 10a shown in the figure has the second auxiliary terminal 11d2 led out from a position farther from the second input terminal 11a2. That is, the second auxiliary terminal 11d2 is led out from a position closer to the emitter electrode of the second switching element 14b.

[0076] As a result, the parasitic inductance component Le between the second auxiliary terminal 11d2 and the emitter electrode of the second switching element 14b becomes larger than Figure 2 , Figure 3 The semiconductor module 10a shown is small. As a result, the occurrence of resonance is suppressed and the conduction loss is reduced.

[0077] Next, it is shown that Figure 1 The semiconductor module 10 shown in the figure shows an example of the time change of the current and voltage of each part when the position where the second auxiliary terminal 11d2 is drawn out is changed.

[0078] Figure 7 The following are diagrams showing the time changes of current and voltage in various parts of the semiconductor module when the second auxiliary terminal is led out from a position closer to the first short side than half the length of the second insulating circuit substrate in the length direction of the terminal housing. (A) shows the case of leading out from position 20a, and (B) shows the case of leading out from position 20b.

[0079] Figure 8 The following are graphs showing the time changes of the current and voltage of each part of the semiconductor module when the second auxiliary terminal is led out from a position farther from the first short side than a position half the length of the second insulating circuit substrate in the length direction of the terminal housing. (A) shows the case of leading out from position 20c, and (B) shows the case of leading out from position 20d.

[0080] exist Figure 7 , Figure 8 In FIG. 1 , the horizontal axis represents time, and the vertical axis represents the magnitude of voltage or current. The voltage V between the gate electrode and the emitter electrode of the second switching element 14b1 to 14b3 is shown. GE (10V / div), the voltage between the collector electrode and the emitter electrode V CE An example of the time variation of (200 V / div). In addition, the gate current I of the second switching elements 14b1 to 14b3 is shown. g (2A / div) and collector current I C Example of time variation of (200V / div).

[0081] Among the positions 20a to 20d, the position 20a is closest to the first short side 11a. Therefore, when the gate wiring length is short, Figure 4Similarly to the case shown in FIG. 1 , the voltage V during the period from time t1 to time t2 is CE The reduction of is hindered, and the conduction loss increases. Figure 7 In the example of (A), the conduction loss is 53.6mJ.

[0082] Position 20b is farther from the first short side 11a in the -X direction than position 20a, but is located closer to the first short side 11a than half the length w of the second insulating circuit substrate 13b. Figure 4 Similarly to the case shown in FIG. 1 , the voltage V during the period from time t1 to time t2 is CE The reduction of conduction loss is hindered, and the reduction of conduction loss is limited. Figure 7 In the example of (B), the conduction loss is 34.8mJ.

[0083] Position 20c is located closer to the first short side 11a than half of the length w of the second insulating circuit substrate 13b in the X direction. In addition, among the connection regions 21a to 21c, position 20c is located near connection regions 21b and 21c that are farther from the first short side 11a than connection region 21a. In this case, since the parasitic inductance component Le between the second auxiliary terminal 11d2 and the emitter electrode of the second switching element 14b1 to 14b3 is reduced, the generation of resonance is suppressed and the conduction loss is reduced. Figure 8 In the example of (A), the conduction loss is 23.2 mJ, which is reduced to less than half compared with the case where the second auxiliary terminal 11 d 2 is drawn out from the position 20 a .

[0084] Position 20d is located closer to the first short side 11a than half of the length w of the second insulating circuit substrate 13b in the X direction. In addition, among the connection areas 21a to 21c, position 20d is located near the connection area 21c farthest from the first short side 11a. In this case, since the parasitic inductance component Le between the second auxiliary terminal 11d2 and the emitter electrode of the second switching element 14b1 to 14b3 is also reduced, the generation of resonance is suppressed and the conduction loss is reduced. Figure 8 In the example of (B), the conduction loss is 23.4 mJ, and the conduction loss is reduced to the same extent as when the second auxiliary terminal 11 d 2 is drawn out from the position 20 c .

[0085] As described above, in the semiconductor module 10 of the first embodiment, the second auxiliary terminal 11d2 is led out from a position closer to the emitter electrode of the second switching element 14b. This can reduce the parasitic inductance component Le, thereby suppressing the occurrence of resonance and reducing the conduction loss.

[0086] [Second embodiment] As described above, the generation of resonance is considered as a cause of the increase in conduction loss. In addition, in order to suppress the generation of resonance, it is considered to extend the gate wiring length as described above. On the other hand, the generation of resonance can also be suppressed by reducing the parasitic inductance component Le between the second auxiliary terminal 11d2 and the emitter electrode of the second switching element 14b1 to 14b3.

[0087] The semiconductor module 10 according to the second embodiment suppresses the occurrence of resonance and reduces conduction loss by extending the gate wiring length.

[0088] Fig. 9 FIG. 1 is a plan view showing an example of a semiconductor module according to the second embodiment. Fig. 9 In the Figure 1 The same components of the semiconductor module 10 according to the first embodiment are denoted by the same reference numerals.

[0089] In the semiconductor module 40a of the second embodiment, the seventh metal pattern 41a electrically connected to the second control electrode (gate electrodes of the second switching elements 14b1 to 14b3) and the second control terminal 11d1 is connected to the Figure 1 The seventh metal pattern 15b4 is different.

[0090] exist Fig. 9 In the example of FIG. 1 , the seventh metal pattern 41a includes two folded portions 41a1 and 41a2 folded in the length direction (X direction) of the terminal housing 11 when viewed from above. At one end of the seventh metal pattern 41a, the gate electrodes of the second switching elements 14b2 and 14b3 are electrically connected via a third wiring member 42a such as a bonding wire. Fig. 9 In the example, the gate electrode of the second switch element 14b1 is electrically connected to the folded portion 41a1 via a fourth wiring member 42b such as a bonding wire. In addition, the second control terminal 11d1 is electrically connected to the other end of the seventh metal pattern 41a via a fifth wiring member 42c such as a bonding wire.

[0091] It should be noted that the second auxiliary terminal 11d2 is different from the semiconductor module 10 of the first embodiment and is led out from the position 20a of the fifth metal pattern 15b2. That is, one end of the first wiring member 16a is connected to Figure 1 The fifth metal pattern 15b2 is shown at a position 20a closer to the first short side 11a than half the length w (w / 2) of the second insulating circuit substrate 13b in the X direction of the terminal housing 11. The other end of the first wiring member 16a is connected to the second auxiliary terminal 11d2.

[0092] The semiconductor module 40a includes the seventh metal pattern 41a as described above, and thus can increase the length between the position to which the gate electrodes of the second switching elements 14b1 to 14b3 are electrically connected and the position to which the second control terminal 11d1 is electrically connected.

[0093] It should be noted that the position in the seventh metal pattern 41a to which the gate electrodes of the second switching elements 14b1 to 14b3 are electrically connected is not limited to Fig. 9 Position shown.

[0094] Fig.10 FIG. 1 is a circuit diagram of a semiconductor module according to a second embodiment. Fig.10 In, with Figure 3 The same elements are marked with the same reference numerals. Figure 3 In the embodiment, although the gate wiring length between the second control terminal 11d1 and the gate drive circuit 34 is lengthened, Fig.10 In the semiconductor module 40a, the Fig. 9 The seventh metal pattern 41a is shown to extend the gate wiring length.

[0095] According to such a semiconductor module 40a, the gate inductance component ( Fig.10 Lg) becomes larger, so as mentioned above Figure 5 As shown, the gate current I during the period from time t1 to t2 g The increase rate of V is slower than that of the case where the gate wiring length is short. In this case, it becomes difficult to generate the above-mentioned resonance, and the generation of the resonant current is also hindered by the gate inductor component Lg. Therefore, the voltage V during the period from time t1 to t2 is CE The reduction rate becomes faster, which can reduce the conduction loss.

[0096] (First Modification) The seventh metal pattern 41a is not limited to Fig. 9 The seventh metal pattern may include at least one folded portion when viewed from above.

[0097] Fig.11 FIG. 1 is a plan view of a first modified example of the semiconductor module according to the second embodiment. Fig.11 In, with Fig.10 The same elements are provided with the same reference numerals.

[0098] exist Fig.11 In the example of FIG. 1 , the seventh metal pattern 41b includes a folded portion 41b1 folded in the longitudinal direction (X direction) of the terminal housing 11 when viewed from above. The gate electrodes of the second switching elements 14b2 and 14b3 are electrically connected to one end of the seventh metal pattern 41b via a third wiring member 42a such as a bonding wire.

[0099] In addition, Fig.11 In the example, the gate electrode of the second switch element 14b1 is electrically connected to the folded portion 41b1 via a fourth wiring member 42b such as a bonding wire. In addition, the second control terminal 11d1 is electrically connected to the other end of the seventh metal pattern 41b via a fifth wiring member 42c such as a bonding wire.

[0100] When the seventh metal pattern 41b is used, the gate wiring length can be extended, and the same effect as the semiconductor module 40a can be obtained. Such a semiconductor module 40b can be applied when the gate wiring length does not need to be as long as the semiconductor module 40a.

[0101] (Second Modification) Fig.12 FIG. 2 is a top view of a second modified example of the semiconductor module according to the second embodiment. Fig.12 In, with Fig.10 , Fig.11 The same elements are provided with the same reference numerals.

[0102] Fig.12 The semiconductor module 40c shown includes the seventh metal pattern 41c as follows. The seventh metal pattern 41c includes a folded portion 41c1 folded back in the longitudinal direction (X direction) of the terminal housing 11 and a plurality of folded back portions (e.g., folded back portions 41c2) folded back in the short side direction (Y direction) of the terminal housing 11 when viewed from above. The gate electrodes of the second switching elements 14b2 and 14b3 are electrically connected to one end of the seventh metal pattern 41c via a third wiring member 42a such as a bonding wire.

[0103] In addition, Fig.12 In the example, the gate electrode of the second switch element 14b1 is electrically connected to the folded portion 41c1 via a fourth wiring member 42b such as a bonding wire. In addition, the second control terminal 11d1 is electrically connected to the other end of the seventh metal pattern 41c via a fifth wiring member 42c such as a bonding wire.

[0104] Even when the seventh metal pattern 41c including the folded portion 41c2 folded in the short-side direction of the terminal housing 11 is used, the gate wiring length can be extended, and the same effect as the semiconductor module 40a can be obtained.

[0105] (Third Modification) In the above description, the semiconductor modules 40a, 40b, 40b in which the gate wiring length is extended by providing the folded portion in the seventh metal patterns 41a, 41b, 41c are described. However, in order to extend the gate wiring length, the folded portion may be provided in the fifth wiring member 42c. As the fifth wiring member 42c, for example, a bonding wire or a lead frame including one or more folded portions can be used. It should be noted that the fifth wiring member 42c is an example of the second wiring member of the invention of claim 4.

[0106] As mentioned above, although one viewpoint of the semiconductor module of this invention was demonstrated based on embodiment, these are only examples, and it is not limited to the above description.

[0107] The above only illustrates the principle of the present invention. For those skilled in the art, a large number of modifications and changes can be further made. The present invention is not limited to the accurate configuration and application examples shown and described above, and all corresponding modifications and equivalents are regarded as the scope of the present invention based on the attached claims and their equivalents.

Claims

1. A semiconductor module, characterized in that: have: A terminal housing, wherein a first input terminal and a second input terminal are arranged on a first short side, an output terminal is arranged on a second short side opposite to the first short side, a first control terminal and a first auxiliary terminal are arranged on a first long side, and a second control terminal and a second auxiliary terminal are arranged on a second long side opposite to the first long side; a first insulating circuit substrate, which is provided with a plurality of first switching elements having first input electrodes, first output electrodes, and first control electrodes, respectively, a first metal pattern electrically connected to the first input terminal and the first input electrode, a second metal pattern electrically connected to the output terminal, the first output electrode, and the first auxiliary terminal, and a third metal pattern electrically connected to the first control electrode and the first control terminal on the front side, and is arranged on the second short side in the area surrounded by the terminal housing; a second insulating circuit substrate, which is provided with a plurality of second switching elements having second input electrodes, second output electrodes and second control electrodes, respectively, on the front side, a fourth metal pattern electrically connected to the first input terminal and the first metal pattern, a fifth metal pattern electrically connected to the second input terminal, the second output electrode and the second auxiliary terminal and extending in the length direction of the terminal housing, a sixth metal pattern electrically connected to the second input electrode and the second metal pattern, and a seventh metal pattern electrically connected to the second control electrode and the second control terminal, and is arranged on the first short side in the area surrounded by the terminal housing; as well as The first wiring member has one end connected to a position on the fifth metal pattern farther from the first short side than a position half the length of the second insulating circuit substrate in the longitudinal direction, and the other end connected to the second auxiliary terminal.

2. The semiconductor module according to claim 1, characterized in that On the front side of the second insulating circuit substrate, three of the plurality of second switching elements are arranged in the longitudinal direction. The fifth metal pattern is provided with three connection regions in the longitudinal direction to which the three second input electrodes are electrically connected via the second wiring member. The position of the first wiring member is near any one of two connection regions of the three connection regions that are farther from the first short side portion than the other connection region.

3. The semiconductor module according to claim 1, characterized in that On the front side of the second insulating circuit substrate, three of the plurality of second switching elements are arranged in the longitudinal direction. The fifth metal pattern is provided with three connection regions in the length direction to which the three second input electrodes are electrically connected via the second wiring member. The position of the first wiring member is near a connection region farthest from the first short side among the three connection regions.

4. A semiconductor module, characterized in that: have: A terminal housing, wherein a first input terminal and a second input terminal are arranged on a first short side, an output terminal is arranged on a second short side opposite to the first short side, a first control terminal and a first auxiliary terminal are arranged on a first long side, and a second control terminal and a second auxiliary terminal are arranged on a second long side opposite to the first long side; a first insulating circuit substrate, which is provided with a plurality of first switching elements having first input electrodes, first output electrodes, and first control electrodes, respectively, a first metal pattern electrically connected to the first input terminal and the first input electrode, a second metal pattern electrically connected to the output terminal, the first output electrode, and the first auxiliary terminal, and a third metal pattern electrically connected to the first control electrode and the first control terminal on the front side, and is arranged on the second short side in the area surrounded by the terminal housing; a second insulating circuit substrate, which is provided with a plurality of second switching elements having second input electrodes, second output electrodes and second control electrodes, respectively, on the front side, a fourth metal pattern electrically connected to the first input terminal and the first metal pattern, a fifth metal pattern electrically connected to the second input terminal, the second output electrode and the second auxiliary terminal and extending in the length direction of the terminal housing, a sixth metal pattern electrically connected to the second input electrode and the second metal pattern, and a seventh metal pattern electrically connected to the second control electrode and the second control terminal, and is arranged on the first short side in the area surrounded by the terminal housing; as well as a first wiring member having one end connected to a position on the fifth metal pattern closer to the first short side than a position half the length of the second insulating circuit substrate in the length direction, and having the other end connected to the second auxiliary terminal; The seventh metal pattern or the second wiring member electrically connecting the seventh metal pattern and the second control terminal includes at least one folded portion in a plan view.

5. The semiconductor module according to claim 4, characterized in that The seventh metal pattern includes the folded portion folded back in the length direction in a plan view.

6. The semiconductor module according to claim 4, characterized in that The seventh metal pattern includes the folded-back portion folded back in the short-side direction of the terminal housing in a plan view.

Citation Information

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