Polycrystalline silicon carbide bearing substrate, bonded silicon carbide substrate and preparation method thereof

Abstract

The invention relates to the technical field of semiconductors, in particular to a polycrystalline silicon carbide bearing substrate, a bonded silicon carbide substrate and a preparation method of the bonded silicon carbide substrate, and the polycrystalline silicon carbide bearing substrate at least comprises an amorphous silicon carbide layer and a polycrystalline silicon carbide layer which are sequentially stacked in the vertical direction; wherein the surface, far away from the amorphous silicon carbide layer, of the polycrystalline silicon carbide layer is a bonding surface for bonding a single crystal silicon carbide substrate; and the roughness of the bonding surface of the polycrystalline silicon carbide layer is not greater than 0.5 nm. The polycrystalline silicon carbide bearing substrate can meet the requirement for bonding a single crystal silicon carbide substrate, and the performance of a silicon carbide device can be improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular, to a polycrystalline silicon carbide carrier substrate, a bonded silicon carbide substrate and a preparation method thereof. Background Art

[0002] When preparing silicon carbide devices, a homogeneous silicon carbide epitaxial layer can be grown from a single crystal silicon carbide substrate, and then a silicon carbide device can be prepared on the silicon carbide epitaxial layer. Providing polycrystalline silicon carbide under a single crystal silicon carbide substrate can reduce the resistivity of the substrate, thereby improving the performance of silicon carbide devices. Depositing silicon carbide on a statically pressed graphite substrate is a mainstream process for preparing silicon carbide coatings. However, the polycrystalline silicon carbide layer prepared by this process has a high roughness and cannot meet the requirements for bonding with a single crystal silicon carbide substrate. This limits the application of polycrystalline silicon carbide in the preparation of silicon carbide devices. Summary of the invention

[0003] In order to solve the above technical problems, the embodiments of the present application provide a polycrystalline silicon carbide carrier substrate, a bonded silicon carbide substrate and a preparation method thereof to improve the performance of silicon carbide devices.

[0004] A first aspect of an embodiment of the present application provides a polycrystalline silicon carbide carrier substrate, comprising at least:

[0005] An amorphous silicon carbide layer and a polycrystalline silicon carbide layer are stacked in sequence along a vertical direction; wherein the surface of the polycrystalline silicon carbide layer away from the amorphous silicon carbide layer is a bonding surface for bonding to a single-crystal silicon carbide substrate; and the roughness of the bonding surface of the polycrystalline silicon carbide layer is not greater than 0.5 nanometers.

[0006] In an optional embodiment of the present application, the polycrystalline silicon carbide layer includes at least: a plurality of polycrystalline silicon carbide sublayers stacked in sequence from the amorphous silicon carbide layer to the bonding surface; in two adjacent layers of the polycrystalline silicon carbide sublayers, the grain size of the polycrystalline silicon carbide sublayer close to the bonding surface is not greater than the grain size of the polycrystalline silicon carbide sublayer away from the bonding surface.

[0007] In an optional embodiment of the present application, the roughness of the surface of the amorphous silicon carbide layer close to the polycrystalline silicon carbide layer is less than or equal to 15 nanometers.

[0008] In an optional embodiment of the present application, the thickness of the polycrystalline silicon carbide layer is no more than 1 mm.

[0009] In an optional embodiment of the present application, the thickness of the amorphous silicon carbide layer is 0.5 to 5 microns.

[0010] A second aspect of an embodiment of the present application provides a bonded silicon carbide substrate, comprising at least a polycrystalline silicon carbide carrier substrate as described above, and a single crystal silicon carbide substrate bonded to a bonding surface of the polycrystalline silicon carbide carrier substrate.

[0011] A third aspect of the embodiments of the present application provides a method for preparing a polycrystalline silicon carbide carrier substrate, comprising at least:

[0012] forming an amorphous silicon carbide material layer on the surface of the substrate;

[0013] Performing thinning and / or polishing surface treatment on the amorphous silicon carbide material layer to form the amorphous silicon carbide layer;

[0014] Polycrystalline silicon carbide material is deposited on the surface of the amorphous silicon carbide layer by adjusting process conditions to form a polycrystalline silicon carbide layer; wherein the surface of the polycrystalline silicon carbide layer away from the amorphous silicon carbide layer is a bonding surface for bonding to a single-crystalline silicon carbide substrate; and the roughness of the bonding surface of the polycrystalline silicon carbide layer is not greater than 0.5 nanometers.

[0015] In an optional embodiment of the present application, the forming of an amorphous silicon carbide material layer on the surface of the substrate includes:

[0016] Using a chemical vapor deposition process, a plasma enhanced chemical vapor deposition process or a sputtering process, an initial amorphous silicon carbide layer as the amorphous silicon carbide material layer is formed on the surface of the substrate; the thickness of the initial amorphous silicon carbide layer is 1 to 10 microns;

[0017] The initial amorphous silicon carbide layer is polished or ground to form the amorphous silicon carbide layer.

[0018] In an optional embodiment of the present application, the step of depositing a polycrystalline silicon carbide material on the surface of the amorphous silicon carbide layer by adjusting process conditions to form a polycrystalline silicon carbide layer includes:

[0019] Forming a polycrystalline silicon carbide material layer on the surface of the amorphous silicon carbide layer by adjusting process conditions;

[0020] The surface of the polycrystalline silicon carbide material layer away from the amorphous silicon carbide layer is thinned and / or polished to form the polycrystalline silicon carbide layer.

[0021] In an optional embodiment of the present application, the step of depositing a polycrystalline silicon carbide material on the surface of the amorphous silicon carbide layer by adjusting process conditions to form a polycrystalline silicon carbide layer includes:

[0022] A plurality of polycrystalline silicon carbide sublayers are sequentially formed on a surface of the amorphous silicon carbide layer away from the substrate; wherein, when forming two adjacent polycrystalline silicon carbide sublayers, a growth rate of the polycrystalline silicon carbide sublayer away from the substrate is greater than a growth rate of the polycrystalline silicon carbide sublayer close to the substrate.

[0023] In an optional embodiment of the present application, the method for preparing the polycrystalline silicon carbide carrier substrate further includes:

[0024] After forming the last layer of the polycrystalline silicon carbide sublayer, the surface of the last layer of the polycrystalline silicon carbide sublayer away from the amorphous silicon carbide layer is ground or polished so that the surface of the last layer of the polycrystalline silicon carbide sublayer away from the amorphous silicon carbide layer serves as the bonding surface.

[0025] In an optional embodiment of the present application, the method for preparing the polycrystalline silicon carbide carrier substrate further includes:

[0026] Cutting the edge of the substrate after forming the polycrystalline silicon carbide material layer to expose the isostatically pressed graphite sheet of the substrate; wherein the substrate is an isostatically pressed graphite sheet;

[0027] The isostatically pressed graphite sheet is burned off to obtain a new polycrystalline silicon carbide carrier substrate; the new polycrystalline silicon carbide carrier substrate has the stacked amorphous silicon carbide layer and the polycrystalline silicon carbide layer.

[0028] In the first aspect, the polycrystalline silicon carbide carrier substrate of the embodiment of the present application has a bonding surface B, and the bonding surface B can be bonded with a single-crystal silicon carbide substrate to form a bonded substrate. Among them, the polycrystalline silicon carbide carrier substrate has a polycrystalline silicon carbide layer, and the polycrystalline silicon carbide layer can make the bonded substrate have a lower resistivity, thereby reducing the on-resistance of the silicon carbide device and reducing the power consumption of the silicon carbide device.

[0029] On the second aspect, the embodiments of the present application can make the bonding surface B of the polycrystalline silicon carbide carrier substrate have a small roughness through simple processes such as polishing to meet the requirements of bonding a single-crystal silicon carbide substrate. In the case of forming an amorphous silicon carbide layer, the amorphous silicon carbide layer can cover the surface of a graphite substrate or any substrate, so that the uneven surface of the substrate will not affect the crystal orientation and grain size of the polycrystalline silicon carbide layer, ensuring that the polycrystalline silicon carbide layer has good growth quality and growth rate.

[0030] On the third aspect, crystals include amorphous, polycrystalline and single crystal. The polycrystalline process in the traditional scheme has large grains and is uneven, difficult to process, and difficult to reach below 0.5nm; the single crystal process conditions are difficult and the cost is high; the embodiment of the present application forms a polycrystalline silicon carbide layer on the surface of the amorphous silicon carbide layer, and the amorphous process conditions are simple (for example, it can be prepared by plasma enhanced chemical vapor deposition (PECVD) or sputtering. PECVD can use a temperature of about 400°C, and the reaction gas uses hydrocarbon substances such as methane (CH4) and silane (SiH4) to deposit an amorphous silicon carbide film on an isostatically pressed graphite substrate. The sputtering method is generally carried out by sputtering a high-purity polycrystalline Si target in a mixture of CH4 and Ar, or sputtering a SIC target in a mixed atmosphere of Ar and H2). Since the amorphous silicon carbide layer formed first is amorphous and has no crystalline properties, the crystals of the upper polycrystalline silicon carbide layer will not grow disorderly along the surface of a substrate such as a graphite sheet, resulting in poor quality of the entire crystal. In the embodiment of the present application, the polycrystalline silicon carbide layer is formed on the surface of the amorphous silicon carbide layer, which can ensure that the grains of the polycrystalline silicon carbide layer have good growth quality and growth rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0032] Figure 1 This is a crystal morphology diagram of the growth surface of a polycrystalline silicon carbide layer grown on the surface of an isostatically pressed graphite sheet in the related art.

[0033] Figure 2 This is a crystal morphology diagram of the graphite surface of a polycrystalline silicon carbide layer grown on the surface of an isostatically pressed graphite sheet in the related art.

[0034] Figure 3 This is a crystal morphology diagram of a growth surface of a polycrystalline silicon carbide layer grown on the surface of an isostatically pressed graphite sheet after chemical mechanical polishing in the related art.

[0035] Figures 4a to 4d This is a surface roughness detection diagram of a growth surface of a polycrystalline silicon carbide layer grown on the surface of an isostatically pressed graphite sheet after chemical mechanical polishing in the related art.

[0036] Figure 5 This is a schematic diagram of the structure of a graphite substrate in one embodiment of the present application.

[0037] Figure 6 This is a schematic structural diagram of forming an amorphous silicon carbide material layer on the surface of a graphite substrate in one embodiment of the present application.

[0038] Figure 7This is a schematic structural diagram of grinding the surface of an amorphous silicon carbide material layer to form an amorphous silicon carbide layer in one embodiment of the present application.

[0039] Figure 8 This is a schematic diagram of forming a polycrystalline silicon carbide material layer on the surface of an amorphous silicon carbide layer in one embodiment of the present application.

[0040] Fig. 9 This is a schematic structural diagram of polishing the surface of a polycrystalline silicon carbide material layer to form a bonding surface in one embodiment of the present application.

[0041] Fig.10 This is a roughness detection diagram of the bonding surface formed by the polycrystalline silicon carbide layer in Example 1 of the present application.

[0042] Fig.11 This is a schematic diagram of the structure in which the edge of the intermediate substrate is machined to expose the graphite substrate in one embodiment of the present application.

[0043] Fig.12 This is a schematic diagram of the structure in which the graphite substrate is removed in one embodiment of the present application.

[0044] Fig.13 This is a schematic structural diagram of polishing the surface of a polycrystalline silicon carbide material layer to form a bonding surface in one embodiment of the present application.

[0045] Fig.14 This is a roughness detection diagram of the bonding surface formed by the silicon carbide nanocrystalline layer in the embodiment of the present application. DETAILED DESCRIPTION

[0046] In the process of realizing the present application, the applicant discovered that the crystal quality of polycrystalline silicon carbide grown using isostatically pressed graphite sheets as deposition substrates is poor and cannot meet the requirements for bonding single crystal silicon carbide even after polishing.

[0047] In response to the above problems, a polycrystalline silicon carbide carrier substrate, a bonded silicon carbide substrate and a method for preparing the same are provided in the embodiments of the present application, so that a polycrystalline silicon carbide carrier substrate that can meet the requirements of bonding single-crystalline silicon carbide can be prepared based on any substrate. In order to make the purpose, technical solution and advantages of the present application clearer, a polycrystalline silicon carbide carrier substrate, a bonded silicon carbide substrate and a method for preparing the same are further described in detail below through embodiments and in combination with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0048] The serial numbers assigned to the components herein, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in this application, unless otherwise specified, include direct and indirect connections (couplings). In the description of this application, it should be understood that the orientation or position relationship indicated by the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", etc. are based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to this application.

[0049] In the present application, unless otherwise clearly specified and limited, a first feature being “above” or “below” a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being “above”, “above”, and “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below”, “below”, and “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0050] In an embodiment of the present application, a method for preparing a polycrystalline silicon carbide carrier substrate includes: forming an amorphous silicon carbide material layer on the surface of a substrate; performing thinning and / or polishing surface treatment on the amorphous silicon carbide material layer to form the amorphous silicon carbide layer; depositing polycrystalline silicon carbide material on the surface of the amorphous silicon carbide layer by adjusting process conditions to form a polycrystalline silicon carbide layer 300; wherein the surface of the polycrystalline silicon carbide layer 300 away from the amorphous silicon carbide layer is a bonding surface B for bonding to a single crystal silicon carbide substrate 400; the grain size and roughness of the amorphous silicon carbide layer are both smaller than those of the substrate; the grain size and roughness of the polycrystalline silicon carbide layer 300 are both smaller than those of the amorphous silicon carbide layer.

[0051] In the related art, isostatically pressed graphite sheets cannot be used as the deposition substrate for the polycrystalline silicon carbide layer 300, mainly because the surface flatness and surface roughness of isostatically pressed graphite are relatively poor (both are at the micron level). In addition, isostatically pressed graphite has many particles, which are easily volatilized under gas extraction at high temperatures; after direct deposition of polycrystalline silicon carbide, the crystal growth will be very poor, the crystal orientation and lattice will be very disordered, and the grain size will be different, which will result in obvious grain boundaries, uneven grains, and large surface roughness after chemical mechanical polishing, which cannot meet the requirements of bonding single crystal silicon carbide substrate 400.

[0052] Figure 1In the related art, when a polycrystalline silicon carbide layer is directly formed on the surface of an isostatically pressed graphite sheet, the crystal morphology of the polycrystalline silicon carbide layer away from the surface (growth surface) of the isostatically pressed graphite sheet. As can be seen from Figures a, b, and c, the grains on the growth surface grow into a block structure, a large number of small grains are attached to the large grains, and there is cluster growth between the grains.

[0053] Figure 2 In the related art, when a polycrystalline silicon carbide layer is directly formed on the surface of an isostatically pressed graphite sheet, the crystal morphology of the polycrystalline silicon carbide layer close to the surface (graphite surface) of the isostatically pressed graphite sheet. As can be seen from Figures d, e, and f, there are holes on the graphite surface and the grains around the holes are accumulated and grown.

[0054] Figure 3 In the related art, after a polycrystalline silicon carbide layer is directly formed on the surface of an isostatically pressed graphite sheet, the polycrystalline silicon carbide layer is subjected to chemical mechanical polishing and the crystal morphology after polishing. Figure 3 It can be seen that the overall grain boundary effect of polycrystalline silicon carbide is obvious; the grain size is uneven, with individual sizes of 100um and conventional large-size grains of 30 to 50um. This is because the surface roughness of the polycrystalline silicon carbide layer directly generated from the isostatically pressed graphite sheet is very poor, and the chemical polishing rates of grains in different crystal directions are different during chemical mechanical polishing, resulting in a relatively poor surface roughness after final processing, and generally the roughness within the range of 10*10um is greater than 10nm.

[0055] Figures 4a to 4d In the related art, after a polycrystalline silicon carbide layer is directly formed on the surface of an isostatically pressed graphite sheet, the polycrystalline silicon carbide layer is subjected to chemical mechanical polishing and the roughness detection diagram after polishing. Figures 4a to 4d The roughness of the center point 5*5um test is relatively small because the entire grain is measured. The average value of the overall roughness within the range of 100*100um is about 10nm, which does not meet the bonding requirements (<0.5nm).

[0056] As follows, the method for preparing a polycrystalline silicon carbide carrier substrate according to an embodiment of the present application and its effects are exemplarily described with reference to the accompanying drawings.

[0057] See also Fig. 9 The present application embodiment provides a polycrystalline silicon carbide carrier substrate, comprising at least:

[0058] An amorphous silicon carbide layer 210 and a polycrystalline silicon carbide layer 300 are stacked in sequence along a vertical direction; wherein the surface of the polycrystalline silicon carbide layer 300 away from the amorphous silicon carbide layer 210 is a bonding surface B for bonding to a single-crystal silicon carbide substrate 400; the roughness of the amorphous silicon carbide layer 210 is smaller than that of the substrate 100; the grain size and roughness of the polycrystalline silicon carbide layer 300 are both smaller than those of the amorphous silicon carbide layer 210; the roughness of the bonding surface of the polycrystalline silicon carbide layer is not greater than 0.5 nanometers.

[0059] The surface roughness of the bonding surface B of the polycrystalline silicon carbide carrier substrate is not greater than 0.5 nanometers, which can ensure the effective bonding of the polycrystalline silicon carbide carrier substrate and the single crystal silicon carbide substrate 400 .

[0060] The polycrystalline silicon carbide carrier substrate provided in the embodiment of the present application is applied to power devices of the silicon carbide system. In order to ensure the performance of the polycrystalline silicon carbide carrier substrate and the power device, the amorphous silicon carbide layer 210 and the polycrystalline silicon carbide layer 300 in the present application are made of the same material to avoid the occurrence of lattice mismatch due to different expansion coefficients caused by the amorphous silicon carbide layer 210 and the polycrystalline silicon carbide layer 300 using different materials, which has a great impact on the performance of the substrate and the device. In addition, the amorphous silicon carbide layer 210 and the polycrystalline silicon carbide layer 300 in the embodiment of the present application are both made of silicon carbide materials. Compared with traditional silicon materials, silicon carbide has the following advantages:

[0061] In terms of atomic structure, silicon is a typical semiconductor material with a diamond lattice crystal structure, an atomic spacing of 0.235nm, and a bond strength of 1.04eV. Silicon carbide is composed of silicon and carbon atoms, and its crystal structure is similar to graphite, with an atomic spacing of 0.307nm and a bond strength of 3.2eV. This means that silicon carbide has a larger atomic spacing and a higher bond strength.

[0062] In terms of physical properties, the density of silicon is 2.33 g / cm 3 , the melting point is 1414℃; and the density of silicon carbide is 3.21g / cm 3 , with a melting point as high as 2700°C. These data show that silicon carbide is more stable than silicon at high temperatures.

[0063] In terms of chemical properties, both silicon and silicon carbide have high chemical stability. However, silicon is susceptible to oxidation and corrosion at high temperatures, while silicon carbide exhibits better high temperature resistance. This is mainly because silicon carbide has a large atomic spacing, high bond strength, a small thermal expansion coefficient, and high thermal conductivity.

[0064] That is, silicon carbide is a further technological innovation based on traditional silicon materials. It is more suitable for power devices and provides overall performance for power devices.

[0065] In addition, the polycrystalline silicon carbide carrier substrate provided in the embodiment of the present application can be used in the preparation of power devices. Therefore, the amorphous silicon carbide layer 210 and the polycrystalline silicon carbide layer 300 stacked in sequence along the vertical direction are directly adhered to each other to achieve conduction or conductivity, and there cannot be any insulating layer or layers that affect its conductive properties, thereby ensuring the stable working performance of the power device.

[0066] It should be explained that the actual polycrystalline silicon carbide carrier substrate product does not include the substrate 100, but the semi-finished product in the preparation process may include the substrate 100 or may not include the substrate 100. In the implementation of the present application, an amorphous silicon carbide layer 210 is first formed on the surface of the substrate 100, which isolates the isostatically pressed graphite substrate 100 from the polycrystalline silicon carbide layer 300, thereby avoiding the problem of the surface characteristics of the isostatically pressed graphite substrate 100 causing the crystal orientation disorder of the polycrystalline silicon carbide layer 300, and thus facilitating the polycrystalline silicon carbide layer 300 to have better flatness after polishing or grinding.

[0067] The substrate 100 in the embodiment of the present application can be an isostatic graphite substrate, for example, an isostatic graphite sheet. Isostatic graphite has the advantages of high temperature resistance, good thermal stability and good thermal uniformity, and the thermal expansion coefficient can be close to that of silicon carbide. It is understandable that in other embodiments of the present application, the substrate 100 does not necessarily adopt an isostatic graphite substrate, and other types of substrates can also be used. The amorphous silicon carbide layer 210 can isolate the influence of the substrate 100 on the polycrystalline silicon carbide layer 300, and even if the substrate 100 of any material is replaced, it can still ensure that the polycrystalline silicon carbide carrier substrate has a bonding surface B with high flatness through the polycrystalline silicon carbide layer 300.

[0068] In a first aspect, the present application provides a polycrystalline silicon carbide carrier substrate, a bonded silicon carbide substrate, and a preparation method thereof, wherein the polycrystalline silicon carbide carrier substrate has a bonding surface B, and the bonding surface B can be bonded with a single-crystal silicon carbide substrate to form a bonded substrate. The polycrystalline silicon carbide carrier substrate has a polycrystalline silicon carbide layer, and the polycrystalline silicon carbide layer can make the bonded substrate have a lower resistivity, thereby reducing the on-resistance of the silicon carbide device and reducing the power consumption of the silicon carbide device.

[0069] Secondly, the embodiment of the present application can make the bonding surface B of the polycrystalline silicon carbide carrier substrate have a smaller roughness to meet the requirements of bonding the single-crystalline silicon carbide substrate 400. When the amorphous silicon carbide layer 210 is formed, the amorphous silicon carbide layer 210 can cover the surface of the graphite substrate or any substrate, so that the uneven surface of the substrate 100 will not affect the crystal orientation and grain size of the polycrystalline silicon carbide layer 300, ensuring that the polycrystalline silicon carbide layer 300 has good growth quality and growth rate.

[0070] On the third aspect, crystals generally include amorphous, polycrystalline and single crystal. The polycrystalline process in the traditional scheme has large grains and is uneven, difficult to process, and difficult to reach below 0.5nm; the single crystal process conditions are difficult and the cost is high; the embodiment of the present application forms a polycrystalline silicon carbide layer on the surface of the amorphous silicon carbide layer, and the amorphous process conditions are simple (for example, it can be prepared by plasma enhanced chemical vapor deposition (PECVD) or sputtering. PECVD can use a temperature of about 400°C, and the reaction gas uses hydrocarbon substances such as methane (CH4) and silane (SiH4) to deposit an amorphous silicon carbide film on an isostatically pressed graphite substrate. The sputtering method is generally carried out by sputtering a high-purity polycrystalline Si target in a mixture of CH4 and Ar, or sputtering a SIC target in a mixed atmosphere of Ar and H2). Since the amorphous silicon carbide layer formed first is amorphous and has no crystalline properties, the crystals of the upper polycrystalline silicon carbide layer will not grow disorderly along the surface of a substrate such as a graphite sheet, resulting in poor quality of the entire crystal. In the embodiment of the present application, the polycrystalline silicon carbide layer is formed on the surface of the amorphous silicon carbide layer, which can ensure that the grains of the polycrystalline silicon carbide layer have good growth quality and growth rate.

[0071] In an optional implementation of the present application, the polycrystalline silicon carbide layer 300 may be formed by a deposition process, for example, a plasma enhanced vapor chemical deposition process, a vapor chemical deposition process or a sputtering process.

[0072] In an optional embodiment of the present application, please continue to refer to Fig. 9The polycrystalline silicon carbide layer 300 is formed between the amorphous silicon carbide layer 210 and the bonding surface B, and the polycrystalline silicon carbide layer 300 at least includes: a plurality of polycrystalline silicon carbide sublayers 310 stacked in sequence from the amorphous silicon carbide layer 210 to the bonding surface B; in two adjacent layers of polycrystalline silicon carbide sublayers 310, the grain size of the polycrystalline silicon carbide sublayer 310 close to the bonding surface B is not greater than the grain size of the polycrystalline silicon carbide sublayer 310 away from the bonding surface B. In other words, when the polycrystalline silicon carbide layer 300 is formed on the surface of the amorphous silicon carbide layer 210, the polycrystalline silicon carbide preparation process can be adjusted multiple times to form multiple layers of polycrystalline silicon carbide sublayers 310 respectively; specifically, each time the polycrystalline silicon carbide preparation process is adjusted, the growth rate of the polycrystalline silicon carbide sublayer is accelerated to suppress the surface roughness of the polycrystalline silicon carbide sublayer. In this embodiment, when the polycrystalline silicon carbide layer 300 is formed starting from the amorphous silicon carbide layer 210, the deposition rate of the polycrystalline silicon carbide can be increased sequentially to prevent the rough surface of the previous polycrystalline silicon carbide sublayer from inducing the next polycrystalline silicon carbide sublayer to form a rougher surface at a low deposition rate, and to inhibit the growth of polycrystalline silicon grains, reduce the influence of the sudden change of grain size on the surface flatness and the influence on the grain uniformity, which can make each polycrystalline silicon carbide sublayer 310 maintain high uniformity and low surface roughness, and then make the last polycrystalline silicon carbide sublayer 31x have a uniform grain size and a smooth surface. When the crystal grain size and crystal orientation of the last polycrystalline silicon carbide sublayer 31x are relatively uniform, the surface with high flatness can be obtained by grinding or polishing.

[0073] Please continue to see Fig. 9 In an optional embodiment of the present application, if, as in the above embodiment, the polycrystalline silicon carbide layer 300 at least includes: a plurality of polycrystalline silicon carbide sublayers 310 stacked in sequence from the amorphous silicon carbide layer 210 to the bonding surface; the surface of the polycrystalline silicon carbide material layer 300x that has not been ground or polished and is away from the amorphous silicon carbide layer 210 can be thinned and / or polished to make the surface roughness of the polycrystalline silicon carbide layer 300 away from the amorphous silicon carbide layer 210 not greater than 0.5 nanometers. In this way, the surface of the polycrystalline silicon carbide layer 300 away from the amorphous silicon carbide layer 210 can be directly used as the bonding surface B to bond the single-crystal silicon carbide substrate 400, that is, the roughness of the bonding surface B of the polycrystalline silicon carbide layer 300 is not greater than 0.5 nanometers. For example, the last layer of polycrystalline silicon carbide sublayer 31x can be polished to reduce the surface roughness of the last layer of polycrystalline silicon carbide sublayer 31x to not greater than 0.5 nanometers. In this way, the surface of the last polycrystalline silicon carbide sub-layer 31 x can serve as the bonding surface B.

[0074] In one example, when the polycrystalline silicon carbide layer 300 is formed, polycrystalline silicon carbide may be first deposited at a low process temperature by a vapor phase chemical deposition process, for example, polycrystalline silicon carbide may be deposited at a process temperature less than 1250° C., and fine polycrystalline crystals may be grown to form the first polycrystalline silicon carbide sublayer 311. Then, one or both of providing a higher process temperature and increasing the concentration of the reaction gas may be adopted to increase the deposition rate, and finally a high-quality polycrystalline silicon carbide layer 300 having a thickness of about 1 mm may be grown.

[0075] In an optional embodiment of the present application, the thickness of the polycrystalline silicon carbide layer is not greater than 1 mm, so that the polycrystalline silicon carbide carrier substrate has a bonding surface with appropriate thickness, appropriate crystallinity transition and stable bonding properties.

[0076] The final total thickness of the polycrystalline silicon carbide layer can be about 1mm. For example, a distributed process method can be used: adjust the polycrystalline silicon carbide furnace process, grow another fine polycrystalline silicon carbide layer with a thickness of 50 to 100 microns and a process temperature of <1250°C; then adjust the polycrystalline furnace process conditions, gradually increase the temperature to 1400°C, increase the deposition rate, and improve the growth efficiency. The heating rate is controlled between 5°C / minute and 10°C / minute. If the heating rate is too low, the process time is too long, affecting the output; if it is too high, it will cause excessive grain variation, resulting in poor crystal quality. The final growth reaches the target thickness of about 1mm.

[0077] In the first embodiment of the present application, see Figure 7 , Fig. 9 and Fig.13 , the roughness of the surface of the amorphous silicon carbide layer 210 close to the polycrystalline silicon carbide layer 300 is less than or equal to 15 nanometers, for example, 1 to 15 nanometers. In this way, the surface of the amorphous silicon carbide layer 210 close to the polycrystalline silicon carbide layer 300 serves as the first transition surface A, which can provide a high-flatness surface for the growth of the polycrystalline silicon carbide layer 300, thereby improving the growth rate and growth quality of the polycrystalline silicon carbide layer 300.

[0078] For example, see Figure 5 to Figure 7, an amorphous silicon carbide material layer 210x may be formed on the substrate 100 first, and the thickness of the amorphous silicon carbide material layer 210x may be at least not less than the surface roughness of the substrate 100, for example, it may be more than twice the surface roughness of the graphite substrate. Then the amorphous silicon carbide material layer 210x is ground or polished to form an amorphous silicon carbide layer 210, so that the side of the amorphous silicon carbide layer 210 away from the substrate 100 forms a first transition surface A, and the amorphous silicon carbide layer 210 formed after the thinning and / or polishing surface treatment still covers the surface of the substrate 100. The thinning and / or polishing surface treatment may be grinding or polishing, and the thinning and / or polishing surface treatment is light polishing, which is different from heavy polishing. Light polishing mainly uses micro-powder-level abrasives, such as silicon dioxide and aluminum oxide, and the particle size is controlled to be a few microns to tens of microns, to ensure that the surface finish after treatment is high. On the contrary, heavy polishing uses coarser abrasives, such as silicon carbide and zirconium oxide, with particle sizes ranging from tens to hundreds of microns, which will leave scratches and lines on the surface after treatment. Secondly, light polishing takes a shorter time and has a lighter force, mainly removing surface burrs and oxides; while heavy polishing takes a longer time and has a greater force, which can completely remove surface scratches and unevenness.

[0079] In an optional embodiment of the present application, the material of the amorphous silicon carbide layer 210 may be amorphous silicon carbide, in particular, amorphous silicon carbide. In this way, although the surface of the substrate 100 is not flat, the material of the amorphous silicon carbide material layer 210x is amorphous and does not have crystalline properties. It will not grow disorderly along the substrate 100, such as different rough surfaces of the graphite substrate, like a crystal, and will not affect subsequent grinding or polishing due to poor crystal quality. The amorphous silicon carbide layer 210 does not form obvious crystal forms and grains, so a transition layer with uniform material covering the substrate 100 can be provided. The transition layer can provide a first transition surface A with high flatness after the grinding or polishing process due to the uniform material and the absence of messy grains; when the polycrystalline silicon carbide layer 300 is grown on the first transition surface A of the amorphous silicon carbide layer 210, it can avoid inducing the polycrystalline silicon carbide layer 300 to form grains of multiple different crystal orientations, which can improve the growth quality of the polycrystalline silicon carbide layer 300.

[0080] In another optional embodiment of the present application, the material of the amorphous silicon carbide layer 210 may also be polycrystalline silicon carbide with a very small grain size, for example, nanocrystalline silicon carbide. Similar to the use of amorphous silicon carbide, polycrystalline silicon carbide with a very small grain size can also provide a transition layer with a relatively uniform grain size when growing on the surface of the substrate 100. The transition layer provides a first transition surface A with a high flatness after a grinding or polishing process, thereby facilitating the improvement of the growth quality of the polycrystalline silicon carbide layer 300.

[0081] In another optional embodiment of the present application, the amorphous silicon carbide layer 210 may also be a multi-layer composite transition layer, which may include multiple sub-material layers; in two adjacent sub-material layers, the material of the sub-material layer away from the polycrystalline silicon carbide layer 300 is amorphous silicon carbide, or the grains of the material of the sub-material layer away from the polycrystalline silicon carbide layer 300 are smaller. For example, the amorphous silicon carbide layer 210 may include a first silicon carbide sub-layer and a second silicon carbide sub-layer stacked, the first silicon carbide sub-layer being located on the side of the second silicon carbide sub-layer away from the polycrystalline silicon carbide layer 300; the material of the first silicon carbide sub-layer may be amorphous silicon carbide, and the material of the second silicon carbide sub-layer may be nanocrystalline silicon carbide.

[0082] In an optional embodiment of the present application, in the polycrystalline silicon carbide carrier substrate, the thickness of the amorphous silicon carbide layer 210 may be between 0.5 microns and 5 microns, for example, between 1 micron and 3 microns. As an example, the thickness of the amorphous silicon carbide layer 210 may be 0.5 microns, 1.0 microns, 1.5 microns, 2.0 microns, 2.5 microns, 3.0 microns, 3.5 microns, or 4.0 microns.

[0083] In an optional embodiment of the present application, when the amorphous silicon carbide material layer 210x is formed on the substrate 100, the thickness of the amorphous silicon carbide material layer 210x can be between 1 micron and 10 microns, for example, the thickness of the amorphous silicon carbide material layer 210x is 1 micron, 2 microns, 3 microns, 4 microns, 5 microns or 6 microns. On the one hand, this can ensure that the amorphous silicon carbide material layer 210x can effectively fill the gaps on the surface of the substrate 100, and ensure that the amorphous silicon carbide layer 210 formed after thinning and / or polishing surface treatment such as grinding or polishing can effectively cover the surface of the substrate 100. On the other hand, this can reserve sufficient thickness for the polishing and thinning treatment, so that a first transition surface A with high flatness can be formed by sufficient grinding or polishing. Furthermore, it can avoid that the excessive thickness of the amorphous silicon carbide material layer 210x affects the production capacity and increases the cost.

[0084] In an optional embodiment of the present application, the amorphous silicon carbide material layer 210x may be formed by a vapor chemical deposition process, a plasma enhanced vapor chemical deposition process or a sputtering process. Further, the amorphous silicon carbide material layer 210x as the amorphous silicon carbide layer 210 may be formed on the surface of the graphite substrate 100 by a chemical vapor deposition process, a plasma enhanced chemical vapor deposition process or a sputtering process.

[0085] It is understandable that in some other embodiments of the present application, after the polycrystalline silicon carbide layer 300 is formed on the surface of the amorphous silicon carbide layer 210, the silicon carbide nanocrystalline layer 220 may continue to be formed on the surface of the polycrystalline silicon carbide layer 300, and the surface of the silicon carbide nanocrystalline layer 220 is used as the bonding surface B. That is, a layer of silicon carbide nanocrystalline layer is deposited on the surface of the above-mentioned polycrystalline silicon carbide layer; optionally, the roughness of the bonding surface of the silicon carbide nanocrystalline layer is not greater than 0.5 nanometers; optionally, the thickness of the silicon carbide nanocrystalline layer is not greater than 15nm. Optionally, the amorphous silicon carbide layer in the above-mentioned embodiment can be removed. That is to say, in an optional embodiment of the present application, a new polycrystalline silicon carbide carrier substrate can be formed, which at least includes: a polycrystalline silicon carbide layer and a silicon carbide nanocrystalline layer are stacked in sequence in the vertical direction.

[0086] An embodiment of the present application provides a bonded silicon carbide substrate, comprising at least the polycrystalline silicon carbide carrier substrate as described above, and a single crystal silicon carbide substrate bonded to a bonding surface of the polycrystalline silicon carbide carrier substrate.

[0087] After obtaining the polycrystalline silicon carbide carrier substrate, a single crystal silicon carbide substrate 400 can also be bonded to the bonding surface B of the polycrystalline silicon carbide carrier substrate to form a bonded silicon carbide substrate. For example, a standard smart cut process (intelligent peeling process) can be used to prepare the bonded substrate. The beneficial effects of the polycrystalline silicon carbide carrier substrate have been described in detail in the above embodiments and will not be repeated here. In summary, the embodiments of the present application provide a bonded silicon carbide substrate with better bonding effect, stronger stability, higher efficiency, and lower cost or substrate material requirements.

[0088] In an optional embodiment of the present application, the present application embodiment provides a method for preparing a polycrystalline silicon carbide carrier substrate, see Figures 5 to 9 The method for preparing the polycrystalline silicon carbide carrier substrate includes the following steps S101 to S104:

[0089] Step S101, see Figure 5 , an isostatically pressed graphite sheet is provided as a substrate 100 .

[0090] Step S102, see Figure 6 , forming an amorphous silicon carbide material layer 210x on the surface of the substrate;

[0091] The thickness of the amorphous silicon carbide material layer 210x is about 1 micron, which can effectively cover the surface of the isostatically pressed graphite sheet. Optionally, the amorphous silicon carbide layer can be prepared by a deposition method, for example, the amorphous silicon carbide material layer 210x is prepared by a plasma enhanced chemical vapor deposition method or a sputtering method. Optionally, when the amorphous silicon carbide material layer 210x is deposited by a plasma enhanced chemical vapor deposition process, the reaction gases used are methane and silane; the deposition temperature is about 400°C, for example, between 350°C and 450°C. Of course, in other examples, other materials can also be used to provide a carbon source or a silicon source; for example, ethane or propane can also be used as a carbon source. Optionally, during deposition, a carrier gas can be used to transport the reaction gas, and the carrier gas can be an inert gas, a reducing gas, or a mixture thereof. For example, the carrier gas can include a mixture of one or more of argon, helium, and hydrogen. Optionally, when the amorphous silicon carbide material layer 210x is deposited by sputtering, a high-purity polycrystalline silicon target can be sputtered in an atmosphere of methane and argon, or a silicon carbide target can be sputtered in a mixed atmosphere of argon and hydrogen. It is understood that other methods can also be used to prepare the amorphous silicon carbide material layer 210x when necessary, such as using a physical vapor transport method, a liquid phase deposition method, etc. to prepare the amorphous silicon carbide material layer 210x, which is not specifically limited in the embodiments of the present application.

[0092] Step S103, see Figure 7 , performing thinning and / or polishing treatment on the amorphous silicon carbide material layer 210x to form the amorphous silicon carbide layer 210;

[0093] For example Figure 7 In the process, the surface of the amorphous silicon carbide material layer 210x away from the substrate 100 is polished or ground to form a first transition surface A, so that the surface roughness of the amorphous silicon carbide layer 210 reaches the nanometer level; the amorphous silicon carbide material layer 210x is thinned by light polishing or polished surface treatment to form an amorphous silicon carbide layer 210 having a first transition surface A.

[0094] Optionally, the amorphous silicon carbide material layer 210x may be lightly polished by mechanical polishing, for example, the amorphous silicon carbide material layer 210x may be thinned and / or polished by diamond mechanical polishing. Of course, in other examples, the amorphous silicon carbide material layer 210x may also be thinned and / or polished by mechanical chemical polishing, which is not specifically limited in the embodiments of the present application.

[0095] Optionally, the amorphous silicon carbide material layer 210x retains at least 0.5 microns after the light polishing and thinning process to ensure that the surface of the substrate 100 used to grow the polycrystalline silicon carbide layer 300 is completely covered by the amorphous silicon carbide layer 210, so as to prevent graphite particles from affecting the subsequent growth of the polycrystalline silicon carbide layer 300. Of course, in other examples, the thickness of the amorphous silicon carbide material layer 210x can be greater than 1 micron, so that the amorphous silicon carbide layer 210 has a greater thickness, for example, a thickness of 0.5 to 5 microns.

[0096] Step S104, see Figure 8 , depositing polycrystalline silicon carbide material on the surface of the amorphous silicon carbide layer 210 by adjusting process conditions to form a polycrystalline silicon carbide layer 300;

[0097] Among them, the surface of the polycrystalline silicon carbide layer 300 away from the amorphous silicon carbide layer 210 is a bonding surface B for bonding to a single-crystal silicon carbide substrate 400; the roughness of the bonding surface B of the polycrystalline silicon carbide layer 300 is not greater than 0.5 nanometers; the roughness of the amorphous silicon carbide layer 210 is smaller than that of the substrate; the roughness of the polycrystalline silicon carbide layer 300 is smaller than that of the amorphous silicon carbide layer 210.

[0098] On the one hand, the method for preparing a polycrystalline silicon carbide carrier substrate provided in an embodiment of the present application first forms an amorphous silicon carbide layer 210 on the surface of the substrate 100 before forming the polycrystalline silicon carbide layer 300. The amorphous silicon carbide layer 210 can cover the surface of a graphite substrate or any substrate, so that the uneven surface of the substrate 100 will not affect the crystal orientation and grain size of the polycrystalline silicon carbide layer 300, thereby ensuring that the polycrystalline silicon carbide layer 300 has good growth quality and is not easily affected by the substrate material, and the substrate material cost is lower; on the other hand, the amorphous silicon carbide layer 210 has a flat surface, and further forming the polycrystalline silicon carbide layer 300 on its surface is more efficient and has a higher generated quality.

[0099] In an optional embodiment of the present application, the above step S102, forming an amorphous silicon carbide material layer 210x on the surface of the substrate, includes the following steps:

[0100] A chemical vapor deposition process, a plasma enhanced chemical vapor deposition process or a sputtering process is used to form an initial amorphous silicon carbide layer as the amorphous silicon carbide material layer 210x on the surface of the substrate 100; the thickness of the initial amorphous silicon carbide layer is 1 to 10 microns. The initial amorphous silicon carbide layer is then polished or ground to form the amorphous silicon carbide layer 210 with a thickness of 0.5 to 5 microns.

[0101] In an optional embodiment of the present application, the above step S103, wherein the polycrystalline silicon carbide material is deposited on the surface of the amorphous silicon carbide layer 210 by adjusting the process conditions to form the polycrystalline silicon carbide layer 300, comprises:

[0102] The polycrystalline silicon carbide material layer 300x is formed on the surface of the amorphous silicon carbide layer 210 by adjusting the process conditions;

[0103] The surface of the polycrystalline silicon carbide material layer 300 x away from the amorphous silicon carbide layer is thinned and / or polished to form the polycrystalline silicon carbide layer 300 .

[0104] Adjust the process conditions of the polycrystalline silicon carbide furnace (for example, change the conditions of chemical vapor deposition), grow a first polycrystalline silicon carbide sublayer 311 on the surface of the amorphous silicon carbide layer 210, the thickness of the first polycrystalline silicon carbide sublayer 311 is not more than 1 mm, and the process temperature does not exceed 1250°C. In this way, the grain size of the first polycrystalline silicon carbide sublayer 311 is very small. Please continue to refer to Figure 8 , and then adjust the process conditions of the polycrystalline silicon carbide furnace, gradually increase the temperature to 1400°C, and gradually increase the deposition rate to sequentially form a multilayer polycrystalline silicon carbide sublayer 310; each unground or polished polycrystalline silicon carbide sublayer constitutes a polycrystalline silicon carbide material layer 300x. Optionally, in the process of growing polycrystalline silicon carbide, when it is necessary to increase the process temperature, the heating rate is controlled between 5 and 10°C / min. If the heating rate is too low, the process time will be too long. If the heating rate is too large, the grain variation will be too large, which will lead to a decrease in crystal quality. Optionally, the thickness of the polycrystalline silicon carbide material layer 300x is about 1 mm, for example, between 900 microns and 1100 microns.

[0105] In an optional embodiment of the present application, the above step S103, wherein the polycrystalline silicon carbide material is deposited on the surface of the amorphous silicon carbide layer 210 by adjusting the process conditions to form the polycrystalline silicon carbide layer 300, comprises:

[0106] A plurality of polycrystalline silicon carbide sublayers 31x are sequentially formed on the surface of the amorphous silicon carbide layer 210 away from the substrate 100; wherein, when forming two adjacent polycrystalline silicon carbide sublayers 31x, the growth rate of the polycrystalline silicon carbide sublayer 31x away from the substrate 100 is greater than the growth rate of the polycrystalline silicon carbide sublayer 31x close to the substrate 100.

[0107] See also Fig. 9After forming the last polycrystalline silicon carbide sublayer 31x, the surface of the last polycrystalline silicon carbide sublayer 31x away from the amorphous silicon carbide layer 210 may be ground or polished, so that the surface of the last polycrystalline silicon carbide sublayer 31x away from the amorphous silicon carbide layer 210 serves as the bonding surface B. In this way, the polycrystalline silicon carbide material layer 300x is transformed into a polycrystalline silicon carbide layer 300.

[0108] Fig.10 is a roughness detection diagram of the bonding surface B of the polycrystalline silicon carbide layer 300; according to Fig.10 It can be seen that the roughness of the bonding surface B is very small and can meet the bonding requirements.

[0109] In an optional embodiment of the present application, the method for preparing the polycrystalline silicon carbide carrier substrate further includes:

[0110] See also Fig.11 , cutting the edge of the substrate after the polycrystalline silicon carbide material layer 300x is formed to expose the isostatically pressed graphite sheet of the substrate 100; wherein the substrate 100 is an isostatically pressed graphite sheet;

[0111] See also Fig.12 The isostatically pressed graphite sheet in the intermediate substrate is burned out by a low-temperature muffle furnace process to obtain a new polycrystalline silicon carbide carrier substrate; the new polycrystalline silicon carbide carrier substrate has a stacked amorphous silicon carbide layer 210 and a polycrystalline silicon carbide layer 300.

[0112] Optional, if necessary, see Fig.13 The obtained new polycrystalline silicon carbide carrier substrate may also be thinned. For example, a surface thinning process (such as mechanical grinding) may be used to thin one side of the amorphous silicon carbide material layer 210x or one side of the polycrystalline silicon carbide material layer 300x.

[0113] Optional, see Fig.13 At least one side of the polycrystalline silicon carbide material layer 300x of the polycrystalline silicon carbide carrier substrate is ground or polished so that the flatness of the surface (bonding surface B) of the formed polycrystalline silicon carbide layer 300 away from the amorphous silicon carbide layer 210 meets the bonding requirement. For example, chemical mechanical polishing is performed on the side of the polycrystalline silicon carbide layer 300 away from the amorphous silicon carbide layer 210 so that the surface roughness of the polycrystalline silicon carbide layer 300 is not greater than 0.5 nanometers.

[0114] Fig.14 is a schematic diagram of the surface of the silicon carbide nanocrystalline layer 220, and the Ra result is 0.38nm. Fig.14 It can be seen that after experimental and simulation verification, the results are feasible, the roughness is better after the nanocrystals are grown, and the surface roughness of the silicon carbide nanocrystal layer 220 is very small, which meets the bonding requirements.

[0115] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0116] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A polycrystalline silicon carbide carrier substrate, characterized in that: At least: An amorphous silicon carbide layer and a polycrystalline silicon carbide layer are stacked in sequence along a vertical direction; wherein the surface of the polycrystalline silicon carbide layer away from the amorphous silicon carbide layer is a bonding surface for bonding to a single-crystal silicon carbide substrate; and the roughness of the bonding surface of the polycrystalline silicon carbide layer is not greater than 0.5 nanometers.

2. The polycrystalline silicon carbide carrier substrate according to claim 1, characterized in that: The polycrystalline silicon carbide layer includes at least: a plurality of polycrystalline silicon carbide sublayers stacked in sequence from the amorphous silicon carbide layer to the bonding surface; in two adjacent layers of the polycrystalline silicon carbide sublayers, the grain size of the polycrystalline silicon carbide sublayer close to the bonding surface is not greater than the grain size of the polycrystalline silicon carbide sublayer away from the bonding surface.

3. The polycrystalline silicon carbide carrier substrate according to claim 1, characterized in that: The roughness of the surface of the amorphous silicon carbide layer close to the polycrystalline silicon carbide layer is less than or equal to 15 nanometers.

4. The polycrystalline silicon carbide carrier substrate according to claim 1, characterized in that: The thickness of the polycrystalline silicon carbide layer is no more than 1 mm.

5. The polycrystalline silicon carbide carrier substrate according to claim 1, characterized in that: The thickness of the amorphous silicon carbide layer is 0.5 to 5 microns.

6. A bonded silicon carbide substrate, characterized in that: At least comprises the polycrystalline silicon carbide carrier substrate according to any one of claims 1 to 5, and a single crystal silicon carbide substrate bonded to the bonding surface of the polycrystalline silicon carbide carrier substrate.

7. A method for preparing a polycrystalline silicon carbide carrier substrate, characterized in that: At least: forming an amorphous silicon carbide material layer on the surface of the substrate; Performing thinning and / or polishing surface treatment on the amorphous silicon carbide material layer to form the amorphous silicon carbide layer; Polycrystalline silicon carbide material is deposited on the surface of the amorphous silicon carbide layer by adjusting process conditions to form a polycrystalline silicon carbide layer; wherein the surface of the polycrystalline silicon carbide layer away from the amorphous silicon carbide layer is a bonding surface for bonding to a single-crystalline silicon carbide substrate; and the roughness of the bonding surface of the polycrystalline silicon carbide layer is not greater than 0.5 nanometers.

8. The method for preparing a polycrystalline silicon carbide carrier substrate according to claim 7, characterized in that: The forming of an amorphous silicon carbide material layer on the surface of the substrate comprises: Using a chemical vapor deposition process, a plasma enhanced chemical vapor deposition process or a sputtering process, an initial amorphous silicon carbide layer as the amorphous silicon carbide material layer is formed on the surface of the substrate; the thickness of the initial amorphous silicon carbide layer is 1 to 10 microns; The initial amorphous silicon carbide layer is polished or ground to form the amorphous silicon carbide layer.

9. The method for preparing a polycrystalline silicon carbide carrier substrate according to claim 7, characterized in that: The method of depositing polycrystalline silicon carbide material on the surface of the amorphous silicon carbide layer by adjusting process conditions to form a polycrystalline silicon carbide layer comprises: Forming a polycrystalline silicon carbide material layer on the surface of the amorphous silicon carbide layer by adjusting process conditions; The surface of the polycrystalline silicon carbide material layer away from the amorphous silicon carbide layer is thinned and / or polished to form the polycrystalline silicon carbide layer.

10. The method for preparing a polycrystalline silicon carbide carrier substrate according to claim 7, characterized in that: The method of depositing polycrystalline silicon carbide material on the surface of the amorphous silicon carbide layer by adjusting process conditions to form a polycrystalline silicon carbide layer comprises: A plurality of polycrystalline silicon carbide sublayers are sequentially formed on a surface of the amorphous silicon carbide layer away from the substrate; wherein, when forming two adjacent polycrystalline silicon carbide sublayers, a growth rate of the polycrystalline silicon carbide sublayer away from the substrate is greater than a growth rate of the polycrystalline silicon carbide sublayer close to the substrate.

11. The method for preparing a polycrystalline silicon carbide carrier substrate according to claim 10, characterized in that: The method further comprises: After forming the last layer of the polycrystalline silicon carbide sublayer, the surface of the last layer of the polycrystalline silicon carbide sublayer away from the amorphous silicon carbide layer is ground or polished so that the surface of the last layer of the polycrystalline silicon carbide sublayer away from the amorphous silicon carbide layer serves as the bonding surface.

12. The method for preparing a polycrystalline silicon carbide carrier substrate according to claim 9, characterized in that: The method further comprises: Cutting the edge of the substrate after forming the polycrystalline silicon carbide material layer to expose the isostatically pressed graphite sheet of the substrate; wherein the substrate is an isostatically pressed graphite sheet; The isostatically pressed graphite sheet is burned off to obtain a new polycrystalline silicon carbide carrier substrate; the new polycrystalline silicon carbide carrier substrate has the stacked amorphous silicon carbide layer and the polycrystalline silicon carbide layer.

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