Input acquisition module of isolation safety barrier circuit

Abstract

The invention discloses an input acquisition module of an isolation guard grating circuit, a collector electrode of an N-type triode Q3 of the input acquisition module of the isolation guard grating circuit is connected with one end of a sampling resistor RX2, and the other end of the sampling resistor RX2 is connected with a source electrode of an NMOS tube MQ8; the two ends of the sampling resistor RX2 input differential signals to the operational amplifier in a differential acquisition mode, the differential signals are amplified and filtered by the operational amplifier and then sent to the external analog-to-digital converter, analog signals are converted into digital signals, and the digital signals are input to the single-chip microcomputer. The source electrode and the grid electrode of the NMOS tube MQ8 are also connected in parallel with the resistor R43; and the source electrode of the NMOS tube MQ8 is also connected with the source electrode of the NMOS tube MQ9. Whether the current passing through the sampling resistor RX2 is abnormal or not can be monitored in real time, and the safety of the whole circuit system is improved. Meanwhile, the current signal monitored by the sampling resistor RX2 is stable, reliable and high in precision, so that precise monitoring can be carried out, and the safety of a circuit system is further improved.

Description

Technical Field

[0001] The present invention relates to the technical field of isolation circuits, and in particular to an input acquisition module of an isolation safety barrier circuit. Background Art

[0002] In the complex environment of industrial and electronic systems, the process of sensors sending signals to other electronic devices often encounters a series of interference problems, among which electromagnetic interference and ground loop interference are particularly prominent. They are like invisible stumbling blocks that hinder the smooth transmission of signals and may even cause fluctuations or abnormalities in equipment performance.

[0003] In order to overcome these interference barriers, the isolation circuit plays a vital role. It cleverly sets up an electrical isolation "safety net" between the two key nodes of the circuit. This barrier is like a solid defense line, effectively blocking the penetration of interference signals and building a solid backing for the pure transmission of signals. In this way, the isolation circuit not only greatly weakens the negative impact of electromagnetic interference and ground loop interference, but also ensures that the signal can reach the receiving end stably and consistently, providing an indispensable guarantee for the smooth operation of the entire system. In addition to achieving electrical isolation and signal conversion, the isolation circuit also has the function of safety protection. Through electrical isolation, the high-voltage line can be separated from the low-voltage line to avoid safety problems such as electrical shock and electric shock caused by the instability or failure of high-voltage and high-frequency power supply. At the same time, the isolation circuit can also protect dangerous power supplies and high-frequency circuits, improving the stability and safety of the entire system. However, if the output current signal of the isolation circuit is abnormal due to the isolation circuit itself or the front-end product, and the abnormal current cannot be detected by the back-end through the output of the isolation circuit, the overall circuit system has safety hazards. Summary of the invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides an input acquisition module of an isolation safety barrier circuit. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0005] According to a first aspect of an embodiment of the present invention, there is provided an input acquisition module of an isolation safety gate circuit, characterized in that the collector of an N-type transistor Q3 of the input acquisition module of the isolation safety gate circuit is connected to one end of a sampling resistor RX2, and the other end of the sampling resistor RX2 is connected to the source of an NMOS tube MQ8; both ends of the sampling resistor RX2 are electrically connected to an operational amplifier, the operational amplifier is electrically connected to an external analog-to-digital converter, and the external analog-to-digital converter is electrically connected to a single-chip computer;

[0006] The two ends of the sampling resistor RX2 input the differential signal into the operational amplifier through differential acquisition, and after being processed by the operational amplifier, it is sent to the external analog-to-digital converter, and the external analog-to-digital converter converts the analog signal into a digital signal and then inputs it into the single-chip microcomputer;

[0007] The source and gate of the NMOS tube MQ8 are also connected in parallel with the resistor R43, and the source of the NMOS tube MQ8 is also connected to the source of the NMOS tube MQ9.

[0008] In one embodiment of the present invention, when the oscillating current is in a positive cycle, the current passes through the diode group, the fuse-type isolating switch FS3, the second pin and the first pin of the mutual inductor T2, the NMOS tube MQ8, and then passes through the sampling resistor RX2, the N-type transistor Q3, and the resistor RX1, and then connects to the ground terminal;

[0009] When the oscillating current is in a negative cycle, the current passes through the diode group, the fuse-type isolating switch FS3, the second pin and the third pin of the transformer T2, the NMOS tube MQ9, and then passes through the sampling resistor RX2, the N-type transistor Q3, and the resistor RX1 to connect to the ground terminal.

[0010] In one embodiment of the present invention, the single chip microcomputer is electrically connected to a relay, and the relay is electrically connected to an alarm.

[0011] In one embodiment of the present invention, the diode group includes: a diode D10A, a diode D10B, a diode D11A, a diode D11B, a diode D12A and a diode D12B;

[0012] The diodes D10A and D10B are connected in parallel and in series with the parallel circuit of the diodes D11A and D11B, and then in series with the parallel circuit of the diodes D12A and D12B;

[0013] The cathode of the diode D12A and the diode D12B is connected to one end of the fuse-type isolating switch FS3, the other end of the fuse-type isolating switch FS3 is connected to the second pin of the mutual inductor and one end of the capacitor C34, the other end of the capacitor C34 is grounded, the first pin of the mutual inductor is connected to the drain of the NMOS tube MQ8, the source and gate of the NMOS tube MQ8 are connected in parallel with the resistor R43, the source of the NMOS tube MQ8 is also connected to one end of the sampling resistor RX2, the other end of the sampling resistor RX2 is connected to the collector of the N-type transistor Q3. The electrodes are connected, the base of the N-type transistor Q3 is connected to the collector of the N-type transistor Q2 and one end of the resistor R38, the other end of the resistor R38 is connected to the power supply, the base of the N-type transistor Q2 is connected to the emitter of the N-type transistor Q3 and one end of the resistor RX1, the other end of the resistor RX1 is connected to the emitter of the N-type transistor Q2, and the emitter of the N-type transistor Q2 is grounded; the gate of the NMOS tube MQ8 is also connected in series with the resistor R32, the resistor R32 is connected in series with the capacitor C41, and the capacitor C41 is connected to the positive electrode of the oscillation module;

[0014] The third pin of the mutual inductor is connected to the drain of the NMOS tube MQ9, the source and gate of the NMOS tube MQ9 are connected in parallel with the resistor R44, the gate of the NMOS tube MQ9 is also connected in series with the resistor R33, the resistor R33 is connected in series with the capacitor C42, and the capacitor C42 is connected to the negative electrode of the oscillation module.

[0015] Beneficial effects of the present invention:

[0016] The present invention can input the voltage of the sampling resistor RX2 into the single chip microcomputer through the sampling resistor RX2, thereby obtaining the current size passing through the sampling resistor RX2, so as to monitor in real time whether the current passing through the sampling resistor RX2 is abnormal, thereby improving the safety of the overall circuit system. At the same time, the current signal monitored by the sampling resistor RX2 is not only stable and reliable, but also has high accuracy, so that accurate monitoring can be performed, further improving the safety of the circuit system.

[0017] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the written description, claims, and drawings.

[0018] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0020] Figure 1 A schematic diagram of the circuit principle of an input acquisition module of an isolation safety barrier circuit provided by an embodiment of the present invention;

[0021] Figure 2 It is a circuit principle diagram of an input acquisition module of an isolation safety barrier circuit in the prior art;

[0022] Figure 3 The present invention is a schematic diagram of another sampling resistor position of an input acquisition module of an isolation safety barrier circuit. DETAILED DESCRIPTION

[0023] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0024] like Figure 1 As shown, an embodiment of the present invention provides an input acquisition module of an isolated safety gate circuit, wherein the collector of the N-type triode Q3 of the input acquisition module of the isolated safety gate circuit is connected to one end of the sampling resistor RX2, and the other end of the sampling resistor RX2 is connected to the source of the NMOS tube MQ8. The two ends of the sampling resistor RX2 are electrically connected to the operational amplifier, the operational amplifier is electrically connected to the external analog-to-digital converter, and the external analog-to-digital converter is electrically connected to the single-chip computer. The two ends of the sampling resistor RX2 input the differential signal to the operational amplifier through differential acquisition, and after amplification and filtering by the operational amplifier, it is sent to the external analog-to-digital converter, and after the analog signal is converted into a digital signal, it is input to the single-chip computer. The source and gate of the NMOS tube MQ8 are also connected in parallel with the resistor R43, and the source of the NMOS tube MQ8 is also connected to the source of the NMOS tube MQ9. The single-chip computer is electrically connected to the relay, and the relay is electrically connected to the alarm. When the single-chip computer detects that the input signal fails, the single-chip computer IO pin further controls the relay contact to close by controlling the photoelectric coupler, and the alarm sends an alarm signal.

[0025] When the oscillating current of the input acquisition module is in a positive cycle, the current passes through the diode group, the fuse-type isolating switch FS3, the second pin and the first pin of the mutual inductor T2, the NMOS tube MQ8, and then passes through the sampling resistor RX2, the N-type transistor Q3, and the resistor RX1 before connecting to the ground terminal.

[0026] When the oscillating current of the input acquisition module is in a negative cycle, the current passes through the diode group, the fuse-type isolating switch FS3, the second pin and the third pin of the mutual inductor T2, the NMOS tube MQ9, and then passes through the sampling resistor RX2, the N-type transistor Q3, and the resistor RX1 before connecting to the ground terminal.

[0027] In this embodiment, it should be noted that a sampling resistor RX2 is added while the input acquisition module circuit of the existing isolation safety barrier remains unchanged. In this way, the sampling resistor RX2 is connected to the single-chip microcomputer, and the voltage of the sampling resistor RX2 is sent to the single-chip microcomputer. The single-chip microcomputer obtains the current value of the current input of the circuit through voltage calculation, and the single-chip microcomputer can calculate the magnitude of the current passing through the sampling resistor RX2, so as to monitor whether the current in the isolation safety barrier circuit is normal, and can timely monitor the abnormal current in the circuit. When the single-chip microcomputer detects that the input signal fails, the single-chip microcomputer IO pin further controls the relay contact to close by controlling the photocoupler, and the alarm sends an alarm signal. This can also avoid damage to the back-end equipment due to the current abnormality, and ensure the safety of the circuit system and equipment.

[0028] In this embodiment, the circuit schematic diagram of the input acquisition module of the isolation safety barrier circuit is as follows: Figure 1 As shown, the signal input terminal J3A, the signal input terminal J3B and the signal input terminal J3C are the signal input terminals of the input acquisition module, the bidirectional transient suppression diode TVS4 is connected in parallel between the signal input terminal J3A and the signal input terminal J3C, the bidirectional transient suppression diode TVS2 is connected in parallel between the signal input terminal J3B and the signal input terminal J3C, the bidirectional transient suppression diode TVS2 is connected in parallel with the capacitor C38, the two ends of the capacitor C38 are respectively connected in series with the inductor L7 and the inductor L8, one end of the inductor L7 and one end of the inductor L8 are connected in parallel with the voltage regulator tubes Z10, Z11 and Z12 in turn, and the positive poles of the voltage regulator tubes Z10, Z11 and Z12 are grounded.

[0029] The diode group includes: diode D10A, diode D10B, diode D11A, diode D11B, diode D12A and diode D12B. The cathode of the voltage regulator tube Z12 is connected to the anode of the diode D10A and the anode of the diode D10B. The diode D10A and the diode D10B are connected in parallel and in series with the parallel circuit of the diode D11A and the diode D11B, and then in series with the parallel circuit of the diode D12A and the diode D12B.

[0030] The cathode of the diode D12A and the diode D12B is connected to one end of the fuse-type isolating switch FS3, the other end of the fuse-type isolating switch FS3 is connected to the second pin of the mutual inductor and one end of the capacitor C34, the other end of the capacitor C34 is grounded, the first pin of the mutual inductor is connected to the drain of the NMOS tube MQ8, the source and gate of the NMOS tube MQ8 are connected in parallel with the resistor R43, the source of the NMOS tube MQ8 is also connected to one end of the sampling resistor RX2, the other end of the sampling resistor RX2 is connected to the collector of the N-type transistor Q3, and the N-type The base of transistor Q3 is connected to the collector of N-type transistor Q2 and one end of resistor R38, the other end of resistor R38 is connected to the power supply, the base of N-type transistor Q2 is connected to the emitter of N-type transistor Q3 and one end of resistor RX1, the other end of resistor RX1 is connected to the emitter of N-type transistor Q2, and the emitter of N-type transistor Q2 is grounded and connected to the positive electrode of voltage regulator tube Z12; the gate of NMOS tube MQ8 is also connected in series with resistor R32, resistor R32 is connected in series with capacitor C41, and capacitor C41 is connected to the positive electrode of oscillation module;

[0031] The third pin of the mutual inductor is connected to the drain of the NMOS tube MQ9, the source and gate of the NMOS tube MQ9 are connected in parallel with the resistor R44, the gate of the NMOS tube MQ9 is also connected in series with the resistor R33, the resistor R33 is connected in series with the capacitor C42, and the capacitor C42 is connected to the negative electrode of the oscillation module.

[0032] The other end of the fuse type isolating switch FS3 is also connected to one end of the capacitor C30 and one end of the resistor R26, the other end of the resistor R26 is connected to the winding resistor WR1, one end of the winding resistor WR1 is grounded, and the other end is connected to the positive electrode of the voltage regulator tube Z5, the negative electrode of the voltage regulator tube Z5 is connected to the positive electrode of the voltage regulator tube Z1, the negative electrode of the voltage regulator tube Z1 is connected to the other end of the capacitor C30, the other end of the capacitor C30 is also connected to the power supply and one end of the fuse type isolating switch FS2, the other end of the fuse type isolating switch FS2 is connected in series with resistor R25, resistor R24, resistor R23, resistor R22, resistor R21, and inductor L6 in sequence, and the inductor L6 is connected to one end of the bidirectional transient suppression diode TVS2.

[0033] The voltage regulator tube Z4 and the voltage regulator tube Z8 are connected in series, the positive electrode of the voltage regulator tube Z8 is connected in series with the capacitor C29, the voltage regulator tube Z4, the voltage regulator tube Z8 and the capacitor C29 are connected in parallel in the circuit between the other end of the fuse type isolation switch FS2 and the inductor L6 and the bidirectional transient suppression diode TVS2, the voltage regulator tube Z3 and the voltage regulator tube Z7 are connected in series in parallel at both ends of the voltage regulator tube Z4 and the voltage regulator tube Z8, and the voltage regulator tube Z2 and the voltage regulator tube Z6 are connected in series in parallel at both ends of the voltage regulator tube Z4 and the voltage regulator tube Z8.

[0034] The effect of the present invention is further described below by experiments:

[0035] When the sampling resistor is set at other positions in the circuit, the output current is unstable and has low accuracy.

[0036] Specifically, Figure 2 As shown, if the resistor RX1 of the input acquisition module of the original isolation safety barrier circuit is used as the sampling resistor, the left side of the resistor RX1 is grounded. Under ideal conditions, the left end of the resistor RX1 is at zero potential. If the current passing through the resistor RX1 needs to be obtained, the voltage at the right end of the resistor RX1 is collected. However, in actual applications, there is noise interference at the ground end, which causes signal fluctuations. The final current value fluctuates greatly and cannot meet the accuracy requirements.

[0037] No other components are allowed to be set on the explosion-proof circuit of the circuit. If the current limiting resistor R27 of the explosion-proof circuit of the input acquisition module of the original isolation safety barrier circuit is used as the sampling resistor, if a fault occurs in the front end, such as a short circuit, the current limiting resistor R27 itself will have a large current or voltage, which will be transmitted to the back end, causing damage to the back end devices.

[0038] In addition, in the pre-on state before the N-type transistor Q3 is turned on, a voltage drop will be generated, which will affect the voltage at the right end of the sampling resistor RX2, thereby resulting in poor accuracy of the obtained current.

[0039] like Figure 3 As shown, if the sampling resistor RXa is set between the drain of the NMOS tube MQ8 and the first pin of the transformer, or the sampling resistor RXb is set between the drain of the NMOS tube MQ9 and the third pin of the transformer, there is also the problem of the influence of the tube turning on on the voltage, resulting in poor accuracy of the obtained current.

[0040] The sampling resistor RX2 is set between the collector of the N-type transistor Q3 and the source of the NMOS tube MQ8, and the two ends of the sampling resistor RX2 are sampled. After the voltage value at both ends is subtracted and offset, the fluctuation interference at both ends can also be offset, and it will not be affected by the switch tube. The monitored current signal is not only stable and reliable, but also has high accuracy. At the same time, the sampling resistor RX2 is located at the back end of the loop and will not affect the loop.

[0041] The monitoring current of the sampling resistors at various positions is shown in Table 1:

[0042] Table 1

[0043]

[0044]

[0045] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0046] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0047] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0048] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0049] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.

[0050] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. An input acquisition module for an isolation safety barrier circuit, characterized in that: The collector of the N-type transistor Q3 of the input acquisition module of the isolation safety gate circuit is connected to one end of the sampling resistor RX2, and the other end of the sampling resistor RX2 is connected to the source of the NMOS tube MQ8; the two ends of the sampling resistor RX2 are electrically connected to the operational amplifier, the operational amplifier is electrically connected to the external analog-to-digital converter, and the external analog-to-digital converter is electrically connected to the single-chip computer; The two ends of the sampling resistor RX2 input the differential signal into the operational amplifier through differential acquisition, and after being processed by the operational amplifier, it is sent to the external analog-to-digital converter, and the external analog-to-digital converter converts the analog signal into a digital signal and then inputs it into the single-chip microcomputer; The source and gate of the NMOS tube MQ8 are also connected in parallel with the resistor R43, and the source of the NMOS tube MQ8 is also connected to the source of the NMOS tube MQ9.

2. The input acquisition module of the isolation safety barrier circuit according to claim 1, characterized in that: When the oscillating current is in a positive cycle, the current passes through the diode group, the fuse-type isolating switch FS3, the second pin and the first pin of the transformer T2, the NMOS tube MQ8, and then passes through the sampling resistor RX2, the N-type transistor Q3, the resistor RX1, and then connects to the ground terminal; When the oscillating current is in a negative cycle, the current passes through the diode group, the fuse-type isolating switch FS3, the second pin and the third pin of the transformer T2, the NMOS tube MQ9, and then passes through the sampling resistor RX2, the N-type transistor Q3, and the resistor RX1 to connect to the ground terminal.

3. The input acquisition module of the isolation safety barrier circuit according to claim 1, characterized in that: The single chip microcomputer is electrically connected to a relay, and the relay is electrically connected to an alarm.

4. The input acquisition module of the isolation safety barrier circuit according to claim 1, characterized in that: The diode group includes: a diode D10A, a diode D10B, a diode D11A, a diode D11B, a diode D12A and a diode D12B; The diodes D10A and D10B are connected in parallel and in series with the parallel circuit of the diodes D11A and D11B, and then in series with the parallel circuit of the diodes D12A and D12B; The cathode of the diode D12A and the diode D12B is connected to one end of the fuse-type isolating switch FS3, the other end of the fuse-type isolating switch FS3 is connected to the second pin of the mutual inductor and one end of the capacitor C34, the other end of the capacitor C34 is grounded, the first pin of the mutual inductor is connected to the drain of the NMOS tube MQ8, the source and gate of the NMOS tube MQ8 are connected in parallel with the resistor R43, the source of the NMOS tube MQ8 is also connected to one end of the sampling resistor RX2, the other end of the sampling resistor RX2 is connected to the collector of the N-type transistor Q3. The electrodes are connected, the base of the N-type transistor Q3 is connected to the collector of the N-type transistor Q2 and one end of the resistor R38, the other end of the resistor R38 is connected to the power supply, the base of the N-type transistor Q2 is connected to the emitter of the N-type transistor Q3 and one end of the resistor RX1, the other end of the resistor RX1 is connected to the emitter of the N-type transistor Q2, and the emitter of the N-type transistor Q2 is grounded; the gate of the NMOS tube MQ8 is also connected in series with the resistor R32, the resistor R32 is connected in series with the capacitor C41, and the capacitor C41 is connected to the positive electrode of the oscillation module; The third pin of the mutual inductor is connected to the drain of the NMOS tube MQ9, the source and gate of the NMOS tube MQ9 are connected in parallel with the resistor R44, the gate of the NMOS tube MQ9 is also connected in series with the resistor R33, the resistor R33 is connected in series with the capacitor C42, and the capacitor C42 is connected to the negative electrode of the oscillation module.

Images