Biological information security chip based on ion sensitive field effect transistor

Abstract

The invention provides a biological information security chip based on an ion sensitive field effect transistor, which comprises an ISFET array, a first chip, a second chip, a third chip and a fourth chip, the sequential control circuit is used for respectively controlling a row and column word line selection circuit and a bit line selection circuit in the ISFET array, the sequential control circuit is respectively connected with the word line selection circuit and the bit line selection circuit, and the input driving circuit is connected with the word line selection circuit; the output end of the bit line selection circuit is provided with a trans-impedance amplifier and a physical unclonable function circuit, the output end of the trans-impedance amplifier is provided with an analog-to-digital converter, and the output ends of the analog-to-digital converter and the physical unclonable function circuit are provided with encryption circuits. According to the invention, the ISFET array and the PUF technology are combined, and the physical characteristics of the ISFET array are utilized to generate a unique and non-replicable key; and according to the secret key, an encryption circuit is adopted to encrypt the digital signal to obtain encrypted data so as to protect the biological information from being stolen.

Description

Technical Field

[0001] The present invention relates to the field of biosensors, and in particular to a bio-information security chip based on ion-sensitive field effect transistors. Background Art

[0002] When software is put into use without sufficient testing, undetected vulnerabilities can cause unpredictable consequences when they are triggered, and users bear the risk. These vulnerabilities often occur during the development process, but the system behaves normally under most input conditions, and only when some specific data is entered will the system enter an unknown state, resulting in immeasurable losses. Therefore, the software must undergo rigorous testing, and how to generate these specific test cases is an important issue in software testing. At present, the existing detection methods have the following problems: 1. Insufficient detection efficiency and accuracy. Traditional detection methods usually rely on a single sensor or channel for measurement, which not only limits the detection speed but also may lead to incomplete and low-precision data.

[0003] 2. The traditional idea of ​​using traditional electronic circuits to generate keys has many problems. The traditional method of generating keys by traditional electronic circuits is vulnerable to attacks; the symmetric encryption algorithm has major problems in key distribution and management; the traditional key generation method lacks flexibility and scalability; there are problems with key generation rate and repetition rate; and there are also deficiencies in implementation cost and complexity. In response to this, the present invention is based on the chip security design of the pH value-based high-precision key generation mechanism.

[0004] 3. Traditional electronic circuits face many problems when reading keys, including vulnerability to physical attacks, complexity of key management, insufficient security, resource limitations and adaptability issues, insufficient ability to resist side channel attacks, and lack of signature functions. These problems make traditional electronic circuits unreliable and unsafe in the modern information security environment. Summary of the invention

[0005] In view of the above situation, the main purpose of the present invention is to propose a bio-information security chip based on ion-sensitive field effect transistor to solve the above technical problems.

[0006] The present invention proposes a bio-information security chip based on ion-sensitive field effect transistors, comprising: an ISFET array, a timing control circuit connected to the ISFET array and used to respectively control the row and column word line selection circuit and the bit line selection circuit in the ISFET array, respectively connected to the word line selection circuit and the bit line selection circuit, and an input drive circuit connected to the word line selection circuit; A transimpedance amplifier and a physical unclonable function circuit are arranged at the output end of the bit line selection circuit, an analog-to-digital converter is arranged at the output end of the transimpedance amplifier, and an encryption circuit is arranged at the output ends of the analog-to-digital converter and the physical unclonable function circuit.

[0007] In the working process of the present invention, the gate of the ISFET array is contacted with an external reference electrode through a sample solution, the threshold voltage is affected by the surface charge change of the pH value of the solution in contact with the ISFET gate to output a current signal, the transimpedance amplifier converts the current signal output by the ISFET array into a voltage analog signal, and the voltage analog signal is converted into a digital signal through an analog-to-digital converter; The physical unclonable function circuit receives the current signal output by the ISFET array and generates a unique and non-copyable identifier or key by utilizing the physical characteristics of the ISFET array; According to the unique, non-copyable identifier or key, the encryption circuit is used to encrypt the digital signal to obtain the encrypted data, and then output it to the external device or system through the output interface circuit. In this way, the accuracy and reliability of biological detection can be improved while enhancing the security of data to protect biological information from being stolen.

[0008] Compared with the prior art, the present invention has the following beneficial effects: The present invention combines ISFET array with PUF technology, which can be used to generate secure keys. PUF technology uses the physical properties of hardware to generate unique and unpredictable keys. These physical properties, such as slight differences in the manufacturing process, make the response of each device unique, so that it can be used as a key. Compared with traditional detection methods, ISFET arrays have higher sensitivity, faster response speed and better integration capabilities. The principle of generating PUF keys by ISFET arrays is to convert the measured response value into binary data; by using the extracted binary data as the PUF key. Since the response of each ISFET is unique, the generated key is also unique. Therefore, the security of biometric information can be better protected.

[0009] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description or learned through embodiments of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a structural diagram of the bio-information security chip based on ion-sensitive field-effect transistor proposed by the present invention; Figure 2 is a structural diagram of the ISFET array of the present invention; Figure 3 is a structural diagram of the ISFET of the present invention; Figure 4 This is a circuit structure diagram of a physical unclonable function of the present invention; Figure 5 The figure is a working flow chart of the chip of the present invention.

[0011] In the figure, 01, ISFET; 02, transistor; 011, P substrate; 012, n trap; 013, p+ injection region; 014, first insulating layer; 015, conductive component; 016, second insulating layer; 017, ion sensitive membrane; 03, capacitor. DETAILED DESCRIPTION

[0012] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0013] These and other aspects of the embodiments of the present invention will be apparent with reference to the following description and accompanying drawings. In these descriptions and accompanying drawings, some specific implementations of the embodiments of the present invention are specifically disclosed to represent some ways of implementing the principles of the embodiments of the present invention, but it should be understood that the scope of the embodiments of the present invention is not limited thereto.

[0014] See also Figure 1 , This embodiment provides a bio-information security chip based on ion-sensitive field effect transistors, including: an ISFET (ion-sensitive field effect transistor) array, a timing control circuit connected to the ISFET array and used to control the row and column word line selection circuits and the bit line selection circuits in the ISFET array, respectively, connected to the word line selection circuits and the bit line selection circuits, and an input drive circuit connected to the word line selection circuit; A transimpedance amplifier and a physical unclonable function circuit are arranged at the output end of the bit line selection circuit, an analog-to-digital converter is arranged at the output end of the transimpedance amplifier, and an encryption circuit is arranged at the output ends of the analog-to-digital converter and the physical unclonable function circuit.

[0015] Among them, the ISFET array is used to detect changes in ion concentration or potential and output current signals; A word line selection circuit and a bit line selection circuit are connected to the ISFET array and are used to control the rows and columns in the ISFET array respectively; An input drive circuit, connected to the word line selection circuit, for amplifying and regulating the input signal; A timing control circuit is connected to the word line selection circuit and the bit line selection circuit respectively, and is used to issue timing control instructions to the word line selection circuit and the bit line selection circuit; a transimpedance amplifier, connected to the bit line selection circuit, for converting a current signal output by the ISFET array into a voltage signal; A physical unclonable function circuit is connected to the bit line selection circuit, receives the current signal output by the ISFET array, and generates a unique, non-copyable identifier or key by utilizing the physical characteristics of the ISFET array; an analog-to-digital converter, connected to the transimpedance amplifier, and used for converting the analog signal output by the transimpedance amplifier into a digital signal; An encryption circuit, connected to the analog-to-digital converter and the physical unclonable function circuit, for encrypting the digital signal according to a unique and non-copyable identifier or key to protect the security of the data; The output interface circuit is used to output the encrypted data to an external device or system.

[0016] In the working process of the present invention, the gate of the ISFET array is contacted with the external reference electrode through the sample solution; the input signal is transmitted to the inside of the chip through the input drive circuit; the word line selection circuit and the bit line selection circuit select a specific ISFET for operation according to the instruction of the timing control circuit; the threshold voltage is affected by the surface charge change of the pH value of the solution in contact with the gate of the ISFET to output a current signal, and the signal is output to the transimpedance amplifier, the transimpedance amplifier converts the current signal output by the ISFET array into a voltage analog signal, and converts the voltage analog signal into a digital signal through an analog-to-digital converter; The physical unclonable function circuit receives the current signal output by the ISFET array and generates a unique and non-copyable identifier or key by utilizing the physical characteristics of the ISFET array; Based on a unique, non-copyable identifier or key, an encryption circuit is used to encrypt the digital signal to obtain encrypted data, which is then output to an external device or system through an output interface circuit to complete biometric information detection and encrypted transmission.

[0017] Furthermore, a calibration circuit is included, which is connected to the timing control circuit and the analog-to-digital converter respectively, and is used to correct the output of the ISFET array according to the timing control instruction to eliminate system errors and improve measurement accuracy.

[0018] See also Figure 2 As a further preferred embodiment of the present invention, the ISFET array includes a plurality of ISFETs 01, and a transistor 02 is provided on each ISFET, the drain of the transistor is connected to the source of the ISFET, and the gate and drain of the transistor are connected to a word line and a bit line respectively. Figure 2It can be seen that the main components of the ISFET array of the present invention include: ISFET: represented by a dotted box. A transistor is arranged on each ISFET. In this embodiment, the transistor is an NMOS transistor. The drain of the transistor is connected to the source of the ISFET, and the gate and drain of the transistor are respectively connected to a word line and a bit line. Bit Lines: Word Lines: The horizontal lines in the figure represent word lines, which are used to select specific ISFETs, and the vertical lines in the figure represent bit lines, which are used to read and write data. Among them, the bit lines are marked as BL 1, BL 2, ..., BL n-1, BL n, indicating different columns. The word lines are marked as WL 1, WL 2, ..., WL n-1, WL n, indicating different rows. When the word line is activated, the corresponding ISFET is selected, and data can be read or written through the bit line.

[0019] See also Figure 3 As a further preferred embodiment of the present invention, the ISFET includes a P substrate 011, an n-well 012 is embedded in the upper part of the P substrate, and two p+ injection regions 013 are embedded in the upper part of the n-well, the upper part of the n-well is covered with a first insulating layer 014, both sides of the first insulating layer extend outwardly and cover the upper parts of the two p+ injection regions respectively, the two p+ injection regions are respectively provided with a source and a drain, a conductive component 015 is provided on the first insulating layer, and the conductive component is sequentially covered with a second insulating layer 016 and an ion sensitive membrane 017.

[0020] It should be noted that the conductive component can be made of metal materials commonly used in ISFET, and the P substrate is a P-substrate.

[0021] Ordinary ISFET structures may not be sensitive enough to the changes in electrical signals caused by ions. The present invention uses a P-substrate as a basis to provide a stable semiconductor environment. The two p+ injection regions work together with the n-trap to form a special electric field distribution and carrier transmission channel. When ions produced by chemical substances approach, this structure can more effectively change the carrier concentration and distribution, thereby producing more obvious changes in electrical signals. Compared with ordinary structures, it is more sensitive to changes in ion concentration, can capture weaker signals, and shows higher sensitivity when detecting chemical substances; traditional ISFET structures have limited control over carriers and the electric field strength in ion-sensitive areas. The two p+ injection regions of the present invention are completely embedded in the n-trap, which is equivalent to building a more closed and precisely controllable carrier environment. This not only enhances the electric field strength in the ion-sensitive area, making the interaction between ions and the semiconductor surface stronger, but also accurately limits the movement path and range of carriers. This makes the structure more selective for specific chemicals and can more accurately identify target chemicals. At the same time, it can more accurately convert changes in chemical concentrations into electrical signals, achieve high-precision measurements, effectively avoid interference from other non-target substances, and improve the reliability of detection results. From the perspective of improvements, the introduction of a special P-substrate, p+ injection region, and n-trap structure has fundamentally changed the signal capture and conversion mechanism. This structural innovation combines electrochemistry and semiconductor technology, utilizing the sensitive properties of semiconductor materials to changes in electrical signals and using electrochemical processes to achieve targeted identification. When detecting chemicals, its sensitivity and selectivity far exceed those of traditional structures. In terms of performance, the precise structural design ensures accurate signal conversion and can measure chemical concentrations with high precision. The optimized internal structure and material selection enable it to operate stably in complex environments, resist interference, and ensure reliable and consistent results, which has obvious advantages over traditional structures.

[0022] Physical unclonable function circuits have shown great potential and advantages in the field of modern information security and hardware authentication due to their unique security features, high reliability and multifunctional integration capabilities. In order to better protect the security of biometric information, the present invention combines ISFET arrays with PUF (physical unclonable function) technology, which can be used to generate secure keys. PUF technology uses the physical properties of hardware to generate unique and unpredictable keys. These physical properties, such as slight differences in the manufacturing process, make the response of each device unique, so that it can be used as a key. The principle of generating PUF keys by ISFET arrays is to convert the measured response value into binary data; the extracted binary data is used as the PUF key. Since the response of each ISFET is unique, the generated key is also unique.

[0023] The circuit structure of the physical unclonable function is shown in the figure. Figure 4As shown, it includes a multiplexer and a comparator. The multiplexer is connected to the comparator. The multiplexer connects all the bit lines, and a capacitor 03 is provided at the output end of each bit line. The multiplexer selects two bit line signals and transmits them to the comparator for comparison. By comparing the voltages of any two bit lines, a physically unclonable output is obtained to obtain a bit configuration control word.

[0024] Its working principle is: select any row of the ISFET array through the word line, transmit the bit line voltage to the multiplexer, and the multiplexer selects two bit line signals and transmits them to the comparator for comparison. Due to the deviation of ISFET process manufacturing, different ISFETs have different leakage currents when not tested, and the charging rate of capacitors is also different. Therefore, the physically unclonable output can be obtained by comparing the voltages of any two bit lines.

[0025] In addition, in order to improve reliability and ensure that the output of the physical unclonable function can be stably output under different environmental voltage and temperature conditions, a threshold discrimination module and a bit configuration storage are designed; The threshold determination module is respectively connected to the multiplexer and the comparator, and selects a stable bit as an output by comparing the voltage difference between the two ends of the comparator input with the threshold voltage to obtain a stable bit configuration control word.

[0026] The bit configuration storage is connected to the comparator and is used to store all stable bit configuration control words as encryption keys.

[0027] In the chip registration phase, the voltage difference between the two ends of the comparator input is compared with the threshold voltage. When the voltage difference between the two ends of the comparator is less than the threshold, the output of the response is defined as an unstable bit and the bit is directly discarded. After the traversal is completed, all stable bit configuration control words are finally stored in the special bit configuration storage; in the chip authentication phase, the bit configuration control word is loaded, and then the response of the physical unclonable function is serially read out as the encryption key.

[0028] In order to explain the present invention in more detail, the basic principle of encryption and chip working process are disclosed accordingly, as follows: 1) Basic principles of encryption Encryption process: Assume that the original digital signal is X and the encryption key is W. The encrypted signal can be simply expressed as: Y=X⊕W; Among them, ⊕ represents the exclusive OR operation.

[0029] Transmission process: The encrypted signal Y is transmitted to the outside of the chip. Since W has been read and stored on the server side in the internal stage of the chip.

[0030] Decryption process: The decryption process can be expressed as: Y′=Y⊕W; Among them, Y′ is the decrypted signal.

[0031] Actual circuit implementation: In actual circuit implementation, more complex encryption algorithms can be used, such as AES (Advanced Encryption Standard).

[0032] 2) Chip working mode The chip workflow is shown in the figure below: Figure 5 As shown, the process is: 1. Chip key registration: Read the biometrics on the chip: Use the sensor to read the biometric information on the chip. Store the biometrics on the server: Store the read biometric information on the server for subsequent use.

[0033] 2. Biologic detection Phase: Drop liquid on the chip: drop liquid containing biometric features on the chip. Use the sensitivity of the chip to change the signal: the chip reacts sensitively to the biometric features in the liquid, causing the signal to change. Design a circuit to convert the analog signal into a digital signal: convert the changed analog signal into a digital signal through circuit design. And store it on the server: store the converted digital signal on the server.

[0034] 3. Encrypted biometric data transmission: .Transmit the encrypted data outside the chip: Encrypt the biometric data stored on the server and transmit it outside the chip.

[0035] 4. Device authentication and biometric information decryption Decryption using devices such as FPGA: Encrypted data is decrypted using devices such as field programmable gate arrays (FPGAs). Data can only be successfully decrypted if the correct biometric ID is known.

[0036] It should be understood that, although each step in the flow chart of each embodiment of the present invention is shown in sequence according to the indication of the arrow, these steps are not necessarily performed in sequence according to the order indicated by the arrow. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be performed in other orders. Moreover, at least a portion of the steps in each embodiment may include a plurality of sub-steps or a plurality of stages, and these sub-steps or stages are not necessarily performed at the same time, but can be performed at different times, and the execution order of these sub-steps or stages is not necessarily performed in sequence, but can be performed in turn or alternately with at least a portion of other steps or sub-steps or stages of other steps.

[0037] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0038] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0039] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A bio-information security chip based on an ion-sensitive field effect transistor, characterized in that: include: An ISFET array, a word line selection circuit and a bit line selection circuit connected to the ISFET array for controlling the rows and columns of the ISFET array, respectively, a timing control circuit connected to the word line selection circuit and the bit line selection circuit, respectively, and an input drive circuit connected to the word line selection circuit; A transimpedance amplifier and a physical unclonable function circuit are arranged at the output end of the bit line selection circuit, an analog-to-digital converter is arranged at the output end of the transimpedance amplifier, and an encryption circuit is arranged at the output ends of the analog-to-digital converter and the physical unclonable function circuit.

2. The bio-information security chip based on ion-sensitive field-effect transistor according to claim 1, characterized in that: The device also includes a calibration circuit, which is respectively connected to the timing control circuit and the analog-to-digital converter.

3. The bio-information security chip based on ion-sensitive field-effect transistor according to claim 2, characterized in that: The ISFET array includes a plurality of ISFETs, and a transistor is arranged on each ISFET, the drain of the transistor is connected to the source of the ISFET, and the gate and drain of the transistor are respectively connected to a word line and a bit line.

4. The bio-information security chip based on ion-sensitive field-effect transistor according to claim 3, characterized in that: The ISFET includes a P substrate, an n-well is embedded in the upper part of the P substrate, and two p+ injection regions are embedded in the upper part of the n-well, the upper part of the n-well is covered with a first insulating layer, both sides of the first insulating layer extend outwardly and cover the upper parts of the two p+ injection regions respectively, the two p+ injection regions are respectively provided with a source and a drain, a conductive component is provided on the gate oxide region, and the conductive component is sequentially covered with a second insulating layer and an ion sensitive membrane.

5. The bio-information security chip based on ion-sensitive field-effect transistor according to claim 4, characterized in that: The physical unclonable function circuit includes a multiplexer and a comparator. The multiplexer is connected to the comparator. The multiplexer is connected to all bit lines and a capacitor is arranged at the output end of each bit line. The multiplexer selects two bit line signals and transmits them to the comparator for comparison. The physical unclonable output is obtained by comparing the voltages of any two bit lines to obtain a bit configuration control word.

6. The bio-information security chip based on ion-sensitive field-effect transistor according to claim 5, characterized in that: The physical unclonable function circuit also includes a threshold determination module, which is respectively connected to the multiplexer and the comparator, and selects a stable bit as an output by comparing the voltage difference between the two ends of the comparator input with the threshold voltage to obtain a stable bit configuration control word.

7. The bio-information security chip based on ion-sensitive field-effect transistor according to claim 6, characterized in that: The physical unclonable function circuit also includes a bit configuration storage device, which is connected to the comparator and is used to store all stable bit configuration control words as encryption keys.

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