Conductivity state non-uniform ultra-precision verification method, device and equipment for RRAM (Resistive Random Access Memory) device

Abstract

The invention relates to an RRAM device conductivity state non-uniform ultra-precision verification method, device and equipment, and the method comprises the steps: carrying out the non-uniform division of the conductivity state of an RRAM device into a plurality of conductivity state intervals based on a preset non-uniform division strategy and a conductivity range; pre-storing corresponding verification data for each conductivity state interval of the RRAM device, and reading the current conductivity state of each conductivity state interval by using a preset verification mode ADC (Analog to Digital Converter) circuit; and based on the current conductivity state of each conductivity state interval and the verification data corresponding to each conductivity state interval, after it is judged that data verification succeeds, the actual conductivity state of the RRAM device is read by using a preset reading mode ADC circuit. Therefore, the problem that the conductance of the RRAM device in the intermediate conductance state is easier to drift due to the existing programmable conductance range division mode of uniformly dividing the conductance interval is solved, more tolerance space is reserved for the RRAM device in the intermediate conductance state, and the influence of the RRAM state drift on the reading precision is reduced.

Description

Technical Field

[0001] The present application relates to the field of RRAM memory technology, and in particular to a method, device and equipment for ultra-precision calibration of non-uniform conductivity states of RRAM devices. Background Art

[0002] RRAM memory is a new type of non-volatile memory. Storage technology based on RRAM devices has made great progress in the past decade. RRAM storage technology has great advantages in non-volatility and high device density. At the same time, the storage capacity of RRAM devices has begun to expand from single-bit storage to multi-bit storage, and RRAM storage technology is developing towards higher data storage density.

[0003] RRAM multi-bit storage technology requires dividing the RRAM programmable conductivity range into individual conductivity intervals, and then encoding each sub-interval. Currently available RRAM multi-bit storage technology often divides the RRAM programmable conductivity range evenly and then performs corresponding encoding.

[0004] However, the data stability of multi-bit storage in RRAM devices is still affected by the non-ideal characteristics of the device. Compared with the conductive filaments of RRAM devices in high and low conductivity states, the conductive filaments of RRAM devices in the intermediate conductivity state are more unstable. After successful programming, RRAM devices in the intermediate conductivity state are more likely to experience physical state drift, causing the conductivity state to deviate from the target conductivity range. Figure 1 As shown, the existing programmable conductivity range division method of evenly dividing the conductivity intervals does not distinguish between the high, medium and low conductivity intervals of the RRAM device, and the data stored in the RRAM device in the intermediate conductivity state is more prone to errors. Summary of the invention

[0005] The present application provides a method, device and equipment for non-uniform ultra-precision calibration of the conductivity state of an RRAM device, so as to solve the problem that the existing programmable conductivity range division method of evenly dividing the conductivity interval makes the conductivity of the RRAM device in the intermediate conductivity state more prone to drift.

[0006] A first aspect of the present application provides a method for non-uniform ultra-precision verification of the conductivity state of an RRAM device, comprising the following steps: based on a preset non-uniform division strategy and a conductivity range, non-uniformly dividing the conductivity state of the RRAM device into a plurality of conductivity state intervals; pre-storing corresponding verification data for each conductivity state interval of the RRAM device, and using a preset verification mode ADC circuit to read the current conductivity state of each conductivity state interval; based on the current conductivity state of each conductivity state interval and the verification data corresponding to each conductivity state interval, after determining that the data verification is successful, using a preset reading mode ADC circuit to read the actual conductivity state of the RRAM device.

[0007] Optionally, the preset verification mode ADC circuit includes multiple comparators and verification coding logic, and the use of the preset verification mode ADC circuit to read the current conductivity state of each conductivity state interval includes: obtaining a first voltage signal generated based on the current signal generated by the RRAM device; identifying the first voltage signal based on the multiple comparators, and using the verification coding logic to verify the first identification result to obtain the current conductivity state of each conductivity state interval.

[0008] Optionally, the preset read mode ADC circuit includes some comparators among the multiple comparators and the readout coding logic of the verification coding logic, and the using of the preset read mode ADC circuit to read the actual conductance state of the RRAM device includes: acquiring a second voltage signal generated based on the current signal generated by the RRAM device; identifying the second voltage signal based on the multiple comparators, and using the readout coding logic to read the second identification result to obtain the actual conductance state of the RRAM device.

[0009] Optionally, after reading the current conductivity state of each conductivity state interval based on a preset verification accuracy, it also includes: judging whether the current conductivity state of each conductivity state interval and the verification data corresponding to the corresponding conductivity state interval meet a preset matching condition; if the current conductivity state of each conductivity state interval and the verification data corresponding to the corresponding conductivity state interval meet the preset matching condition, it is determined that the data verification is successful.

[0010] Optionally, the verification accuracy of the preset verification mode ADC circuit is greater than the reading accuracy of the preset reading mode ADC circuit.

[0011] A second aspect of the present application provides an ultra-precision non-uniform calibration device for a conductivity state of an RRAM device, comprising: a non-uniform division module, for non-uniformly dividing the conductivity state of the RRAM device into a plurality of conductivity state intervals based on a preset non-uniform division strategy and a conductivity range; a reading module, for pre-storing corresponding calibration data for each conductivity state interval of the RRAM device, and reading the current conductivity state of each conductivity state interval using a preset calibration mode ADC circuit; a calibration module, for determining, based on the current conductivity state of each conductivity state interval and the calibration data corresponding to each conductivity state interval, that the data calibration is successful, and then reading the actual conductivity state of the RRAM device using a preset reading mode ADC circuit.

[0012] Optionally, the reading module is also used to: obtain a first voltage signal generated based on the current signal generated by the RRAM device; identify the first voltage signal based on the multiple comparators, and use the verification coding logic to verify the first identification result to obtain the current conductivity state of each conductivity state interval.

[0013] Optionally, the verification module is further used to: obtain a second voltage signal generated based on the current signal generated by the RRAM device; identify the second voltage signal based on the multiple comparators, and use the readout coding logic to read the second identification result to obtain the actual conductivity state of the RRAM device.

[0014] Optionally, after reading the current conductivity state of each conductivity state interval based on a preset verification accuracy, the verification module is further used to: determine whether the current conductivity state of each conductivity state interval and the verification data corresponding to the corresponding conductivity state interval meet a preset matching condition; if the current conductivity state of each conductivity state interval and the verification data corresponding to the corresponding conductivity state interval meet the preset matching condition, it is determined that the data verification is successful.

[0015] Optionally, the verification accuracy of the preset verification mode ADC circuit is greater than the reading accuracy of the preset reading mode ADC circuit.

[0016] A third aspect of the present application provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the RRAM device conductivity state non-uniform ultra-precision calibration method as described in the above embodiment.

[0017] A fourth aspect of the present application provides a computer program product having a computer program stored thereon, which is executed by a processor to implement the RRAM device conductivity state non-uniform ultra-precision calibration method as described in the above embodiments.

[0018] In the above implementation, based on the preset non-uniform division strategy and conductance range, the conductance state of the RRAM device is non-uniformly divided into a plurality of conductance state intervals, corresponding verification data is pre-stored for each conductance state interval of the RRAM device, and the current conductance state of each conductance state interval is read using a preset verification mode ADC circuit, and after the data verification is determined to be successful based on the current conductance state of each conductance state interval and the verification data corresponding to each conductance state interval, the actual conductance state of the RRAM device is read using a preset reading mode ADC circuit. Thus, the problem that the conductance of the RRAM device in the intermediate conductance state is more likely to drift due to the existing programmable conductance range division method of evenly dividing the conductance interval is solved, and the single state distribution of the RRAM device is narrowed after programming is completed, leaving tolerance space for non-ideal factors such as RRAM device state drift, and leaving more tolerance space for RRAM devices in the intermediate conductance state, thereby reducing the influence of RRAM state drift on readout accuracy.

[0019] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0021] Figure 1 Schematic diagram of the uniform division of RRAM conductance states;

[0022] Figure 2 A flowchart of a method for ultra-precision calibration of non-uniform conductivity states of a RRAM device provided according to an embodiment of the present application;

[0023] Figure 3 A schematic diagram of a non-uniform division method of RRAM conductivity states according to an embodiment of the present application;

[0024] Figure 4 A schematic diagram of a multi-bit storage ultra-precision verification method of an RRAM device according to an embodiment of the present application;

[0025] Figure 5 A schematic diagram of a non-uniform ultra-precision calibration method for a RRAM device conductivity state according to an embodiment of the present application;

[0026] Figure 6 A schematic diagram of a verification mode ADC structure according to an embodiment of the present application;

[0027] Figure 7 is a schematic diagram of a read mode ADC structure according to an embodiment of the present application;

[0028] Figure 8 A schematic diagram of an ultra-precision calibration device for non-uniform conductivity state of an RRAM device according to an embodiment of the present application;

[0029] Fig. 9 Schematic diagram of the structure of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0030] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0031] The following describes the non-uniform ultra-precision calibration method, device and equipment of the RRAM device conductivity state of the embodiment of the present application with reference to the accompanying drawings. In view of the problem that the existing programmable conductivity range division method of evenly dividing the conductivity interval mentioned in the above background technology makes the conductivity of the RRAM device in the intermediate conductivity state more prone to drift, the present application provides a non-uniform ultra-precision calibration method of the conductivity state of the RRAM device, in which the conductivity state of the RRAM device is non-uniformly divided into multiple conductivity state intervals based on a preset non-uniform division strategy and conductivity range, and corresponding calibration data is pre-stored for each conductivity state interval of the RRAM device, and the current conductivity state of each conductivity state interval is read using a preset calibration mode ADC circuit, and based on the current conductivity state of each conductivity state interval and the calibration data corresponding to each conductivity state interval, after determining that the data calibration is successful, the actual conductivity state of the RRAM device is read using a preset reading mode ADC circuit. As a result, the problem that the existing programmable conductivity range division method that evenly divides the conductivity intervals makes the conductivity of the RRAM device in the intermediate conductivity state more prone to drift is solved, and the single state distribution of the RRAM device is narrowed after programming is completed, leaving tolerance space for non-ideal factors such as RRAM device state drift, while leaving more tolerance space for RRAM devices in the intermediate conductivity state, thereby reducing the impact of RRAM state drift on readout accuracy.

[0032] Specifically, Figure 2 A schematic diagram of a flow chart of a method for ultra-precision calibration of non-uniform conductivity states of a RRAM device provided in an embodiment of the present application.

[0033] like Figure 2 As shown, the RRAM device conductivity state non-uniform ultra-precision calibration method includes the following steps:

[0034] In step S201, the conductivity state of the RRAM device is non-uniformly divided into a plurality of conductivity state intervals based on a preset non-uniform division strategy and a conductivity range.

[0035] In step S202, corresponding verification data is pre-stored for each conductivity state interval of the RRAM device, and a preset verification mode ADC circuit is used to read the current conductivity state of each conductivity state interval.

[0036] In step S203, based on the current conductance state of each conductance state interval and the verification data corresponding to each conductance state interval, after determining that the data verification is successful, the actual conductance state of the RRAM device is read using a preset read mode ADC circuit.

[0037] Optionally, in some embodiments, after reading the current conductivity state of each conductivity state interval based on a preset verification accuracy, it also includes: determining whether the current conductivity state of each conductivity state interval and the verification data corresponding to the corresponding conductivity state interval meet a preset matching condition; if the current conductivity state of each conductivity state interval and the verification data corresponding to the corresponding conductivity state interval meet the preset matching condition, then it is determined that the data verification is successful.

[0038] Optionally, in some embodiments, the verification accuracy of the preset verification mode ADC circuit is greater than the reading accuracy of the preset reading mode ADC circuit.

[0039] Since the conductance of the RRAM device in the intermediate conductance state is more prone to drift, the present application adopts a preset non-uniform partitioning strategy to divide the conductance interval of the intermediate conductance state into a wider conductance range, such as Figure 3 As shown, this provides a larger tolerance space for the conductivity drift of the intermediate conductivity state.

[0040] In order to realize the multi-bit storage capability of a single RRAM device, the programming verification process achieves higher-precision identification to obtain a more compact conductivity distribution to cope with the impact of non-ideal characteristics such as device drift on the reading process results. For 2-bit RRAM device storage, the verification process uses 3-bit verification accuracy, and the normal reading process uses 2-bit reading accuracy. Figure 4 As shown, a single device stores 00, 01, 10, 11 corresponding to the verification data 000, 010, 100, 110 respectively.

[0041] Therefore, in combination with the above-mentioned RRAM conductivity state non-uniform division method and RRAM device ultra-precision verification method, the embodiment of the present application proposes a RRAM device conductivity state non-uniform ultra-precision verification method, such as Figure 5 shown.

[0042] For multi-2-bit RRAM device storage, the verification process uses 3-bit verification accuracy, and the normal reading process uses 2-bit reading accuracy, such as Figure 5As shown, a single device stores 00, 01, 10, 11 corresponding to the verification data 000, 010, 101, 111, respectively, thereby maximizing the distance between the two intermediate conductance states and leaving more tolerance space for the instability of the intermediate conductance states.

[0043] Specifically, the embodiment of the present application pre-stores corresponding verification data for each conductivity state interval of the RRAM device, and uses a preset verification mode ADC circuit to read the current conductivity state of each conductivity state interval, based on the current conductivity state of each conductivity state interval and the verification data corresponding to each conductivity state interval, if the current conductivity state of each conductivity state interval and the verification data corresponding to the corresponding conductivity state interval meet the preset matching condition, that is, the current conductivity state and the verification data corresponding to each conductivity state interval are consistent, then it is determined that the data verification is successful, and the preset reading mode ADC circuit is used to read the actual conductivity state of the RRAM device.

[0044] Among them, in some embodiments, the preset verification mode ADC circuit includes multiple comparators and verification coding logic, and the preset verification mode ADC circuit is used to read the current conductivity state of each conductivity state interval, including: obtaining a first voltage signal generated based on the current signal generated by the RRAM device; identifying the first voltage signal based on multiple comparators, and using the verification coding logic to verify the first identification result to obtain the current conductivity state of each conductivity state interval.

[0045] Optionally, in some embodiments, the preset read mode ADC circuit includes some comparators among the multiple comparators and the readout coding logic of the verification coding logic, and the actual conductance state of the RRAM device is read using the preset read mode ADC circuit, including: obtaining a second voltage signal generated based on the current signal generated by the RRAM device; identifying the second voltage signal based on the multiple comparators, and using the readout coding logic to read the second identification result to obtain the actual conductance state of the RRAM device.

[0046] The embodiment of the present application also proposes a reconfigurable ADC circuit, including a preset verification mode ADC circuit and a preset reading mode ADC circuit, which on the one hand realizes a high-precision data verification process, and on the other hand realizes a high-bandwidth data reading process.

[0047] like Figure 6 As shown, the VREAD voltage generates a current on the selected array unit, and the current flowing through the resistor generates a first voltage signal. The first voltage signal generated by the array unit current is identified by 7 comparators, and a 3-bit verification result is obtained through the verification coding logic, thereby obtaining the current conductance state of each conductance state interval.

[0048] like Figure 7As shown, during the reading process, the 3-bit FLASH ADC circuit can be split into two 2-bit ADC circuits, and the 6 comparators are divided into 2 groups of 3 comparators, and the seventh comparator is not enabled to save power. Each group of comparators is used by a 2-bit ADC, and the two 2-bit ADC circuits can read two RRAM units in parallel. The three comparators of each 2-bit ADC identify the second voltage signal generated by the corresponding array unit current, and obtain a 2-bit verification result through the readout coding logic, thereby obtaining the actual conductivity state of the RRAM device. In addition, the verification coding logic is not enabled during the reading process.

[0049] According to the non-uniform ultra-precision calibration method for the conductivity state of the RRAM device proposed in the embodiment of the present application, based on the preset non-uniform division strategy and conductivity range, the conductivity state of the RRAM device is non-uniformly divided into multiple conductivity state intervals, corresponding calibration data is pre-stored for each conductivity state interval of the RRAM device, and the current conductivity state of each conductivity state interval is read using the preset calibration mode ADC circuit, and after the data calibration is determined to be successful based on the current conductivity state of each conductivity state interval and the calibration data corresponding to each conductivity state interval, the actual conductivity state of the RRAM device is read using the preset reading mode ADC circuit. Thus, the existing programmable conductivity range division method for evenly dividing the conductivity intervals makes the conductivity of the RRAM device in the intermediate conductivity state more prone to drift, and the narrowing of the single state distribution of the RRAM device after programming is completed is achieved, leaving tolerance space for non-ideal factors such as RRAM device state drift, and leaving more tolerance space for RRAM devices in the intermediate conductivity state, thereby reducing the impact of RRAM state drift on readout accuracy, and through a reconfigurable ADC circuit, on the one hand, a high-precision data calibration process is realized, and on the other hand, a high-bandwidth data reading process is realized.

[0050] Next, the RRAM device conductivity state non-uniform ultra-precision calibration device proposed in accordance with the embodiments of the present application will be described with reference to the accompanying drawings.

[0051] Figure 8 It is a block diagram of an apparatus for checking the non-uniform conductivity state of an RRAM device according to an embodiment of the present application.

[0052] like Figure 8 As shown, the RRAM device conductivity state non-uniform ultra-precision verification device 10 includes: a non-uniform division module 100, a reading module 200 and a verification module 300.

[0053] Among them, the non-uniform division module 100 is used to non-uniformly divide the conductivity state of the RRAM device into multiple conductivity state intervals based on a preset non-uniform division strategy and conductivity range; the reading module 200 is used to pre-store corresponding verification data for each conductivity state interval of the RRAM device, and use a preset verification mode ADC circuit to read the current conductivity state of each conductivity state interval; the verification module 300 is used to determine that the data verification is successful based on the current conductivity state of each conductivity state interval and the verification data corresponding to each conductivity state interval, and then use a preset reading mode ADC circuit to read the actual conductivity state of the RRAM device.

[0054] Optionally, in some embodiments, the reading module 200 is further used to: obtain a first voltage signal generated based on a current signal generated by the RRAM device; identify the first voltage signal based on multiple comparators, and use verification coding logic to verify the first identification result to obtain the current conductivity state of each conductivity state interval.

[0055] Optionally, in some embodiments, the verification module 300 is further used to: obtain a second voltage signal generated based on the current signal generated by the RRAM device; identify the second voltage signal based on multiple comparators, and use the readout coding logic to read the second identification result to obtain the actual conductivity state of the RRAM device.

[0056] Optionally, in some embodiments, after reading the current conductivity state of each conductivity state interval based on a preset verification accuracy, the verification module 200 is further used to: determine whether the current conductivity state of each conductivity state interval and the verification data corresponding to the corresponding conductivity state interval meet a preset matching condition; if the current conductivity state of each conductivity state interval and the verification data corresponding to the corresponding conductivity state interval meet the preset matching condition, it is determined that the data verification is successful.

[0057] Optionally, in some embodiments, the verification accuracy of the preset verification mode ADC circuit is greater than the reading accuracy of the preset reading mode ADC circuit.

[0058] It should be noted that the above explanation of the embodiment of the method for checking the non-uniform conductivity state of an RRAM device with ultra-precision is also applicable to the apparatus for checking the non-uniform conductivity state of an RRAM device with ultra-precision in this embodiment, and will not be repeated here.

[0059] According to the non-uniform ultra-precision calibration device for the conductivity state of the RRAM device proposed in the embodiment of the present application, based on the preset non-uniform division strategy and conductivity range, the conductivity state of the RRAM device is non-uniformly divided into multiple conductivity state intervals, corresponding calibration data is pre-stored for each conductivity state interval of the RRAM device, and the current conductivity state of each conductivity state interval is read using a preset calibration mode ADC circuit, and after the data calibration is determined to be successful based on the current conductivity state of each conductivity state interval and the calibration data corresponding to each conductivity state interval, the actual conductivity state of the RRAM device is read using a preset reading mode ADC circuit. Thus, the problem that the existing programmable conductivity range division method of evenly dividing the conductivity interval makes the conductivity of the RRAM device in the intermediate conductivity state more prone to drift is solved, and the single state distribution of the RRAM device is narrowed after programming is completed, leaving tolerance space for non-ideal factors such as RRAM device state drift, and leaving more tolerance space for RRAM devices in the intermediate conductivity state, thereby reducing the impact of RRAM state drift on readout accuracy.

[0060] Fig. 9 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device may include:

[0061] A memory 901 , a processor 902 , and a computer program stored in the memory 901 and executable on the processor 902 .

[0062] When the processor 902 executes the program, the RRAM device conductivity state non-uniform ultra-precision calibration method provided in the above embodiment is implemented.

[0063] Furthermore, the electronic device further comprises:

[0064] The communication interface 903 is used for communication between the memory 901 and the processor 902 .

[0065] The memory 901 is used to store computer programs that can be executed on the processor 902 .

[0066] The memory 901 may include a high-speed RAM memory, and may also include a non-volatile memory (non-volatile memory), such as at least one disk memory.

[0067] If the memory 901, the processor 902 and the communication interface 903 are implemented independently, the communication interface 903, the memory 901 and the processor 902 can be connected to each other through a bus and communicate with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Fig. 9 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0068] Optionally, in a specific implementation, if the memory 901, the processor 902 and the communication interface 903 are integrated on a chip, the memory 901, the processor 902 and the communication interface 903 can communicate with each other through an internal interface.

[0069] The processor 902 may be a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application.

[0070] The embodiment of the present application also provides a computer program product, on which a computer program is stored. When the program is executed by a processor, the above-mentioned RRAM device conductivity state non-uniform ultra-precision calibration method is implemented.

[0071] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or N embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0072] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0073] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0074] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer program product for use with an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purposes of this specification, a "computer program product" can be any device that can contain, store, communicate, propagate or transmit a program for use with an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples of computer program products (a non-exhaustive list) include the following: an electrical connection with one or N wirings (electronic device), a portable computer disk case (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disk read-only memory (CDROM). Furthermore, the computer program product may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example by optically scanning the paper or other medium and then editing, interpreting or, if necessary, processing in another suitable manner, and then storing it in a computer memory.

[0075] It should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiment, the N steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0076] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer program product, which, when executed, includes one or a combination of the steps of the method embodiment.

[0077] In addition, each functional unit in each embodiment of the present application may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer program product.

[0078] The computer program product mentioned above may be a read-only memory, a disk or an optical disk, etc. Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limiting the present application. A person of ordinary skill in the art may change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A method for ultra-precision calibration of non-uniform conductivity state of a RRAM device, characterized in that: The following steps are involved: Based on a preset non-uniform partitioning strategy and a conductivity range, the conductivity state of the RRAM device is non-uniformly divided into a plurality of conductivity state intervals; Pre-storing corresponding verification data for each conductivity state interval of the RRAM device, and using a preset verification mode ADC circuit to read the current conductivity state of each conductivity state interval; After determining that the data verification is successful based on the current conductance state of each conductance state interval and the verification data corresponding to each conductance state interval, the actual conductance state of the RRAM device is read using a preset read mode ADC circuit.

2. The method according to claim 1, characterized in that The preset verification mode ADC circuit includes a plurality of comparators and verification coding logic, and the method of using the preset verification mode ADC circuit to read the current conductivity state of each conductivity state interval includes: Acquire a first voltage signal generated based on a current signal generated by the RRAM device; The first voltage signal is identified based on the multiple comparators, and the first identification result is verified using the verification coding logic to obtain the current conductance state of each conductance state interval.

3. The method according to claim 2, characterized in that The preset read mode ADC circuit includes some comparators among the plurality of comparators and a readout coding logic of the verification coding logic, and the using the preset read mode ADC circuit to read the actual conductance state of the RRAM device includes: Acquire a second voltage signal generated based on the current signal generated by the RRAM device; The second voltage signal is identified based on the multiple comparators, and the second identification result is read using the readout encoding logic to obtain the actual conductance state of the RRAM device.

4. The method according to claim 1, characterized in that: After reading the current conductivity state of each conductivity state interval based on the preset verification accuracy, the method further includes: Determine whether the current conductivity state of each conductivity state interval and the verification data corresponding to the corresponding conductivity state interval meet a preset matching condition; If the current conductance state of each conductance state interval and the verification data corresponding to the corresponding conductance state interval meet the preset matching condition, it is determined that the data verification is successful.

5. The method according to any one of claims 1 to 4, characterized in that The verification accuracy of the preset verification mode ADC circuit is greater than the reading accuracy of the preset reading mode ADC circuit.

6. An ultra-precision calibration device for non-uniform conductivity state of a RRAM device, characterized in that: include: A non-uniform partitioning module, used for non-uniformly partitioning the conductivity state of the RRAM device into a plurality of conductivity state intervals based on a preset non-uniform partitioning strategy and conductivity range; A reading module, used to pre-store corresponding verification data for each conductivity state interval of the RRAM device, and read the current conductivity state of each conductivity state interval using a preset verification mode ADC circuit; The verification module is used to read the actual conductance state of the RRAM device using a preset read mode ADC circuit after determining that the data verification is successful based on the current conductance state of each conductance state interval and the verification data corresponding to each conductance state interval.

7. The device according to claim 6, characterized in that The reading module is further used for: Acquire a first voltage signal generated based on a current signal generated by the RRAM device; The first voltage signal is identified based on the multiple comparators, and the first identification result is verified using the verification coding logic to obtain the current conductance state of each conductance state interval.

8. The device according to claim 7, characterized in that The verification module is further used for: Acquire a second voltage signal generated based on the current signal generated by the RRAM device; The second voltage signal is identified based on the multiple comparators, and the second identification result is read using the readout coding logic to obtain the actual conductance state of the RRAM device.

9. The device according to claim 7, characterized in that After reading the current conductivity state of each conductivity state interval based on a preset verification accuracy, the verification module is further used to: Determine whether the current conductivity state of each conductivity state interval and the verification data corresponding to the corresponding conductivity state interval meet a preset matching condition; If the current conductance state of each conductance state interval and the verification data corresponding to the corresponding conductance state interval meet the preset matching condition, it is determined that the data verification is successful.

10. An electronic device, characterized in that: include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the ultra-precision calibration method for the non-uniform conductivity state of a RRAM device according to any one of claims 1 to 5.

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