Chip packaging method and chip packaging structure

Abstract

The invention provides a chip packaging method and a chip packaging structure, the chip packaging method is used for packaging a chip to a substrate, and the chip packaging method comprises the following steps: obtaining the bonding height of the chip; forming a solder paste accommodating area on a bonding pad of the substrate according to the bonding height of the chip; and printing solder paste in the solder paste accommodating area to form a solder ball, and bonding the chip to the solder ball. The chip packaging structure is used for improving the quality, reliability and manufacturing efficiency of the chip packaging structure, and powerful support is provided for high performance and miniaturization development of chip packaging.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging technology, and in particular to a chip packaging method and a chip packaging structure. Background Art

[0002] This section is intended to provide a background or context to the embodiments of the application that are recited in the claims. The description herein is not admitted to be prior art by inclusion in this section.

[0003] With the development of the semiconductor industry, chip packaging technology plays a key role in improving the performance of electronic devices, reducing product size and reducing costs. Among the many packaging technologies, flip chip packaging is widely used due to its high-density interconnection characteristics. This technology usually involves the use of solder balls as the electrical connection medium between the chip and the substrate.

[0004] However, in the existing flip chip packaging process, the control accuracy of the solder ball size directly affects the quality and reliability of the final packaged product. At present, although various measures have been taken to optimize the parameters in the solder ball formation process, such as soldering temperature, time and solder paste composition, it is still difficult to avoid the problem of inconsistent solder ball size in actual production. Size deviation may lead to a series of adverse consequences, including but not limited to: unstable electrical connection, interface delamination or cracks caused by thermal stress concentration, and signal integrity problems caused by poor contact, etc. These problems seriously restrict the quality of chip packaging structure and manufacturing yield.

[0005] In addition, as integrated circuits develop towards smaller sizes and higher integration, the requirements for solder ball size accuracy are becoming increasingly stringent. Traditional solder ball formation technology and size control methods have gradually failed to meet the needs of high-end applications, especially in scenarios with extremely high packaging quality requirements in fields such as high-performance computing and 5G communications.

[0006] Based on this, the present application urgently needs to propose a chip packaging method and a chip packaging structure that can solve the above technical problems. Summary of the invention

[0007] Multiple aspects of the present application provide a chip packaging method and a chip packaging structure to improve the efficiency and accuracy of chip packaging.

[0008] In one aspect of the present application, a chip packaging method is provided for packaging a chip onto a substrate. The chip packaging method comprises: Get the bonding height of the chip; forming a solder paste receiving area on the pad of the substrate according to the bonding height of the chip; After printing solder paste in the solder paste receiving area, solder balls are formed, and the chip is bonded to the solder balls.

[0009] Furthermore, a solder paste accommodating area is formed on the pad of the substrate according to the bonding height of the chip, including: determining a printing size of the solder paste according to the bonding height of the chip; determining an accommodating size of the solder paste accommodating area based on the printing size; and forming a solder paste accommodating area on the pad of the substrate based on the accommodating size.

[0010] Furthermore, before forming a solder paste receiving area on the pad of the substrate according to the bonding height of the chip, the chip packaging method also includes: determining a printing size of the solder paste according to the bonding height of the chip; determining a receiving size of the solder paste receiving area based on the printing size; and preparing a solder paste receiving mold based on the receiving size.

[0011] Furthermore, forming a solder paste receiving area on the pad of the substrate according to the bonding height of the chip includes: setting a solder paste receiving mold to one side of the substrate, the pad of the substrate and the solder paste receiving mold defining a target area for printing solder paste.

[0012] Furthermore, when determining the printing size of the solder paste according to the bonding height of the chip, the chip packaging method also includes: performing multi-line scanning on the solder pads of the substrate to obtain the flatness of the solder pads; and determining the printing size of the solder paste according to the bonding height of the chip and the flatness of the solder pads.

[0013] Furthermore, before bonding the chip to the solder ball, the method includes: obtaining the bonding height of the chip and the material properties of the chip; determining the suction force for sucking the chip based on the material properties of the chip; and preparing a chip suction element based on the bonding height and the suction force.

[0014] Furthermore, bonding the chip to the solder ball includes: sucking the chip by the chip suction element; and bonding the chip to the solder ball when the pad of the chip is correspondingly attached to the solder ball.

[0015] Furthermore, the bonding height of the chip is 30-50um; the printing dimensions include a printing height of 50-70um, and a printing length and a printing width of 120-180um.

[0016] Furthermore, after bonding the chip to the solder ball, the method further comprises: depositing a metal layer on the chip; and coating an outer surface of the metal layer with an epoxy resin layer to form the chip.

[0017] In another aspect of the present application, a chip packaging structure is also proposed, and the chip packaging structure is prepared based on the above chip packaging method.

[0018] The present application proposes a chip packaging method and a chip packaging structure, wherein the chip packaging method obtains the bonding height of the chip; forms a solder paste accommodating area on the pad of the substrate according to the bonding height of the chip; forms a solder ball after printing solder paste in the solder paste accommodating area, and bonds the chip to the solder ball; based on the above chip packaging method, a solder paste accommodating area is formed according to the bonding height of the chip to accurately limit the printing size of the solder paste, thereby improving the size accuracy of the solder ball, improving the process effect of subsequent chip packaging, and thereby improving the quality of the chip packaging structure.

[0019] Overall, the chip packaging method described in the present application is adaptable to the size of solder paste printing / chip bonding height, can accurately define the solder paste accommodating area, and accurately limit the printing size and printing structure of the solder paste; the chip packaging structure prepared based on the chip packaging method has high quality and high yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0021] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings: Figure 1 A schematic diagram of a chip packaging method according to an embodiment of the present application; Figure 2 A schematic diagram of the steps of printing solder paste in the solder paste receiving area in the chip packaging method provided in one embodiment of the present application; Figure 3 A schematic diagram of the steps of forming solder balls in a chip packaging method provided in an embodiment of the present application; Figure 4 A schematic diagram of the steps of a chip suction component sucking a chip and placing it on a solder ball in a chip packaging method provided in an embodiment of the present application; Figure 5 A schematic diagram of the structure of a solder paste containing mold provided in one embodiment of the present application; Figure 6 A schematic structural diagram of a chip packaging structure provided by another embodiment of the present application; In the figure, 01-substrate; 02-solder paste; 03-solder ball; 04-solder paste receiving area; 05-chip; 06-metal layer; 07-epoxy resin layer; 08-chip suction element; The same or similar reference numerals in the drawings represent the same or similar components. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0023] The embodiment of the present application provides a chip packaging method for packaging a chip onto a substrate 01. The chip packaging method includes: Step S1, obtaining the bonding height of chip 05; Step S2, forming a solder paste receiving area 04 on the pad of the substrate 01 according to the bonding height of the chip 05; Step S3 , forming solder balls 03 after printing the solder paste 02 in the solder paste receiving area 04 , and bonding the chip 05 to the solder balls 03 .

[0024] In actual scenarios, the executor of the method can be a user device, or a device formed by integrating a user device and a network device through a network, or an application running on the above-mentioned device. The user device includes but is not limited to computers, mobile phones, tablets, smart watches, bracelets and other terminal devices.

[0025] Based on the chip packaging structure described in the present application, and the chip packaging structure prepared based on the chip packaging method described in the present application, a filter chip is applied to the communication field. The filter chip using the chip packaging structure described in the present application includes but is not limited to computers, smart phones, and vehicle-mounted communication equipment.

[0026] Embodiment 1

[0027] Figure 1 The processing flow of a chip packaging method provided in an embodiment of the present application is shown, which is used to package the chip 05 onto a substrate. The method at least includes the following processing steps: Step S1, obtaining the bonding height of chip 05; Step S2, forming a solder paste receiving area 04 on the pad of the substrate 01 according to the bonding height of the chip 05; Step S3 , forming solder balls 03 after printing the solder paste 02 in the solder paste receiving area 04 , and bonding the chip 05 to the solder balls 03 .

[0028] In one embodiment, Figure 2It is shown that a solder paste receiving area 04 is formed on the pad of the substrate 01 according to the bonding height of the chip 05, and the steps include: determining the printing size of the solder paste 02 according to the bonding height of the chip 05; determining the accommodation size of the solder paste receiving area 04 based on the printing size; and forming the solder paste receiving area 04 on the pad of the substrate 01 based on the accommodation size.

[0029] In one embodiment, the schematic diagram of the step of forming solder balls 03 after printing solder paste 02 in the solder paste printing area is as follows: Figure 3 shown.

[0030] By forming a solder paste receiving area 04 on the pad of the substrate 01 according to the bonding height of the chip 05, precise control of the amount and distribution of the solder paste 02 is achieved, thereby simplifying the variable control in the chip 05 packaging process, reducing the chip 05 packaging rework and scrap rate, and thus reducing the overall production cost; further, by forming the solder paste receiving area 04, it not only helps to ensure the chip 05 bonding quality, but also reduces the short circuit or open welding problems caused by overflow or insufficient solder paste 02, which helps to improve the yield of the chip packaging structure; further, by precisely controlling the amount and size of the solder paste 02, precise control of the height and shape of the solder ball 03 is achieved, thereby ensuring the electrical connection quality between the chip 05 and the solder ball 03, reducing resistance and improving signal integrity.

[0031] In one embodiment, before bonding the chip 05 to the solder ball 03, the method includes: obtaining a bonding height of the chip 05 and a material property of the chip 05; determining a suction force for sucking the chip 05 based on the material property of the chip 05; and preparing a chip suction element 08 based on the bonding height and the suction force.

[0032] Specifically, the chip suction element 08 includes a main body and a support column arranged on the main body, the support column is used to limit the bonding height of the chip 05, and the suction nozzle is used to suck the chip 05; the height of the support column is not greater than the bonding height of the chip 05, preferably, the height of the support column is equal to the bonding height of the chip 05.

[0033] On the one hand, by accurately obtaining the bonding height of the chip 05 and its material properties, more accurate data support can be provided for the chip 05 suction process. This helps to ensure high-precision operation during the chip 05 bonding and packaging process, and reduce the risk of chip 05 packaging failure caused by position error. On the other hand, determining the appropriate suction force of the chip suction element 08 according to the material properties of the chip 05 can effectively avoid the chip 05 slipping due to insufficient suction or damage to the chip 05 caused by excessive suction; this precise control not only improves the safety and reliability of the suction process, but also ensures that the quality of the chip 05 is not affected. On the other hand, based on the bonding height and suction force parameters (based on the material properties of the chip 05), a special chip suction element 08 is prepared, so that the chip suction element 08 can better adapt to different types and specifications of chips 05; whether it is a thin chip or a thick chip, the design of the chip suction element 08 can be adjusted to meet specific needs, increasing the versatility and flexibility of the equipment. On the other hand, using a customized chip suction element 08 for operation can speed up production while ensuring high quality. Reduce rework and scrap rates of chip packages due to improper pick-up methods, thereby reducing overall production costs.

[0034] The material properties of the chip 05 include the maximum suction force that the chip 05 can withstand when being sucked by the chip suction element 08 .

[0035] In one embodiment, bonding the chip 05 to the solder ball 03 includes: sucking the chip 05 by the chip sucking element 08; and when the pad of the chip 05 is correspondingly attached to the solder ball 03, bonding the chip 05 to the solder ball 03. Figure 4 The figure shows a schematic diagram of the steps of sucking the chip 05 by the chip sucking component 08 and bonding the chip 05 to the solder ball 03 .

[0036] In one embodiment, before forming the solder paste receiving area 04 on the pad of the substrate 01 according to the bonding height of the chip 05, the chip packaging method further includes: determining the printing size of the solder paste 02 according to the bonding height of the chip 05; determining the accommodation size of the solder paste receiving area 04 based on the printing size; preparing a solder paste accommodation mold based on the accommodation size; the structure of the solder paste accommodation mold is as follows: Figure 5 shown.

[0037] In one embodiment, the material for preparing the solder paste containing mold includes but is not limited to lightweight materials such as aluminum alloy and steel, so as to ensure that the substrate 01 is not damaged when the solder paste containing mold is set on the substrate 01.

[0038] Specifically, by printing solder paste 02 using a solder paste containing mold specially prepared according to the containing size, the standardization and consistency of production can be significantly improved. The prepared solder paste containing mold helps to reduce the impact of human factors on product quality and ensure the stability and reliability of products during large-scale production, that is, it helps to ensure the consistency and repeatability of chip packaging structure production. Among them, the parameters of the solder paste containing mold are determined based on the containing size, and the shape, size, concave and convex conditions and other parameters of the mold are accurately determined.

[0039] In one embodiment, forming a solder paste receiving area 04 on the pad of the substrate 01 according to the bonding height of the chip 05 includes: setting a solder paste receiving mold to one side of the substrate 01, and the pad of the substrate 01 and the solder paste receiving mold define a target area for printing solder paste 02.

[0040] In one embodiment, when the printing size of the solder paste 02 is determined according to the bonding height of the chip 05, the chip packaging method further includes: performing multi-line scanning on the solder pads of the substrate 01 to obtain the flatness of the solder pads; determining the printing size of the solder paste 02 according to the bonding height of the chip 05 and the flatness of the solder pads.

[0041] Specifically, performing multi-line scanning on the pads of the substrate 01 and obtaining the flatness of the pads includes using a 3D scanning tester to scan the surface of the pads to obtain the flatness of the pads.

[0042] Furthermore, since there are slight differences in the flatness of different solder pads, in order to ensure the printing size of the solder paste 02 and the size of the solder ball 03, the flatness of the solder pad is also considered when determining the printing size of the solder paste 02.

[0043] In one embodiment, the bonding height of the chip 05 is 30-50 um; the printing dimensions include a printing height of 50-70 um, and a printing length and a printing width of 120-180 um.

[0044] Specifically, the height of the solder ball 03 can be 30um, 35um, 45um and 50um. Those skilled in the art can make a reasonable choice according to the actual application scenario. This application does not limit which one is selected to determine the height of the solder ball 03 within the above range.

[0045] In one embodiment, when the height of the solder paste 02 is lower than 50um, in the step of packaging the chip 05 to the substrate 01, the metal layer 06 and the epoxy resin layer 07 are likely to invade from the side to the front side of the chip 05 (the side where the chip 05 and the solder ball 03 are bonded), causing the chip 05 to become dirty; when the height of the solder paste 02 is higher than 70um, it is likely to cause abnormal electrical connection between the solder balls 03, thereby causing electrical short circuits in circuit parts that should not be connected.

[0046] Specifically, the height of solder paste 02 can be 50um, 60um and 70um, and the size (variable length / diameter / circumference) of solder paste 02 can be 160um, 170um and 180um; it should be understood that there is a corresponding relationship between the height and size of the solder paste and the height of the solder ball 03, such as when the height of solder paste 02 is 50um and the size of solder paste 02 is 160um, the height of solder ball 03 is 30um; when the height of solder paste 02 is 70um and the size of solder paste 02 is 180um, the height of solder ball 03 is 50um.

[0047] In one embodiment, after bonding the chip 05 to the solder ball 03 , the method further includes: depositing a metal layer 06 on the chip 05 ; and coating an epoxy resin layer 07 on the outer surface of the metal layer 06 to form the chip 05 .

[0048] In one embodiment, after packaging the chip 05 onto the substrate 01, the chip packaging method further comprises: inspecting and testing the packaged chip 05 to ensure that the electrical and mechanical properties of the chip packaging structure meet the requirements.

[0049] In one embodiment, before printing the solder paste 02 onto the pad of the substrate 01, the method further includes electroplating a metal base layer, usually copper or nickel, on the substrate 01 as the base layer of the solder paste 02; the electroplating process requires applying an electric current to the substrate 01 so that metal ions are deposited on the substrate 01 to form a metal base.

[0050] In one embodiment, when printing solder paste 02 to the pad of substrate 01, the method further includes: performing a tinning process on the metal bottom layer to form solder paste 02, so that tin ions are deposited on the metal bottom layer to form solder balls 03. The tinning process can use chemical tinning or electric tinning. Chemical tinning is to reduce tin ions to metallic tin through chemical reactions, while electric tinning is to deposit tin ions on the metal layer through electroplating. During the tinning process, tin ions will gradually deposit on the metal bottom layer to form a spherical shape (i.e., forming solder balls 03). In order to make the shape of solder balls 03 more regular and uniform, the solder balls 03 are molded by controlling the temperature and concentration during the tinning process.

[0051] In one embodiment, after the solder paste 02 is melted to form the solder balls 03, the method further includes: protecting the solder balls 03 to prevent oxidation and corrosion. This is usually done by coating the solder balls 03 with a protective film or adding a protective agent.

[0052] It should be understood that the chip 05 described in the present application includes but is not limited to a surface acoustic wave filter (SAW Filter).

[0053] Embodiment 2

[0054] Figure 6 A schematic structural diagram of a chip packaging structure provided in an embodiment of the present application is shown. The chip packaging structure is prepared based on the chip packaging method described in Embodiment 1. The chip packaging structure includes: A substrate 01, wherein a solder pad is disposed on the substrate 01; Solder ball 03, solder ball 03 is set on the solder pad of substrate 01; Chip 05, the pad of chip 05 corresponds to solder ball 03 bonding; Metal layer 06, deposited from the outer surface of chip 05 to the top of substrate 01; The epoxy resin layer 07 is coated on the outer surface of the metal layer 06 .

[0055] Embodiment 3

[0056] Based on the same inventive concept, an electronic device is also provided in an embodiment of the present application, and the method corresponding to the electronic device may be the chip packaging method in the aforementioned embodiment, and its principle of solving the problem is similar to that of the method. The electronic device provided in an embodiment of the present application includes: at least one processor; and a memory connected to the at least one processor in communication; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the methods and / or technical solutions of the aforementioned multiple embodiments of the present application.

[0057] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

[0058] In addition, it is clear that the word "comprising" does not exclude other units or steps, and the singular does not exclude the plural. Multiple units or devices stated in a device claim can also be implemented by one unit or device through software or hardware. The words first, second, etc. are used to indicate names, and do not indicate any particular order.

Claims

1. A chip packaging method, characterized in that: For packaging a chip onto a substrate, the chip packaging method comprises: Get the bonding height of the chip; forming a solder paste receiving area on the pad of the substrate according to the bonding height of the chip; After printing solder paste in the solder paste receiving area, solder balls are formed, and the chip is bonded to the solder balls.

2. The chip packaging method according to claim 1, characterized in that: Forming a solder paste receiving area on the pad of the substrate according to the bonding height of the chip, comprising: Determining the printing size of the solder paste according to the bonding height of the chip; Determining the accommodating size of the solder paste accommodating area based on the printed size; A solder paste accommodating area is formed on the pad of the substrate based on the accommodating size.

3. The chip packaging method according to claim 1, characterized in that: Before forming a solder paste receiving area on the pad of the substrate according to the bonding height of the chip, the chip packaging method further includes: Determining the printing size of the solder paste according to the bonding height of the chip; Determining the accommodating size of the solder paste accommodating area based on the printed size; A solder paste containing mold is prepared based on the containing size.

4. The chip packaging method according to claim 3, characterized in that: Forming a solder paste receiving area on the pad of the substrate according to the bonding height of the chip includes: A solder paste containing mold is arranged on one side of the substrate, and the solder pad of the substrate and the solder paste containing mold define a target area for printing solder paste.

5. The chip packaging method according to any one of claims 2 to 4, characterized in that: When determining the printing size of the solder paste according to the bonding height of the chip, the chip packaging method further comprises: Performing multi-line scanning on the pads of the substrate to obtain the flatness of the pads; The printing size of the solder paste is determined according to the bonding height of the chip and the flatness of the pad.

6. The chip packaging method according to any one of claims 1 to 4, characterized in that: Before bonding the chip to the solder ball, the method includes: Obtain the bonding height of the chip and the material properties of the chip; determining a suction force for sucking the chip based on material properties of the chip; A chip suction element is prepared based on the bonding height and the suction force.

7. The chip packaging method according to claim 6, characterized in that: Bonding the chip to the solder ball includes: Pick up the chip by the chip picking element; When the pads of the chip are aligned with the solder balls, the chip is bonded to the solder balls.

8. The chip packaging method according to claim 7, characterized in that: The bonding height of the chip is 30-50um; the printing dimensions include a printing height of 50-70um, and a printing length and a printing width of 120-180um.

9. The chip packaging method according to claim 8, characterized in that: After bonding the chip to the solder ball, the method further includes: depositing a metal layer onto the chip; The chip is formed by coating the outer surface of the metal layer with an epoxy resin layer.

10. A chip packaging structure, characterized in that: The packaging structure is prepared based on the chip packaging method according to any one of claims 1 to 9.

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