Embedded PCB packaging structure

By embedding thermal conductors and setting conductive thermal vias in the embedded PCB package structure, a multi-path parallel heat dissipation design is realized, which solves the problem of overheating of the embedded PCB package structure during high power operation, and improves the heat dissipation efficiency and reliability.

CN119965176AActive Publication Date: 2025-05-09SHANGHAI NAVIG SEMICON TECH CO LTD

Patent Information

Application Number
CN202510450646.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-11
Publication Date
2025-05-09
Estimated Expiration
2045-04-11

AI Technical Summary

Technical Problem

The existing embedded PCB package structure is prone to overheating when running at high power, affecting the reliability and life of the chip.

Method used

An embedded PCB packaging structure is designed, and a multi-path parallel heat dissipation design is realized by embedding a heat conductor in the substrate layer and forming grooves on its surface to embed a heat source chip, while several conductive thermal vias are provided in the second insulating layer.

Benefits of technology

It effectively reduces thermal resistance, improves heat dissipation efficiency, and solves the problems of single heat dissipation path, high thermal resistance and low heat dissipation efficiency in traditional packaging forms.

✦ Generated by Eureka AI based on patent content.

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Abstract

According to the embedded PCB packaging structure provided by the invention, the heat conduction seat is embedded in the substrate layer, the groove is formed in the surface of the substrate layer so as to embed the heat source chip, and the plurality of electric conduction and heat conduction through holes are formed in the second insulating layer, so that heat can be conducted to the radiator through the heat conduction seat, and the heat source chip can be embedded into the heat conduction seat. And the heat can be conducted to the upper metal layer through the electric conduction and heat conduction through holes, then is conducted downwards to the heat conduction seat through the second insulating layer from the upper metal layer, and is dissipated through the heat dissipater, so that the heat resistance is effectively reduced through the multi-path parallel heat dissipation design, and the heat dissipation efficiency is improved. The problems of single heat dissipation path, high thermal resistance and low heat dissipation efficiency in a traditional packaging form are solved.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and in particular to an embedded PCB packaging structure. Background Art

[0002] With the rapid development of third-generation semiconductor technology, silicon carbide (SiC) materials have been increasingly widely used in fields such as automotive and photovoltaic energy storage due to their unique performance advantages. SiC devices, with their fast switching speed and low loss, have significantly improved the energy efficiency and performance of the system, showing huge market potential and development prospects.

[0003] However, the current packaging form has limited the full potential of SiC materials to a certain extent. Traditional packaging technology is mainly based on IGBT (insulated gate bipolar transistor) packaging design. This design cannot fully adapt to the characteristics of SiC devices in terms of heat dissipation and electrical performance optimization, resulting in the performance of SiC devices in practical applications failing to meet theoretical expectations.

[0004] Among the development directions of many packaging technologies, embedded PCB (printed circuit board) packaging technology has attracted much attention. By embedding the chip directly into the PCB substrate, it achieves a more compact structure and a shorter interconnection path, which helps to reduce parasitic inductance and improve power density. But at the same time, embedded PCB packaging also faces severe heat dissipation challenges. Since the thermal conductivity of the PCB material itself is relatively low and the heat dissipation path is single, the rapid conduction and dissipation of heat is limited, making the chip prone to overheating when running at high power, which in turn affects its reliability and life. Summary of the invention

[0005] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide an embedded PCB packaging structure to solve the problem that the chip in the embedded PCB package in the prior art is prone to overheating when running at high power, thereby affecting its reliability and life.

[0006] To achieve the above-mentioned object and other related objects, the present invention provides an embedded PCB packaging structure, which includes, from bottom to top, a heat sink, a lower metal layer, a first insulating layer, a substrate layer, a second insulating layer and an upper metal layer, wherein the material of the second insulating layer is high thermal conductivity PP (polypropylene), and the thermal conductivity of the second insulating layer is greater than 2 W / (m·K); It also includes: a thermally conductive seat embedded in and passing through the substrate layer, a heat source chip embedded in the thermally conductive seat, and a plurality of electrically conductive thermal vias passing through the second insulating layer; wherein a groove is formed on the surface of the thermally conductive seat away from the lower metal layer, the heat source chip is embedded in the groove, all the electrically conductive thermal vias are located above the heat source chip, one end of the electrically conductive thermal via is in contact with and connected to the heat source chip, and the other end is in contact with and connected to the upper metal layer.

[0007] Optionally, the thermal conductivity of the first insulating layer is greater than 4 W / (m·K).

[0008] Optionally, the lower metal layer and the upper metal layer are both made of copper.

[0009] Optionally, the thermally conductive seat is made of copper.

[0010] Optionally, the conductive and thermally conductive material completely fills the conductive and thermally conductive via hole, or the conductive and thermally conductive material partially fills the conductive and thermally conductive via hole.

[0011] Furthermore, the electrically conductive and thermally conductive material is copper.

[0012] Optionally, the upper surface of the heat source chip has a plurality of heat source pads, and the electrically conductive and thermally conductive vias are contact-connected with the heat source pads in a one-to-one correspondence.

[0013] Furthermore, a plane dimension of the conductive and thermally conductive via close to one end of the substrate layer is not less than a dimension of the heat source pad.

[0014] Optionally, the heat source chip is a silicon carbide based chip.

[0015] Optionally, a planar size of the heat sink is larger than a planar size of the underlying metal layer.

[0016] As described above, the embedded PCB packaging structure of the present invention has the following beneficial effects: by embedding a thermally conductive seat in the substrate layer and forming a groove on its surface to embed the heat source chip, and at the same time providing a plurality of conductive thermally conductive vias in the second insulating layer, the heat can not only be conducted to the heat sink through the thermally conductive seat, but also be conducted to the upper metal layer through the conductive thermally conductive vias, and then be conducted downward from the upper metal layer through the second insulating layer to the thermally conductive seat, and then be dissipated through the heat sink. This multi-path parallel heat dissipation design effectively reduces thermal resistance, improves heat dissipation efficiency, and solves the problems of single heat dissipation path, high thermal resistance, and low heat dissipation efficiency in traditional packaging forms. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 Shown is a schematic cross-sectional structure diagram of the embedded PCB packaging structure of the present invention.

[0018] Figure 2 It is an equivalent schematic diagram showing the first thermal resistor and the second thermal resistor in parallel in the embedded PCB packaging structure of the present invention.

[0019] Figure 3 The schematic diagram shows the temperature distribution of the heat source chip and the entire embedded PCB packaging structure after a preset time has passed for the embedded PCB packaging structure with a single-path heat dissipation design in the prior art.

[0020] like Figure 4 The schematic diagram showing the temperature distribution of the heat source chip and the entire embedded PCB packaging structure of the dual-path heat dissipation design of the present invention after a preset time has passed.

[0021] Component number description 1, 2 embedded PCB packaging structure, 10 heat sink, 11 lower metal layer, 12 first insulation layer, 13 substrate layer, 14 second insulation layer, 15 upper metal layer, 16 thermal seat, 17, 21 heat source chip, 18 conductive and thermal vias, 19 groove, R1 first thermal resistance, R2 second thermal resistance. DETAILED DESCRIPTION

[0022] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0023] See also Figure 1 and Figure 2 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0024] This embodiment provides an embedded PCB packaging structure 1, such as Figure 1 As shown, the packaging structure includes, from bottom to top, a heat sink 10, a lower metal layer 11, a first insulating layer 12, a substrate layer 13, a second insulating layer 14 and an upper metal layer 15, wherein the material of the second insulating layer 14 is high thermal conductivity PP (polypropylene), and the thermal conductivity of the second insulating layer 14 is greater than 2 W / (m·K); It also includes: a thermally conductive seat 16 embedded in and passing through the substrate layer 13, a heat source chip 17 embedded in the thermally conductive seat 16, and a plurality of electrically conductive thermal vias 18 passing through the second insulating layer 14; wherein a groove 19 is formed on the surface of the thermally conductive seat 16 away from the lower metal layer 11, the heat source chip 17 is embedded in the groove 19, all of the electrically conductive thermal vias 18 are located above the heat source chip 17, one end of the electrically conductive thermal via 18 is in contact with and connected to the heat source chip 17, and the other end is in contact with and connected to the upper metal layer 15.

[0025] The embedded PCB packaging structure of this embodiment embeds a thermal seat in the substrate layer and forms a groove on its surface to embed the heat source chip, and at the same time, a plurality of conductive thermal vias are arranged in the second insulating layer, so that the heat can not only be conducted to the heat sink through the thermal seat, but also be conducted to the upper metal layer through the conductive thermal vias, and then be conducted downward from the upper metal layer through the second insulating layer to the thermal seat, and then dissipated through the heat sink. This multi-path parallel heat dissipation design effectively reduces thermal resistance, improves heat dissipation efficiency, and solves the problems of single heat dissipation path, high thermal resistance, and low heat dissipation efficiency in traditional packaging forms.

[0026] In this embodiment, the heat generated by the heat source chip 17 is transferred to the heat sink 10 through a thermal resistor, wherein the thermal resistor is formed by a first thermal resistor R1 and a second thermal resistor R2 connected in parallel; Figure 2 The figure shows an equivalent schematic diagram of the first thermal resistor R1 and the second thermal resistor R2 connected in parallel in the embedded PCB packaging structure. The first thermal resistor R1 corresponds to the first path, and the first path is that the heat generated by the heat source chip 17 is conducted to the thermal seat 16, and then conducted to the heat sink 10 by the thermal seat 16; the second thermal resistor R2 corresponds to the second path, and the second path is that the heat generated by the heat source chip 17 is conducted to the upper metal layer 15 through the conductive thermal via 18, and then conducted to the thermal seat 16 through the second insulating layer 14, and finally conducted to the heat sink 10 by the thermal seat 16. The dual-path thermal resistor parallel design improves heat dissipation efficiency, enhances reliability, and optimizes heat distribution, providing a more effective heat dissipation solution for the heat source chip 17 with high power and high heat generation.

[0027] In a specific example, the thermal resistance of the dual-path parallel design is about 10% lower than that of the single-path design in the prior art. As an example, the dual-path heat dissipation design of the embedded PCB packaging structure 1 of this embodiment and the single-path heat dissipation design of the embedded PCB packaging structure 2 in the prior art, within the same preset time, the average temperature, maximum temperature and temperature rise value of the heat source chip are shown in Table 1. Specifically, Figure 3FIG. 2 shows the embedded PCB packaging structure 2 with a single-path heat dissipation design in the prior art. After a preset time, the temperature distribution of the heat source chip 21 and the entire embedded PCB packaging structure 2 is as follows: Figure 4 The embedded PCB packaging structure 1 with dual-path heat dissipation design in this embodiment is shown, and after the preset time, the temperature distribution of the heat source chip 17 and the entire embedded PCB packaging structure 1.

[0028] Table 1:

[0029] As an example, the material of the first insulating layer 12 is generally not selected from traditional RF4 and PI (polyimide) materials with low thermal conductivity. The thermal conductivity of the first insulating layer 12 is preferably greater than 4 W / (m·K) to quickly conduct the heat generated by the heat source chip 17 to the heat sink 10 through the first insulating layer 12, thereby improving the heat dissipation efficiency of the packaging structure.

[0030] The second insulating layer 14 is made of a highly thermally conductive PP (polypropylene) material having a thermal conductivity greater than 2 W / (m·K), and can quickly conduct the heat conducted to the upper metal layer 15 to the thermal seat 16 through the second insulating layer 14 , and finally conduct the heat to the heat sink 10 from the thermal seat 16 .

[0031] In this embodiment, the materials of the lower metal layer 11 and the upper metal layer 15 are preferably copper. The high electrical conductivity and excellent thermal conductivity of copper can not only improve the electrical and heat dissipation performance of the embedded PCB packaging structure, but also ensure its reliability and economy in various application environments.

[0032] As an example, the material of the thermal seat 16 is a material with high thermal conductivity. Preferably, the material of the thermal seat 16 in this embodiment is copper. By utilizing the superior thermal conductivity of copper, the heat generated by the heat source chip 17 can be quickly transferred to the heat sink 10, thereby further improving the heat dissipation efficiency of the entire packaging structure.

[0033] It should be noted that the conductive and thermal vias 18 are through holes with conductive and thermal conductive functions. As an example, the conductive and thermal conductive material completely fills the conductive and thermal conductive vias 18, or the conductive and thermal conductive material partially fills the conductive and thermal conductive vias 18, as long as the conductive and thermal conductive functions can be achieved. Among them, complete filling can minimize thermal resistance and electrical resistance to the greatest extent, ensuring efficient conduction of heat and current, and partial filling can flexibly adjust the filling ratio according to actual heat dissipation and electrical connection requirements, which can not only ensure performance but also reduce material usage and reduce costs.

[0034] Furthermore, the conductive and thermally conductive material is preferably copper. Copper is the preferred material because of its excellent conductive and thermally conductive properties, which can significantly improve the electrical and heat dissipation efficiency of the packaging structure. It also has good mechanical properties and corrosion resistance, can adapt to a variety of harsh working environments, and effectively extend the service life of the packaging structure.

[0035] As an example, the upper surface of the heat source chip 17 has a plurality of heat source pads (not shown), and the conductive thermal vias 18 are contact-connected with the heat source pads one-to-one, so that the heat generated by the heat source chip 17 can be conducted to the conductive thermal vias 18 to the greatest extent through the heat source pads, and then conducted to the upper metal layer 15.

[0036] As a further example, the planar size of the conductive thermal via 18 close to one end of the substrate layer 13 is not less than the size of the heat source pad to ensure a good contact area between the conductive thermal via 18 and the heat source pad, thereby further improving heat dissipation efficiency.

[0037] As an example, the heat source chip 17 is a silicon carbide-based chip, which can not only give full play to the potential of silicon carbide materials, but also complement the design of the embedded PCB packaging structure to further improve the performance and reliability of the entire packaging structure.

[0038] As an example, the planar size of the heat sink 10 is larger than the planar size of the underlying metal layer 11 to expand the coverage of the heat sink 10, so that it can more effectively collect and dissipate heat from the underlying metal layer 11 and the entire packaging structure, and the larger planar size helps to increase the contact area between the heat sink 10 and the surrounding environment, thereby improving the heat dissipation efficiency, reducing the operating temperature of the heat source chip 17, and improving the reliability and life of the heat source chip 17.

[0039] In summary, the embedded PCB packaging structure of the present invention embeds a heat-conducting seat in the substrate layer and forms a groove on its surface to embed the heat source chip, and at the same time, a plurality of conductive heat-conducting vias are set in the second insulating layer, so that the heat can not only be conducted to the heat sink through the heat-conducting seat, but also be conducted to the upper metal layer through the conductive heat-conducting vias, and then from the upper metal layer through the second insulating layer to the heat-conducting seat, and then dissipated through the heat sink. This multi-path parallel heat dissipation design effectively reduces thermal resistance, improves heat dissipation efficiency, and solves the problems of single heat dissipation path, high thermal resistance, and low heat dissipation efficiency in traditional packaging forms. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0040] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. An embedded PCB packaging structure, characterized in that: The packaging structure includes, from bottom to top, a heat sink, a lower metal layer, a first insulating layer, a substrate layer, a second insulating layer and an upper metal layer, wherein the material of the second insulating layer is high thermal conductivity PP, and the thermal conductivity of the second insulating layer is greater than 2 W / (m·K); It also includes: a thermally conductive seat embedded in and passing through the substrate layer, a heat source chip embedded in the thermally conductive seat, and a plurality of electrically conductive thermal vias passing through the second insulating layer; wherein a groove is formed on the surface of the thermally conductive seat away from the lower metal layer, the heat source chip is embedded in the groove, all the electrically conductive thermal vias are located above the heat source chip, one end of the electrically conductive thermal via is in contact with and connected to the heat source chip, and the other end is in contact with and connected to the upper metal layer.

2. The embedded PCB packaging structure according to claim 1, characterized in that: The thermal conductivity of the first insulating layer is greater than 4 W / (m·K).

3. The embedded PCB packaging structure according to claim 1, characterized in that: The lower metal layer and the upper metal layer are both made of copper.

4. The embedded PCB packaging structure according to claim 1, characterized in that: The material of the heat conducting seat is copper.

5. The embedded PCB packaging structure according to claim 1, characterized in that: The conductive and thermally conductive material completely fills the conductive and thermally conductive via hole, or the conductive and thermally conductive material partially fills the conductive and thermally conductive via hole.

6. The embedded PCB packaging structure according to claim 5, characterized in that: The electrically conductive and thermally conductive material is copper.

7. The embedded PCB packaging structure according to claim 1, characterized in that: The upper surface of the heat source chip is provided with a plurality of heat source pads, and the conductive and heat conductive vias are contact-connected with the heat source pads in a one-to-one correspondence.

8. The embedded PCB packaging structure according to claim 7, characterized in that: The plane size of the conductive and thermal via close to one end of the substrate layer is not less than the size of the heat source pad.

9. The embedded PCB packaging structure according to claim 1, characterized in that: The heat source chip is a silicon carbide based chip.

10. The embedded PCB packaging structure according to claim 1, characterized in that: The planar size of the heat sink is larger than the planar size of the lower metal layer.

Citation Information

Patent Citations

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  • Semiconductor packaging structure and preparation method thereof

    CN110931368A

  • Intelligent power module and preparation method thereof

    CN110931477A

  • Structure for embedding semiconductor power device into carrier plate and preparation method and application thereof

    CN117038652A

  • Chip heat dissipating structure, chip structure, circuit board and supercomputing device

    US20210280504A1

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