Packaging structure and manufacturing method thereof
By designing a combination of packaging substrate, application-specific integrated circuits, optoelectronic components and organic interposer in the packaging structure, the problem of density bottleneck in the existing optical co-packaging architecture at high bandwidth is solved, and a high-density and high-performance packaging structure is realized.
Patent Information
- Application Number
- CN202311472722.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-07
- Publication Date
- 2025-05-09
AI Technical Summary
The existing optical co-packaging architecture cannot meet the bandwidth when it enters the 51.2T generation, resulting in bottlenecks in optical co-packaging density.
A package structure is designed, including a package substrate, a purpose-specific integrated circuit, a plurality of optoelectronic components, and a plurality of organic interposers. The photoelectric components are bonded to the photonic integrated circuit through a hybrid bonding pad and electrically connected to the packaging substrate through an organic interposer layer to achieve high-density packaging.
Through this design, the packaging structure can achieve higher density and performance, meeting higher bandwidth requirements.
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Figure CN119965203A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a semiconductor structure and a manufacturing method thereof, and in particular to a packaging structure and a manufacturing method thereof. Background Art
[0002] In recent years, the co-packaged optics (CPO) architecture has emerged. The bandwidth of network switches produced by Intel and Broadcom is 25.6T generation, in which the electronic integrated circuit (EIC) and the photonic integrated circuit (PIC) are arranged side by side. However, when the bandwidth of network switches enters the 51.2T generation, the above packaging method can no longer meet the requirements, and the density of co-packaged optics has reached a bottleneck. Summary of the invention
[0003] The present invention is directed to a packaging structure that can have higher density and performance.
[0004] The present invention also provides a method for manufacturing a packaging structure, which is used to manufacture the above packaging structure.
[0005] According to an embodiment of the present invention, a packaging structure includes a packaging substrate, a dedicated integrated circuit, a plurality of optoelectronic components and a plurality of organic interposers. The dedicated integrated circuit is configured on the packaging substrate and electrically connected to the packaging substrate. The optoelectronic components are separately configured on the packaging substrate and surround the dedicated integrated circuit. Each optoelectronic component includes an electronic integrated circuit, a photonic integrated circuit and a plurality of hybrid bonding pads. The electronic integrated circuit is bonded to the photonic integrated circuit through the hybrid bonding pad. The organic interposers are separately configured on the packaging substrate and surround the dedicated integrated circuit. The optoelectronic components are electrically connected to the packaging substrate through the organic interposer.
[0006] In the packaging structure according to the embodiment of the present invention, each of the above-mentioned optoelectronic components further includes an optical fiber cable, and the optical fiber cable is connected to the photonic integrated circuit.
[0007] In the packaging structure according to the embodiment of the present invention, each of the above-mentioned optoelectronic components further includes a packaging colloid, which covers the electronic integrated circuit and the photonic integrated circuit and exposes the bottom surface of the photonic integrated circuit.
[0008] In the packaging structure according to the embodiment of the present invention, the packaging structure further comprises a plurality of conductive members disposed between the optoelectronic component and the organic interposer. The photonic integrated circuit has a plurality of silicon vias, and the photonic integrated circuit is electrically connected to the corresponding organic interposer through the silicon vias and the conductive members.
[0009] In the package structure according to the embodiment of the present invention, each of the conductive elements includes a bump or a copper pillar with a solder bump cap.
[0010] In the packaging structure according to the embodiment of the present invention, the above-mentioned packaging structure further includes a plurality of first conductive members and a plurality of second conductive members. The first conductive members are arranged between the dedicated integrated circuit and the packaging substrate, wherein the dedicated integrated circuit is electrically connected to the packaging substrate through the first conductive members. The second conductive members are arranged between the organic interposer and the packaging substrate, wherein the organic interposer is electrically connected to the packaging substrate through the second conductive members.
[0011] In the packaging structure according to the embodiment of the present invention, the packaging substrate includes a connecting circuit, and the first conductive element is electrically connected to the second conductive element through the connecting circuit.
[0012] In the package structure according to the embodiment of the present invention, each of the first conductive elements and each of the second conductive elements comprises a solder ball.
[0013] In the packaging structure according to the embodiment of the present invention, each of the organic interposers mentioned above includes a redistribution layer structure.
[0014] In the packaging structure according to the embodiment of the present invention, one side of the ASIC at least includes one organic interposer among the organic interposers and four optoelectronic components among the optoelectronic components.
[0015] According to an embodiment of the present invention, a method for manufacturing a packaging structure includes the following steps. A plurality of optoelectronic components are provided. Each optoelectronic component includes an electronic integrated circuit, a photonic integrated circuit, and a plurality of hybrid bonding pads. The electronic integrated circuit is bonded to the photonic integrated circuit via the hybrid bonding pad. A plurality of organic interposers are provided. The optoelectronic components are assembled on the organic interposers. A dedicated integrated circuit is assembled on a packaging substrate, wherein the dedicated integrated circuit is electrically connected to the packaging substrate. The organic interposer and the optoelectronic components assembled thereon are assembled on the packaging substrate. The organic interposer and the optoelectronic components assembled thereon surround the dedicated integrated circuit and are electrically connected to the packaging substrate.
[0016] Based on the above, in the design of the packaging structure of the present invention, the electronic integrated circuit in each optoelectronic component is bonded to the photonic integrated circuit through a hybrid bonding pad, and the optoelectronic component is electrically connected to the packaging substrate through an organic interposer. With the above design, the packaging structure of the present invention can have higher density and performance. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 is a schematic top view of a packaging structure according to an embodiment of the present invention;
[0018] Figure 2 is along Figure 1 A schematic cross-sectional view of line II;
[0019] Figure 3 is along Figure 1 A schematic cross-sectional view of line II-II;
[0020] Figure 4 yes Figure 1 Flow chart of a method for manufacturing a packaging structure.
[0021] Description of Reference Numerals
[0022] 100: packaging structure;
[0023] 110: packaging substrate;
[0024] 112: connecting line;
[0025] 120: Application specific integrated circuit;
[0026] 130: optoelectronic components;
[0027] 132: electronic integrated circuit;
[0028] 134: Photonic integrated circuit;
[0029] 135: encapsulation colloid;
[0030] 136: hybrid bonding pad;
[0031] 138: optical fiber cable;
[0032] 140: organic intermediary layer;
[0033] 142: redistribution line;
[0034] 144: conductive blind via;
[0035] 150: conductive member;
[0036] 160: a first conductive member;
[0037] 165: second conductive member;
[0038] B: bottom surface;
[0039] S1, S2, S3, S4: side;
[0040] S10, S12, S14, S16, S20, S30, S40, S50, S52, S60: steps;
[0041] T: Through Silicon Via. DETAILED DESCRIPTION
[0042] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.
[0043] The embodiment of the present invention can be used in conjunction with the attached Figure 1 It is also understood that the drawings of the present invention are also considered as part of the disclosure. It should be understood that the drawings of the present invention are not drawn according to scale, and in fact, the size of the elements may be arbitrarily enlarged or reduced to clearly show the features of the present invention.
[0044] Figure 1 is a top view schematic diagram of a packaging structure according to an embodiment of the present invention. Figure 2 is along Figure 1 Schematic cross-sectional view of line II. Figure 3 is along Figure 1 Schematic cross-sectional view of line II-II. Figure 4 yes Figure 1 Flow chart of a method for manufacturing a packaging structure.
[0045] Please refer to Figure 1 , Figure 2 and Figure 3 In this embodiment, the package structure 100 includes a package substrate 110, an application-specific integrated circuit 120, a plurality of optoelectronic components 130, and a plurality of organic interposers 140. The application-specific integrated circuit 120 is disposed on the package substrate 110 and is electrically connected to the package substrate 110. The optoelectronic components 130 are separately disposed on the package substrate 110 and surround the application-specific integrated circuit 120. Each optoelectronic component 130 includes an electronic integrated circuit 132, a photonic integrated circuit 134, and a plurality of hybrid bonding pads 136. The electronic integrated circuit 132 is bonded to the photonic integrated circuit 134 through the hybrid bonding pads 136. The organic interposers 140 are separately disposed on the package substrate 110 and surround the application-specific integrated circuit 120. The optoelectronic components 130 are electrically connected to the package substrate 110 through the organic interposers 140.
[0046] In detail, in the present embodiment, the electronic integrated circuit 132 is stacked on the photonic integrated circuit 134 through the hybrid bonding pad 136, that is, the electronic integrated circuit 132 and the photonic integrated circuit 134 are vertically stacked rather than arranged side by side. The photonic integrated circuit 134 is located between the electronic integrated circuit 132 and the organic interposer 140, wherein the photonic integrated circuit 134 has a plurality of silicon through-holes T. In one embodiment, the volume of the photonic integrated circuit 134 may be greater than the volume of the electronic integrated circuit 132. Furthermore, each optoelectronic component 130 further includes a packaging colloid 135, which encapsulates the electronic integrated circuit 132 and the photonic integrated circuit 134 and exposes the bottom surface B of the photonic integrated circuit 134. In other words, the packaging colloid 135 can encapsulate the periphery of the electronic integrated circuit 132 and the photonic integrated circuit 134, and only exposes the bottom surface B of the photonic integrated circuit 134 and one end of the silicon through-hole T adjacent to the organic interposer 140. In addition, each optoelectronic component 130 may further include an optical fiber cable 138, wherein the optical fiber cable 138 is connected to the photonic integrated circuit 134. In one embodiment, the transmission speed of the optoelectronic component 130 can reach 3.2 Tbps.
[0047] like Figure 1 and Figure 3 As shown, in this embodiment, each side S1, S2, S3, S4 of the ASIC 120 includes at least one organic interposer 140 and four optoelectronic components 130. That is, four optoelectronic components 130 are assembled on one organic interposer 140, so the package structure 100 of this embodiment has sixteen optoelectronic components 130 and four organic interposers 140, and these optoelectronic components 130 surround the four sides S1, S2, S3, S4 of the ASIC 120. In one embodiment, the ASIC 120 may be, for example, a 51.2T switch, but is not limited thereto.
[0048] Please refer to Figure 2 and Figure 3 In this embodiment, each organic interposer 140 includes a redistribution layer structure, wherein the redistribution layer structure includes a plurality of redistribution lines 142 and a plurality of conductive blind vias 144, and the redistribution lines 142 can be electrically connected to each other through the conductive blind vias 144. In one embodiment, the line width and line spacing of these redistribution lines 142 are both, for example, 2 microns, which means that the redistribution lines 142 are fine line layers.
[0049] Furthermore, the package structure 100 of the present embodiment further includes a plurality of conductive members 150, which are disposed between the optoelectronic component 130 and the organic interposer 140, wherein the photonic integrated circuit 134 can be electrically connected to the corresponding organic interposer 140 through the silicon through-via T and the conductive member 150. In one embodiment, each conductive member 150 can be, for example, a bump or a copper pillar with a solder bump cap. In addition, the package structure 100 of the present embodiment further includes a plurality of first conductive members 160 and a plurality of second conductive members 165. The first conductive member 160 is disposed between the dedicated integrated circuit 120 and the package substrate 110, wherein the dedicated integrated circuit 120 is electrically connected to the package substrate 110 through the first conductive member 160. The second conductive member 165 is disposed between the organic interposer 140 and the package substrate 110, wherein the organic interposer 140 is electrically connected to the package substrate 110 through the second conductive member 165. In one embodiment, each first conductive member 160 and each second conductive member 165 can be, for example, a solder ball. In addition, the package substrate 110 may include a connection circuit 112 , and the first conductive member 160 may be electrically connected to the second conductive member 165 through the connection circuit 112 .
[0050] For the production method, please also refer to Figure 2 and Figure 4 First, in step S10, a plurality of photonic integrated circuits 134 are provided, and each photonic integrated circuit 134 has a plurality of silicon through-holes T; in step S12, a plurality of electronic integrated circuits 132 are provided; in step S14, a plurality of organic interposers 140 are provided; and in step S16, a dedicated integrated circuit 120 is provided. In one embodiment, the dedicated integrated circuit 120 may be, for example, a 51.2T switch, but is not limited thereto. It should be noted that the order of providing step S10, step S12, step S14, and step S16 may be adjusted according to the requirements, and is not limited thereto.
[0051] Next, in step S20 , the electronic integrated circuit 132 is hybrid-bonded on the photonic integrated circuit 134 , wherein the electronic integrated circuit 132 is bonded to the photonic integrated circuit 134 via the hybrid bonding pad 136 .
[0052] Next, in step S30, the electronic integrated circuit 132 and the photonic integrated circuit 134 are packaged to form an optoelectronic component 130, and a plurality of conductive members 150 are formed on the bottom surface B of the photonic integrated circuit 134. In detail, each optoelectronic component 130 includes an electronic integrated circuit 132, a photonic integrated circuit 134, and a hybrid bonding pad 136, wherein the electronic integrated circuit 132 is bonded to the photonic integrated circuit 134 through the hybrid bonding pad 136. Furthermore, each optoelectronic component 130 also includes a packaging colloid 135 and an optical fiber cable 138. The packaging colloid 135 covers the electronic integrated circuit 132 and the photonic integrated circuit 134, and exposes the bottom surface B of the photonic integrated circuit 134. The optical fiber cable 138 connects the photonic integrated circuit 134. In one embodiment, the transmission speed of the optoelectronic component 130 can reach 3.2 Tbps.
[0053] Next, in step S40, the optoelectronic component 130 is assembled on the organic interposer 140 through the conductive member 150. The photonic integrated circuit 134 can be electrically connected to the corresponding organic interposer 140 through the silicon through-via T and the conductive member 150. In one embodiment, each conductive member 150 can be, for example, a bump or a copper pillar with a solder bump cap.
[0054] Then, in step S50, a first conductive member 160 is formed on the ASIC 120; and in step S52, a second conductive member 165 is formed on the organic interposer 140. It should be noted that the order of providing step S50 and step S52 can be adjusted according to needs, and is not limited here. In one embodiment, the first conductive member 160 and the second conductive member 165 can be solder balls, for example.
[0055] Finally, in step S60, the ASIC 120 is assembled on the package substrate 110 through the first conductive member 160, and the organic interposer 140 is assembled on the package substrate 110 through the second conductive member 165. The ASIC 120 can be electrically connected to the package substrate 110 through the first conductive member 160, and the organic interposer 140 and the optoelectronic component 130 assembled thereon surround the ASIC 120 and are electrically connected to the package substrate 110 through the second conductive member 165. At this point, the manufacturing of the package structure 100 has been completed.
[0056] In summary, in the design of the packaging structure of the present invention, the electronic integrated circuit in each optoelectronic component is bonded to the photonic integrated circuit through a hybrid bonding pad, and the optoelectronic component is electrically connected to the packaging substrate through an organic interposer. With the above design, the packaging structure of the present invention can have higher density and performance.
[0057] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A packaging structure, characterized in that: include: Package substrate; A dedicated integrated circuit, configured on the packaging substrate and electrically connected to the packaging substrate; A plurality of optoelectronic components are separately disposed on the packaging substrate and surround the ASIC, wherein each of the plurality of optoelectronic components comprises an electronic integrated circuit, a photonic integrated circuit and a plurality of hybrid bonding pads, and the electronic integrated circuit is bonded to the photonic integrated circuit through the plurality of hybrid bonding pads; as well as A plurality of organic intermediary layers are separately disposed on the packaging substrate and surround the ASIC, wherein the plurality of optoelectronic components are electrically connected to the packaging substrate through the plurality of organic intermediary layers.
2. The packaging structure according to claim 1, characterized in that: Each of the plurality of optoelectronic components further comprises a fiber optic cable, and the fiber optic cable is connected to the photonic integrated circuit.
3. The packaging structure according to claim 1, characterized in that: Each of the plurality of optoelectronic components further comprises a packaging colloid, which covers the electronic integrated circuit and the photonic integrated circuit and exposes the bottom surface of the photonic integrated circuit.
4. The packaging structure according to claim 1, characterized in that: Also includes: A plurality of conductive members are disposed between the plurality of optoelectronic components and the plurality of organic interposers, wherein the photonic integrated circuit has a plurality of silicon through-holes (TSVs), and the photonic integrated circuit is electrically connected to each of the corresponding organic interposers through the plurality of silicon through-holes (TSVs) and the plurality of conductive members.
5. The packaging structure according to claim 4, characterized in that: Each of the plurality of conductive members includes a bump or a copper pillar having a solder bump cap.
6. The packaging structure according to claim 1, characterized in that: Also includes: a plurality of first conductive members, disposed between the ASIC and the packaging substrate, wherein the ASIC is electrically connected to the packaging substrate through the plurality of first conductive members; as well as A plurality of second conductive members are disposed between the plurality of organic intermediary layers and the packaging substrate, wherein the plurality of organic intermediary layers are electrically connected to the packaging substrate through the plurality of second conductive members.
7. The packaging structure according to claim 6, characterized in that: The packaging substrate includes a connecting circuit, and the plurality of first conductive elements are electrically connected to the plurality of second conductive elements through the connecting circuit.
8. The packaging structure according to claim 6, characterized in that: Each of the plurality of first conductive members and each of the plurality of second conductive members include a solder ball, respectively.
9. The packaging structure according to claim 1, characterized in that: Each of the plurality of organic interposers includes a redistribution layer structure.
10. The packaging structure according to claim 1, characterized in that: One side of the ASIC includes at least one organic interposer among the plurality of organic interposers and four optoelectronic components among the plurality of optoelectronic components.
11. A method for manufacturing a packaging structure, characterized in that: include: Providing a plurality of optoelectronic components, each of the plurality of optoelectronic components comprises an electronic integrated circuit, a photonic integrated circuit and a plurality of hybrid bonding pads, wherein the electronic integrated circuit is bonded to the photonic integrated circuit via the plurality of hybrid bonding pads; providing a plurality of organic interposer layers; Assembling the plurality of optoelectronic components on the plurality of organic interposers; Assembling a dedicated integrated circuit on a packaging substrate, wherein the dedicated integrated circuit is electrically connected to the packaging substrate; as well as The plurality of organic interposers and the plurality of optoelectronic components assembled thereon are assembled on the packaging substrate, wherein the plurality of organic interposers and the plurality of optoelectronic components assembled thereon surround the ASIC and are electrically connected to the packaging substrate.