High-gain DC-DC converter with low input current ripples based on interleaving cascade structure

Abstract

The invention relates to a high-gain DC-DC converter with low input current ripples based on an interlaced cascade structure, and the converter integrates a power switch with an interlaced structure, a coupling inductor, and a voltage-multiplying unit. Input current stress is distributed among the switches through a staggered structure which is formed by connecting the two power switches and the two coupling inductors in a staggered manner, and a clamping circuit is adopted to reduce switching voltage spikes; the primary windings of the two coupling inductors are respectively connected in series with a magnetization inductor and a leakage inductor, and the secondary windings are connected in series and then connected with the voltage-multiplying unit. The converter can realize higher boosting capability and electric energy conversion efficiency with smaller input current ripples.

Description

Technical Field

[0001] The invention relates to the technical field of voltage boosting, and in particular to a high-gain DC-DC converter with low input current ripple based on an interleaved cascade structure. Background Art

[0002] With the intensification of global warming and environmental pollution, the disadvantages of fossil energy are becoming increasingly obvious. The proposal to reduce carbon dioxide emissions and achieve carbon neutrality has accelerated the pace of low-carbon transformation of energy. The use of renewable energy is a very effective means to reduce carbon emissions. Renewable energy sources usually have low output voltages, such as photovoltaics (PV) and fuel cells (FC). Therefore, converters are important devices used to connect renewable energy sources with generally low output voltages (20V to 50V) to the grid. An effective way to meet this high output voltage requirement is to use PV or FC series stacked modules. Another way to increase this voltage to a level sufficient for grid connection is to use an efficient high-boost DC-DC converter, which regulates the voltage on the DC bus (400V or 800V). Therefore, converters with low input current ripple and high voltage gain applied to new energy sources have attracted much attention.

[0003] Conventional boost technologies widely adopted by various types of high boost DC-DC converters include switched capacitor (SC), switched inductor (SL), cascade connection, and coupled inductor (CI) technologies that use conventional or interleaved boost converters to increase voltage gain. However, conventional boost converters are less commonly used due to their high switching voltage stress and insufficient boost capability. SL has limited boost capability, while SC generates current surges. Cascading boost units can increase the output voltage, but it is important to consider the potential impact on system stability. The method of combining coupled inductor technology with other technologies has attracted widespread attention, and appropriate voltage gain can be achieved by adjusting the appropriate turns ratio.

[0004] Some traditional high boost converters are structured as single switch boost converters. Most topologies consist of a voltage multiplier cell (VMC), a coupled inductor, and a switch. Although a single switch provides higher voltage gain, this type of converter has a larger input current ripple, and low input current ripple can simplify MPPT and extend the life of the input power supply. Traditional interleaved parallel converters have low boost capability, and the switch voltage stress is equal to the output voltage. In recent years, several interleaved high boost converters based on various technologies have been introduced to reduce the input current ripple. However, the boost capability of these converters still needs to be further improved. Summary of the invention

[0005] The object of the present invention is to provide a high-gain DC-DC converter with low input current ripple based on an interleaved cascade structure, which can achieve higher boost capability and electric energy conversion efficiency with smaller input current ripple.

[0006] In order to achieve the above-mentioned purpose, the technical solution adopted by the present invention is: a high-gain DC-DC converter with low input current ripple based on an interleaved cascade structure, wherein the converter integrates an interleaved power switch, a coupled inductor and a voltage doubling unit, and distributes the input current stress between the switches by interleavedly connecting two power switches and two coupled inductors, and adopts a clamping circuit to reduce the switching voltage spike; the primary windings of the two coupled inductors are respectively connected in parallel with a magnetizing inductor and a leakage inductor, and the secondary windings are connected in series and connected to the voltage doubling unit.

[0007] Further, it includes a power supply U, two power switches, two coupled inductors, two magnetizing inductors, two leakage inductors, six diodes, six capacitors and an output load R; the positive electrode of the power supply U is simultaneously connected to the two leakage inductors L k1 , L k2 ; The primary winding N of the first coupled inductor 11 With the magnetizing inductor L m1 After parallel connection, one end is connected to the leakage inductor L k1 , and the other end is connected to the power switch S1, the capacitor C1 and the first connection end of the capacitor C3; the primary winding N of the second coupled inductor 21 With the magnetizing inductor L m2 After parallel connection, one end is connected to the leakage inductor L k2 The other end is connected to the power switch S2, the diode D1, the capacitor C2 and the first connection end of the capacitor C4; the second connection end of the capacitor C1 is connected to the second connection end of the diode D1 and the first connection end of the diode D2 at the same time, and the second connection end of the capacitor C2 is divided into two paths, one of which is connected to the first connection end of the diode D4, and the other is connected in sequence to the secondary winding N of the first coupling inductor 12 , the secondary winding N of the second coupled inductor 22 After that, the first connection end of the capacitor C5 and the second connection end of the diode D2 are connected simultaneously, the second connection end of the capacitor C5 is connected simultaneously to the second connection end of the diode D4 and the first connection end of the diode D3, the second connection end of the diode D3 is connected simultaneously to the second connection end of the capacitor C3 and the first connection end of the diode D5, and the second connection end of the diode D5 is connected simultaneously to the second connection end of the capacitor C4 and the first connection end of the diode D0; the second connection end of the diode D0 is connected to one end of the output load R, the output load R is connected in parallel with the capacitor C0, and the other end of the output load R is connected simultaneously to the negative electrode of the power supply U and the second connection ends of the power switch S1 and the power switch S2.

[0008] Furthermore, capacitors C1, C2, C3, C4, and C5 are all polarized capacitors; the positive electrode of capacitor C1 is simultaneously connected to the negative electrode of diode D1 and the positive electrode of diode D2, and the negative electrode of capacitor C1 is simultaneously connected to the positive electrode of power switch S1, the negative electrode of capacitor C3, the primary winding N of the first coupling inductor, and the positive electrode of capacitor C1. 11 and magnetizing inductor L m1 The positive electrode of capacitor C2 is also connected to the secondary winding N of the first coupling inductor 12 The positive electrode of the diode D4 and the negative electrode of the capacitor C2 are simultaneously connected to the positive electrode of the power switch S2, the positive electrode of the diode D1, the negative electrode of the capacitor C4, the primary winding N of the second coupled inductor 21 and magnetizing inductor L m2 The positive electrode of capacitor C3 is connected to the negative electrode of diode D3 and the positive electrode of diode D5; the positive electrode of capacitor C4 is connected to the negative electrode of diode D5 and the positive electrode of diode D0; the positive electrode of capacitor C5 is connected to the positive electrode of diode D3 and the negative electrode of diode D4, and the negative electrode of capacitor C5 is connected to the negative electrode of diode D2 and the secondary winding N of the second coupling inductor. 22 The positive electrode of capacitor C0 is connected to the negative electrode of diode D0 and the positive electrode of output load R at the same time, and the negative electrode of capacitor C0 is connected to the negative electrode of output load R, the negative electrode of power supply U, the negative electrode of power switch S1 and the negative electrode of power switch S2 at the same time.

[0009] Furthermore, the power switches S1 and S2 are both N-channel enhancement type MOS tubes.

[0010] Furthermore, an inductor is provided at the input end, which can reduce input current ripple.

[0011] Furthermore, the input voltage and the output voltage have a common ground, which can reduce the common mode voltage.

[0012] Furthermore, the secondary winding N of the built-in first coupling inductor 12 , the secondary winding N of the second coupled inductor 22 By boosting the voltage, a higher boost function can be achieved with a smaller transformer volume.

[0013] Furthermore, the voltage stress of the power switches S1 and S2 is low.

[0014] Furthermore, the current stress of the output diode D0 is low.

[0015] Compared with the prior art, the present invention has the following beneficial effects: the present invention provides a high-gain DC-DC converter with low input current ripple based on an interleaved cascade structure, the converter integrates an interleaved structure and a voltage multiplier unit (VMC), the input power is connected to two power switches through the primary side of two coupled inductors with an interleaved structure, the voltage stress of the switches is reduced and the input current ripple is reduced; at the same time, two capacitors and a diode are arranged in series on the secondary side of the coupled inductor to enhance the high boost capability; the converter applies the interleaved cascade technology to achieve smaller input current ripple, smaller manufacturing cost, and higher boost capability and power conversion efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 1 is a topological structure diagram of a high-gain DC-DC converter with low input current ripple based on an interleaved cascade structure according to an embodiment of the present invention;

[0017] Figure 2 This is a topology derivation diagram of a high-gain DC-DC converter with low input current ripple based on an interleaved cascade structure according to an embodiment of the present invention;

[0018] Figure 3 is an equivalent circuit diagram when the switch tube S1 is turned on in the embodiment of the present invention;

[0019] Figure 4 is an equivalent circuit diagram when the switch tube S2 is turned on in the embodiment of the present invention;

[0020] Figure 5 is an experimental prototype diagram of an embodiment of the present invention;

[0021] Figure 6 It is an experimental waveform diagram of an embodiment of the present invention. DETAILED DESCRIPTION

[0022] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0023] It should be noted that the following detailed descriptions are exemplary and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

[0024] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0025] like Figure 1 As shown, this embodiment provides a high-gain DC-DC converter with low input current ripple based on an interleaved cascade structure. The converter integrates power switches (S1, S2) with an interleaved structure, coupled inductors, and a voltage doubling unit. The interleaved structure is realized by interleaving two power switches (S1, S2) and two coupled inductors to distribute the input current stress between the switches, and a clamping circuit (composed of D1 and C1) is used to reduce the switch voltage spike. The primary windings (N 11 、N 21 ) are connected in series with the magnetizing inductor (L m1 , L m2 ) and leakage inductance (L k1 , L k2 ), secondary winding (N 12 、N 22 ) are connected in series and then connected to a voltage doubling unit; the duty cycle of the power switches (S1 and S2) is greater than 0.55, and the operating phase of the switches in the converter lags by 180°.

[0026] Figure 1 is a topological diagram of the converter in this embodiment. Figure 2 The topology derivation process of the converter is shown. Specifically, the converter includes a power supply U, two power switches (S1, S2), two coupled inductors, two magnetizing inductors (L m1 , L m2 ), two leakage inductors (L k1 , L k2 ), six diodes (D1, D2, D3, D4, D5, D0), six capacitors (C1, C2, C3, C4, C5 and C0) and output load R. The positive pole of the power supply U is connected to two leakage inductors L at the same time. k1 , L k2 ; The primary winding N of the first coupled inductor 11 With the magnetizing inductor L m1 After parallel connection, one end is connected to the leakage inductor L k1 , and the other end is connected to the power switch S1, the capacitor C1 and the first connection end of the capacitor C3; the primary winding N of the second coupled inductor 21 With the magnetizing inductor L m2 After parallel connection, one end is connected to the leakage inductor L k2 The other end is connected to the power switch S2, the diode D1, the capacitor C2 and the first connection end of the capacitor C4; the second connection end of the capacitor C1 is connected to the second connection end of the diode D1 and the first connection end of the diode D2 at the same time, and the second connection end of the capacitor C2 is divided into two paths, one of which is connected to the first connection end of the diode D4, and the other is connected in sequence to the secondary winding N of the first coupling inductor 12, the secondary winding N of the second coupled inductor 22 After that, the first connection end of the capacitor C5 and the second connection end of the diode D2 are connected simultaneously, the second connection end of the capacitor C5 is connected simultaneously to the second connection end of the diode D4 and the first connection end of the diode D3, the second connection end of the diode D3 is connected simultaneously to the second connection end of the capacitor C3 and the first connection end of the diode D5, and the second connection end of the diode D5 is connected simultaneously to the second connection end of the capacitor C4 and the first connection end of the diode D0; the second connection end of the diode D0 is connected to one end of the output load R, the output load R is connected in parallel with the capacitor C0, and the other end of the output load R is connected simultaneously to the negative electrode of the power supply U and the second connection ends of the power switch S1 and the power switch S2.

[0027] In this embodiment, capacitors C1, C2, C3, C4, and C5 are all polarized capacitors. Power switches S1 and S2 are both N-channel enhancement MOS tubes. The positive electrode of capacitor C1 is simultaneously connected to the negative electrode of diode D1 and the positive electrode of diode D2, and the negative electrode of capacitor C1 is simultaneously connected to the positive electrode of power switch S1, the negative electrode of capacitor C3, the primary winding N of the first coupling inductor, and the positive electrode of capacitor C1. 11 and magnetizing inductor L m1 The positive electrode of capacitor C2 is also connected to the secondary winding N of the first coupling inductor 12 The positive electrode of the diode D4 and the negative electrode of the capacitor C2 are simultaneously connected to the positive electrode of the power switch S2, the positive electrode of the diode D1, the negative electrode of the capacitor C4, the primary winding N of the second coupled inductor 21 and magnetizing inductor L m2 The positive electrode of capacitor C3 is connected to the negative electrode of diode D3 and the positive electrode of diode D5; the positive electrode of capacitor C4 is connected to the negative electrode of diode D5 and the positive electrode of diode D0; the positive electrode of capacitor C5 is connected to the positive electrode of diode D3 and the negative electrode of diode D4, and the negative electrode of capacitor C5 is connected to the negative electrode of diode D2 and the secondary winding N of the second coupling inductor. 22 The positive electrode of capacitor C0 is connected to the negative electrode of diode D0 and the positive electrode of output load R at the same time, and the negative electrode of capacitor C0 is connected to the negative electrode of output load R, the negative electrode of power supply U, the negative electrode of power switch S1 and the negative electrode of power switch S2 at the same time.

[0028] The converter has the following features:

[0029] 1. An inductor is provided at the input end to reduce the input current ripple and effectively increase the service life of the power supply.

[0030] 2. The input voltage and output voltage have a common ground, which facilitates the control loop design and can reduce the common mode voltage.

[0031] 3. Built-in step-down transformer (secondary winding N of the first coupled inductor 12, the secondary winding N of the second coupled inductor 22 ) for voltage boosting, which can achieve higher voltage boosting function with a smaller transformer volume.

[0032] 4. The voltage stress of power switch S1 and power switch S2 is low.

[0033] 5. The current stress of output diode D0 is low.

[0034] 6. It has higher voltage gain and conversion efficiency.

[0035] Figure 3 The equivalent circuit of the converter when the switch tube S1 is turned on and S2 is turned off is shown. Writing Kirchhoff's voltage law on it can obtain the following equation.

[0036]

[0037] Among them, V N11_on and V N12_on When S1 is turned on, N 11 and N 12 The voltage across the terminals, V N21_off and V N22_off When S2 is turned off, N 21 and N 22 The voltage across the terminals. V g is the input voltage.

[0038] Figure 4 The equivalent circuit of the converter when the switch tube S2 is turned on and S1 is turned off is shown. Writing Kirchhoff's voltage law on it can obtain the following equation.

[0039]

[0040] Among them, V N11_off and V N12_off When S1 is turned off, N 11 and N 12 The voltage across the terminals, V N21_on and V N22_on When S2 is turned off, N 21 and N 22 The voltage across both ends.

[0041] The transformer turns ratio is n=n 12 / n 11 =n 22 / n 21 , n 11 、n 12 are the primary winding N of the first coupled inductor 11 、N 12 The number of turns, n 21 、n22 are the secondary winding N of the second coupled inductor 21 、N 22 The number of turns. According to the transformer turns ratio relationship, the following equation can be obtained.

[0042]

[0043] According to the volt-second balance law of inductance, the following equation can be obtained.

[0044] DV N11_on +(1-D)V N11_off =0,DV N21_on +(1-D)V N21_off =0 (4)

[0045] Where D is the duty cycle of switches S1 and S2.

[0046] By combining equations (1), (2), (3), and (4), we can solve the voltage gain of the converter:

[0047]

[0048] Among them, k1 and k2 are leakage inductance coefficients, which can be expressed as:

[0049]

[0050] Among them, the excitation inductance of the two transformers is L m1 and L m2 , the corresponding leakage inductance is L k1 and L k2 .

[0051] The capacitor voltage stress is:

[0052]

[0053] Among them, i C0,1,2,3,4,5 Represents the current values ​​flowing through capacitors C0, C1, C2, C3, C4 and C5 respectively, i D0,1,2,3,4,5 Represents the current stress flowing through diodes D0, D1, D2, D3, D4 and D5 respectively. C0-III It represents the current of capacitor C0 when switch tube S2 is turned on and S1 is turned off.

[0054] The performance of a good converter depends on the accurate design of its components. The selection of diodes and switches is based on 1.5 times the voltage and current stress at the maximum operating point. Usually, switches and diodes can pass large currents, so their voltage stress is the main concern.

[0055] like Figure 2 As shown in the mark, the switch tube VS1 、V S2 voltage stress, and the diode V D1 、V D2 、V D3 、V D4 、V D5 、V D0 The voltage stress can be calculated as follows:

[0056]

[0057] The magnetizing inductor current ripple is:

[0058]

[0059] Where T is the switching period, and the corresponding switching frequency is f s , L m is the transformer magnetizing inductance.

[0060] When the input current is continuous, we can get

[0061] 2I Lm ≥ΔI Lm (9)

[0062] This allows the range of inductance to be determined:

[0063]

[0064] Calculate the capacitance range:

[0065]

[0066] Where r is the allowable ripple rate of the capacitor.

[0067] In order to verify the performance of the proposed converter, a 300W experimental prototype was built in this embodiment. Figure 5 shown. Figure 6 This is the experimental waveform diagram of this embodiment. Figure 6 As shown in (a) and (b), when the output power is 300W, the input voltage is 22.62V, the average input current is 13.785A, and the ripple is less than 7%. The output current ripple is less than 500mA. Due to the parasitic parameters of the components, the voltage gain of the proposed converter is 17.64, which is slightly lower than the theoretical value. The data collected under different output power conditions show that the converter is highly efficient, with an output voltage of 398.95V and an output current of 0.75A. From Figure 6 As can be seen in (c) and (d), the phase lag is 180°, which is a characteristic of the interleaved converter to reduce the input current ripple. Figure 6(e) and (f) show the voltage and current waveforms of the switch. The switch tube voltage stress should be about 50V. Figure 6 (g), (h), (i), (j), (k) and (l) are the voltage and current waveforms of the diodes D0, D1, D2, D3, D4 and D5 tests respectively. The test results show that the on / off state of the diodes is consistent with the theoretical analysis, and the voltage stress is less than 50V, 100V, 200V, 200V, 100V and 100V respectively, which is consistent with the theoretical calculation. Figure 6 The capacitor voltage waveforms shown in (m) to (o) are also consistent with the calculated results. The experimental results show that the prototype meets the design requirements and has a stable topology. Figure 6 As shown in (p), at an output power of 100W, the efficiency reaches over 97%, which is the power point with the highest efficiency. At a switching frequency of 50kHz and a rated output power of 300W, the efficiency of the proposed prototype is 96.25%. Due to line heating and equipment errors, this efficiency is 0.69% lower than the theoretical value, but is consistent with the actual situation. The same is true for a switching frequency of 100kHz. The increase in switching frequency mainly leads to an increase in switching losses and diode switching losses, while the losses associated with current conduction remain unchanged, thereby maintaining high operating efficiency. It is obvious that the converter proposed in the present invention has excellent performance.

[0068] The above is only a preferred embodiment of the present invention, and does not limit the present invention in other forms. Any technician familiar with the profession may use the above disclosed technical content to change or modify it into an equivalent embodiment with equivalent changes. However, any simple modification, equivalent change and modification made to the above embodiment according to the technical essence of the present invention without departing from the technical solution of the present invention still belongs to the protection scope of the technical solution of the present invention.

Claims

1. A high-gain DC-DC converter with low input current ripple based on an interleaved cascade structure, characterized in that: The converter integrates power switches and coupled inductors with an interleaved structure and a voltage doubling unit. The interleaved structure realized by interleaving two power switches and two coupled inductors is used to distribute input current stress between switches, and a clamping circuit is used to reduce switching voltage spikes. The primary windings of the two coupled inductors are respectively connected in series with a magnetizing inductor and a leakage inductor, and the secondary windings are connected in series and then connected to the voltage doubling unit.

2. The high-gain DC-DC converter with low input current ripple based on interleaved cascade structure according to claim 1, characterized in that: It includes a power supply U, two power switches, two coupled inductors, two magnetizing inductors, two leakage inductors, six diodes, six capacitors and an output load R; the positive pole of the power supply U is connected to two leakage inductors L at the same time k1 , L k2 ; The primary winding N of the first coupled inductor 11 With the magnetizing inductor L m1 After parallel connection, one end is connected to the leakage inductor L k1 , and the other end is simultaneously connected to the power switch S1, the capacitor C1 and the first connection end of the capacitor C3; The primary winding N of the second coupled inductor 21 With the magnetizing inductor L m2 After parallel connection, one end is connected to the leakage inductor L k2 The other end is connected to the power switch S2, the diode D1, the capacitor C2 and the first connection end of the capacitor C4; the second connection end of the capacitor C1 is connected to the second connection end of the diode D1 and the first connection end of the diode D2 at the same time, and the second connection end of the capacitor C2 is divided into two paths, one of which is connected to the first connection end of the diode D4, and the other is connected in sequence to the secondary winding N of the first coupling inductor 12 , the secondary winding N of the second coupled inductor 22 After that, the first connection end of the capacitor C5 and the second connection end of the diode D2 are connected simultaneously, the second connection end of the capacitor C5 is connected simultaneously to the second connection end of the diode D4 and the first connection end of the diode D3, the second connection end of the diode D3 is connected simultaneously to the second connection end of the capacitor C3 and the first connection end of the diode D5, and the second connection end of the diode D5 is connected simultaneously to the second connection end of the capacitor C4 and the first connection end of the diode D0; the second connection end of the diode D0 is connected to one end of the output load R, the output load R is connected in parallel with the capacitor C0, and the other end of the output load R is connected simultaneously to the negative electrode of the power supply U and the second connection ends of the power switch S1 and the power switch S2.

3. The high-gain DC-DC converter with low input current ripple based on interleaved cascade structure according to claim 2, characterized in that: Capacitors C1, C2, C3, C4, and C5 are all polarized capacitors; the positive electrode of capacitor C1 is connected to the negative electrode of diode D1 and the positive electrode of diode D2 at the same time, and the negative electrode of capacitor C1 is connected to the positive electrode of power switch S1, the negative electrode of capacitor C3, and the primary winding N of the first coupling inductor at the same time. 11 and magnetizing inductor L m1 The positive electrode of capacitor C2 is also connected to the secondary winding N of the first coupling inductor 12 The positive electrode of the diode D4 and the negative electrode of the capacitor C2 are simultaneously connected to the positive electrode of the power switch S2, the positive electrode of the diode D1, the negative electrode of the capacitor C4, the primary winding N of the second coupled inductor 21 and magnetizing inductor L m2 The positive electrode of capacitor C3 is connected to the negative electrode of diode D3 and the positive electrode of diode D5; the positive electrode of capacitor C4 is connected to the negative electrode of diode D5 and the positive electrode of diode D0; the positive electrode of capacitor C5 is connected to the positive electrode of diode D3 and the negative electrode of diode D4, and the negative electrode of capacitor C5 is connected to the negative electrode of diode D2 and the secondary winding N of the second coupling inductor. 22 The positive electrode of capacitor C0 is connected to the negative electrode of diode D0 and the positive electrode of output load R at the same time, and the negative electrode of capacitor C0 is connected to the negative electrode of output load R, the negative electrode of power supply U, the negative electrode of power switch S1 and the negative electrode of power switch S2 at the same time.

4. The high-gain DC-DC converter with low input current ripple based on interleaved cascade structure according to claim 2, characterized in that: The power switches S1 and S2 are both N-channel enhancement type MOS tubes.

5. The high-gain DC-DC converter with low input current ripple based on interleaved cascade structure according to claim 2, characterized in that: An inductor is provided at the input end to reduce the input current ripple.

6. The high-gain DC-DC converter with low input current ripple based on interleaved cascade structure according to claim 2, characterized in that: The input voltage and output voltage have a common ground, which can reduce the common-mode voltage.

7. The high-gain DC-DC converter with low input current ripple based on interleaved cascade structure according to claim 2, characterized in that: The secondary winding N of the built-in first coupled inductor 12 , the secondary winding N of the second coupled inductor 22 By boosting the voltage, a higher boost function can be achieved with a smaller transformer volume.

8. The high-gain DC-DC converter with low input current ripple based on interleaved cascade structure according to claim 2, characterized in that: The voltage stress of the power switches S1 and S2 is low.

9. The high-gain DC-DC converter with low input current ripple based on interleaved cascade structure according to claim 2, characterized in that: The current stress of the output diode D0 is low.

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