Circuit, method and device for suppressing current oscillation of frequency converter, frequency converter and computer readable storage medium

Abstract

The invention relates to the technical field of frequency converters, and discloses a circuit for suppressing current oscillation of a frequency converter, which comprises a direct current bus voltage oscillation separation unit comprising an arithmetic unit and a PWM (Pulse Width Modulation) modulator; the PWM modulator is configured to calculate the DC bus voltage by using the arithmetic unit, and modulate the calculated DC bus voltage to obtain a modulation signal and a dynamic modulation ratio; wherein the dynamic modulation ratio is a factor which reversely changes along with the fluctuation of the direct-current bus voltage; a comparator configured to compare the corrected given voltage signal and the modulation signal to output a control signal; the corrected given voltage signal is obtained by correcting the given voltage signal according to the dynamic modulation ratio. In the circuit, the fluctuation voltage affects the given voltage, so that the corrected given voltage counteracts harmonic waves of the real-time direct-current bus voltage, and current oscillation is eliminated. The invention further discloses a method and device for suppressing current oscillation of the frequency converter, the frequency converter and a computer readable storage medium.

Description

Technical Field

[0001] The present application relates to the field of compressor technology, for example, to a circuit and method, a device, a frequency converter, and a computer-readable storage medium for suppressing inverter current oscillation. Background Art

[0002] At present, high-speed compressors and their driving technology are receiving more and more attention. As a power device, the working state and performance of high-speed compressors have a significant impact on the overall operation effect of the entire working system. The working performance of the compressor directly depends on the control performance of the variable frequency speed regulator. The general AC-DC-AC inverter is generally composed of four parts: rectifier circuit, buffer circuit, DC filter circuit and inverter circuit. However, the DC bus voltage after rectification and filtering is not very stable. The fluctuation of the DC bus voltage will interfere with the voltage source inverter system, causing current fluctuations and oscillations in the motor. The traditional method is to increase the capacity of the bus filter capacitor, which is costly and greatly increases the product volume.

[0003] The related technology discloses an interleaved drive PWM compensation current generator, which uses two inverter bridges to work in parallel. In the compensation current output by the two inverter bridges through the inductor, the effective compensation current component corresponding to the command signal is the same. After being connected in parallel, they are superimposed on each other, and the total output current is twice the output current of a single inverter bridge. The carrier frequency ripple current component generated by PWM modulation in the compensation current output by the two inverter bridges through the inductor is approximately equal in amplitude and anti-phase, and can offset each other, thereby significantly reducing the ripple component in the total output current.

[0004] In the process of implementing the embodiments of the present disclosure, it is found that there are at least the following problems in the related art:

[0005] Two parallel inverter bridges make the circuit structure complicated.

[0006] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present application, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0007] In order to provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. The summary is not an extensive review, nor is it intended to identify key / critical components or delineate the scope of protection of these embodiments, but rather serves as a prelude to the detailed description that follows.

[0008] The embodiments of the present disclosure provide a circuit and method, a device, a frequency converter, and a computer-readable storage medium for suppressing current oscillation of a frequency converter, so as to offset the current oscillation through a relatively simple circuit structure.

[0009] In some embodiments, the circuit comprises:

[0010] A DC bus voltage oscillation separation unit includes an operator and a PWM modulator; the unit is configured to use the operator to operate the DC bus voltage, and the PWM modulator modulates the operated DC bus voltage to obtain a modulation signal and a dynamic modulation ratio; wherein the dynamic modulation ratio is a factor that changes inversely with the fluctuation of the DC bus voltage; a comparator is connected to the DC bus voltage oscillation separation unit, and is configured to compare the corrected given voltage signal and the modulation signal to output a control signal; the corrected given voltage signal is obtained after correcting the given voltage signal according to the dynamic modulation ratio.

[0011] In some embodiments, the method comprises:

[0012] The DC bus voltage signal is detected to obtain the fluctuating voltage and average voltage of the DC bus voltage; the fluctuating voltage and average voltage of the DC bus voltage are input into the DC bus voltage oscillation separation unit to obtain a modulation signal and a dynamic modulation ratio; the given voltage signal is corrected according to the dynamic modulation ratio; and the modulation signal and the corrected given voltage signal are compared to obtain a control signal.

[0013] In some embodiments, the device includes: a processor and a memory storing program instructions, and the processor is configured to execute the aforementioned method for suppressing inverter current oscillation when running the program instructions.

[0014] In some embodiments, the inverter includes: an inverter body; and the aforementioned device for suppressing inverter current oscillation, installed on the inverter body.

[0015] In some embodiments, the computer-readable storage medium stores program instructions, and when the program instructions are executed, the computer executes the aforementioned method for suppressing inverter current oscillation.

[0016] The circuit and method, device, inverter, and computer-readable storage medium for suppressing inverter current oscillation provided by the embodiments of the present disclosure can achieve the following technical effects:

[0017] In the disclosed embodiment, a DC bus voltage oscillation separation unit is used to obtain a modulation signal and a dynamic modulation ratio; and the dynamic modulation ratio is used to correct a given voltage; and then the modulation signal and the corrected given voltage are compared to output a control signal. In this way, the fluctuating voltage reversely affects the given voltage, so that the corrected given voltage and the harmonics of the real-time DC bus voltage are offset, thereby eliminating current oscillation and simplifying the circuit structure.

[0018] The above general description and the following description are exemplary and explanatory only and are not intended to limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] One or more embodiments are exemplarily described by corresponding drawings, which do not limit the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements, and the drawings do not constitute a scale limitation, and wherein:

[0020] Figure 1 is a circuit structure diagram of a frequency converter provided by an embodiment of the present disclosure;

[0021] Figure 2 is a circuit diagram for suppressing inverter current oscillation provided by an embodiment of the present disclosure;

[0022] Figure 3 is a schematic diagram of a method for suppressing inverter current oscillation provided by an embodiment of the present disclosure;

[0023] Figure 4 is a schematic diagram of another method for suppressing inverter current oscillation provided by an embodiment of the present disclosure;

[0024] Figure 5 is a waveform diagram of an output current provided by an embodiment of the present disclosure;

[0025] Figure 6 is another waveform diagram of an output current provided by an embodiment of the present disclosure;

[0026] Figure 7 is a schematic diagram of a device for suppressing inverter current oscillation provided by an embodiment of the present disclosure;

[0027] Figure 8 It is a circuit structure diagram of another inverter provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0028] In order to be able to understand the features and technical contents of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure is described in detail below in conjunction with the accompanying drawings. The attached drawings are for reference only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the convenience of explanation, a full understanding of the disclosed embodiments is provided through multiple details. However, one or more embodiments can still be implemented without these details. In other cases, to simplify the drawings, well-known structures and devices can be simplified for display.

[0029] The terms "first", "second", etc. in the specification and claims of the embodiments of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchanged where appropriate, so that the embodiments of the embodiments of the present disclosure described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

[0030] Unless otherwise stated, the term "plurality" means two or more.

[0031] In the embodiment of the present disclosure, the character " / " indicates that the preceding and following objects are in an "or" relationship. For example, A / B indicates: A or B.

[0032] The term "and / or" is a description of the association relationship between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or, A and B.

[0033] The term "correspondence" may refer to an association relationship or a binding relationship. The correspondence between A and B means that there is an association relationship or a binding relationship between A and B.

[0034] Combination Figure 1 , the frequency converter consists of four parts: rectifier circuit, buffer circuit, DC filter circuit and inverter circuit. The DC bus voltage after the rectifier circuit and DC filter circuit is not very stable. In the voltage source inverter system, the DC bus voltage fluctuation will interfere with the system and cause current fluctuation and oscillation in the motor. For this reason, a smoothing capacitor is usually connected in parallel to the bus of the DC filter circuit. According to the principle of power balance, assuming that the input current is constant, it is easy to obtain that the DC bus voltage contains a ripple voltage with an angular frequency of 2ω0. For the convenience of analysis, it is assumed that the ripple voltage is:

[0035]

[0036] Among them: φ ripple voltage initial phase, range is 0°~90°; is the amplitude of the ripple voltage; y(t) = ω0t. When the inverter output voltage has a DC side disturbance voltage Sub-frequency ±50Hz sideband harmonics. This shows that in an open-loop system, the fluctuation of the DC bus voltage will be almost faithfully reflected to the output of the inverter bridge. In order to eliminate harmonics, the bus filter capacitor capacity is increased in the DC filter circuit. However, this method not only increases the volume of the circuit but also increases the cost.

[0037] In order to eliminate harmonics while ensuring the size and cost of the circuit, Figure 2, an embodiment of the present disclosure provides a circuit for suppressing inverter current oscillation, including a DC bus voltage oscillation separation unit and a comparator. The DC bus voltage oscillation separation unit includes an operator and a PWM modulator; it is configured to use the operator to operate the DC bus voltage, and the PWM modulator modulates the DC bus voltage after the operation to obtain a modulation signal and a dynamic modulation ratio. Among them, the dynamic modulation ratio is a factor that changes inversely with the fluctuation of the DC bus voltage. The comparator is connected to the DC bus voltage oscillation separation unit, and is configured to compare the corrected given voltage signal and the modulation signal to output a control signal. The corrected given voltage signal is obtained after correcting the given voltage signal according to the dynamic modulation ratio.

[0038] Here, the DC bus voltage oscillation separation unit includes an operator and a PWM modulator, and the operator is mainly used to operate the fluctuation parameters of the linear bus voltage. The fluctuation parameters of the DC bus voltage include the fluctuation voltage and the average voltage. The operator includes basic operators such as an adder operator and a multiplication / division operator to operate the DC bus voltage in a certain proportion. The PWM modulator modulates the DC bus voltage after the operation to obtain a modulation signal. At the same time, a dynamic modulation ratio that changes inversely with the fluctuation of the DC bus voltage is also obtained. The dynamic modulation ratio can reflect the fluctuation of the DC bus voltage. For example, as the DC bus voltage oscillates, the dynamic modulation ratio will decrease accordingly. Then, the given voltage signal is corrected using the dynamic modulation ratio. It can be understood that when the DC bus voltage does not oscillate, the modulation ratio of the PWM modulator is a fixed value, and the given voltage signal is also a fixed voltage signal. When the DC bus voltage oscillates, the modulation ratio of the PWM modulator also changes accordingly. The change is fed back to the given voltage signal, that is, the given voltage is corrected using the dynamic modulation ratio (correcting the amplitude value of the given voltage). For example, when the oscillation amplitude is large, the amplitude of the given voltage is reduced. The comparator compares the modulation signal with the corrected given voltage and outputs a control signal. In this way, when the DC bus voltage oscillates, the amplitude of the given voltage is reduced, and the duty cycle of the control signal output by the comparator is also reduced accordingly, thereby suppressing the oscillation trend. Compared with the prior art, the circuit structure is simpler and the cost is relatively reduced.

[0039] In addition, in the case of the above ripple voltage, the given voltage is cos(ω0t+θ0), where ω0 is the angular frequency and θ0 is the initial phase.

[0040] The circuit for suppressing the inverter current oscillation provided by the embodiment of the present disclosure is used to obtain the modulation signal and the dynamic modulation ratio by using the DC bus voltage oscillation separation unit; and the given voltage is corrected by using the dynamic modulation ratio; and then the modulation signal and the corrected given voltage are compared to output the control signal. In this way, the fluctuating voltage reversely affects the given voltage, so that the corrected given voltage and the harmonics of the real-time DC bus voltage are offset, thereby eliminating the current oscillation and the circuit structure is simple. .

[0041] Optionally, the operator includes a divider and a multiplier. In the divider, the divisor is the average voltage of the DC bus voltage, and the dividend is the sum of the fluctuation voltage and the average voltage of the DC bus voltage. In the multiplier, the input signal is the output signal of the divider, and the output signal is connected to the PWM modulator.

[0042] Here, a certain proportion of the fluctuating voltage and average voltage of the DC bus voltage is calculated by a divider and a multiplier. Specifically, the divider and the multiplier have corresponding adjustment proportional coefficients, so as to realize the calculation of the fluctuating voltage and average voltage of the DC bus voltage. Then, it is compared with the triangle wave of the PWM modulator to obtain the dynamic modulation ratio. Thus, the given voltage signal is corrected based on the dynamic modulation ratio. Among them, the fluctuating voltage and the average voltage are used as the dividend to ensure that the change of the dynamic modulation ratio is opposite to the change of the DC bus voltage. In this way, the given voltage signal is reduced at the next moment, thereby reducing the output and suppressing the oscillation of the current signal.

[0043] Combination Figure 3 As shown, the embodiment of the present disclosure provides a method for suppressing inverter current oscillation, comprising:

[0044] S101, the processor detects a DC bus voltage signal to obtain a fluctuation voltage and an average voltage of the DC bus voltage.

[0045] S102, the processor inputs the fluctuating voltage and the average voltage of the DC bus voltage into a DC bus voltage oscillation separation unit to obtain a modulation signal and a dynamic modulation ratio.

[0046] S103: The processor corrects the given voltage signal according to the dynamic modulation ratio.

[0047] S104, the processor compares the modulation signal with the corrected given voltage signal to obtain a control signal.

[0048] Here, the DC bus voltage signal is monitored in real time to obtain the fluctuating voltage and average voltage of the DC bus voltage when the DC bus voltage signal fluctuates. Then, the fluctuating voltage and average voltage of the DC bus voltage are proportionally processed and input into the PWM modulator to obtain the modulation signal and the dynamic modulation ratio. Among them, the modulation signal refers to the comparison of the processed voltage signal with the triangular wave signal to obtain the modulation signal. Because the modulation signal is a signal processed according to the ratio, the modulation signal is positively correlated with the fluctuation of the DC bus voltage. At the same time, the dynamic modulation ratio has a certain relationship with the fluctuating voltage and the average voltage. In this way, the dynamic modulation ratio can change with the fluctuation of the DC bus voltage. Further, the dynamic modulation ratio is used to correct the given voltage signal, and the amplitude of the corrected given voltage signal is reversely adjusted. In this way, the corrected given voltage signal also changes with the fluctuation of the DC bus voltage, and the change trend of the corrected given voltage signal is opposite to the change trend of the DC bus voltage. In this way, when the DC bus voltage fluctuates, the positive input signal of the comparator decreases and the negative input signal increases, thereby reducing the duty cycle of the output signal and suppressing the current oscillation caused by the voltage fluctuation.

[0049] The method for suppressing inverter current oscillation provided by the embodiment of the present disclosure uses a DC bus voltage oscillation separation unit to obtain a modulation signal and a dynamic modulation ratio; and uses the dynamic modulation ratio to reversely correct a given voltage; and then reversely superimposes the modulation signal on the corrected given voltage. In this way, the fluctuating voltage affects the given voltage, so that the corrected given voltage and the harmonics of the real-time DC bus voltage are offset, thereby eliminating current oscillation.

[0050] Optionally, in step S101, the processor detects a DC bus voltage signal to obtain a fluctuation voltage of the DC bus voltage, including:

[0051] calculate

[0052] in, is the fluctuating voltage of the DC bus voltage; φ is the initial phase of the fluctuating DC bus voltage, is the amplitude of the fluctuating DC bus voltage, y=ω0t, and the angular frequency of the fluctuating DC bus voltage is 2ω0.

[0053] Here, the fluctuation voltage value of the DC bus voltage is calculated using the above formula. At the same time, the average voltage value of the fluctuation amplitude of the DC bus voltage within one cycle can be calculated according to the phase change cycle.

[0054] Optionally, step S102, inputting the fluctuation voltage and the average voltage of the DC bus voltage into a DC bus voltage oscillation separation unit to obtain a dynamic modulation ratio, includes:

[0055]

[0056] Where M' is the dynamic modulation ratio of the PWM modulator, is the fluctuation voltage of the DC bus voltage, V dc is the average voltage of the DC bus voltage, K1 and K2 are the adjustment proportional coefficients of the operator, and M is the initial modulation ratio of the PWM modulator.

[0057] Here, the dynamic modulation ratio of the PWM modulator and the fluctuation voltage of the DC bus voltage, the average voltage, and the adjustment proportional coefficient of the operator have the above relationship. This relationship is determined based on the negative feedback principle. When the output current oscillation becomes larger, the oscillation amount of the DC bus voltage is reversely superimposed to the given voltage in proportion. In this way, by reducing the input amount, the output amount is also reduced, thereby suppressing the oscillation trend of the current and finally achieving output stability.

[0058] Optionally, in step S102, the processor inputs the fluctuation voltage and the average voltage of the DC bus voltage into a DC bus voltage oscillation separation unit to obtain a modulation signal, including:

[0059] The operator is used to calculate the fluctuation voltage and average voltage of the DC bus voltage.

[0060] The calculated voltage signal is compared with the triangle wave to obtain the modulation signal.

[0061] Here, the fluctuating voltage and the average voltage of the DC bus are proportionally calculated, specifically including taking the sum of the fluctuating voltage and the average voltage of the DC bus voltage as the dividend, and the divisor is the average voltage; and then multiplying by the proportional coefficient of the multiplier to obtain the voltage signal after the calculation. In this way, the voltage amplitude after the calculation is larger. Compared with the triangular wave, the duty cycle of the modulated signal is larger. Furthermore, the negative input signal of the comparator is also larger, which helps to reduce the duty cycle of the output signal.

[0062] Combination Figure 4 As shown, the embodiment of the present disclosure provides another method for suppressing inverter current oscillation, comprising:

[0063] S101, the processor detects a DC bus voltage signal to obtain a fluctuation voltage and an average voltage of the DC bus voltage.

[0064] S102, the processor inputs the fluctuating voltage and the average voltage of the DC bus voltage into a DC bus voltage oscillation separation unit to obtain a modulation signal and a dynamic modulation ratio.

[0065] S131, the processor adjusts the proportional coefficient so that the dynamic modulation ratio reaches the optimal modulation ratio, wherein the proportional coefficient is the coefficient of the operator.

[0066] S132: The processor uses the product of the optimal modulation ratio and the given voltage signal as the corrected given voltage signal.

[0067] S104, the processor compares the modulation signal with the corrected given voltage signal to obtain a control signal.

[0068] Here, based on the above formula (2), it can be known that when the proportional coefficient is constant, the dynamic modulation ratio is only related to the fluctuating voltage of the linear bus voltage. As the value of the fluctuating voltage increases, the dynamic modulation ratio decreases. In the case of different proportional coefficients, the reduction amplitude of the dynamic modulation ratio is different, resulting in different correction amplitudes for a given voltage. It can be understood that if the correction amplitude is too small, it is difficult to eliminate harmonics. If the correction amplitude is too large, excessive offset will also cause current oscillation. Therefore, it is necessary to select a suitable proportional coefficient. Specifically, adjust the proportional coefficients K1 and K2, and verify the selection of the best adjustment ratio through experimental means; then determine the optimal modulation ratio. As an example, the current oscillation under different proportional coefficient values ​​can be experimentally verified, and the dynamic modulation ratio corresponding to the proportional coefficient corresponding to the minimum current oscillation is taken as the optimal modulation ratio. Alternatively, when historical experience values ​​are stored in the relevant storage device, the corresponding proportional coefficient is obtained by looking up the table based on the current circuit parameters.

[0069] Based on the above circuit and method, a 380V, 45Kw compressor was selected for testing. The compressor frequency was 700Hz, and the load current ranged from no-load current to 150% of the inverter rated current. Figure 5 , Figure 6 , which is the waveform captured during the test. Figure 5 The current oscillation is shown when the solution of the present application is not adopted. Figure 6 The current oscillation diagram after applying the solution of this application is shown. It can be seen that the solution of this application is applied to high-speed compressors, which can effectively reduce the capacity of the inverter filter capacitor, reduce the product volume, and improve the system stability. In turn, it reduces product costs and has a good application effect.

[0070] Combination Figure 7 As shown, an embodiment of the present disclosure provides a device 200 for suppressing inverter current oscillation, including a processor 100 and a memory 101. Optionally, the device 10 may also include a communication interface 102 and a bus 103. The processor 100, the communication interface 102, and the memory 101 may communicate with each other through the bus 103. The communication interface 102 may be used for information transmission. The processor 100 may call the logic instructions in the memory 101 to execute the method for suppressing inverter current oscillation of the above embodiment.

[0071] In addition, the logic instructions in the memory 101 described above may be implemented in the form of software functional units and when sold or used as independent products, may be stored in a computer-readable storage medium.

[0072] The memory 101 is a computer-readable storage medium that can be used to store software programs and computer executable programs, such as program instructions / modules corresponding to the method in the embodiment of the present disclosure. The processor 100 executes functional applications and data processing by running the program instructions / modules stored in the memory 101, that is, the method for suppressing inverter current oscillation in the above embodiment is implemented.

[0073] The memory 101 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function; the data storage area may store data created according to the use of the terminal device, etc. In addition, the memory 101 may include a high-speed random access memory and may also include a non-volatile memory.

[0074] Combination Figure 8 As shown, an embodiment of the present disclosure provides a frequency converter 300, including: a frequency converter body, and the above-mentioned device 200 for suppressing frequency converter current oscillation. The device 200 for suppressing frequency converter current oscillation is installed on the frequency converter body. The installation relationship described here is not limited to placement inside the frequency converter body, but also includes installation connections with other components of the frequency converter 300, including but not limited to physical connections, electrical connections or signal transmission connections, etc. Those skilled in the art can understand that the device 200 for suppressing frequency converter current oscillation can be adapted to a feasible frequency converter body, thereby realizing other feasible embodiments.

[0075] An embodiment of the present disclosure provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured to execute the above-mentioned method for suppressing inverter current oscillation.

[0076] The technical solution of the embodiment of the present disclosure can be embodied in the form of a software product, which is stored in a storage medium and includes one or more instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the embodiment of the present disclosure. The aforementioned storage medium may be a non-transient storage medium, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk, and other media that can store program codes.

[0077] The above description and the accompanying drawings fully illustrate the embodiments of the present disclosure so that those skilled in the art can practice them. Other embodiments may include structural, logical, electrical, process and other changes. The embodiments represent only possible changes. Unless explicitly required, separate components and functions are optional, and the order of operation may vary. The parts and features of some embodiments may be included in or replace the parts and features of other embodiments. Moreover, the words used in this application are only used to describe the embodiments and are not used to limit the claims. As used in the description of the embodiments and the claims, unless the context clearly indicates, the singular forms of "a", "an" and "the" are intended to include plural forms as well. Similarly, the term "and / or" as used in this application refers to any and all possible combinations of listings containing one or more associated ones. In addition, when used in the present application, the term "comprise" and its variants "comprises" and / or comprising refer to the presence of stated features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the presence of other identical elements in the process, method or device comprising the elements. In this article, each embodiment may focus on the differences from other embodiments, and the same and similar parts between the various embodiments may refer to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method part disclosed in the embodiments, then the relevant parts can refer to the description of the method part.

[0078] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software may depend on the specific application and design constraints of the technical solution. The technicians may use different methods for each specific application to implement the described functions, but such implementations should not be considered to exceed the scope of the embodiments of the present disclosure. The technicians may clearly understand that, for the convenience and simplicity of description, the specific working processes of the systems, devices and units described above may refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here.

[0079] In the embodiments disclosed herein, the disclosed methods and products (including but not limited to devices, equipment, etc.) can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units can be only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between each other shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms. The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to implement this embodiment. In addition, each functional unit in the embodiment of the present disclosure may be integrated in a processing unit, or each unit may exist physically alone, or two or more units may be integrated in one unit.

[0080] The flowchart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to the embodiment of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. In some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. In the description corresponding to the flowchart and the block diagram in the accompanying drawings, the operations or steps corresponding to different boxes can also occur in a different order from the order disclosed in the description, and sometimes there is no specific order between different operations or steps. For example, two consecutive operations or steps can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. Each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified functions or actions, or may be implemented by a combination of dedicated hardware and computer instructions.

Claims

1. A circuit for suppressing current oscillation of a frequency converter, characterized in that: include: A DC bus voltage oscillation separation unit includes an operator and a PWM modulator; the unit is configured to use the operator to operate the DC bus voltage, and the PWM modulator modulates the operated DC bus voltage to obtain a modulation signal and a dynamic modulation ratio; wherein the dynamic modulation ratio is a factor that changes inversely with the fluctuation of the DC bus voltage; The comparator is connected to the DC bus voltage oscillation separation unit and is configured to compare the corrected given voltage signal and the modulation signal to output a control signal; the corrected given voltage signal is obtained after correcting the given voltage signal according to the dynamic modulation ratio.

2. The circuit according to claim 1, characterized in that the operator include: A divider, wherein the divisor is the average voltage of the DC bus voltage, and the dividend is the sum of the fluctuation voltage and the average voltage of the DC bus voltage; The input signal of the multiplier is the output signal of the divider, and the output signal is connected to the PWM modulator.

3. A method for suppressing inverter current oscillation, based on the circuit of claim 1 or 2, the method comprising: Detecting a DC bus voltage signal to obtain a fluctuation voltage and an average voltage of the DC bus voltage; Inputting the fluctuation voltage and average voltage of the DC bus voltage into the DC bus voltage oscillation separation unit to obtain a modulation signal and a dynamic modulation ratio; Correcting a given voltage signal according to a dynamic modulation ratio; The modulation signal is compared with the corrected given voltage signal to obtain the control signal.

4. The method according to claim 3, characterized in that: Detecting the DC bus voltage signal to obtain the fluctuation voltage of the DC bus voltage includes: calculate in, is the fluctuating voltage of the DC bus voltage; φ is the initial phase of the fluctuating DC bus voltage, is the amplitude of the fluctuating DC bus voltage, y=ω0t, and the angular frequency of the fluctuating DC bus voltage is 2ω0.

5. The method according to claim 3, characterized in that: The fluctuation voltage and average voltage of the DC bus voltage are input into the DC bus voltage oscillation separation unit to obtain a dynamic modulation ratio, including: calculate Where M' is the dynamic modulation ratio of the PWM modulator, is the fluctuation voltage of the DC bus voltage, V dc is the average voltage of the DC bus voltage, K1 and K2 are the adjustment proportional coefficients of the operator, and M is the initial modulation ratio of the PWM modulator.

6. The method according to claim 5, characterized in that Correct the given voltage signal according to the dynamic modulation ratio, including: Adjust the proportional coefficient so that the dynamic modulation ratio reaches the optimal modulation ratio; The product of the optimal modulation ratio and the given voltage signal is taken as the corrected given voltage signal.

7. The method according to claim 3, characterized in that The fluctuation voltage and average voltage of the DC bus voltage are input into the DC bus voltage oscillation separation unit to obtain a modulation signal, including: The fluctuating voltage and average voltage of the DC bus voltage are calculated by using a calculation unit; The calculated voltage signal is compared with the triangle wave to obtain the modulation signal.

8. A device for suppressing current oscillation of a frequency converter, comprising a processor and a memory storing program instructions, characterized in that: The processor is configured to execute the method for suppressing inverter current oscillation according to any one of claims 3 to 7 when running the program instructions.

9. A frequency converter, characterized in that: include: Inverter body; The device for suppressing inverter current oscillation as claimed in claim 8 is installed on the inverter body.

10. A computer-readable storage medium storing program instructions, characterized in that: When the program instructions are executed, the computer is used to execute the method for suppressing inverter current oscillation according to any one of claims 3 to 7.

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