Novel PFC control method based on zero pole control model

Abstract

The invention discloses a novel PFC (Power Factor Correction) control method based on a zero pole control model, which relates to the field of automobile power supplies, and comprises the following steps: the control method is suitable for various bridged and bridgeless PFC topologies, and by taking a bridgeless totem pole topological structure as an example, two paths of input AC voltage signals are acquired through an AC voltage sensor; in one path, an operational amplifier is used for conditioning signals, a software low-pass filter is used for attenuating second harmonics and serving as feed-forward voltage input signals, and in the other path, resistance conversion is used for being equivalent to alternating current signals to serve as input alternating current signals; the voltage loop realizes attenuation of secondary harmonics of a direct-current bus through a pole-zero control mode, the output of the voltage loop and a feedforward voltage signal alternating-current signal are used as the input of the current loop after being calculated and output through a multiplier for compensation, and the current loop also adopts the pole-zero control mode to realize tracking of alternating-current current and voltage; compared with traditional PI voltage and current double-loop control, direct-current voltage control can be better achieved, and a better power factor can be obtained.

Description

Technical Field

[0001] The invention relates to the field of automobile power supplies, and in particular to a new PFC control method based on a zero-pole control model. Background Art

[0002] With the increasing global attention to sustainable development and energy efficiency, electric vehicles and hybrid vehicles are becoming more and more widely used. With the increase in electrification, the complexity and diversity of automotive power systems are also increasing. In modern cars, the number of electronic devices is increasing, which puts higher requirements on the stability, efficiency and power factor of the power system. Power factor correction technology helps the power system maintain efficient and stable operation under different working conditions by improving the power factor and reducing harmonic distortion. A good power factor can significantly reduce energy loss, improve the efficiency of electric energy utilization, and reduce the burden on the power grid. At the same time, with the increase in the number of electric vehicles, the impact of electric vehicles on the stability of the power grid is becoming more and more obvious. Therefore, the use of PFC technology in electric vehicles can help reduce the impact on the power grid and improve the reliability of the entire system.

[0003] The existing technology has the following deficiencies: The PI-controlled voltage and current dual-loop control method commonly used in the existing technology can provide a certain feedback regulation effect, but its performance in eliminating secondary harmonic disturbances is not satisfactory when facing a complex input power environment. The automotive power system often encounters a variety of transient conditions, resulting in current fluctuations, affecting the stability and response speed of the system. Traditional automotive power systems often use linear power supplies, which are difficult to ensure high efficiency and stability when facing the complex and changeable electrical loads and working conditions in modern cars. During driving and charging, current and voltage fluctuations will significantly affect the power performance, resulting in energy waste and electrical system instability.

[0004] The above information disclosed in this Background section is only for enhancement of understanding of the background of the present disclosure and therefore it may contain information that does not constitute the prior art that is already known to one of ordinary skill in the art. Summary of the invention

[0005] The purpose of the present invention is to provide a new PFC control method based on a zero-pole control model to solve the problems in the above-mentioned background technology.

[0006] In order to achieve the above object, the present invention provides the following technical solution: a new PFC control method based on a zero-pole control model, specifically comprising the following steps:

[0007] Step 1: Taking the bridgeless totem pole topology as an example, two AC input voltage signals are collected through an AC voltage sensor. One signal is conditioned by an operational amplifier, and N cycles of the signal are stored and the RMS value is calculated. The second harmonic is attenuated by a software low-pass filter and used as a feedforward voltage input. The other AC voltage signal is equivalent to an AC current signal by dividing the voltage by the resistance as the input AC current signal.

[0008] Step 2: Detect the bus voltage output by the power factor correction circuit, input the detection signal to the digital signal processor, set the voltage target value and the difference between the feedback bus voltage as the input of the compensator, determine the parameters of the zero-pole control model, determine the gain according to the output filter capacitor ripple output voltage range, calculate the capacitor and resistor parameter values ​​corresponding to the zero-pole, and define the crossover frequency of the voltage loop. List the transfer function corresponding to the model, transform it through Laplace transform and bilinear transform to form a linear differential equation, realize digital zero-pole loop control, and complete the voltage loop compensation design;

[0009] Step 3: Multiply the input AC current signal, the feedforward AC voltage signal and the voltage loop output signal. The result of the operation is a sinusoidal AC signal. The amplitude of the sinusoidal signal near the zero crossing point is amplified by the compensator algorithm, and the amplitude near the peak value is reduced to achieve compensation optimization of the sinusoidal AC signal.

[0010] Step 4: The difference between the signal after compensation optimization in step 3 and the current sampling signal is used as the input of the current loop compensator. Determine the low-frequency zero-point gain and the gain at the switching frequency by compensating the open-loop transfer function. The crossover frequency is determined at the point where the compensation gain multiplied by the switching system gain is 1. The parameters of the model are calculated at the crossover frequency to meet the phase margin and crossover frequency requirements for system stability. List the transfer functions corresponding to the model, transform them through Laplace transform and bilinear transform to form a linear differential equation, realize digital zero-pole loop control, and complete the current loop compensation design;

[0011] Step 5: Use the output of the current loop compensation as the input of the pulse width modulation generator, and control the DC output voltage and power factor by adjusting the output duty cycle and hardware drive control MOS switch.

[0012] Preferably, the control method is applicable to various power factor control topologies with or without a bridge. Taking the bridgeless totem pole topology as an example, two AC input voltage signals are collected through an AC voltage sensor, one of which is conditioned by an operational amplifier, and the AC voltage signal is amplified within the effective input range of the A / D converter. According to the Nyquist theorem, the collection frequency is selected to be twice the frequency of the AC voltage signal input to the circuit, and the AC voltage signal is converted into an AC voltage digital signal through an A / D converter. The AC voltage digital signal of N cycles is selected to be stored as an array and the root mean square value is calculated. The specific formula is:

[0013]

[0014] Among them, V RMS Represents the RMS value of the AC voltage digital signal, N represents the number of cycles, V i It represents the ith AC voltage digital signal. The software low-pass filter is selected to attenuate the secondary input harmonics and the input harmonic component is set to 100Hz and the bandwidth is set to 20Hz. The AC voltage digital signal is used as the feedforward voltage input through the software low-pass filter. The other AC voltage signal is equivalent to an AC current signal by dividing the voltage by the resistance as the input AC current signal tracking input.

[0015] Preferably, the bus voltage output by the power factor correction circuit is detected and input to a digital signal processor, a zero-pole voltage loop compensation is adopted inside the digital signal, the difference between the voltage target value and the fed-back bus voltage is set as the input of the compensator, the parameters of the zero-pole control model are determined, the gain at the second harmonic frequency is determined according to the output filter capacitor ripple output voltage range, and the ripple voltage amount at both ends of the output capacitor is determined by the model parameter method, and the specific formula is:

[0016]

[0017] Among them, V opk Represents the ripple voltage across the output capacitor, P in represents the input power, f r represents the frequency of the second input harmonic, C 1 Represents the output filter capacitor, V 0 Represents the output voltage, reduces the ripple voltage across the output capacitor to the allowable range of the voltage error amplifier, and obtains the gain at the second input harmonic frequency. According to the first resistance value in the voltage loop feedback and the second resistance value in the voltage loop feedback by sharing the output voltage, the voltage loop crossover frequency is defined as 20Hz, and the equivalent transfer function is selected, which is:

[0018]

[0019] Among them, V bus Indicates bus voltage, V ref Represents the reference voltage, R V1 Represents the first resistance in the voltage loop feedback, R V2 represents the second resistance in the voltage loop feedback, ω represents the sampling angular frequency, and V ref -V o_bus The overall output signal as voltage loop compensation, The whole is taken as the input filter voltage, and the first transfer function is obtained by Laplace transform and algebraically simplified, which is:

[0020]

[0021] Where s represents the complex variable in Laplace transform, C Vf Represents the capacitance value in the voltage loop feedback. The first transfer function is converted to the z domain using a bilinear transformation, and a first linear difference equation is formed, which is:

[0022] V filter_out (n) = B 0 *V filter_in (n)+B 1 *V filter_in (n-1)+A 1 *V filter_out (n-1)

[0023] Among them, V filter_out (n) represents the output voltage loop compensation output voltage at discrete time n, V filter_in (n) represents the voltage loop compensation input voltage at discrete time n, V filter_in (n-1) represents the voltage loop compensation input voltage at discrete time n-1, V filter_out (n-1) represents the voltage loop compensation output voltage at discrete time n-1, B 0 , B 1 , A 1 Represents the weighting coefficient for adjusting the output and input filter voltage.

[0024] Preferably, the step-feedforward AC voltage signal and the voltage loop output signal are multiplied by the input AC current signal, and the specific formula is:

[0025]

[0026] Among them, I mo Represents the amplitude of the output AC current reference signal after multiplication calculation, K m Indicates the adjustment coefficient for compensating and correcting the output current, I ac Represents the input signal of AC current tracking, V f represents the feedforward voltage, and f represents the sampling frequency. The specific operation result is a sinusoidal AC signal, which is amplified by the compensator algorithm near the zero-crossing point of the sinusoidal signal and reduced near the peak value to achieve compensation optimization of the sinusoidal AC signal;

[0027] Preferably, the difference between the compensated optimized signal and the current sampling signal is used as the input of the current loop compensator. The zero-pole current loop control model output passes through the resistor R mo The voltage across the two ends should be equal to the voltage across the current detection resistor, so R moThe value of. According to the compensation loop, the gain should be flat at the switching frequency, and the average current mode control is used when the zero gain is higher at low frequencies. The crossover frequency is determined when the compensation gain multiplied by the switching system gain is 1. After the crossover frequency is selected, the compensation zero point is taken at the crossover frequency to meet the phase margin of system stability greater than 45° and the compensation loop zero point position should be less than or equal to the crossover frequency, and the zero-pole model parameters are calculated. Add poles at the switching frequency and digitize the current loop zero-pole compensation. List the system transfer function according to the determined zero-pole model, which is specifically:

[0028]

[0029] Among them, V cea Represents the output voltage signal of the current loop, I mo Indicates the given target current signal of the current loop, R mo Indicates the grounding resistance of the loop compensated by zero pole, I s represents the AC current measured by the current loop, R s Represents the current detection resistor, R ci Represents the sampling current input resistance, R z represents the zero-point resistance of the model amplifier feedback loop, C z represents the zero-point capacitance of the model amplifier feedback loop, C p represents the capacitor of the feedback loop pole of the model amplifier, V cea -I mo *R mo The overall output signal, I mo *R mo -I s *R s The whole is used as the input signal of the current loop compensation. The second transfer function is obtained by Laplace transform and algebraically simplified, which is:

[0030]

[0031] The second transfer function is converted to the z domain using a bilinear transformation, and a second linear difference equation is formed, which is specifically:

[0032] V filter_out (n) = B 2 *V filter_in (n)+B 3 *V filter_in (n-1)+B 4 *V filter_in (n-2)+A 3 *V filter_out (n-1)+A 4 *V filter_out (n-2)

[0033] Among them, V filter_out (n) represents the current loop compensation output voltage signal at discrete time n, V filter_in (n) represents the current loop compensation input voltage signal at discrete time n, V filter_in (n-1) represents the current loop compensation input voltage signal at discrete time n-1, V filter_in (n-2) represents the current loop compensation input voltage signal at discrete time n-2, V filter_out (n-1) represents the current loop compensation output voltage signal at discrete time n-1, V filter_out (n-2) represents the current loop compensation output voltage signal at discrete time n-2, B 2 , B 3 , B 4 , A 3 , A 4 Represents the weighting coefficient for adjusting the output and input filter voltage.

[0034] Preferably, the output of the current loop compensation is calibrated as the input of the pulse width modulation generator and the output duty cycle of the pulse width modulation generator is adjusted. The totem pole MOS switch is turned on and off by hardware drive, and the DC output voltage and power factor control are controlled. The voltage loop compensation and the current loop compensation are performed by zero-pole model control. When the switching frequency is set to 75KHz, the loop bandwidth is set to 5KHz.

[0035] In the above technical solution, the technical effects and advantages provided by the present invention are:

[0036] 1. The bridgeless totem pole topology is adopted, and the operational amplifier is combined to condition and amplify the AC voltage signal to ensure that the signal is within the effective input range of the A / D converter; by selecting the acquisition frequency guided by the Nyquist theorem, the changes in the AC voltage can be accurately captured, thereby realizing high-precision digital signal processing; by calculating the root mean square value of multiple cycles and using a low-pass filter to attenuate the secondary input harmonics, the influence of harmonics on the voltage loop is effectively suppressed, and the stability and response speed of the system are enhanced; at the same time, the voltage loop is compensated by the digital compensator of the zero-pole model, and the ripple voltage at both ends of the output topology circuit capacitor is calculated and controlled, so that the ripple voltage can be reduced to the allowable range of the AC voltage error amplifier to determine the zero-pole model parameters; setting a suitable target value and combining it with the feedback signal to realize the control of the output bus voltage and ensure the stability of the output bus voltage.

[0037] The feedforward voltage, input current and voltage loop output are used as the input of the current loop, and the input signal is compensated according to the AC voltage characteristics, which improves the full-range control feedback accuracy, better realizes the AC voltage and current in-phase control, and reduces the influence of the second harmonic disturbance. The average current mode is used for control, and the current loop compensation control based on the zero-pole model is used to realize the control method combining the feedforward control with the voltage inner loop and the current outer loop dual loop control. The power factor of the circuit is improved, and the efficiency of electric energy use is optimized; it ensures that good voltage stability can be maintained under various load conditions, which not only improves the dynamic response capability, improves the anti-interference ability and stability, but also effectively reduces the power loss, thereby improving the overall energy efficiency. Among them, the method of determining the parameters by zero-pole model control and then realizing loop compensation digitally can accurately realize compensation control according to the system characteristics, with higher control accuracy and flexibility, so as to maintain excellent performance under various working conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0039] Figure 1 The present invention is a method flow chart of a new PFC control method based on a zero-pole control model. DETAILED DESCRIPTION

[0040] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these example embodiments are provided so that the description of the present disclosure will be more comprehensive and complete, and the concept of the example embodiments will be fully conveyed to those skilled in the art.

[0041] The present invention provides Figure 1 A new PFC control method based on a zero-pole control model is shown, which specifically includes the following steps:

[0042] Step 1: Taking the bridgeless totem pole topology as an example, two AC input voltage signals are collected through an AC voltage sensor. One signal is conditioned by an operational amplifier, and N cycles of the signal are stored and the RMS value is calculated. The second harmonic is attenuated by a software low-pass filter and used as a feedforward voltage input. The other AC voltage signal is equivalent to an AC current signal by dividing the voltage by the resistance as the input AC current signal.

[0043] This control method is applicable to various power factor control topologies with or without bridges. Taking the bridgeless totem pole topology as an example, two AC input voltage signals are collected through an AC voltage sensor, one of which is conditioned by an operational amplifier, and the AC voltage signal is amplified within the effective input range of the A / D converter. According to the Nyquist theorem, the acquisition frequency is selected to be twice the frequency of the AC voltage signal input to the circuit, and the AC voltage signal is converted into an AC voltage digital signal through an A / D converter. The AC voltage digital signal of N cycles is selected and stored as an array and the root mean square value is calculated. The specific formula is:

[0044]

[0045] Among them, V RMS Represents the RMS value of the AC voltage digital signal, N represents the number of cycles, V i It represents the ith AC voltage digital signal. The software low-pass filter is selected to attenuate the secondary input harmonics and the input harmonic component is set to 100Hz and the bandwidth is 20Hz. The AC voltage digital signal is used as the feedforward voltage input through the software low-pass filter. The other AC voltage signal is equivalent to an AC current signal by dividing the voltage by the resistance as the input AC current signal tracking input.

[0046] Step 2: Detect the bus voltage output by the power factor correction circuit, input the detection signal to the digital signal processor, set the voltage target value and the difference between the feedback bus voltage as the input of the compensator, determine the parameters of the zero-pole control model, determine the gain according to the output filter capacitor ripple output voltage range, calculate the capacitor and resistor parameter values ​​corresponding to the zero-pole, and define the crossover frequency of the voltage loop. List the transfer function corresponding to the model, transform it through Laplace transform and bilinear transform to form a linear differential equation, realize digital zero-pole loop control, and complete the voltage loop compensation design;

[0047] The bus voltage output by the power factor correction circuit is detected and input to the digital signal processor. The zero-pole voltage loop compensation is used inside the digital signal. The difference between the voltage target value and the feedback bus voltage is set as the input of the compensator. The parameters of the zero-pole control model are determined. The gain at the second harmonic frequency is determined according to the output filter capacitor ripple output voltage range. The ripple voltage across the output capacitor is determined using the model parameter method. The specific formula is:

[0048]

[0049] Among them, V opk Represents the ripple voltage across the output capacitor, P in represents the input power, f r represents the frequency of the second input harmonic, C 1 Represents the output filter capacitor, V 0Represents the output voltage, reduces the ripple voltage across the output capacitor to the allowable range of the voltage error amplifier, and obtains the gain at the second input harmonic frequency. According to the first resistance value in the voltage loop feedback and the second resistance value in the voltage loop feedback by sharing the output voltage, the voltage loop crossover frequency is defined as 20Hz, and the equivalent transfer function is selected, which is:

[0050]

[0051] Among them, V bus Indicates bus voltage, V ref Represents the reference voltage, R V1 Represents the first resistance in the voltage loop feedback, R V2 represents the second resistance in the voltage loop feedback, ω represents the sampling angular frequency, and V ref -V o_bus The overall output signal as voltage loop compensation, The whole is taken as the input filter voltage, and the first transfer function is obtained by Laplace transform and algebraically simplified, which is:

[0052]

[0053] Where s represents the complex variable in Laplace transform, C Vf Represents the capacitance value in the voltage loop feedback. The first transfer function is converted to the z domain using a bilinear transformation, and a first linear difference equation is formed, which is:

[0054] V filter_out (n) = B 0 *V filter_in (n)+B 1 *V filter_in (n-1)+A 1 *V filter_out (n-1)

[0055] Among them, V filter_out (n) represents the output voltage loop compensation output voltage at discrete time n, V filter_in (n) represents the voltage loop compensation input voltage at discrete time n, V filter_in (n-1) represents the voltage loop compensation input voltage at discrete time n-1, V filter_out (n-1) represents the voltage loop compensation output voltage at discrete time n-1, B 0 , B 1 , A 1 Represents the weighting coefficient for adjusting the output and input filter voltage.

[0056] Step 3: Multiply the input AC current signal, the feedforward AC voltage signal and the voltage loop output signal. The result of the operation is a sinusoidal AC signal. The amplitude of the sinusoidal signal near the zero crossing point is amplified by the compensator algorithm, and the amplitude near the peak value is reduced to achieve compensation optimization of the sinusoidal AC signal.

[0057] The step-forward AC voltage signal and the voltage loop output signal are multiplied by the input AC current signal. The specific formula is:

[0058]

[0059] Among them, I mo Represents the amplitude of the output AC current reference signal after multiplication calculation, K m Indicates the adjustment coefficient for compensating and correcting the output current, I ac Represents the input signal of AC current tracking, V f represents the feedforward voltage, and f represents the sampling frequency. The specific operation result is a sinusoidal AC signal, which is amplified by the compensator algorithm near the zero-crossing point of the sinusoidal signal and reduced near the peak value to achieve compensation optimization of the sinusoidal AC signal;

[0060] Step 4: The difference between the signal after compensation optimization in step 3 and the current sampling signal is used as the input of the current loop compensator. Determine the low-frequency zero-point gain and the gain at the switching frequency by compensating the open-loop transfer function. The crossover frequency is determined at the point where the compensation gain multiplied by the switching system gain is 1. The parameters of the model are calculated at the crossover frequency to meet the phase margin and crossover frequency requirements for system stability. List the transfer functions corresponding to the model, transform them through Laplace transform and bilinear transform to form a linear differential equation, realize digital zero-pole loop control, and complete the current loop compensation design;

[0061] The difference between the compensated optimized signal and the current sampling signal is used as the input of the current loop compensator. The zero-pole current loop control model output passes through the resistor R mo The voltage across the two ends should be equal to the voltage across the current detection resistor, so R mo The value of. According to the compensation loop, the gain should be flat at the switching frequency, and the average current mode control is used when the zero gain is higher at low frequencies. The crossover frequency is determined when the compensation gain multiplied by the switching system gain is 1. After the crossover frequency is selected, the compensation zero point is taken at the crossover frequency to meet the phase margin of system stability greater than 45° and the compensation loop zero point position should be less than or equal to the crossover frequency, and the zero-pole model parameters are calculated. Add poles at the switching frequency and digitize the current loop zero-pole compensation. List the system transfer function according to the determined zero-pole model, which is specifically:

[0062]

[0063] Among them, V cea Represents the output voltage signal of the current loop, I mo Indicates the given target current signal of the current loop, R mo Indicates the grounding resistance of the loop compensated by zero pole, I s represents the AC current measured by the current loop, R s Represents the current detection resistor, R ci Represents the sampling current input resistance, R z represents the zero-point resistance of the model amplifier feedback loop, C z represents the zero-point capacitance of the model amplifier feedback loop, C p represents the capacitor of the feedback loop pole of the model amplifier, V cea -I mo *R mo The overall output signal, I mo *R mo -I s *R s The whole is used as the input signal of the current loop compensation. The second transfer function is obtained by Laplace transform and algebraically simplified, which is:

[0064]

[0065] The second transfer function is converted to the z domain using a bilinear transformation, and a second linear difference equation is formed, which is specifically:

[0066] V filter_out (n) = B 2 *V filter_in (n)+B 3 *V filter_in (n-1)+B 4 *V filter_in (n-2)+A 3 *V filter_out (n-1)+A 4 *V filter_out (n-2)

[0067] Among them, V filter_out (n) represents the current loop compensation output voltage signal at discrete time n, V filter_in (n) represents the current loop compensation input voltage signal at discrete time n, V filter_in (n-1) represents the current loop compensation input voltage signal at discrete time n-1, V filter_in (n-2) represents the current loop compensation input voltage signal at discrete time n-2, V filter_out (n-1) represents the current loop compensation output voltage signal at discrete time n-1, V filter_out(n-2) represents the current loop compensation output voltage signal at discrete time n-2, B 2 , B 3 , B 4 , A 3 , A 4 Represents the weighting coefficient for adjusting the output and input filter voltage.

[0068] Step 5: Use the output of the current loop compensation as the input of the pulse width modulation generator, and control the DC output voltage and power factor by adjusting the output duty cycle and hardware drive control MOS switch.

[0069] The output of the current loop compensation is calibrated as the input of the pulse width modulation generator and the output duty cycle of the pulse width modulation generator is adjusted. The totem pole MOS switch is turned on and off through hardware drive to control the DC output voltage and power factor control. The voltage loop compensation and current loop compensation are performed through the zero-pole model control method. When the switching frequency is set to 75KHz, the loop bandwidth is set to 5KHz.

[0070] The bridgeless totem pole topology is adopted, and the operational amplifier is combined to condition and amplify the AC voltage signal to ensure that the signal is within the effective input range of the A / D converter; by selecting the acquisition frequency guided by the Nyquist theorem, the changes in the AC voltage can be accurately captured, thereby realizing high-precision digital signal processing; by calculating the root mean square value of multiple cycles and using a low-pass filter to attenuate the secondary input harmonics, the influence of harmonics on the voltage loop is effectively suppressed, and the stability and response speed of the system are enhanced; at the same time, the voltage loop is compensated by a digital compensator of a zero-pole model, and the ripple voltage at both ends of the output topology circuit capacitor is calculated and controlled, so that the ripple voltage can be reduced to the allowable range of the AC voltage error amplifier to determine the zero-pole model parameters; setting a suitable target value and combining it with the feedback signal to realize the control of the output bus voltage and ensure the stability of the output bus voltage.

[0071] The feedforward voltage, input current and voltage loop output are used as the input of the current loop, and the input signal is compensated according to the AC voltage characteristics, which improves the full-range control feedback accuracy, better realizes the AC voltage and current in-phase control, and reduces the influence of the second harmonic disturbance. The average current mode is used for control, and the current loop compensation control based on the zero-pole model is used to realize the control method combining the feedforward control with the voltage inner loop and the current outer loop dual loop control. The power factor of the circuit is improved, and the efficiency of electric energy use is optimized; it ensures that good voltage stability can be maintained under various load conditions, which not only improves the dynamic response capability, improves the anti-interference ability and stability, but also effectively reduces the power loss, thereby improving the overall energy efficiency. Among them, the method of determining the parameters by zero-pole model control and then realizing loop compensation digitally can accurately realize compensation control according to the system characteristics, with higher control accuracy and flexibility, so as to maintain excellent performance under various working conditions.

[0072] The above description is only by way of illustration of certain exemplary embodiments of the present invention. It is undoubted that those skilled in the art can modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the above drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.

Claims

1. A new PFC control method based on zero-pole control model, characterized in that: The following steps are involved: Step 1: Taking the bridgeless totem pole topology as an example, two AC input voltage signals are collected through an AC voltage sensor. One signal is conditioned by an operational amplifier, and N cycles of the signal are stored and the RMS value is calculated. The second harmonic is attenuated by a software low-pass filter and used as a feedforward voltage input. The other AC voltage signal is equivalent to an AC current signal by dividing the voltage by the resistance as the input AC current signal. Step 2: Detect the bus voltage output by the power factor correction circuit, input the detection signal to the digital signal processor, set the voltage target value and the difference between the feedback bus voltage as the input of the compensator, determine the parameters of the zero-pole control model, determine the gain according to the output filter capacitor ripple output voltage range, calculate the capacitor and resistor parameter values ​​corresponding to the zero-pole, and define the crossover frequency of the voltage loop. List the transfer function corresponding to the model, transform it through Laplace transform and bilinear transform to form a linear differential equation, realize digital zero-pole loop control, and complete the voltage loop compensation design; Step 3: Multiply the input AC current signal, the feedforward AC voltage signal and the voltage loop output signal. The result of the operation is a sinusoidal AC signal. The amplitude of the sinusoidal signal near the zero crossing point is amplified by the compensator algorithm, and the amplitude near the peak value is reduced to achieve compensation optimization of the sinusoidal AC signal. Step 4: The difference between the signal after compensation optimization in step 3 and the current sampling signal is used as the input of the current loop compensator. Determine the low-frequency zero-point gain and the gain at the switching frequency by compensating the open-loop transfer function. The crossover frequency is determined at the point where the compensation gain multiplied by the switching system gain is 1. The parameters of the model are calculated at the crossover frequency to meet the phase margin and crossover frequency requirements for system stability. List the transfer functions corresponding to the model, transform them through Laplace transform and bilinear transform to form a linear differential equation, realize digital zero-pole loop control, and complete the current loop compensation design; Step 5: Use the output of the current loop compensation as the input of the pulse width modulation generator, and control the DC output voltage and power factor by adjusting the output duty cycle and hardware drive control MOS switch.

2. A new PFC control method based on a zero-pole control model according to claim 1, characterized in that: In the step 1, the control method is applicable to various power factor control topologies with or without bridges. Taking the bridgeless totem pole topology as an example, two AC input voltage signals are collected through an AC voltage sensor, one of which is conditioned by an operational amplifier, and the AC voltage signal is amplified within the effective input range of the A / D converter. According to the Nyquist theorem, the acquisition frequency is selected to be twice the frequency of the AC voltage signal input to the circuit, and the AC voltage signal is converted into an AC voltage digital signal through an A / D converter. The AC voltage digital signal of N cycles is selected to be stored as an array and the root mean square value is calculated. The second harmonic is attenuated by a software low-pass filter and the input harmonic component is set to 100Hz and the bandwidth is 20Hz. The AC voltage digital signal is used as a feedforward voltage input through a software low-pass filter. The other AC voltage signal is equivalent to an AC current signal by dividing the voltage by the resistance as the input AC current signal tracking input.

3. A new PFC control method based on zero-pole control model according to claim 2, characterized in that: The specific formula for calculating the root mean square value is: Among them, V RMS Represents the RMS value of the AC voltage digital signal, N represents the number of cycles, V i Represents the i-th AC voltage digital signal.

4. The novel PFC control method based on zero-pole control model according to claim 1, characterized in that: In the step 2, the bus voltage output by the power factor correction circuit is detected, and the detection signal is input to the digital signal processor. Zero-pole voltage loop compensation is used inside the digital signal, and the difference between the voltage target value and the feedback bus voltage is set as the input of the compensator. The parameters of the zero-pole control model are determined, and the gain at the second harmonic frequency is determined according to the output filter capacitor ripple output voltage range, and the capacitor and resistor parameter values ​​corresponding to the zero-pole model are calculated, and the crossing frequency of the voltage loop is defined as 20Hz. The system transfer function is listed according to the determined zero-pole model, and the system transfer function is Laplace transformed from the time domain to the s domain, and then converted from the s domain to the z domain through a bilinear transformation to obtain the first linear difference equation, so as to realize digital zero-pole loop control and complete the voltage loop compensation design.

5. The novel PFC control method based on zero-pole control model according to claim 4 is characterized in that: The specific formula for the ripple voltage across the output capacitor is: Among them, V opk Represents the ripple voltage across the output capacitor, P in represents input power, f r represents the frequency of the secondary input harmonic, C1 represents the output filter capacitor, V0 represents the output voltage, and the equivalent transfer function is specifically: Among them, V bus Indicates bus voltage, V ref Represents the reference voltage, R V1 Represents the first resistance in the voltage loop feedback, R V2 represents the second resistance value in the voltage loop feedback, ω represents the sampling angular frequency, and the first transfer function is specifically: Where s represents the complex variable in Laplace transform, C Vf represents the capacitance value in the voltage loop feedback, and the first linear differential equation is specifically: In filter_out (n)=B0*V filter_in (n)+B1*V filter_in (n-1)+A1*V filter_out (n-1) Among them, V filter_out (n) represents the output voltage loop compensation output voltage at discrete time n, V filter_in (n) represents the voltage loop compensation input voltage at discrete time n, V filter_in (n-1) represents the voltage loop compensation input voltage at discrete time n-1, V filter_out (n-1) represents the voltage loop compensation output voltage at discrete time instant n-1, and B0, B1, and A1 represent weighted coefficients for adjusting the output and input filter voltages.

6. The novel PFC control method based on zero-pole control model according to claim 1, characterized in that: In the step three, the feedforward AC voltage signal and the voltage loop output signal obtained in step one are multiplied with the input AC current signal obtained in step three. The specific operation result is a sinusoidal AC signal. The amplitude of the sinusoidal signal near the zero point is amplified by the compensator algorithm, and the amplitude near the peak value is reduced to achieve compensation optimization of the sinusoidal AC signal.

7. A new PFC control method based on zero-pole control model according to claim 6, characterized in that: The specific formula for calculating the input AC current given signal for AC loop control is: Among them, I mo Represents the amplitude of the output AC current reference signal after multiplication calculation, K m Indicates the adjustment coefficient for compensating and correcting the output current, I ac Represents the input signal of AC current tracking in step 1, V f represents the feedforward voltage obtained in step 1, and f represents the sampling frequency.

8. The novel PFC control method based on zero-pole control model according to claim 1, characterized in that: The result of the difference between the signal after compensation optimization in step 3 and the current sampling signal in step 4 is used as the input of the current loop compensator. The output of the zero-pole current loop control model passes through the resistor R mo The voltage across the two ends should be equal to the voltage across the current detection resistor, so R mo The value of . According to the compensation loop, the gain should be flat at the switching frequency, and the average current mode control is used when the zero gain is higher at low frequencies. The crossover frequency is determined when the compensation gain multiplied by the switching system gain is 1. After the crossover frequency is selected, the compensation zero point is taken at the crossover frequency to meet the phase margin of system stability greater than 45° and the compensation loop zero point position should be less than or equal to the crossover frequency, and the zero-pole model parameters are calculated. The system transfer function is listed according to the determined zero-pole model, and the system transfer function is Laplace transformed from the time domain to the s domain, and then converted from the s domain to the z domain through a bilinear transformation to obtain the first linear differential equation, realizing digital zero-pole loop control and completing the current loop compensation design.

9. A new PFC control method based on zero-pole control model according to claim 8, characterized in that: The equivalent transfer function is specifically: Among them, V cea Represents the output voltage signal of the current loop, I mo Indicates the given target current signal of the current loop, R mo Indicates the grounding resistance of the loop compensated by zero pole, I s represents the measured AC current of the current loop, R s Represents the current detection resistor, R ci Represents the sampling current input resistance, R z represents the zero-point resistance of the model amplifier feedback loop, C z represents the zero-point capacitance of the model amplifier feedback loop, C p Representing the model amplifier feedback loop pole capacitance, the second transfer function is algebraically simplified as follows: The second linear difference equation is specifically: V filter_out (n)=B2*V filter_in (n)+B3*V filter_in (n-1)+B4*V filter_in (n-2)+A3*V filter_out (n-1)+A4*V filter_out (n-2) Among them, V filter_out (n) represents the current loop compensation output voltage signal at discrete time n, V filter_in (n) represents the current loop compensation input voltage signal at discrete time n, V filter_in (n-1) represents the current loop compensation input voltage signal at discrete time n-1, V filter_in (n-2) represents the current loop compensation input voltage signal at discrete time n-2, V filter_out (n-1) represents the current loop compensation output voltage signal at discrete time n-1, V filter_out (n-2) represents the current loop compensation output voltage signal at discrete time n-2, and B2, B3, B4, A3, and A4 represent weighted coefficients for adjusting the output and input filter voltages.

10. The novel PFC control method based on zero-pole control model according to claim 1, characterized in that: In the step five, the output of the current loop compensation is calibrated as the input of the pulse width modulation generator and the output duty cycle of the pulse width modulation generator is adjusted. The totem pole MOS switch is turned on and off by hardware driver to control the DC output voltage and power factor control. The voltage loop compensation and the current loop compensation are performed by zero-pole model control. When the switching frequency is set to 75KHz, the loop bandwidth is set to 5KHz.

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