Method and device for measuring linearity of circuit to be measured

Abstract

The invention provides a method and equipment for measuring the linearity of a circuit to be measured. The method comprises the following steps: outputting a first tone signal and a second tone signal by using a signal generator, wherein the circuit to be tested generates an intermodulation signal according to the first tone signal and the second tone signal; detecting the intermodulation power of the intermodulation signal by using a signal analysis device; using the signal generator to additionally output a cancellation tone signal, and controlling the cancellation power of the cancellation tone signal according to the intermodulation power; and detecting the total power of the intermodulation signal and the offset tone signal by using the signal analysis device so as to control the phase of the offset tone signal according to the total power, so that the total power is minimized when the phase of the offset tone signal is adjusted to a target phase.

Description

Technical Field

[0001] The present invention relates to the measurement of circuit linearity, and in particular to a method and a device for measuring the linearity of a circuit to be measured. Background Art

[0002] In wireless communication systems, when a power amplifier operating in a nonlinear region is interfered by two or more signals, these signals will undergo mutual modulation in the power amplifier and generate intermodulation distortion signals. This will lead to problems such as poor signal reception, signal distortion, reduced signal selectivity, and the reception performance of adjacent signals will also be affected. In addition, the components of the memory effect generated by the power amplifier in the nonlinear region are too complex to establish a corresponding model, so it is typically necessary to express its characteristics through measurement results.

[0003] However, the measurement methods of the related art typically require the use of a large number of instruments, making the overall cost quite high. Therefore, a novel method and related equipment architecture are needed to obtain linearity information of a device under test (such as the power amplifier mentioned above) with no or less side effects. Summary of the invention

[0004] The object of the present invention is to provide a method and device for measuring the linearity of a circuit under test, so as to reduce the number of instruments used in the overall measurement system.

[0005] At least one embodiment of the present invention provides a method for measuring the linearity of a circuit under test. The method includes: using a signal generator to output a first tone test signal and a second tone test signal to the circuit under test, wherein the circuit under test generates an intermodulation signal according to the first tone test signal and the second tone test signal; using a signal analysis device to receive the intermodulation signal and detect the intermodulation power of the intermodulation signal; using the signal generator to output a cancellation tone signal, and controlling the cancellation power of the cancellation tone signal according to the intermodulation power; and using the signal analysis device to detect the total power of the intermodulation signal and the cancellation tone signal, so as to control the phase of the cancellation tone signal according to the total power, so that the total power is minimized when the phase of the cancellation tone signal is adjusted to a target phase.

[0006] At least one embodiment of the present invention provides a device for measuring the linearity of a circuit under test. The device includes a signal generator, a signal analysis device, and a host device, wherein the host device is coupled to the signal generator and the signal analysis device. The signal generator is used to output a first tone test signal and a second tone test signal to the circuit under test, wherein the circuit under test generates an intermodulation signal according to the first tone test signal and the second tone test signal. The signal analysis device is used to receive the intermodulation signal and detect the intermodulation power of the intermodulation signal, and the host device is used to control the cancellation power of the cancellation tone signal according to the intermodulation power when the signal generator outputs the cancellation tone signal. In addition, the signal analysis device detects the total power of the intermodulation signal and the cancellation tone signal, so that the host device controls the phase of the cancellation tone signal according to the total power, and the total power is minimized when the phase of the cancellation tone signal is adjusted to the target phase.

[0007] The method and apparatus provided by the embodiments of the present invention can utilize a signal generator operating in a multi-tone mode to output a multi-tone signal, so that the first tone test signal, the second tone test signal, and the cancellation tone signal can be output from a single signal generator, rather than being output from multiple single-tone signal generators. In addition, in addition to obtaining the power information of the intermodulation signal, the present invention repeatedly adjusts the phase of the cancellation tone signal within a corresponding range to find the phase of the intermodulation signal based on the total power detected at these phases. Therefore, the present invention can measure the power information and phase information of the intermodulation signal when only one signal generator is used. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 FIG. 4 is a schematic diagram of a device for measuring the linearity of a circuit under test according to an embodiment of the present invention.

[0009] Figure 2 FIG. 4 is a schematic diagram of a working process of a method for measuring the linearity of a circuit under test according to an embodiment of the present invention.

[0010] Figure 3 According to an embodiment of the present invention Figure 2 Examples of the methods shown.

[0011] Figure 4 FIG. 4 is a schematic diagram of a working process of obtaining phase information of an intermodulation signal according to an embodiment of the present invention. DETAILED DESCRIPTION

[0012] Figure 1The present invention is a schematic diagram of an apparatus for measuring the linearity of a circuit under test 120, such as a device under test (DUT) circuit, such as a measurement system 10 according to an embodiment of the present invention, wherein the circuit under test 120 may be a power amplifier for a wireless communication system. Figure 1 As shown, the measurement system 10 may include a signal generator 110, a circuit under test 120, a signal analysis device 130, and a host device 100, wherein the circuit under test 120 is coupled to the output terminal of the signal generator 110 to receive the signal from the signal generator 110, and is coupled to the input terminal of the signal analysis device 130 to transmit the processed signal to the signal analysis device 130. In addition, the host device 100 is coupled to the signal generator 110 and the signal analysis device 130, and can control the operations of the signal generator 110 and the signal analysis device 130 based on program codes (e.g., program codes running on the host device 100). In addition, the signal generator 110 is a multi-tone signal generator that can operate in a multi-tone mode, and the signal analysis device 130 can be a spectrum analyzer.

[0013] In this embodiment, the signal generator 110 may be set in a multi-tone mode to simultaneously output the first tone test signal T1 and the second tone test signal T2 to the circuit under test 120 (for example, the signal generator 110 may output a multi-tone test signal, and the multi-tone test signal may include the first tone test signal T1 and the second tone test signal T2), wherein the signal generator 110 does not output any offset tone signal at the beginning, and the circuit under test 120 may transmit the amplified first tone signal T1 and the amplified second tone signal T2 to the signal analysis device 130. It should be noted that any signal received by the circuit under test 120 (for example, Figure 1 The signal shown on the left side of the circuit under test 120 in FIG. 1 and the result after the signal is amplified by the circuit under test 120 (for example, Figure 1) are represented by the same symbols for ease of understanding. However, since the amplification operation of the circuit under test 120 is not completely linear, the circuit under test 120 may generate an intermodulation signal T3 according to the first tone test signal T1 and the second tone test signal T2 from the signal generator 110 (for example, the first tone test signal T1 and the second tone test signal T2 are intermodulated to generate the intermodulation signal T3). For example, when the frequencies of the first tone test signal T1 and the second tone test signal T2 are f1 and f2, respectively, the circuit under test 120 may generate third order intermodulation distortion (IMD3) signals with frequencies of (2×f1–f2) and (2×f2–f1) because it operates in a nonlinear region, wherein the third order intermodulation distortion signals with frequencies of (2×f1–f2) and (2×f2–f1) may be examples of the intermodulation signal T3. Since the signal generator 110 does not output any cancellation tone signal at this time, the signal analysis device 130 can receive the intermodulation signal T3 from the circuit under test 120 and detect the intermodulation power of the intermodulation signal T3 by detecting the power of the signal with the frequency (2×f1−f2) or (2×f2−f1).

[0014] Next, the main device 100 may obtain the intermodulation power from the signal analysis device 130, and control the signal generator 110 to output a cancellation tone signal T3', wherein the cancellation frequency of the cancellation tone signal T3' is equal to (or very close to) the intermodulation frequency of the intermodulation signal T3 (e.g., (2×f1–f2) or (2×f2–f1)). For example, the main device 100 may control the signal generator 110 to output a multi-tone test signal, and the multi-tone test signal may include a first tone test signal T1, a second tone test signal T2, and a cancellation tone signal T3'. In particular, the main device 100 may control the cancellation power of the cancellation tone signal T3' according to the intermodulation power. Therefore, the circuit under test 120 may receive the cancellation tone signal T3' from the signal generator 110, and transmit the amplified cancellation tone signal T3' to the signal analysis device 130. In this case, the signal analysis device 130 can detect the total power of the intermodulation signal T3 and the cancellation tone signal T3' output by the circuit under test 120 (for example, the power of the signal with a frequency of (2×f1-f2) or (2×f2-f1)), and the host device 100 can send a corresponding instruction to the signal generator 110 to control the phase of the cancellation tone signal T3' according to the total power detected by the signal analysis device 130, so that the total power is minimized when the phase of the cancellation tone signal T3' is adjusted to the target phase. Since the phase of the cancellation tone signal T3' is adjusted to the target phase, the intermodulation signal T3 and the cancellation tone signal T3' output by the circuit under test 120 have the best cancellation result (that is, the detected total power is the minimum), so the host device 100 can deduce the phase of the intermodulation signal T3 according to the target phase.

[0015] Figure 2 FIG. 1 is a schematic diagram of a working process of a method for measuring the linearity of a circuit under test 120 according to an embodiment of the present invention, wherein Figure 2 The method shown can be Figure 1 It should be noted that Figure 2 The workflow shown is for illustrative purposes only and is not intended to limit the present invention. For example, one or more steps may be Figure 2 The steps may be added, deleted, or modified from the workflow shown. In addition, the steps do not necessarily need to be followed exactly to achieve the same result. Figure 2 Execute in the order shown.

[0016] In step S210 , the measurement system 10 may utilize the signal generator 110 to output the first tone test signal T1 and the second tone test signal T2 to the circuit under test 120 , wherein the circuit under test 120 generates the intermodulation signal T3 according to the first tone test signal T1 and the second tone test signal T2 .

[0017] In step S220 , the measurement system 10 may utilize the signal analysis device 130 to receive the intermodulation signal T3 and detect the intermodulation power of the intermodulation signal T3 .

[0018] In step S230 , the measurement system 10 may utilize the signal generator 110 to output the cancellation tone signal T3 ′, and control the cancellation power of the cancellation tone signal T3 ′ according to the intermodulation power.

[0019] In step S240 , the measurement system 10 may utilize the signal analysis device 130 to detect the total power of the intermodulation signal T3 and the cancellation tone signal T3 ′ to control the phase of the cancellation tone signal T3 ′ according to the total power so that the total power is minimized when the phase of the cancellation tone signal T3 ′ is adjusted to the target phase.

[0020] Figure 3 According to an embodiment of the present invention Figure 2 An example of the method shown. Note that Figure 3 The workflow shown is for illustrative purposes only and is not intended to limit the present invention. For example, one or more steps may be Figure 3 The steps may be added, deleted, or modified from the workflow shown. In addition, the steps do not necessarily need to be followed exactly to achieve the same result. Figure 3 Execute in the order shown.

[0021] In step S310, the measurement system 10 may utilize a network analyzer to measure scattering parameters (S parameters for short) of the circuit under test 120, wherein the S parameters measured by the network analyzer may include gain information and phase information of the circuit under test 120 for subsequent compensation / correction of the influence of the frequency response of the circuit under test 120.

[0022] In step S320, the measurement system 10 may set the signal generator 110, in particular, may enable the multi-tone function of the signal generator 110 and set the interval between the multi-tone signals (e.g., the frequency difference between the first tone test signal T1 and the second tone test signal T2) to output the multi-tone signal with this interval.

[0023] In step S330, the measurement system 10 may set the signal analysis device 130 such as a spectrum analyzer. For example, the spectrum analyzer typically has a built-in automatic setting function, and in particular, it can automatically adjust parameters such as resolution bandwidth, video bandwidth, average times, reference level, etc. to appropriate values. In addition, the frequency span of the spectrum analyzer is preferably set to a dimension of 1 MHz so that the measured signal power (e.g., the power of a signal with a frequency of f1, the power of a signal with a frequency of f2, the power of a signal with a frequency of (2×f1–f2), the power of a signal with a frequency of (2×f2–f1), etc.) has better accuracy. Specifically, the measurement system 10 (e.g., the signal analysis device 130 or the main device 100) can obtain the third-order intermodulation distortion value through the following calculations:

[0024] IMD3L=P(2×f1–f2)–P(f1)……(1)

[0025] IMD3R=P(2×f2–f1)–P(f2)……(2)

[0026] Wherein IMD3L may be used to represent the effect of the intermodulation signal appearing on the left side (frequency) of the multi-tone test signal due to intermodulation, P(2×f1–f2) may be the power of the signal at frequency (2×f1–f2) expressed in decibel (dB), P(f1) may be the power of the signal at frequency f1 expressed in decibel, and IMD3R may be used to represent the effect of the intermodulation signal appearing on the right side (frequency) of the multi-tone test signal due to intermodulation, P(2×f2–f1) may be the power of the signal at frequency (2×f2–f1) expressed in decibel, and P(f2) may be the power of the signal at frequency f2 expressed in decibel.

[0027] In step S340, the main device 100 can use the S parameters obtained in step S310 to perform gain compensation on the third-order intermodulation distortion values ​​IMD3L and IMD3R obtained in step S330, so as to ensure that the measurement results are closer to the actual characteristics of the circuit under test 120 (such as a power amplifier) ​​in a broadband scenario (such as a situation where the interval between frequencies f1 and f2 is large).

[0028] In step S350, the main device 100 may set the signal generator 110 to output a four-tone signal (e.g., a signal with frequencies of (2×f1–f2), f1, f2, and (2×f2–f1) respectively), and set the strength of the cancellation tone signal in the four-tone signal according to the gain compensation result. For example, the main device 100 may control the cancellation power of the cancellation tone signal T3′ (e.g., a signal with a frequency of (2×f1–f2) or a signal with a frequency of (2×f2–f1)) output by the signal generator 110 according to the intermodulation power described in the previous embodiment (e.g., the third-order intermodulation distortion values ​​IMD3L and IMD3R) and the S parameter obtained in step S310, so that the cancellation power of the cancellation tone signal T3′ output by the circuit under test 120 is as close to the intermodulation power as possible. In this embodiment, the main device 100 can set the signal generator 110 to turn off the signal with a frequency of (2×f2−f1) and set the cancellation power of the signal with a frequency of (2×f1−f2) according to the compensation result, so as to detect the third-order intermodulation distortion value IMD3L in the subsequent steps.

[0029] In step S360 , the host device 100 may configure the signal generator 110 to adjust the phase of the signal with a frequency of (2×f1−f2), and find out the phase that minimizes the third-order intermodulation distortion value IMD3L detected by the signal analysis device 130 .

[0030] In step S370 , the host device 100 may record the above information and output a detection result for the intermodulation signal (eg, a detection result of a signal with a frequency of (2×f1−f2)).

[0031] It should be noted that after completing the detection related to the third-order intermodulation distortion value IMD3L, the main device 100 sets the signal generator 110 to turn off the signal with a frequency of (2×f1–f2) and sets the offset power of the signal with a frequency of (2×f2–f1) according to the above compensation result, and executes steps S360 and S370 to perform IMD3R detection to output the measurement result for the signal with a frequency of (2×f2–f1). In some embodiments, the main device 100 can control the signal generator 110 to change the frequency interval between the frequencies f1 and f2, and execute steps S330 to S370 again to obtain the measurement results at different frequency intervals.

[0032] In addition, the host device 100 can compensate or correct the target phase found in step S360 according to the S parameter of the circuit under test 120 to obtain the phase measurement result of the intermodulation signal. In addition, the host device 100 can find the target phase according to a specific algorithm to shorten the time required to find the target phase.

[0033] Figure 4FIG. 1 is a schematic diagram of a process for obtaining phase information of an intermodulation signal (eg, a signal with a frequency of (2×f1−f2) or a signal with a frequency of (2×f2−f1)) according to an embodiment of the present invention. It should be noted that Figure 4 The workflow shown is for illustrative purposes only and is not intended to limit the present invention. For example, one or more steps may be Figure 4 The steps may be added, deleted, or modified from the workflow shown. In addition, the steps do not necessarily need to be followed exactly to achieve the same result. Figure 4 Execute in the order shown.

[0034] In step S410, the main device 100 may set the signal generator 110 to sequentially set the offset phase to a plurality of first candidate phase values, wherein the total power is a plurality of first power values ​​when the offset phase is set to the plurality of first candidate phase values. The main device 100 may select a first specific phase value corresponding to the minimum first power value among the plurality of first power values ​​from the plurality of first candidate phase values. For example, the offset phase may be adjusted to 0 degrees, 90 degrees, 180 degrees, and 270 degrees, and the main device 100 may find a phase among these four phases that minimizes the third-order intermodulation distortion (IMD3 for short). When the target phase is 71 degrees, the 90-degree phase among the four phases can minimize the third-order intermodulation distortion value, so the main device may select 90 degrees.

[0035] In step S420, the main device 100 may set the signal generator 110 to sequentially set the cancellation phase to a plurality of second candidate phase values ​​corresponding to the first specific phase value, wherein the total power is a plurality of second power values ​​when the cancellation phase is set to the plurality of second candidate phase values. The main device 100 may select a second specific phase value corresponding to the minimum second power value among the plurality of second power values ​​from the plurality of second candidate phase values. For example, the main device 100 uses a search range of 50 degrees above and below the phase selected in step S410 and adjusts the phase of the cancellation tone signal at intervals of 10 degrees to find out the phase that minimizes the third-order intermodulation distortion value. When the target phase is 71 degrees and 90 degrees is selected in step S410, the cancellation phase can be adjusted to 40 degrees, 50 degrees, 60 degrees, 70 degrees, 80 degrees, 90 degrees, 100 degrees, 110 degrees, 120 degrees, 130 degrees and 140 degrees, and the main device 100 can find that the minimum third-order intermodulation distortion value can be obtained when the cancellation phase is 70 degrees.

[0036] In step S430, the main device 100 may set the signal generator to sequentially set the cancellation phase to a plurality of third candidate phase values ​​corresponding to the second specific phase value, wherein the total power is a plurality of third power values ​​when the cancellation phase is set to the plurality of third candidate phase values. The main device 100 may select a third specific phase value corresponding to the minimum third power value among the plurality of third power values ​​from the plurality of third candidate phase values ​​as the target phase. For example, the main device 100 uses a search range of 5 degrees above and below the phase selected in step S420 and adjusts the phase of the cancellation tone signal at intervals of 1 degree to find out the phase that minimizes the third-order intermodulation distortion value. When the target phase is 71 degrees and 70 degrees is selected in step S420, the cancellation phase can be adjusted to 65 degrees, 66 degrees, 67 degrees, 68 degrees, 69 degrees, 70 degrees, 71 degrees, 72 degrees, 73 degrees, 74 degrees and 75 degrees, and the main device 100 can find that the minimum third-order intermodulation distortion value can be obtained when the cancellation phase is 71 degrees, so the target phase is judged to be 71 degrees.

[0037] In step S440, the host device 100 may calibrate or compensate the target phase according to the S parameter of the circuit under test 120 to obtain the phase measurement result of the intermodulation signal. For example, the host device 100 may use the S parameter of the circuit under test 120 to perform phase compensation on the phase value (e.g., the target phase) obtained in step S430, wherein the phase of the offset tone signal (e.g., the target phase) = -(phase of the intermodulation signal T3 + S21 parameter). Therefore, the phase of the intermodulation signal T3 can be calculated based on the target phase and the S21 parameter in the S parameter.

[0038] In addition, the signal analysis device 130 does not necessarily need to be implemented using a spectrum analyzer. In some embodiments, the signal analysis device 130 may be a power spectrum density calculation circuit implemented through a digital circuit, thereby avoiding the cost of using a spectrum analyzer. Specifically, the power spectrum density calculation circuit can be used to calculate the power distribution of the signal at different frequencies, wherein the power spectrum density calculation circuit can perform relevant calculations based on the periodogram method or the Welch method, but the present invention is not limited thereto. Since the periodogram method and the Welch method are well-known technologies in the field of power spectrum density, they are not described here for the sake of simplicity.

[0039] In summary, the method and apparatus provided by the embodiments of the present invention can output a multi-tone signal with a signal generator operating in a multi-tone mode, so as to reduce the number of signal generators. In addition, the present invention can gradually narrow the search range of the target phase and improve the accuracy of finding the target phase, so as to find the target phase without completely scanning all phases. In particular, the frequency response of the circuit under test 120 can be taken into account by measuring its S parameters, so that a more accurate measurement result can be obtained. In summary, the present invention can reduce the equipment cost and time cost of measuring a power amplifier, and improve the accuracy of the measurement result without side effects or with less side effects.

[0040] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made according to the scope of the patent application of the present invention should fall within the scope of the present invention.

[0041] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made according to the scope of the patent application of the present invention should fall within the scope of the present invention.

[0042]

Explanation of symbols

[0043] 10: Measurement system

[0044] 100: Main device

[0045] 110:Signal generator

[0046] 120: Circuit under test

[0047] 130:Signal analysis device

[0048] T1: First tone test signal

[0049] T2: Second tone test signal

[0050] T3: Intermodulation signal

[0051] T3': cancel tone signal

[0052] S210~S240, S310~S370, S410~S440: Steps

Claims

1. A method for measuring the linearity of a circuit under test, comprising: Using a signal generator to output a first tone test signal and a second tone test signal to the circuit under test, wherein the circuit under test generates an intermodulation signal according to the first tone test signal and the second tone test signal; Using a signal analysis device to receive the intermodulation signal and detect the intermodulation power of the intermodulation signal; Using the signal generator to output a cancellation tone signal, and controlling the cancellation power of the cancellation tone signal according to the intermodulation power; as well as The signal analysis device is used to detect the total power of the intermodulation signal and the cancellation tone signal, so as to control the phase of the cancellation tone signal according to the total power, so that the total power is minimized when the phase of the cancellation tone signal is adjusted to a target phase. 2 . The method according to claim 1 , wherein an intermodulation frequency of the intermodulation signal is equal to a cancellation frequency of the cancellation tone signal.

3. The method according to claim 1, wherein controlling the cancellation power of the cancellation tone signal according to the intermodulation power comprises: The cancellation power of the cancellation tone signal is controlled according to the intermodulation power and scattering parameters (S-parameters) of the circuit under test.

4. The method according to claim 1, further comprising: The target phase is corrected according to scattering parameters (S-parameters) of the circuit under test to obtain a phase measurement result of the intermodulation signal.

5. The method according to claim 1, wherein detecting the total power of the intermodulation signal and the cancellation tone signal by the signal analysis device for controlling the phase of the cancellation tone signal according to the total power so that the total power is minimized when the phase of the cancellation tone signal is adjusted to the target phase comprises: The offset phase is sequentially set to a plurality of first candidate phase values, wherein the total power is respectively a plurality of first power values ​​when the offset phase is set to the plurality of first candidate phase values; Selecting a first specific phase value corresponding to a minimum first power value among the plurality of first power values ​​from the plurality of first candidate phase values; sequentially setting the offset phase to a plurality of second candidate phase values ​​corresponding to the first specific phase value, wherein the total power is a plurality of second power values ​​when the offset phase is set to the plurality of second candidate phase values; as well as A second specific phase value corresponding to a minimum second power value among the plurality of second power values ​​is selected from the plurality of second candidate phase values.

6. A device for measuring the linearity of a circuit under test, comprising: a signal generator, configured to output a first tone test signal and a second tone test signal to the circuit under test, wherein the circuit under test generates an intermodulation signal according to the first tone test signal and the second tone test signal; A signal analysis device, used for receiving the intermodulation signal and detecting the intermodulation power of the intermodulation signal; a host device, coupled to the signal generator and the signal analysis device, for controlling the cancellation power of the cancellation tone signal according to the intermodulation power when the signal generator further outputs the cancellation tone signal; The signal analysis device detects the total power of the intermodulation signal and the cancellation tone signal so that the main device controls the phase of the cancellation tone signal according to the total power and minimizes the total power when the phase of the cancellation tone signal is adjusted to a target phase.

7. The apparatus of claim 6, wherein an intermodulation frequency of the intermodulation signal is equal to a cancellation frequency of the cancellation tone signal.

8. The apparatus of claim 1, wherein the host device sets the signal generator to control the cancellation power of the cancellation tone signal according to the intermodulation power and scattering parameters (S-parameters) of the circuit under test.

9. The apparatus according to claim 1, wherein the host device calibrates the target phase according to scattering parameters (S-parameters) of the circuit under test to obtain a phase measurement result of the intermodulation signal.

10. The apparatus of claim 8, wherein: The signal generator sets the offset phase to a plurality of first candidate phase values ​​in sequence, wherein the total power is a plurality of first power values ​​respectively when the offset phase is set to the plurality of first candidate phase values; The master device selects a first specific phase value corresponding to a minimum first power value among the plurality of first power values ​​from the plurality of first candidate phase values; The signal generator sequentially sets the offset phase to a plurality of second candidate phase values ​​corresponding to the first specific phase value, wherein the total power is a plurality of second power values ​​when the offset phase is set to the plurality of second candidate phase values; as well as The master device selects a second specific phase value corresponding to a minimum second power value among the plurality of second power values ​​from the plurality of second candidate phase values.

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