Diode and preparation method thereof

Abstract

The invention provides a diode and a preparation method thereof. The diode comprises an N-type substrate; the N-type epitaxial layer is arranged on one side of the N-type substrate; the grooves are formed in the N-type epitaxial layer at intervals in the length direction of the N-type epitaxial layer, one end of each groove and the N-type substrate are arranged at intervals, and the other end of each groove is communicated with the side, away from the N-type substrate, of the N-type epitaxial layer; the plurality of grooves comprise a first groove, a second groove and a third groove which are arranged in sequence, and the depth of the first groove and the depth of the third groove are greater than the depth of the second groove; the plurality of P-type epitaxial regions are arranged in the plurality of grooves in a one-to-one correspondence manner; and the first metal filling region and the P-type epitaxial region in the second trench form an open groove, and the first metal filling region is arranged in the open groove, so that the problem that the high voltage resistance of the SIC diode device per unit area in the prior art is relatively poor is solved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a diode and a method for preparing the same. Background Art

[0002] Power diodes are key components of circuit systems and are widely used in civilian products such as high-frequency inverters, digital products, generators, and televisions, as well as military applications such as advanced weapon control systems and instrumentation equipment such as satellite receiving devices, missiles, and aircraft. Power diodes are expanding in two important directions: (1) They are developing towards tens of millions or even tens of thousands of amperes, and can be used in high-temperature arc wind tunnels, resistance welding machines, and other applications; (2) Their reverse recovery time is getting shorter and shorter, and they are developing towards ultra-fast, ultra-soft, and ultra-durable, making them not only used in rectification applications, but also playing different roles in various switching circuits. In order to meet the requirements of low power consumption, high frequency, high temperature, and miniaturization, their withstand voltage, on-resistance, turn-on voltage drop, reverse recovery characteristics, and high temperature characteristics are becoming increasingly higher.

[0003] Commonly used power diodes include ordinary rectifier diodes, Schottky rectifier diodes, and PIN rectifier diodes. They have their own characteristics compared to each other: Schottky rectifier diodes have lower on-state voltage drop, larger leakage current, and almost zero reverse recovery time. Although PIN fast recovery rectifier diodes have faster reverse recovery time, their on-state voltage drop is very high.

[0004] At present, with the development of microelectronic devices towards low power consumption, high voltage resistance and high reliability, the requirements for semiconductor materials are gradually increasing. Microelectronic devices are increasingly used in special environments such as high temperature, high radiation, high frequency and high power. In order to meet the application of microelectronic devices in the fields of high temperature resistance and radiation resistance, it is necessary to develop new semiconductor materials to maximize the performance of microelectronic devices. Silicon devices and gallium arsenide devices in the prior art limit the improvement of device and system performance. The third-generation semiconductor materials represented by silicon carbide (SiC) and gallium nitride (GaN) have become ideal semiconductor materials for making electronic devices such as high temperature resistance, high power and radiation resistance due to the advantages of the wide bandgap and high critical breakdown electric field of the material itself.

[0005] The critical breakdown field strength of SiC-based devices currently under study (such as high-temperature and power SiC devices, microwave and high-frequency SiC devices, SiC optoelectronic devices, radiation-resistant devices, etc.) is 10 times that of Si materials, the bandgap width and thermal conductivity of SiC-based devices are both 3 times that of Si materials, and the concentration of intrinsic carriers of SiC-based devices is only one-tenth of that of silicon materials. These excellent physical properties make semiconductor power devices made of SiC materials have great advantages in high-frequency, high-temperature, high-power and high-irradiation environments. SiC can form different crystal structures under different environments. The three commonly used crystal structures are 3C-SiC, 4H-SiC, and 6H-SiC. 4H-SiC material has become the mainstream material for manufacturing semiconductor devices due to its higher bandgap width and hole mobility and lower intrinsic carrier concentration.

[0006] In the prior art, the structure of the diode mainly adopts a trench structure. However, there is still a lot of room for improvement in the electrical performance of the existing trench structure diode. Since the SIC diode device has not optimized the device structure according to the material characteristics of SIC in structure, the product performance advantage in some parameters compared with Si devices is not obvious enough. When the SIC diode device works in reverse, the depletion region shape is a semicircular shape with a high middle and low ends, which makes the high-voltage resistance per unit area of ​​the SIC diode device poor. In addition, the SIC diode device uses the traditional process of Si diode in the production process. Affected by the characteristics of SIC materials, the production process is relatively complicated and requires the use of special equipment (for Al ion implantation, special implantation equipment is required), and the production cost is high. Summary of the invention

[0007] The main purpose of the present invention is to provide a diode and a method for preparing the same, so as to solve the problem that the SIC diode device in the prior art has poor high voltage resistance per unit area.

[0008] To achieve the above-mentioned purpose, according to one aspect of the present invention, a diode is provided, comprising: an N-type substrate; an N-type epitaxial layer, the N-type epitaxial layer being arranged on one side of the N-type substrate; a plurality of grooves, the plurality of grooves being arranged in the N-type epitaxial layer at intervals along the length direction of the N-type epitaxial layer, one end of each groove being arranged at intervals with the N-type substrate, and the other end of each groove being connected with a side of the N-type epitaxial layer away from the N-type substrate; the plurality of grooves comprising a first groove, a second groove and a third groove arranged in sequence, the depth of the first groove and the depth of the third groove both being greater than the depth of the second groove; a plurality of P-type epitaxial regions, the plurality of P-type epitaxial regions being arranged in one-to-one correspondence with the plurality of grooves; a first metal filling region, the P-type epitaxial region in the second groove forming an open groove, the first metal filling region being arranged in the open groove.

[0009] Furthermore, each groove is a rectangular groove, the depth of the first groove is equal to the depth of the third groove, the width of the first groove is equal to the width of the third groove and both are smaller than the width of the second groove.

[0010] Furthermore, the diode includes a P-type ion implantation region, and the P-type ion implantation region is arranged in the N-type epitaxial layer.

[0011] Furthermore, the doping concentration of the P-type ion implantation region is lower than the doping concentration of the P-type epitaxial region.

[0012] Furthermore, a P-type ion implantation region is provided on a side of the first groove close to the second groove, and no P-type ion implantation region is provided on a side of the first groove away from the second groove; and / or P-type ion implantation regions are provided on both opposite sides of the second groove; and / or a P-type ion implantation region is provided on a side of the third groove close to the second groove, and no P-type ion implantation region is provided on a side of the third groove away from the second groove.

[0013] Furthermore, the depth of the P-type ion implantation region is less than the depth of the groove; and / or the width of the P-type ion implantation region is greater than the width of the first groove and greater than the width of the third groove; and / or the width of the P-type ion implantation region is less than the width of the second groove.

[0014] Furthermore, the material used to make the first metal filling region includes nickel; and / or an ohmic contact is formed between the first metal filling region and the P-type epitaxial region.

[0015] Furthermore, the diode includes: a second metal layer, which is arranged on a side of the N-type epitaxial layer away from the N-type substrate; a third metal layer, which is arranged on a side of the second metal layer away from the N-type epitaxial layer; and a back metal layer, which is arranged on a side of the N-type substrate away from the N-type epitaxial layer.

[0016] Furthermore, a Schottky contact is formed between the second metal layer and the N-type epitaxial layer and the P-type epitaxial region; and / or an ohmic contact is formed between the back metal layer and the N-type epitaxial layer.

[0017] Further, the second metal layer includes a titanium metal layer; and / or the third metal layer includes an aluminum metal layer; and / or the back metal layer includes a titanium metal layer, a nickel metal layer and a silver metal layer sequentially arranged in a direction away from the N-type substrate.

[0018] According to another aspect of the present invention, a diode preparation method is provided, which is used to prepare the above-mentioned diode, and the diode preparation method includes: providing an N-type substrate; providing an N-type epitaxial layer on the N-type substrate; forming a plurality of grooves including a first groove, a second groove and a third groove on the N-type epitaxial layer by dry etching; filling P-type epitaxy into each groove to form a plurality of P-type epitaxial regions; removing a portion of the P-type epitaxial region in the second groove by dry etching to form an open groove; and filling a first metal into the open groove to form a first metal filling region.

[0019] Furthermore, when performing the step of filling the first metal into the opening groove to form a first metal filling region, the diode preparation method includes: thermally annealing the first metal filling region to form an ohmic contact between the first metal filling region and the corresponding P-type epitaxial region.

[0020] Furthermore, the diode preparation method includes: implanting P-type ions on the N-type epitaxial layer to form a P-type ion implantation region.

[0021] Furthermore, the diode preparation method includes: setting a second metal layer on the side of the N-type epitaxial layer away from the N-type substrate; setting a third metal layer on the side of the second metal layer away from the N-type epitaxial layer; and setting a back metal layer on the side of the N-type substrate away from the N-type epitaxial layer.

[0022] Furthermore, when performing the step of setting a third metal layer on a side of the second metal layer away from the N-type epitaxial layer, the diode preparation method includes: preparing the third metal layer at a high temperature, and thermally annealing the second metal layer to form a Schottky contact between the second metal layer and the N-type epitaxial layer and the P-type epitaxial region.

[0023] The technical solution of the present invention is applied, and the diode of the present invention includes: an N-type substrate; an N-type epitaxial layer, which is arranged on one side of the N-type substrate; a plurality of grooves, which are arranged in the N-type epitaxial layer at intervals along the length direction of the N-type epitaxial layer, one end of each groove is arranged at intervals with the N-type substrate, and the other end of each groove is connected with the side of the N-type epitaxial layer away from the N-type substrate; the plurality of grooves include a first groove, a second groove and a third groove which are arranged in sequence, and the depth of the first groove and the depth of the third groove are both greater than the depth of the second groove; a plurality of P-type epitaxial regions, which are arranged in a one-to-one correspondence with the plurality of grooves; a first metal filling region, the P-type epitaxial region in the second groove forms an open groove, and the first metal filling region is arranged in the open groove. In this way, the diode of the present invention realizes high performance and high reliability of the diode by arranging grooves of different depths in the N-type epitaxial layer, arranging a P-type epitaxial region in each groove, and forming a first metal filling region in the opening groove of the P-type epitaxial region in the second groove, thereby improving the overall electrical performance and application range of the diode, optimizing the shape of the depletion region of the diode device when working in reverse, making the shape of its depletion region closer to a rectangle, improving the high voltage resistance per unit area of ​​the diode, solving the problem of poor high voltage resistance per unit area of ​​the SIC diode device in the prior art, and being able to significantly improve the efficiency and stability of power electronic equipment, and being particularly suitable for applications in high power, high frequency and high temperature environments, bringing significant benefits to the development of power electronic technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings constituting a part of the present application are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0025] Figure 1 A schematic diagram showing a first state of an embodiment of a diode according to the present invention during preparation is shown;

[0026] Figure 2 Shows Figure 1 A schematic diagram of a second state of a diode during the preparation process shown;

[0027] Figure 3 Shows Figure 2 The third state schematic diagram of the diode during the preparation process is shown;

[0028] Figure 4 Shows Figure 3 A schematic diagram of a diode in a fourth state during the preparation process is shown;

[0029] Figure 5 Shows Figure 4 A schematic diagram of a diode in a fifth state during the preparation process is shown;

[0030] Figure 6 Shows Figure 5 A schematic diagram of a diode in a sixth state during the preparation process is shown;

[0031] Figure 7 Shows Figure 6 The seventh state schematic diagram of the diode during the preparation process is shown;

[0032] Figure 8 Shows Figure 7 Schematic diagram of the final state of the diode during the preparation process;

[0033] Fig. 9 Shows Figure 8 The diagram of the depletion region of the diode shown is a schematic diagram of the shape of the depletion region when the diode is working in reverse direction;

[0034] Fig.10 A flow chart of an embodiment of a method for preparing a diode according to the present invention is shown.

[0035] The above drawings include the following reference numerals:

[0036] 1. N-type substrate;

[0037] 2. N-type epitaxial layer;

[0038] 3. Groove; 31. First groove; 32. Second groove; 33. Third groove;

[0039] 4. P-type epitaxial region; 41. opening groove;

[0040] 5. First metal filling area;

[0041] 6. P-type ion implantation area;

[0042] 7. Second metal layer;

[0043] 8. The third metal layer;

[0044] 9. Back metal layer. DETAILED DESCRIPTION

[0045] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0046] like Figures 1 to 9As shown, the present invention provides a diode, comprising: an N-type substrate 1; an N-type epitaxial layer 2, the N-type epitaxial layer 2 is arranged on one side of the N-type substrate 1; a plurality of grooves 3, the plurality of grooves 3 are arranged in the N-type epitaxial layer 2 at intervals along the length direction of the N-type epitaxial layer 2, one end of each groove 3 is arranged at intervals with the N-type substrate 1, and the other end of each groove 3 is connected with the side of the N-type epitaxial layer 2 away from the N-type substrate 1; the plurality of grooves 3 include a first groove 31, a second groove 32 and a third groove 33 arranged in sequence, the depth of the first groove 31 and the depth of the third groove 33 are both greater than the depth of the second groove 32; a plurality of P-type epitaxial regions 4, the plurality of P-type epitaxial regions 4 are arranged in a one-to-one correspondence with the plurality of grooves 3; a first metal filling region 5, the P-type epitaxial region 4 in the second groove 32 forms an opening groove 41, and the first metal filling region 5 is arranged in the opening groove 41.

[0047] In this way, the diode of the present invention achieves high performance and high reliability of the diode by arranging grooves 3 of different depths in the N-type epitaxial layer 2, arranging a P-type epitaxial region 4 in each groove 3, and forming a first metal filling region 5 in the opening groove 41 of the P-type epitaxial region 4 in the second groove 32, thereby improving the overall electrical performance and application range of the diode, optimizing the shape of the depletion region of the diode device when working in reverse, making the shape of its depletion region closer to a rectangle, improving the high voltage resistance per unit area of ​​the diode, solving the problem of poor high voltage resistance per unit area of ​​the SIC diode device in the prior art, and being able to significantly improve the efficiency and stability of power electronic equipment, and being particularly suitable for applications in high power, high frequency and high temperature environments, bringing significant benefits to the development of power electronic technology.

[0048] Specifically, the N-type substrate 1 is an N-type silicon carbide substrate, and the N-type epitaxial layer 2 is an N-type silicon carbide epitaxial layer.

[0049] like Figure 2 As shown, each groove 3 is a rectangular groove, the depth of the first groove 31 is equal to the depth of the third groove 33, the width of the first groove 31 is equal to the width of the third groove 33 and is smaller than the width of the second groove 32, so that the formation of the P-type epitaxial region 4 is more uniform, the breakdown voltage and current carrying capacity of the diode are improved, and it is suitable for high-voltage power transmission and high-current switching applications.

[0050] like Figures 3 to 9 As shown, the diode includes a P-type ion implantation region 6, which is arranged in the N-type epitaxial layer 2, further optimizing the characteristics of the PN junction, improving the switching speed and efficiency of the diode, and is suitable for high-frequency power conversion and high-speed switching circuits.

[0051] Specifically, the doping concentration of the P-type ion implantation region 6 is less than the doping concentration of the P-type epitaxial region 4. By controlling the doping concentration of the P-type ion implantation region 6, the breakdown voltage of the diode can be increased without significantly increasing the leakage current, the chip area of ​​the diode can be reduced, and the manufacturing cost can be reduced.

[0052] like Figures 3 to 9 As shown, a P-type ion implantation region 6 is provided on one side of the first groove 31 close to the second groove 32, and a P-type ion implantation region 6 is not provided on one side of the first groove 31 away from the second groove 32; and / or P-type ion implantation regions 6 are provided on both opposite sides of the second groove 32; and / or a P-type ion implantation region 6 is provided on one side of the third groove 33 close to the second groove 32, and a P-type ion implantation region 6 is not provided on one side of the third groove 33 away from the second groove 32. Such precise setting of the P-type ion implantation region 6 can effectively control the electric field distribution of the diode, reduce the electric field concentration, and is suitable for power electronic devices requiring high reliability and long life.

[0053] Specifically, the shape of the P-type ion implantation region 6 is rectangular; wherein the depth of the P-type ion implantation region 6 is less than the depth of the groove 3; and / or the width of the P-type ion implantation region 6 is greater than the width of the first groove 31 and greater than the width of the third groove 33; and / or the width of the P-type ion implantation region 6 is less than the width of the second groove 32. Such size control of the P-type ion implantation region can accurately adjust the electrical performance of the diode, improve its adaptability in complex power environments, and is suitable for various rectification and protection circuits in power systems.

[0054] In the diode of the present invention, the material used to make the first metal filling area 5 includes nickel, which can form a stable ohmic contact with the P-type epitaxial area, thereby increasing the contact area, improving the ability to pass large currents, and improving the current transmission efficiency of the diode, making it suitable for high-frequency, large-current power electronic applications such as high-speed switching circuits and high-power rectifiers; and / or an ohmic contact is formed between the first metal filling area 5 and the P-type epitaxial area 4, which can enhance surge capability, reduce forward voltage drop, and reduce contact resistance of the diode while ensuring voltage resistance, thereby improving its current transmission efficiency, making it suitable for power conversion systems requiring low loss and high efficiency.

[0055] like Figures 5 to 9As shown, the diode includes: a second metal layer 7, which is arranged on the side of the N-type epitaxial layer 2 away from the N-type substrate 1, and is suitable for high-frequency, high-power power electronic applications; a third metal layer 8, which is arranged on the side of the second metal layer 7 away from the N-type epitaxial layer 2, thereby improving the heat dissipation capacity and mechanical strength of the diode, and is suitable for power electronic equipment that requires good heat dissipation and durability; a back metal layer 9, which is arranged on the side of the N-type substrate 1 away from the N-type epitaxial layer 2, and can serve as a heat dissipation path for the diode, and is suitable for applications in high-power, high-temperature environments.

[0056] In the diode of the present invention, Schottky contacts are formed between the second metal layer 7 and the N-type epitaxial layer 2, the P-type epitaxial region 4 and the P-type ion implantation region 6, which can reduce the leakage current of the diode, improve the voltage resistance performance of the diode, significantly reduce the switching loss of the diode, and improve its performance in high-frequency switching circuits, and is suitable for high-speed switching power supplies and power electronic converters; and / or an ohmic contact is formed between the back metal layer 9 and the N-type epitaxial layer 2, which can improve the surge capability, reduce the forward voltage drop, increase the contact discharge area, reduce the on-resistance of the diode, and improve its ability to handle excessive current while ensuring the voltage resistance performance, and is suitable for high-current, high-power power electronic applications, such as high-voltage direct current transmission and high-power motor drives.

[0057] In the diode of the present invention, the second metal layer 7 includes a titanium metal layer. The introduction of the titanium metal layer can form a good Schottky contact with the N-type epitaxial layer, reduce the leakage current of the diode, improve the voltage resistance of the diode, and reduce the switching loss of the diode. It is suitable for high-frequency and high-power power electronic devices, such as power inverters and frequency converters; and / or the third metal layer 8 includes an aluminum metal layer. The use of the aluminum metal layer not only improves the heat dissipation capacity of the diode, but also enhances its mechanical strength. It is suitable for power electronic devices that require good heat dissipation and durability, such as electric vehicle battery management systems and industrial motor drives; and / or the back metal layer 9 includes a titanium metal layer, a nickel metal layer and a silver metal layer arranged in sequence in a direction away from the N-type substrate 1. Such a multi-layer structure can provide stable connection and good heat dissipation performance, and is suitable for applications in high-power and high-temperature environments.

[0058] like Fig.10As shown, the present invention also provides a diode preparation method for preparing the above-mentioned diode, the diode preparation method comprising: providing an N-type substrate 1; providing an N-type epitaxial layer 2 on the N-type substrate 1; forming a plurality of grooves 3 including a first groove 31, a second groove 32 and a third groove 33 on the N-type epitaxial layer 2 by dry etching; filling P-type epitaxy into each groove 3 to form a plurality of P-type epitaxial regions 4; removing a portion of the P-type epitaxial region 4 in the second groove 32 by dry etching to form an open groove 41; filling the first metal into the open groove 41 to form a first metal filling region 5.

[0059] When performing the step of filling the first metal into the opening groove 41 to form the first metal filling region 5 , the diode preparation method includes: thermally annealing the first metal filling region 5 to form an ohmic contact between the first metal filling region 5 and the corresponding P-type epitaxial region 4 .

[0060] The thermal annealing temperature is greater than 900°C.

[0061] Specifically, the thermal annealing process can optimize the interface between the metal and the semiconductor (i.e., the first metal filling region 5 and the corresponding P-type epitaxial region 4) so ​​that a low-resistance ohmic contact is formed between the first metal filling region 5 and the corresponding P-type epitaxial region 4, which can significantly improve the current transmission efficiency and reliability of the diode.

[0062] like Fig.10 As shown, the diode manufacturing method includes: implanting P-type ions on the N-type epitaxial layer 2 to form a P-type ion implantation region 6 .

[0063] like Fig.10 As shown, the diode preparation method includes: setting a second metal layer 7 on the side of the N-type epitaxial layer 2 away from the N-type substrate 1; setting a third metal layer 8 on the side of the second metal layer 7 away from the N-type epitaxial layer 2; and setting a back metal layer 9 on the side of the N-type substrate 1 away from the N-type epitaxial layer 2.

[0064] Specifically, the back metal layer 9 is manufactured by conventional processes without high temperature or thermal annealing treatment.

[0065] When executing the step of setting the third metal layer 8 on the side of the second metal layer 7 away from the N-type epitaxial layer 2, the diode preparation method includes: preparing the third metal layer 8 at a high temperature, and thermally annealing the second metal layer 7 to form Schottky contacts between the second metal layer 7 and the N-type epitaxial layer 2, the P-type epitaxial region 4 and the P-type ion implantation region 6.

[0066] Herein, high temperature refers to a temperature greater than 400°C.

[0067] Specifically, high-temperature preparation and thermal annealing treatment can ensure the stability and low-loss characteristics of the Schottky contact between the second metal layer 7 and the N-type epitaxial layer 2, the P-type epitaxial region 4 and the P-type ion implantation region 6, which is suitable for high-frequency, high-power power electronic equipment, can significantly reduce the loss of the diode, and further improve the current transmission efficiency and reliability of the diode.

[0068] The diode prepared by the diode preparation method of the present invention not only has excellent electrical properties, such as high breakdown voltage, low on-resistance, high current carrying capacity, etc., but also has obvious advantages in thermal and mechanical properties, such as good heat dissipation capacity, use of high melting point materials, enhanced mechanical strength, etc. These characteristics enable the diode of the present invention to be widely used in various power electronic devices, especially in the fields of new energy vehicles, solar inverters, high-voltage direct current transmission, high-power motor drive, aerospace power systems, high-temperature industrial power supplies, and large-scale data center power supply, with significant economic benefits and social value. In addition, the stability and reliability of the diode of the present invention under high frequency, high current, high temperature and high pressure environments have opened up new possibilities for the development and application of power electronics technology, and helped to promote the development of power electronic devices to higher performance, higher efficiency and wider application fields.

[0069] From the above description, it can be seen that the above embodiments of the present invention achieve the following technical effects:

[0070] The diode of the present invention comprises: an N-type substrate 1; an N-type epitaxial layer 2, which is arranged on one side of the N-type substrate 1; a plurality of grooves 3, which are arranged in the N-type epitaxial layer 2 at intervals along the length direction of the N-type epitaxial layer 2, one end of each groove 3 is arranged at intervals with the N-type substrate 1, and the other end of each groove 3 is connected with the side of the N-type epitaxial layer 2 away from the N-type substrate 1; the plurality of grooves 3 include a first groove 31, a second groove 32 and a third groove 33 which are arranged in sequence, and the depth of the first groove 31 and the depth of the third groove 33 are both greater than the depth of the second groove 32; a plurality of P-type epitaxial regions 4, which are arranged in a one-to-one correspondence with the plurality of grooves 3; a first metal filling region 5, the P-type epitaxial region 4 in the second groove 32 forms an opening groove 41, and the first metal filling region 5 is arranged in the opening groove 41. In this way, the diode of the present invention achieves high performance and high reliability of the diode by arranging grooves 3 of different depths in the N-type epitaxial layer 2, arranging a P-type epitaxial region 4 in each groove 3, and forming a first metal filling region 5 in the opening groove 41 of the P-type epitaxial region 4 in the second groove 32, thereby improving the overall electrical performance and application range of the diode, optimizing the shape of the depletion region of the diode device when working in reverse, making the shape of its depletion region closer to a rectangle, improving the high voltage resistance per unit area of ​​the diode, solving the problem of poor high voltage resistance per unit area of ​​the SIC diode device in the prior art, and being able to significantly improve the efficiency and stability of power electronic equipment, and being particularly suitable for applications in high power, high frequency and high temperature environments, bringing significant benefits to the development of power electronic technology.

[0071] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0072] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values ​​of the parts and steps set forth in these embodiments do not limit the scope of the present application. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. The technology, method and equipment known to those of ordinary skill in the relevant field may not be discussed in detail, but in appropriate cases, the technology, method and equipment should be considered as a part of the authorization specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so that once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.

[0073] In the description of the present application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction, and therefore cannot be understood as limiting the scope of protection of the present application; the directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0074] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0075] In addition, it should be noted that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. Unless otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of this application.

[0076] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A diode, characterized in that: include: N-type substrate (1); An N-type epitaxial layer (2), the N-type epitaxial layer (2) being arranged on one side of the N-type substrate (1); A plurality of grooves (3), wherein the plurality of grooves (3) are arranged at intervals in the N-type epitaxial layer (2) along the length direction of the N-type epitaxial layer (2), one end of each of the grooves (3) is arranged at intervals with the N-type substrate (1), and the other end of each of the grooves (3) is connected with a side of the N-type epitaxial layer (2) away from the N-type substrate (1); the plurality of grooves (3) include a first groove (31), a second groove (32) and a third groove (33) which are arranged in sequence, and the depth of the first groove (31) and the depth of the third groove (33) are both greater than the depth of the second groove (32); A plurality of P-type epitaxial regions (4), the plurality of P-type epitaxial regions (4) being arranged in a one-to-one correspondence in the plurality of trenches (3); A first metal filling region (5), the P-type epitaxial region (4) in the second trench (32) forms an opening groove (41), and the first metal filling region (5) is arranged in the opening groove (41).

2. The diode according to claim 1, characterized in that Each of the grooves (3) is a rectangular groove, the depth of the first groove (31) is equal to the depth of the third groove (33), the width of the first groove (31) is equal to the width of the third groove (33) and is smaller than the width of the second groove (32).

3. The diode according to claim 1, characterized in that The diode comprises a P-type ion implantation region (6), and the P-type ion implantation region (6) is arranged in the N-type epitaxial layer (2).

4. The diode according to claim 3, characterized in that The doping concentration of the P-type ion implantation region (6) is lower than the doping concentration of the P-type epitaxial region (4).

5. The diode according to claim 3, characterized in that The P-type ion implantation region (6) is provided on a side of the first groove (31) close to the second groove (32), and the P-type ion implantation region (6) is not provided on a side of the first groove (31) away from the second groove (32); and / or The P-type ion implantation regions (6) are disposed on opposite sides of the second groove (32); and / or The P-type ion implantation region (6) is arranged on a side of the third trench (33) close to the second trench (32), and the P-type ion implantation region (6) is not arranged on a side of the third trench (33) away from the second trench (32).

6. The diode according to claim 3, characterized in that The depth of the P-type ion implantation region (6) is less than the depth of the groove (3); and / or The width of the P-type ion implantation region (6) is greater than the width of the first trench (31) and greater than the width of the third trench (33); and / or The width of the P-type ion implantation region (6) is smaller than the width of the second groove (32).

7. The diode according to claim 1, characterized in that The first metal filling area (5) is made of nickel; and / or An ohmic contact is formed between the first metal filling region (5) and the P-type epitaxial region (4).

8. The diode according to claim 1, characterized in that The diode comprises: A second metal layer (7), the second metal layer (7) being arranged on a side of the N-type epitaxial layer (2) away from the N-type substrate (1); a third metal layer (8), the third metal layer (8) being arranged on a side of the second metal layer (7) away from the N-type epitaxial layer (2); A back metal layer (9), the back metal layer (9) being arranged on a side of the N-type substrate (1) away from the N-type epitaxial layer (2).

9. The diode according to claim 8, characterized in that A Schottky contact is formed between the second metal layer (7), the N-type epitaxial layer (2) and the P-type epitaxial region (4); and / or An ohmic contact is formed between the back metal layer (9) and the N-type epitaxial layer (2).

10. The diode according to claim 8, characterized in that The second metal layer (7) comprises a titanium metal layer; and / or The third metal layer (8) comprises an aluminum metal layer; and / or The back metal layer (9) comprises a titanium metal layer, a nickel metal layer and a silver metal layer which are sequentially arranged in a direction away from the N-type substrate (1).

11. A method for preparing a diode, characterized in that: Used to prepare a diode according to any one of claims 1 to 10, the diode preparation method comprising: Providing an N-type substrate (1); Providing an N-type epitaxial layer (2) on the N-type substrate (1); Forming a plurality of trenches (3) including a first trench (31), a second trench (32) and a third trench (33) on the N-type epitaxial layer (2) by dry etching; Filling each of the trenches (3) with P-type epitaxy to form a plurality of P-type epitaxial regions (4), removing a portion of the P-type epitaxial region (4) in the second trench (32) by dry etching to form an opening groove (41); The first metal is filled into the opening groove (41) to form the first metal filling area (5).

12. The method for preparing a diode according to claim 11, characterized in that: When performing the step of filling the first metal into the opening groove (41) to form the first metal filling area (5), the diode preparation method comprises: The first metal filling region (5) is thermally annealed to form an ohmic contact between the first metal filling region (5) and the corresponding P-type epitaxial region (4).

13. The method for preparing a diode according to claim 11, characterized in that: The diode preparation method comprises: P-type ions are implanted into the N-type epitaxial layer (2) to form a P-type ion implantation region (6).

14. The method for preparing a diode according to claim 11, characterized in that: The diode preparation method comprises: A second metal layer (7) is provided on a side of the N-type epitaxial layer (2) away from the N-type substrate (1); A third metal layer (8) is provided on a side of the second metal layer (7) away from the N-type epitaxial layer (2); A back metal layer (9) is provided on a side of the N-type substrate (1) away from the N-type epitaxial layer (2).

15. The method for preparing a diode according to claim 14, characterized in that: When performing the step of providing a third metal layer (8) on a side of the second metal layer (7) away from the N-type epitaxial layer (2), the diode preparation method comprises: The third metal layer (8) is prepared at a high temperature, and the second metal layer (7) is thermally annealed, so that a Schottky contact is formed between the second metal layer (7) and the N-type epitaxial layer (2) and the P-type epitaxial region (4).

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