Dual-frequency impedance matching method for ultrasonic transducer

Abstract

The invention provides a double-frequency impedance matching method for an ultrasonic transducer, and the method comprises the steps: obtaining a first inductance and a first capacitance of a single-frequency impedance matching circuit at a first target frequency, wherein the inductance and capacitance combination mode of the single-frequency impedance matching circuit is determined by the target impedance of the ultrasonic transducer under the first working frequency and the second working frequency and the impedance real part of the ultrasonic transducer; acquiring a second inductance and a second capacitance of the single-frequency impedance matching circuit under a second target frequency; according to the first target frequency, the second target frequency, the first inductance, the second inductance, the first capacitance and the second capacitance, determining a target combination mode of the inductance and the capacitance in the dual-frequency impedance matching circuit, and a corresponding target inductance value and a target capacitance value, the impedance of the ultrasonic transducer at the first target frequency is the same as that of the ultrasonic transducer at the second target frequency. The circuit can be compatible with impedance characteristics of two frequencies, and is simple in structure.

Description

Technical Field

[0001] The present invention relates to the application field of medical equipment, and in particular to a dual-frequency impedance matching method for an ultrasonic transducer. Background Art

[0002] Focused ultrasound therapy is focused ultrasound ablation, a non-invasive physical therapy technology. It uses the directionality, tissue penetration and focusing of ultrasound to focus ultrasound to a specific area inside the human body, and ablates the lesion tissue by generating thermal effects, mechanical effects or cavitation effects, thereby achieving the purpose of treatment. This technology can directly act on deep tissues or lesions without the need for surgery, achieving non-invasive treatment effects. Focused ultrasound therapy has been widely used in clinical practice, especially in gynecological tumors, urinary system tumors, abdominal tumors, neck tumors and brain and nervous system diseases.

[0003] Focused ultrasound therapy equipment mainly includes several key components, such as ultrasonic transducer, power driver, impedance matching circuit, guided image, control software, etc. These components work together to ensure that focused ultrasound therapy can be carried out accurately and effectively.

[0004] However, the existing impedance matching circuit is designed for the fundamental frequency of the ultrasonic transducer, and now more and more clinical applications require the ultrasonic transducer to work alternately at its fundamental frequency and its frequency doubling state. Therefore, the power drive power supply requires the impedance of the ultrasonic transducer at the two frequencies to be the same or similar. There are currently two matching methods to achieve this alternating operation of the fundamental frequency and the frequency doubling. The first method: manual switching, which is slow, labor-intensive, and has poor feasibility; the second method: automatic control, which increases the complexity of the equipment, the difficulty of debugging, the difficulty of production, and the cost, and reduces reliability. Summary of the invention

[0005] In view of the above problems existing in the prior art, the present invention proposes a dual-frequency impedance matching method for an ultrasonic transducer, which mainly solves the problems that the existing dual-frequency impedance matching requires switching of different matching circuits, the switching control is complex, and the equipment cost is high.

[0006] In order to achieve the above purpose and other purposes, the technical solution adopted by the present invention is as follows.

[0007] The present application provides a dual-frequency impedance matching method for an ultrasonic transducer, the method comprising: obtaining a first inductor and a first capacitor of a single-frequency impedance matching circuit at a first target frequency, wherein a combination of the inductor and the capacitor of the single-frequency impedance matching circuit is determined by a target impedance of the ultrasonic transducer at a first operating frequency and a second operating frequency and a real part of the impedance of the ultrasonic transducer; obtaining a second inductor and a second capacitor of the single-frequency impedance matching circuit at a second target frequency; and determining a target combination of the inductor and the capacitor in the dual-frequency impedance matching circuit, and a corresponding target inductor value and a target capacitor value according to the first target frequency, the second target frequency, the first inductor, the second inductor, the first capacitor and the second capacitor, so that the impedance of the ultrasonic transducer at the first target frequency and the second target frequency is the same.

[0008] In an embodiment of the present application, determining a target combination of inductance and capacitance in the dual-frequency impedance matching circuit according to the first target frequency, the second target frequency, the first inductance, the second inductance, the first capacitance, and the second capacitance includes:

[0009] When the first target frequency is less than the second target frequency, and the first inductance is less than the second inductance, the target combination includes: connecting the inductor and the capacitor in series or in parallel;

[0010] When the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance, the target combination includes: an inductor and a capacitor are connected in series and then connected in parallel with an inductor; an inductor and a capacitor are connected in parallel and then connected in series with an inductor; or an inductor and a capacitor are connected in series and then connected in parallel with an inductor, and then connected in series with the first inductor;

[0011] When the first target frequency is less than the second target frequency, and the first capacitance is less than the second capacitance, the target combination includes: the capacitor and the inductor are connected in parallel or in series;

[0012] When the first target frequency is less than the second target frequency and the first capacitance is greater than the second capacitance, the target combination includes: a capacitor connected in parallel with an inductor and then connected in series with a capacitor; a capacitor connected in series with an inductor and then connected in parallel with a capacitor; or a capacitor connected in series with an inductor and then connected in parallel with a capacitor, and then connected in series with the second capacitor.

[0013] In one embodiment of the present application, the combination of inductance and capacitance of the single-frequency impedance matching circuit includes:

[0014] When the target impedance at the first operating frequency and the second operating frequency is greater than the real part of the impedance of the ultrasonic transducer at the first operating frequency and the second operating frequency, the ultrasonic transducer is first connected in series with an inductor and then connected to ground through a capacitor, or the ultrasonic transducer is first connected in series with a capacitor and then connected to ground through an inductor;

[0015] When the target impedance at the first operating frequency and the second operating frequency is less than the real part of the impedance of the ultrasonic transducer at the first operating frequency and the second operating frequency, the ultrasonic transducer is first grounded through a capacitor and then connected in series with an inductor, or the ultrasonic transducer is first grounded through an inductor and then connected in series with a capacitor.

[0016] In an embodiment of the present application, when the first target frequency is less than the second target frequency and the first inductance is less than the second inductance, in a target combination mode of inductance and capacitance connected in series, a method for calculating the target inductance includes:

[0017]

[0018] The target capacitance is calculated by:

[0019]

[0020] Wherein, f1 is the first target frequency, f2 is the second target frequency, L is the first inductance, Lx is the second inductance, L1 is the series inductance, and C1 is the series capacitance;

[0021] In the target combination of inductance and capacitance in parallel, the target inductance is calculated by:

[0022]

[0023] The target capacitance is calculated by:

[0024]

[0025] Wherein, L1 is a parallel inductor, C1 is a parallel capacitor, and L>L1.

[0026] In an embodiment of the present application, when the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance, in a target combination mode in which an inductor and a capacitor are connected in series and then in parallel with an inductor, a calculation method of the target inductance includes:

[0027]

[0028] The target capacitance is calculated by:

[0029]

[0030] Wherein, L2 is the inductor connected in series with the capacitor C2, and L3 is the inductor connected in parallel with L2; f1 is the first target frequency, f2 is the second target frequency, L is the first inductor, Lx is the second inductor, and the calculated values ​​of L2, C2 and L3 are positive;

[0031] In a target combination mode where an inductor and a capacitor are connected in parallel and then connected in series with an inductor, the target inductance is calculated by:

[0032]

[0033] The target capacitance is calculated by:

[0034]

[0035] Wherein, L2 is the inductor connected in parallel with capacitor C2, L3 is the inductor connected in series with L2, and the calculated values ​​of L2, C2 and L3 are positive;

[0036] In a target combination mode in which an inductor is connected in series with a capacitor, an inductor is connected in parallel, and then the first inductor is connected in series, the target inductor is calculated by:

[0037]

[0038] The target capacitance is calculated by:

[0039]

[0040] Wherein, L2 is the inductor connected in series with the capacitor C1, L3 is the inductor connected in parallel with L2, and the calculated values ​​of L2, C2 and L3 are positive.

[0041] In an embodiment of the present application, when the first target frequency is less than the second target frequency and the first capacitance is less than the second capacitance, in a target combination mode of connecting the capacitor and the inductor in parallel, a method for calculating the target inductance includes:

[0042]

[0043] The target capacitance is calculated by:

[0044]

[0045] Wherein, L4 is an inductor connected in parallel with capacitor C3; f1 is the first target frequency, f2 is the second target frequency, L is the first inductor, Lx is the second inductor, C is the first capacitor, Cx is the second capacitor, and the calculated values ​​of L4 and C3 are positive;

[0046] In the target combination mode of connecting the capacitor and the inductor in series, the target inductance is calculated by:

[0047]

[0048] The target capacitance is calculated by:

[0049]

[0050] Wherein, L4 is an inductor connected in series with capacitor C3.

[0051] In an embodiment of the present application, when the first target frequency is less than the second target frequency and the first capacitance is greater than the second capacitance, in a target combination mode in which a capacitor is connected in parallel with an inductor and then connected in series with a capacitor, a method for calculating the target inductance includes:

[0052]

[0053] The target capacitance is calculated by:

[0054]

[0055] Wherein, the inductor L5 is connected in parallel with the capacitor C4, the capacitor C5 is connected in series with the capacitor C4, f1 is the first target frequency, f2 is the second target frequency, L is the first inductor, Lx is the second inductor, C is the first capacitor, Cx is the second capacitor, and C5 can be any value between the first capacitor and the second capacitor;

[0056] In the target combination mode of connecting a capacitor in series with an inductor and then connecting a capacitor in parallel, the target inductance is calculated by:

[0057]

[0058] The target capacitance is calculated by:

[0059]

[0060] Among them, the inductor L5 is connected in series with the capacitor C4, the capacitor C5 is connected in parallel with the capacitors C4 and L5, and the calculated values ​​of L5, C5 and C4 are positive;

[0061] In a target combination mode in which a capacitor is connected in series with an inductor, a capacitor is connected in parallel, and then the second capacitor is connected in series, the target capacitance is calculated by:

[0062]

[0063] C5={C[Cx+C4-(2πf1) 2 CxC4L5]-CxC4} / [(2πf1) 2 (C-Cx)C4L5+Cx-C]

[0064] The inductor L5 is connected in series with the capacitor C4, the capacitor C5 is connected in parallel with the capacitors C4 and L5, the resonant frequency of L5 and C4 is equal to the second target frequency, and L5 takes any value that satisfies the resonant frequency.

[0065] As described above, the ultrasonic transducer dual-frequency impedance matching method proposed in the present invention has the following beneficial effects.

[0066] The present application constructs a dual-frequency impedance matching circuit through the inductance and capacitance of a single-frequency matching circuit at two target frequencies, which is used to be compatible with the two target frequencies, so that the impedance of the ultrasonic transducer at the corresponding target frequencies is the same, avoiding the tedious operation of manually switching the matching circuit and reducing the complexity of circuit control. The dual-frequency impedance matching circuit has a simple structure and low manufacturing cost and can meet the needs of different application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0067] Figure 1 Schematic diagram of the flow of a dual-frequency impedance matching method for an ultrasonic transducer in one embodiment of the present invention.

[0068] Figure 2 Schematic diagram of a single-frequency impedance matching circuit structure corresponding to a first target frequency when the target impedance is greater than the real part of the transducer impedance in one embodiment of the present application.

[0069] Figure 3 Schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a second target frequency when the target impedance is greater than the real part of the transducer impedance in one embodiment of the present application.

[0070] Figure 4 This is a schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a first target frequency when the target impedance is greater than the real part of the transducer impedance in another embodiment of the present application.

[0071] Figure 5 This is a schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a second target frequency when the target impedance is greater than the real part of the transducer impedance in another embodiment of the present application.

[0072] Figure 6 This is a schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a first target frequency when the target impedance is less than the real part of the transducer impedance in an embodiment of the present application.

[0073] Figure 7 Schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a second target frequency when the target impedance is less than the real part of the transducer impedance in one embodiment of the present application.

[0074] Figure 8This is a schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a first target frequency when the target impedance is less than the real part of the transducer impedance in another embodiment of the present application.

[0075] Fig. 9 This is a schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a second target frequency when the target impedance is less than the real part of the transducer impedance in another embodiment of the present application.

[0076] Fig.10 Schematic diagram of the dual-frequency impedance matching circuit structure in an embodiment of the present application when the first target frequency is greater than the second target frequency and the second inductance is greater than the first inductance.

[0077] Fig.11 This is a schematic structural diagram of a dual-frequency impedance matching circuit in another embodiment in which the first target frequency is greater than the second target frequency and the second inductance is greater than the first inductance.

[0078] Fig.12 Schematic diagram of the dual-frequency impedance matching circuit structure in an embodiment of the present application when the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance.

[0079] Fig.13 This is a schematic diagram of the structure of a dual-frequency impedance matching circuit in another embodiment of the present application when the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance.

[0080] Fig.14 This is a schematic diagram of the structure of a dual-frequency impedance matching circuit in another embodiment of the present application when the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance.

[0081] Fig.15 Schematic diagram of the dual-frequency impedance matching circuit structure in an embodiment of the present application when the first target frequency is less than the second target frequency and the first capacitance is less than the second capacitance.

[0082] Fig.16 This is a schematic diagram of the structure of a dual-frequency impedance matching circuit in another embodiment of the present application when the first target frequency is less than the second target frequency and the first capacitance is less than the second capacitance.

[0083] Fig.17 Schematic diagram of the dual-frequency circuit structure in an embodiment of the present application when the first target frequency is less than the second target frequency and the first capacitance is greater than the second capacitance.

[0084] Fig.18 This is a schematic diagram of the dual-frequency circuit structure in another embodiment of the present application when the first target frequency is less than the second target frequency and the first capacitance is greater than the second capacitance.

[0085] Fig.19This is a schematic diagram of the dual-frequency circuit structure in another embodiment of the present application when the first target frequency is less than the second target frequency and the first capacitance is greater than the second capacitance. DETAILED DESCRIPTION

[0086] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0087] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and thus the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0088] The inventors have found that:

[0089] Normally, the rated load impedance of the power driving power supply of the focused ultrasound device is inconsistent with the impedance of the ultrasonic transducer itself. If the impedance of the transducer does not match the impedance of the power driving power supply, reflection and loss will occur during the energy transfer process, resulting in the inability to effectively transfer energy to the target area, thus affecting the treatment effect. Therefore, impedance matching is required between the power driving power supply and the ultrasonic transducer. Impedance matching includes two aspects. One is to make the power driving power supply output the rated electric power to the transducer through matching. This is because the driving power supply needs an optimal load to output the rated power, and the impedance of the transducer is transformed into the optimal load, which is the impedance transformation effect; the other is to make the output efficiency of the driving power supply the highest through matching. This is because the transducer has electrostatic resistance, which causes a certain phase difference between the output voltage and current at the working frequency, so that the output power cannot be used to the maximum extent expected, and the output efficiency of the driving power supply is reduced. It can be seen that the quality of matching directly affects the generation and efficiency of the power ultrasonic power supply.

[0090] The existing impedance matching circuit is designed for the fundamental frequency of the ultrasonic transducer. However, more and more clinical applications now require ultrasonic transducers to work alternately at their fundamental frequency and their frequency multiples. Therefore, the power drive power supply requires the impedance of the ultrasonic transducer at the two frequencies to be the same or similar. There are currently two matching methods to achieve this alternating operation of the fundamental frequency and the frequency multiples. The first method: manual switching, which is slow, labor-intensive, and has poor feasibility; the second method: automatic control, which increases the complexity of the equipment, the difficulty of debugging, the difficulty of production, and the cost, and reduces reliability.

[0091] Based on the above problems existing in the prior art, the present application proposes a dual-frequency impedance matching method for an ultrasonic transducer. The technical solution of the present application is described in detail below in conjunction with specific embodiments.

[0092] See also Figure 1 , Figure 1 The following is a flow chart of a dual-frequency impedance matching method for an ultrasonic transducer in an embodiment of the present application. The method provided in the embodiment of the present application includes:

[0093] Step S100, obtaining a first inductor and a first capacitor of a single-frequency impedance matching circuit at a first target frequency, wherein a combination of the inductor and the capacitor of the single-frequency impedance matching circuit is determined by a target impedance of an ultrasonic transducer at a first operating frequency and a second operating frequency and a real part of the impedance of the ultrasonic transducer;

[0094] In one embodiment, the combination of inductance and capacitance of the single-frequency impedance matching circuit includes:

[0095] When the target impedance at the first operating frequency and the second operating frequency is greater than the real part of the impedance of the ultrasonic transducer at the first operating frequency and the second operating frequency, the ultrasonic transducer is first connected in series with an inductor and then grounded through a capacitor, or the ultrasonic transducer is first connected in series with a capacitor and then grounded through an inductor. Figure 2-5 , Figure 2 Schematic diagram of a single-frequency impedance matching circuit structure corresponding to a first target frequency when the target impedance is greater than the real part of the transducer impedance in one embodiment of the present application. Figure 3 Schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a second target frequency when the target impedance is greater than the real part of the transducer impedance in one embodiment of the present application. Figure 4 This is a schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a first target frequency when the target impedance is greater than the real part of the transducer impedance in another embodiment of the present application. Figure 5 This is a schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a second target frequency when the target impedance is greater than the real part of the transducer impedance in another embodiment of the present application. Figure 2 and Figure 4 The first capacitor C and the first inductor L have different values. Figure 3 and Figure 5 The values ​​of the second capacitor Cx and the second inductor Lx are different.

[0096] When the target impedance at the first operating frequency and the second operating frequency is less than the real part of the impedance of the ultrasonic transducer at the first operating frequency and the second operating frequency, the ultrasonic transducer is first connected to ground through a capacitor and then connected in series with an inductor, or the ultrasonic transducer is first connected to ground through an inductor and then connected in series with a capacitor. Figure 6-Figure 9 , Figure 6 This is a schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a first target frequency when the target impedance is less than the real part of the transducer impedance in one embodiment of the present application. Figure 7 This is a schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a second target frequency when the target impedance is less than the real part of the transducer impedance in one embodiment of the present application. Figure 8 This is a schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a first target frequency when the target impedance is less than the real part of the transducer impedance in another embodiment of the present application. Fig. 9 This is a schematic diagram of the structure of a single-frequency impedance matching circuit corresponding to a second target frequency when the target impedance is less than the real part of the transducer impedance in another embodiment of the present application. Figure 6 and Figure 8 The first capacitor C and the first inductor L have different values. Figure 7 and Fig. 9 The values ​​of the second capacitor Cx and the second inductor Lx are different. The specific capacitor and inductor combination of the single-frequency impedance matching circuit can be selected and configured according to actual application requirements. After determining the capacitor and inductor combination of the single-frequency impedance matching circuit, the corresponding first capacitor and first inductor can be obtained.

[0097] Step S110, obtaining a second inductance and a second capacitance of the single-frequency impedance matching circuit at a second target frequency.

[0098] Step S120, determining a target combination of inductance and capacitance in a dual-frequency impedance matching circuit, and corresponding target inductance value and target capacitance value according to the first target frequency, the second target frequency, the first inductance, the second inductance, the first capacitance and the second capacitance, so that the impedance of the ultrasonic transducer at the first target frequency and the second target frequency is the same.

[0099] The embodiment of the present application utilizes a combination of inductance and capacitance to make the impedance characteristics of the dual-frequency impedance matching circuit equivalent to L and C at frequency f1, and equivalent to Lx and Cx at frequency f2, achieving Figure 2 and Figure 3 , Figure 4 and Figure 5 , Figure 6 and Figure 7 , Figure 8and Fig. 9 The purpose of combining two into one.

[0100] In one embodiment, determining a target combination of inductance and capacitance in a dual-frequency impedance matching circuit according to the first target frequency, the second target frequency, the first inductance, the second inductance, the first capacitance, and the second capacitance includes: when the first target frequency is less than the second target frequency and the first inductance is less than the second inductance, the target combination includes: connecting the inductance and the capacitance in series or in parallel; when the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance, the target combination includes: connecting the inductance and the capacitance in series and then in parallel with an inductor; connecting the inductance and the capacitance in parallel and then in parallel with each other; in series with an inductor; or, the inductor and the capacitor are connected in series, then an inductor is connected in parallel, and then the first inductor is connected in series; when the first target frequency is lower than the second target frequency, and the first capacitor is lower than the second capacitor, the target combination includes: the capacitor and the inductor are connected in parallel or in series; when the first target frequency is lower than the second target frequency, and the first capacitor is larger than the second capacitor, the target combination includes: the capacitor and the inductor are connected in parallel, then a capacitor is connected in series; the capacitor and the inductor are connected in series, then a capacitor is connected in parallel; or, the capacitor and the inductor are connected in series, then a capacitor is connected in parallel, and then the second capacitor is connected in series.

[0101] See also Fig.10 , Fig.10 This is a schematic diagram of the dual-frequency impedance matching circuit structure in an embodiment of the present application when the first target frequency is greater than the second target frequency and the second inductance is greater than the first inductance. When the first target frequency is less than the second target frequency and the first inductance is less than the second inductance, in the target combination of inductance and capacitance in series, the calculation method of the target inductance includes:

[0102]

[0103] The target capacitance is calculated by:

[0104]

[0105] Wherein, f1 is the first target frequency, f2 is the second target frequency, L is the first inductance, Lx is the second inductance, L1 is the series inductance, and C1 is the series capacitance.

[0106] See also Fig.11 , Fig.11 This is a schematic diagram of a dual-frequency impedance matching circuit structure in another embodiment of the invention, in which the first target frequency is greater than the second target frequency and the second inductance is greater than the first inductance. In the target combination of inductance and capacitance in parallel, the target inductance is calculated by:

[0107]

[0108] The target capacitance is calculated by:

[0109]

[0110] Wherein, L1 is a parallel inductor, C1 is a parallel capacitor, and L>L1.

[0111] See also Fig.12 , Fig.12 This is a schematic diagram of the dual-frequency impedance matching circuit structure in an embodiment of the present application when the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance. When the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance, in the target combination mode of connecting an inductor in series with a capacitor and then in parallel with an inductor, the calculation method of the target inductance includes:

[0112]

[0113] The target capacitance is calculated by:

[0114]

[0115] Wherein, L2 is the inductor connected in series with the capacitor C2, and L3 is the inductor connected in parallel with L2; f1 is the first target frequency, f2 is the second target frequency, L is the first inductor, Lx is the second inductor, and the calculated values ​​of L2, C2 and L3 are positive.

[0116] See also Fig.13 , Fig.13 This is a schematic diagram of the dual-frequency impedance matching circuit structure in another embodiment of the present application when the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance. In the target combination mode of connecting the inductor and the capacitor in parallel and then in series with an inductor, the calculation method of the target inductance includes:

[0117]

[0118] The target capacitance is calculated by:

[0119]

[0120] Wherein, L2 is the inductor connected in parallel with the capacitor C2, L3 is the inductor connected in series with L2, and the calculated values ​​of L2, C2 and L3 are positive.

[0121] See also Fig.14 , Fig.14This is a schematic diagram of the dual-frequency impedance matching circuit structure in another embodiment of the present application, where the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance. In the target combination mode where the inductor and the capacitor are connected in series, an inductor is connected in parallel, and then the first inductor is connected in series, the calculation method of the target inductance includes:

[0122]

[0123] The target capacitance is calculated by:

[0124]

[0125] Wherein, L2 is the inductor connected in series with the capacitor C1, L3 is the inductor connected in parallel with L2, and the calculated values ​​of L2, C2 and L3 are positive.

[0126] See also Fig.15 , Fig.15 This is a schematic diagram of the dual-frequency impedance matching circuit structure in an embodiment of the present application when the first target frequency is less than the second target frequency and the first capacitance is less than the second capacitance. When the first target frequency is less than the second target frequency and the first capacitance is less than the second capacitance, in the target combination mode of the capacitor and the inductor in parallel, the calculation method of the target inductance includes:

[0127]

[0128] The target capacitance is calculated by:

[0129]

[0130] Wherein, L4 is the inductor connected in parallel with the capacitor C3; f1 is the first target frequency, f2 is the second target frequency, L is the first inductor, Lx is the second inductor, C is the first capacitor, Cx is the second capacitor, and the calculated values ​​of L4 and C3 are positive.

[0131] See also Fig.16 , Fig.16 This is a schematic diagram of the structure of a dual-frequency impedance matching circuit in another embodiment of the present application, where the first target frequency is less than the second target frequency and the first capacitance is less than the second capacitance. In the target combination mode of the capacitor and the inductor connected in series, the calculation method of the target inductance includes:

[0132]

[0133] The target capacitance is calculated by:

[0134]

[0135] Wherein, L4 is an inductor connected in series with capacitor C3.

[0136] See also Fig.17 , Fig.17 This is a schematic diagram of the dual-frequency circuit structure when the first target frequency is less than the second target frequency and the first capacitance is greater than the second capacitance in an embodiment of the present application. When the first target frequency is less than the second target frequency and the first capacitance is greater than the second capacitance, in the target combination mode of connecting a capacitor in parallel with an inductor and then connecting a capacitor in series, the calculation method of the target inductance includes:

[0137]

[0138] The target capacitance is calculated by:

[0139]

[0140] Among them, inductor L5 is connected in parallel with capacitor C4, capacitor C5 is connected in series with capacitor C4, f1 is the first target frequency, f2 is the second target frequency, L is the first inductor, Lx is the second inductor, C is the first capacitor, Cx is the second capacitor, and C5 can take any value between the first capacitor and the second capacitor.

[0141] See also Fig.18 , Fig.18 This is a schematic diagram of the dual-frequency circuit structure in another embodiment of the present application when the first target frequency is less than the second target frequency and the first capacitance is greater than the second capacitance. In the target combination mode of connecting a capacitor in series with an inductor and then connecting a capacitor in parallel, the calculation method of the target inductance includes:

[0142]

[0143] The target capacitance is calculated by:

[0144]

[0145] The inductor L5 is connected in series with the capacitor C4, the capacitor C5 is connected in parallel with the capacitors C4 and L5, and the calculated values ​​of L5, C5 and C4 are positive.

[0146] See also Fig.19 , Fig.19 This is a schematic diagram of the dual-frequency circuit structure in another embodiment of the present application when the first target frequency is less than the second target frequency and the first capacitance is greater than the second capacitance. In the target combination mode of connecting a capacitor in series with an inductor, then connecting a capacitor in parallel, and then connecting the second capacitor in series, the calculation method of the target capacitance includes:

[0147]

[0148] C5={C[Cx+C4-(2πf1)2 CxC4L5]-CxC4} / [(2πf1) 2 (C-Cx)C4L5+Cx-C]

[0149] The inductor L5 is connected in series with the capacitor C4, the capacitor C5 is connected in parallel with the capacitors C4 and L5, the resonant frequency of L5 and C4 is equal to the second target frequency, and L5 takes any value that satisfies the resonant frequency.

[0150] Based on the technical solutions of the above embodiments of the present application, a dual-frequency impedance matching circuit can be used to make the impedance characteristics at two frequencies compatible, thereby avoiding the mismatch problem caused by frequent frequency switching. The circuit structure is simple and the operation is convenient. The corresponding dual-frequency impedance matching circuit can be selected according to actual application requirements to meet the usage requirements of different scenarios.

[0151] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A dual-frequency impedance matching method for an ultrasonic transducer, characterized in that: Acquire a first inductance and a first capacitance of a single-frequency impedance matching circuit at a first target frequency, wherein a combination of the inductance and the capacitance of the single-frequency impedance matching circuit is determined by a target impedance of the ultrasonic transducer at a first operating frequency and a second operating frequency and a real part of the impedance of the ultrasonic transducer; Obtaining a second inductance and a second capacitance of the single-frequency impedance matching circuit at a second target frequency; A target combination of inductance and capacitance in a dual-frequency impedance matching circuit, and corresponding target inductance values ​​and target capacitance values ​​are determined according to the first target frequency, the second target frequency, the first inductance, the second inductance, the first capacitance, and the second capacitance, so that the impedance of the ultrasonic transducer at the first target frequency and the second target frequency is the same.

2. The ultrasonic transducer dual-frequency impedance matching method according to claim 1, characterized in that: Determining a target combination of inductance and capacitance in the dual-frequency impedance matching circuit according to the first target frequency, the second target frequency, the first inductance, the second inductance, the first capacitance, and the second capacitance includes: When the first target frequency is less than the second target frequency, and the first inductance is less than the second inductance, the target combination includes: connecting the inductor and the capacitor in series or in parallel; When the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance, the target combination includes: an inductor and a capacitor are connected in series and then connected in parallel with an inductor; an inductor and a capacitor are connected in parallel and then connected in series with an inductor; or an inductor and a capacitor are connected in series and then connected in parallel with an inductor, and then connected in series with the first inductor; When the first target frequency is less than the second target frequency, and the first capacitance is less than the second capacitance, the target combination includes: the capacitor and the inductor are connected in parallel or in series; When the first target frequency is less than the second target frequency and the first capacitance is greater than the second capacitance, the target combination includes: a capacitor connected in parallel with an inductor and then connected in series with a capacitor; a capacitor connected in series with an inductor and then connected in parallel with a capacitor; or a capacitor connected in series with an inductor and then connected in parallel with a capacitor, and then connected in series with the second capacitor.

3. The ultrasonic transducer dual-frequency impedance matching method according to claim 1, characterized in that: The inductor and capacitor combination of the single-frequency impedance matching circuit includes: When the target impedance at the first operating frequency and the second operating frequency is greater than the real part of the impedance of the ultrasonic transducer at the first operating frequency and the second operating frequency, the ultrasonic transducer is first connected in series with an inductor and then connected to ground through a capacitor, or the ultrasonic transducer is first connected in series with a capacitor and then connected to ground through an inductor; When the target impedance at the first operating frequency and the second operating frequency is less than the real part of the impedance of the ultrasonic transducer at the first operating frequency and the second operating frequency, the ultrasonic transducer is first grounded through a capacitor and then connected in series with an inductor, or the ultrasonic transducer is first grounded through an inductor and then connected in series with a capacitor.

4. The ultrasonic transducer dual-frequency impedance matching method according to claim 2, characterized in that: When the first target frequency is less than the second target frequency, and the first inductance is less than the second inductance, in a target combination of an inductor and a capacitor connected in series, a calculation method of the target inductance includes: L1=Lx+1 / [(2πf2) 2 C1] The target capacitance is calculated by: <h2 style=";text-align:left;direction:ltr">C1=(f2<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> -f1<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> ) / [(2πf1f2)<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> (LxL)] Wherein, f1 is the first target frequency, f2 is the second target frequency, L is the first inductance, Lx is the second inductance, L1 is the series inductance, and C1 is the series capacitance; In the target combination of inductance and capacitance in parallel, the target inductance is calculated by: L1=(f2 2 -f1 2 )LLx / (f2 2 Lx-f1 2 L) The target capacitance is calculated by: C1=(L-L1) / [(2πf1) 2 LL1] Wherein, L1 is a parallel inductor, C1 is a parallel capacitor, and L>L1.

5. The ultrasonic transducer dual-frequency impedance matching method according to claim 2, characterized in that: When the first target frequency is less than the second target frequency and the first inductance is greater than the second inductance, in a target combination mode in which an inductor and a capacitor are connected in series and then in parallel with an inductor, the target inductance is calculated by: <h2 style=";text-align:left;direction:ltr">L2 = [(2πf1)<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> LL3C2+L3-L] / [(2πf1)<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> (L3-L)C2] The target capacitance is calculated by: <h2 style=";text-align:left;direction:ltr">C2 = (L3-L)(L3-Lx)(f2<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> -f1<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> ) / [(2πf1f2)<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> (Lx-L)L3<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> ] Wherein, L2 is the inductor connected in series with the capacitor C2, L3 is the inductor connected in parallel with L2; f1 is the first target frequency, f2 is the second target frequency, L is the first inductor, and Lx is the second inductor; The calculated values ​​of L2, C2, and L3 are positive; In a target combination mode where an inductor and a capacitor are connected in parallel and then connected in series with an inductor, the target inductance is calculated by: <h2 style=";text-align:left;direction:ltr">L2 = (L3 - L) (L3 - Lx) (f2<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> -f1<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> ) / [(f1<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> (L-L3)-f2<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> (Lx-L3))] The target capacitance is calculated by: <h2 style=";text-align:left;direction:ltr">C2 = (L - L3 - L2) / [(2πf1)<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> (L-L3)L2] Wherein, L2 is the inductor connected in parallel with capacitor C2, L3 is the inductor connected in series with L2, and the calculated values ​​of L2, C2 and L3 are positive; In a target combination mode in which an inductor is connected in series with a capacitor, an inductor is connected in parallel, and then the first inductor is connected in series, the target inductor is calculated by: <h2 style=";text-align:left;direction:ltr">L3 = (Lx - L) [1 - (2πf2)<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> L2C2] / [1-(2πf2)<h2 style=";text-align:left;direction:ltr"> 2 <h2 style=";text-align:left;direction:ltr"> (L2-Lx+L)C2] The target capacitance is calculated by: C2=1 / [(2πf1) 2 L2] Wherein, L2 is the inductor connected in series with the capacitor C1, L3 is the inductor connected in parallel with L2, and the calculated values ​​of L2, C2 and L3 are positive.

6. The ultrasonic transducer dual-frequency impedance matching method according to claim 2, characterized in that: When the first target frequency is less than the second target frequency, and the first capacitance is less than the second capacitance, in a target combination mode of connecting the capacitor and the inductor in parallel, a method for calculating the target inductance includes: L4=(f2 2 -f1 2 ) / [(2πf1f2) 2 (Cx-C)] The target capacitance is calculated by: C3=C+1 / [(2πf1) 2 L4] Wherein, L4 is an inductor connected in parallel with capacitor C3; f1 is the first target frequency, f2 is the second target frequency, L is the first inductor, Lx is the second inductor, C is the first capacitor, Cx is the second capacitor, and the calculated values ​​of L4 and C3 are positive; In the target combination mode of connecting the capacitor and the inductor in series, the target inductance is calculated by: C3=CCx(f2 2 -f1 2 ) / [f2 2 Cx-f1 2 C] The target capacitance is calculated by: L4=(C-C3) / [(2πf1) 2 CC3] Wherein, L4 is an inductor connected in series with capacitor C3.

7. The ultrasonic transducer dual-frequency impedance matching method according to claim 2, characterized in that: When the first target frequency is less than the second target frequency and the first capacitance is greater than the second capacitance, in a target combination mode in which a capacitor is connected in parallel with an inductor and then connected in series with a capacitor, a method for calculating the target inductance includes: L5=(C5-Cx)(C5-C)(f2 2 -f1 2 )(Cx-C)C5 2 The target capacitance is calculated by: C4=[(2πf1) 2 CC5L5+C5-C] / [(2πf1) 2 (C5-C)L5] Wherein, the inductor L5 is connected in parallel with the capacitor C4, the capacitor C5 is connected in series with the capacitor C4, f1 is the first target frequency, f2 is the second target frequency, L is the first inductor, Lx is the second inductor, C is the first capacitor, Cx is the second capacitor, and C5 can be any value between the first capacitor and the second capacitor; In the target combination mode of connecting a capacitor in series with an inductor and then connecting a capacitor in parallel, the target inductance is calculated by: L5=(C-C4-C5) / [(2πf1) 2 (C-C5)C4] The target capacitance is calculated by: C4=(C-C5)(Cx-C5)(f2 2 -f1 2 ) / [(f1 2 (C-C5)-f2 2 (Cx-C5))] Among them, the inductor L5 is connected in series with the capacitor C4, the capacitor C5 is connected in parallel with the capacitors C4 and L5, and the calculated values ​​of L5, C5 and C4 are positive; In a target combination mode in which a capacitor is connected in series with an inductor, a capacitor is connected in parallel, and then the second capacitor is connected in series, the target capacitance is calculated by: C4=1 / [(2πf2) 2 L5] C5={C[Cx+C4-(2πf1) 2 CxC4L5]-CxC4} / [(2πf1) 2 (C-Cx)C4L5+Cx-C] The inductor L5 is connected in series with the capacitor C4, the capacitor C5 is connected in parallel with the capacitors C4 and L5, the resonant frequency of L5 and C4 is equal to the second target frequency, and L5 takes any value that satisfies the resonant frequency.

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